Battery management IC protection circuit

Abstract

The present invention provides a protection circuit for a battery management IC, the battery management IC including a first number of sampling pins, the protection circuit including a plurality of transient voltage suppression diodes (TVS), each TVS having a negative electrode connected to a cell corresponding to the last sampling pin in each group of sampling pins and a positive electrode connected to a cell corresponding to the first sampling pin in the battery management IC, the number of TVSs included in each group of sampling pins being the same, and the withstand voltage values ​​of each sampling pin in each group being the same. The protection circuit described in the present invention provides tiered protection for the first number of sampling pins in the battery management IC, and when surge limiting is performed for the last pin, it prevents the occurrence of surge voltages that exceed the withstand voltage values ​​of intermediate pins, thereby improving the reliability and lifespan of the battery management IC.

Description

[Technical Field]

[0001] The present invention relates to the field of circuit technology, and more particularly to a protection circuit for a battery management IC. [Background technology]

[0002] Currently, battery management ICs typically monitor the operating status of a battery by acquiring cell current, but surge phenomena caused by strong pulses during battery operation can damage the battery management IC. For example, front-end analog chips that measure cell systems in electric vehicles are susceptible to damage from sudden surge voltages and surge currents when acquiring cell current, which can affect the reliability and lifespan of the chip. Summary of the Invention

[0003] In view of this, the present invention provides a protection circuit for a battery management IC to solve at least the technical problems existing in the related art.

[0004] The present invention provides a protection circuit for a battery management IC, wherein the battery management IC includes a first number of sampling pins, and the protection circuit includes: a plurality of transient voltage suppression diodes TVS, each TVS having a negative terminal connected to a cell corresponding to the last sampling pin in each group of sampling pins and a positive terminal connected to a cell corresponding to the first sampling pin in the battery management IC; The number of TVSs included in the sampling pins of each group is the same, and the withstand voltage value of each sampling pin in each group is the same.

[0005] In combination with any of the embodiments of the present invention, the protection circuit comprises: The battery management IC further includes a low-pass filter provided between each pair of adjacent sampling pins; The low-pass filter includes a protection capacitor and a protection resistor.

[0006] In combination with any of the embodiments of the present invention, the battery management IC further includes a first number of balance pins, and the protection circuit includes: The battery management IC further includes a Zener diode provided between each pair of adjacent balance pins; The clamp voltage of the Zener diode is determined according to the breakdown voltage between adjacent balance pins.

[0007] In combination with any of the embodiments of the present invention, the battery management IC includes an analog front-end chip BQ79718, the analog front-end chip BQ79718 includes sampling pins 0 to 18, the sampling pins 1 to 6 have a first withstand voltage value, the sampling pins 7 to 12 have a second withstand voltage value, and the sampling pins 13 to 18 have a third withstand voltage value, and the protection circuit Three transient voltage suppression diodes TVS, the negative pole of the first TVS is connected to the cell corresponding to sampling pin 6, and the positive pole is connected to the cell corresponding to sampling pin 0; The negative electrode of the second TVS is connected to the cell corresponding to the sampling pin 12, and the positive electrode is connected to the cell corresponding to the sampling pin 0; The negative electrode of the third TVS is connected to the cell corresponding to sampling pin 18, and the positive electrode is connected to the cell corresponding to sampling pin 0.

[0008] In combination with any of the embodiments of the present invention, the sampling pins 1 to 18 are connected to the positive electrodes 1 to 18 of the cells, respectively, and the sampling pin 0 is connected to the negative electrode of the cell.

[0009] The protection circuit according to the embodiment of the present invention may include the following beneficial effects.

[0010] The protection circuit described in the present invention provides tiered protection for the first number of sampling pins in the battery management IC by providing a TVS between the last sampling pin of each group of pins with the same withstand voltage value and the first sampling pin in the battery management IC, and when limiting surges for the last pin, prevents the occurrence of surge voltages that exceed the withstand voltage values ​​of the intermediate pins, improving the reliability and lifespan of the battery management IC.

[0011] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. [Brief explanation of the drawings]

[0012] The drawings herein are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present invention, and together with the specification, serve to explain the principles of the invention. [Figure 1] FIG. 2 is a schematic diagram of a protection circuit according to an exemplary embodiment of the present invention. [Figure 2] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention. [Figure 3] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention. [Figure 4] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention. [Figure 5] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention. [Figure 6] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0013] Illustrative embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, the same numerals in different drawings refer to the same or similar elements unless otherwise noted. It should be noted that the embodiments described in the following illustrative examples do not represent all embodiments consistent with the present invention. On the contrary, they are merely examples of apparatus and methods consistent with certain aspects of the present invention, as set forth in the appended claims.

[0014] The terms used in the present invention are merely for the purpose of describing particular embodiments and are not intended to limit the present invention. As used in the present invention and in the claims, the singular forms "a," "the," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used in the present invention means to include any and all possible combinations of one or more of the associated listed items.

[0015] While the present invention may use terms such as "first," "second," and "third" to describe various pieces of information, it should be understood that such information is not limited to these terms. These terms are used only to distinguish between pieces of information of the same type. For example, first information may be referred to as "second information," and similarly, second information may be referred to as "first information" without departing from the scope of the present invention. Also, depending on the context, the word "if" used herein may be interpreted as "with," "when," or "in response to a determination."

[0016] Currently, battery management ICs typically monitor the operating status of batteries by acquiring cell current, but surge phenomena caused by strong pulses during battery operation can damage battery management ICs. For example, front-end analog chips that measure cell systems in electric vehicles are susceptible to damage from sudden surge voltages and surge currents when acquiring cell current, which affects the reliability and lifespan of the chips.

[0017] Currently, surge protection for battery management ICs is typically achieved by adding a transient voltage suppressor (TVS) diode between the first and last pins of the battery management IC. However, because there is a large difference in the withstand voltage values ​​between different pins in a battery management IC, when limiting surges on the last pin, a surge voltage that exceeds the withstand voltage value of the intermediate pins occurs, damaging the battery management IC.

[0018] In view of this, the present invention provides a protection circuit for a battery management IC to solve at least the technical problems existing in the related art.

[0019] 1 is a schematic diagram of a protection circuit according to an exemplary embodiment of the present invention. As shown in FIG. 1, the protection circuit may be provided between cells (cell0 to celln) and a battery management IC, and the battery management IC includes a first number of sampling pins (cell voltage sense input, e.g., VC0 to VCn). The protection circuit includes: It includes a plurality of transient voltage suppression diodes TVS, the negative electrode of each TVS is connected to the cell corresponding to the last sampling pin in each group of sampling pins, and the positive electrode is connected to the cell corresponding to the first sampling pin in the battery management IC, the number of TVS included in the sampling pins in each group is the same, and the withstand voltage value of each sampling pin in each group is the same.

[0020] For example, a TVS is an electronic component that has characteristics such as a low breakdown voltage, a fast instantaneous response time, and excellent reusability. If an external voltage changes rapidly (e.g., a surge occurs) after a TVS is applied between pins, the TVS can quickly distribute the excessive voltage to the ground or power line, protecting the battery management IC from high-voltage shock. Because there is a large difference in the withstand voltage values ​​between different pins in a battery management IC, a TVS is provided between a cell corresponding to the last sampling pin of each group of pins with the same withstand voltage value and a cell corresponding to the first sampling pin in the battery management IC. This achieves tiered protection for a first number of sampling pins in the battery management IC, and prevents surge voltages exceeding the withstand voltage values ​​of intermediate pins when limiting surges for the last pin.

[0021] Specifically, FIG. 2 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention.

[0022] As shown in FIG. 2, in the battery management IC, a first number of sampling pins may be divided into three sampling pin groups according to different withstand voltage values, where the withstand voltage value of the first sampling pin group is greater than that of the second sampling pin group, and the withstand voltage value of the second sampling pin group is greater than that of the third sampling pin group.

[0023] In the above example, the protection circuit may include three TVSs, the negative terminals of which are connected to the cells (cellx, cellly, celln) corresponding to the last sampling pin in each group of sampling pins, and the positive terminals of which are connected to the cell cell0 corresponding to the first sampling pin in the battery management IC.

[0024] In response to the battery management IC receiving a surge, the first TVS suppresses the surge voltage below the withstand voltage value of the first sampling pin group, the second TVS suppresses the surge voltage below the withstand voltage value of the second sampling pin group, and the third TVS suppresses the surge voltage below the withstand voltage value of the third sampling pin group, thereby realizing tiered protection for the first number of sampling pins in the battery management IC and avoiding the occurrence of surge voltages that exceed the withstand voltage values ​​of the intermediate pins when surge limiting is performed on the last pin.

[0025] FIG. 3 is a schematic diagram of another battery management IC according to an exemplary embodiment of the present invention.

[0026] As shown in FIG. 3, the battery management IC includes an analog front-end chip BQ79718, which includes sampling pins 0 to 18 (VC0 to VC18), where VC1 to VC6 have a first withstand voltage value (40V), VC7 to VC12 have a second withstand voltage value (85V), and VC13 to VC18 have a third withstand voltage value (108V).

[0027] Preferably, the VC1 to VC18 are connected to the positive electrodes cell1 to cell18 of the cells, respectively, and the VC0 is connected to the negative electrode cell0 of the cells.

[0028] Specifically, an analog front-end chip (AFC) is a chip dedicated to collecting and processing interface signals. AFCs are typically used to convert analog signals from sensors into digital signals for further processing by a digital processor (e.g., a microcontroller). AFCs can perform functions such as signal amplification, filtering, sampling, and improving noise immunity, and are an important component in digital signal processing systems.

[0029] Among these, the BQ79718 is an analog front-end chip that integrates high-performance battery protection functions and a power meter, and is primarily used in battery management systems for applications such as electric vehicles, industrial equipment, and energy storage systems. The BQ79718 integrates multiple functions, including battery protection, power metering, and voltage / current sampling, and also supports multiple communication interfaces, making it highly reliable. However, when acquiring the cell current of an electric vehicle, it is susceptible to damage from sudden surge voltages and surge currents in the vehicle battery, which can affect the reliability and lifespan of the battery management IC.

[0030] FIG. 4 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention.

[0031] 4, in the battery management IC, sampling pins 0 to 18 may be divided into three sampling pin groups according to the different withstand voltage values. In the above example, the protection circuit may include three TVSs.

[0032] The negative electrode of the first TVS is connected to the cell cell6 corresponding to the sampling pin 6, and the positive electrode is connected to the cell cell0 corresponding to the sampling pin 0.

[0033] The negative electrode of the second TVS is connected to the cell cell12 corresponding to the sampling pin 12, and the positive electrode is connected to the cell cell0 corresponding to the sampling pin 0.

[0034] The negative electrode of the third TVS is connected to the cell cell18 corresponding to the sampling pin 18, and the positive electrode is connected to the cell cell0 corresponding to the sampling pin 0.

[0035] In response to the battery management IC receiving a surge, the first TVS suppresses the surge voltage to 108V or less, the second TVS suppresses the surge voltage to 85V or less, and the third TVS suppresses the surge voltage to 40V or less, thereby realizing tiered protection for sampling pins 0 to 18 in the battery management IC and preventing the occurrence of surge voltages that exceed the withstand voltage values ​​of the intermediate pins when surge limiting is performed on the last pin.

[0036] The protection circuit described in the present invention provides tiered protection for the first number of sampling pins in the battery management IC by providing a TVS between the last sampling pin of each group of pins with the same withstand voltage value and the first sampling pin in the battery management IC, and when limiting surges for the last pin, prevents the occurrence of surge voltages that exceed the withstand voltage values ​​of the intermediate pins, improving the reliability and lifespan of the battery management IC.

[0037] FIG. 5 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention.

[0038] As shown in FIG. 5, the protection circuit further includes a low-pass filter disposed between each two adjacent sampling pins of the battery management IC, and the low-pass filter includes a protection capacitor and a protection resistor.

[0039] For example, the low-pass filter can perform filtering on surge voltages.

[0040] A low-pass filter consisting of a protective resistor and a protective capacitor (for example, a differential mode capacitor) in front of the sampling pin can filter out high-frequency signals and leave only low-frequency signals, that is, it can filter out surge voltages.

[0041] The protective capacitor can bear the surge voltage to prevent excessive voltage from damaging the sampling pin, and the protective resistor can limit the current when there is a large surge current in the input signal before the sampling pin to prevent the sampling pin from being damaged by excessive current.

[0042] The protection circuit described in the present invention adds a low-pass filter consisting of a resistor and a capacitor before the sampling pin, thereby filtering the signal and filtering out spike voltages, preventing the occurrence of surge voltages between adjacent sampling pins that exceed the withstand voltage of the pins, and further improving the reliability and lifespan of the battery management IC.

[0043] FIG. 6 is a schematic diagram of another protection circuit according to an exemplary embodiment of the present invention.

[0044] As shown in FIG. 6, the battery management IC further includes a first number of balance pins (Cell balance connections, for example, CB0 to CBn), and the protection circuit includes: The battery management IC further includes a Zener diode (e.g., a differential mode Zener diode) disposed between each pair of adjacent balance pins; The clamp voltage of the Zener diode is determined according to the breakdown voltage between adjacent balance pins.

[0045] The Zener diode enters a reverse breakdown state when the reverse voltage exceeds its rated breakdown voltage, and can stabilize the voltage at a rated value. It serves to stabilize the voltage and is used to limit the pulse differential voltage between the balance pins.

[0046] Taking the analog front-end chip BQ79718 as an example, if the withstand voltage between its adjacent balance pins is a maximum of 12V and the clamping voltage of the Zener diode is set to 12V, the Zener diodes installed between each pair of adjacent balance pins in the battery management IC can prevent damage to the battery management IC caused by an excessively high differential voltage between the balance pins, further improving the reliability and lifespan of the battery management IC.

[0047] Other embodiments of the present invention will readily occur to those skilled in the art after considering the specification and practicing the disclosures herein. The present invention is intended to cover any modifications, uses, or adaptations of the present invention, which modifications, uses, or adaptations comply with the general principles of the present invention and include common general knowledge or customary technical means in the art that are not disclosed herein. The specification and examples are exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

[0048] It should be understood that the present invention is not limited to the exact construction described above and illustrated in the drawings, and various modifications and variations are possible without departing from the scope of the present invention, which is limited only by the appended claims.

Claims

1. 1. A protection circuit for a battery management IC, the battery management IC including a first number of sampling pins, the protection circuit comprising: a plurality of transient voltage suppression diodes TVS, each TVS having a negative terminal connected to a cell corresponding to the last sampling pin in each group of sampling pins and a positive terminal connected to a cell corresponding to the first sampling pin in the battery management IC; The number of TVSs included in the sampling pins in each group is the same, and the withstand voltage value of each sampling pin in each group is the same. A protection circuit for a battery management IC.

2. The protection circuit includes: The battery management IC further includes a low-pass filter provided between each pair of adjacent sampling pins; the low-pass filter includes a protection capacitor and a protection resistor; 2. The protection circuit according to claim 1.

3. The battery management IC further includes a first number of balance pins, and the protection circuit includes: The battery management IC further includes a Zener diode provided between each pair of adjacent balance pins; The clamp voltage of the Zener diode is determined according to the breakdown voltage between adjacent balance pins.

2. The protection circuit according to claim 1.

4. The battery management IC includes an analog front-end chip BQ79718, and the analog front-end chip BQ79718 includes sampling pins 0 to 18, where sampling pins 1 to 6 have a first withstand voltage value, sampling pins 7 to 12 have a second withstand voltage value, and sampling pins 13 to 18 have a third withstand voltage value, and the protection circuit includes: Three transient voltage suppression diodes TVS, the negative pole of the first TVS being connected to the cell corresponding to sampling pin 6 and the positive pole being connected to the cell corresponding to sampling pin 0; The negative electrode of the second TVS is connected to the cell corresponding to sampling pin 12, and the positive electrode is connected to the cell corresponding to sampling pin 0; The negative pole of the third TVS is connected to the cell corresponding to sampling pin 18, and the positive pole is connected to the cell corresponding to sampling pin 0.

2. The protection circuit according to claim 1.

5. The sampling pins 1 to 18 are connected to the positive electrodes 1 to 18 of the cells, respectively, and the sampling pin 0 is connected to the negative electrode of the cell.

5. The protection circuit according to claim 4.

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