Semiconductor cleaning using plasma-free precursors.

Abstract

An exemplary semiconductor processing method may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed in a processing region of the semiconductor processing chamber. The method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The method may include providing a fluorine-containing precursor to the processing region. The fluorine-containing precursor may be plasma-free when provided to the processing region. The method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber using the fluorine-containing precursor.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. patent application Ser. No. 17 / 976,573, filed Oct. 28, 2022, entitled "SEMICONDUCTOR CLEANING USING PLASMA-FREE PRECURSORS," the entire contents of which are incorporated herein by reference.

[0002] Technical Field

[0002] The present technology relates to semiconductor cleaning processes. More particularly, the present technology relates to methods for cleaning semiconductor surfaces or components. [Background technology]

[0003]

[0003] Integrated circuits are made possible by processes for fabricating intricately patterned layers of material on substrate surfaces. Fabricating patterned materials on substrates requires controlled methods for forming and removing exposed material. After a deposition process is performed in a chamber, the chamber components may contain residual material from the deposition process. Chamber cleaning procedures can remove the residue from the chamber, but the process can corrode the chamber components over time.

[0004]

[0004] Therefore, there is a need for improved systems and methods that can be used to manufacture high quality devices and structures. The present technique addresses these and other needs. Summary of the Invention

[0005] An exemplary semiconductor processing method may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed in a processing region of the semiconductor processing chamber. The method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The method may include providing a fluorine-containing precursor to the processing region. The fluorine-containing precursor may be plasma-free when provided to the processing region. The method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method may include removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber using the fluorine-containing precursor.

[0006] In some embodiments, the one or more deposition precursors may include a silicon-containing precursor. The silicon-containing material may be a silicon- and oxygen-containing material or a silicon- and nitrogen-containing material. The fluorine-containing precursor may be or include hydrofluoric acid (HF), ammonium fluoride (NH4F), ammonium difluoride (NH4HF2), HF-pyridine, tetrafluorohydrazine (N2F4), tetramethylammonium fluoride ((CH3)4NF), tetra-n-butylammonium fluoride ((C4H9)4NF), N2H5F, N2H5F2, or hydrazinium fluorides. The method may include providing a co-reactant to the processing region along with the fluorine-containing precursor. The co-reactant may weaken bonds in the fluorine-containing precursor. The co-reactant may be water or water vapor (H2O), an alcohol, a glycol, ammonia (NH3), an amine, trifluoroacetic acid, hydrogen, helium, or argon. The method may include generating a fluorine-containing plasma from a fluorine-containing precursor in the processing region. The method may include providing an activated precursor to the processing region along with the fluorine-containing precursor. The method may include contacting a silicon-containing material deposited on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The activated precursor may weaken bonds in the silicon-containing material. The activated precursor may be water or water vapor (H2O), alcohol, glycol, ammonia (NH3), amine, trifluoroacetic acid, hydrogen, helium, or argon. The temperature in the semiconductor processing chamber may be maintained at or below about 700°C. The pressure in the semiconductor processing chamber may be maintained at or below about 10 Torr.

[0007] Some embodiments of the present disclosure include a semiconductor processing method. The method may include: i) providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The method may include: ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The method may include: iii) providing a fluorine-containing precursor and a co-reactant to the processing region. The co-reactant may weaken bonds in the fluorine-containing precursor. The method may include: iv) contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method may include v) removing at least a portion of the silicon-containing material on one or more components of the semiconductor processing chamber using the fluorine-containing precursor. The method may include vi) repeating steps i) through v) for at least three cycles.

[0008] In some embodiments, the substrate is positioned on a substrate support in a processing region. A fluorine-containing precursor can be provided in the processing region below the substrate support. The method can include, in step iii), providing one or more of water or water vapor (H2O), an alcohol, a glycol, ammonia (NH3), an amine, or trifluoroacetic acid to the fluorine-containing precursor. The method can include, in step iii), providing one or more of hydrogen, helium, or argon to the fluorine-containing precursor. The fluorine-containing precursor can be free of ammonia (NH3). The temperature in the semiconductor processing chamber can be maintained between about 150°C and about 650°C.

[0009] Some embodiments of the present disclosure include a semiconductor processing method. The method may include providing a silicon-containing precursor to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The method may include depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber. The silicon-containing material may include a silicon- and oxygen-containing material or a silicon- and nitrogen-containing material. The method may include activating the silicon-containing material. The activation may weaken bonds in the silicon-containing material. The method may include providing a fluorine-containing precursor to the processing region. The method may include contacting the silicon-containing material on one or more components of the semiconductor processing chamber with the fluorine-containing precursor. The method may include removing at least a portion of the silicon-containing material using the fluorine-containing precursor.

[0010] In some embodiments, depositing the silicon-containing material and removing a portion of the silicon-containing material can be performed simultaneously. The fluorine-containing precursor provided to the processing region can be maintained in a plasma-free state.

[0011] Such technology may offer numerous advantages over conventional systems and techniques. For example, the process may produce chamber coatings that can be maintained for hundreds of wafer cycles or more. Furthermore, the processing of embodiments of the technology may overcome the degradation of removal rates over time while protecting chamber components from corrosion. These and other embodiments, along with their numerous advantages and features, are described in further detail below in conjunction with the description and accompanying drawings.

[0012] A further understanding of the nature and advantages of the disclosed technology may be realized by reference to the remaining portions of the specification and the drawings. [Brief explanation of the drawings]

[0013] [Figure 1]1 shows a schematic cross-sectional view of an exemplary processing chamber in accordance with some implementations of the present technique. [Figure 2]

[0014] 1 illustrates exemplary steps of a deposition method according to some embodiments of the present technique. DETAILED DESCRIPTION OF THE INVENTION

[0014]

[0015] Some drawings are included as schematic diagrams. It should be understood that the drawings are for illustrative purposes and should not be considered to scale unless expressly stated to be to scale. Furthermore, as schematic diagrams, the drawings are provided to aid in understanding and may not include all aspects or information compared to realistic depictions and may include exaggerated material for illustrative purposes.

[0015]

[0016] In the accompanying drawings, similar components and / or features may have the same reference numerals. Furthermore, various components of the same type may be distinguished by tracing the reference numerals with a letter that distinguishes the similar components. When only a first reference numeral is used herein, the description is applicable to any one of the similar components having the same first reference numeral, regardless of the letter.

[0016]

[0017] Semiconductor processing may include deposition processes to form any number of materials on a substrate. For example, materials may be deposited on a substrate to fabricate semiconductor structures and to facilitate patterning or removal of materials on the substrate. As a non-limiting example, a deposition process may include forming a silicon-containing material on a substrate. Deposition of the silicon-containing material may be performed in a variety of ways, including thermally activated deposition and plasma-enhanced deposition. Regardless of the mechanism, many deposition processes deposit material not only on the substrate being processed but also on one or more chamber components. For example, in a processing region, deposition may occur not only on the substrate but also on the pedestal or support on which the substrate sits, the faceplate, or a diffuser that may distribute material throughout the processing region, the chamber walls that define the processing region, and components that define an exhaust path for the deposited material and by-products.

[0017]

[0018] Upon completion of the deposition process, the substrate is removed from the processing region, and a cleaning process may be employed. Chamber cleaning may involve forming a plasma of one or more precursors to essentially reset the chamber before subsequent processing operations and maintain wafer-to-wafer consistency. The precursors etch or otherwise remove residual materials formed on the chamber components. However, these chamber cleaning processes can present many challenges. For example, remotely formed plasmas, such as those generated by a remote plasma source unit, are easily controlled to provide more thorough cleaning, and the cleaning material can reach various topographical features of the processing region. However, remotely formed plasmas can be time-consuming, require the use of expensive equipment and materials, and can generate greenhouse gases that must be treated before evacuation.

[0018]

[0019] The present technique may overcome these limitations by performing a cleaning process that does not involve the generation of a remote plasma. Instead, the present technique may provide a plasma-free or non-plasma cleaning precursor. The present technique may also involve providing an additional precursor, such as an activated precursor or co-reactant, during the cleaning process. The additional precursor may treat or activate the silicon-containing material or cleaning precursor to change its chemical structure and facilitate cleaning and removal of the silicon-containing material.

[0019]

[0020] While the remainder of the disclosure will routinely identify particular cleaning processes utilizing the disclosed technology, it will be readily understood that the systems and methods are equally applicable to processes that may occur in the chambers described, as well as other chambers. Thus, the technology should not be considered limited to use with these particular deposition processes or chambers alone. This disclosure will describe one possible system and chamber that may be used to perform cleaning processes in accordance with embodiments of the technology before describing additional details in accordance with embodiments of the technology.

[0020]

[0021] FIG. 1 illustrates a cross-sectional view of an exemplary processing chamber 100 in accordance with some embodiments of the present technique. This diagram may represent an overview of a system incorporating one or more aspects of the present technique and / or may be specifically configured to perform one or more processes in accordance with some embodiments of the present technique. Additional details of the chamber 100 and the methods performed therein may be further described below. While the chamber 100 may be utilized to form a film layer in accordance with some embodiments of the present technique, it should be understood that the methods may similarly be performed in any chamber in which film formation may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a lid assembly 106 coupled to the chamber body 102 and confining the substrate support 104 within a processing volume 120. A substrate 103 may be provided to the processing volume 120 through an opening 126, which may be conventionally sealed for processing using a slit valve or door. The substrate 103 may be sealed onto a surface 105 of the substrate support during processing. The substrate support 104 may be rotatable along an axis 147 about which the shaft 144 of the substrate support 104 may lie, as indicated by arrow 145. Alternatively, the substrate support 104 may be elevated to rotate as needed during the deposition process.

[0021]

[0022] A plasma profile modulator 111 may be disposed within the processing chamber 100 to control plasma distribution across a substrate 103 disposed on a substrate support 104. The plasma profile modulator 111 may include a first electrode 108, which may be disposed adjacent to the chamber body 102 and may separate the chamber body 102 from other components of the lid assembly 106. The first electrode 108 may be part of the lid assembly 106 or may be a separate sidewall electrode. The first electrode 108 may be an annular or ring-shaped member and may be a ring electrode. The first electrode 108 may be a continuous loop along the periphery of the processing chamber 100 surrounding the processing volume 120, or may be discontinuous at selected locations as desired. The first electrode 108 may also be a perforated electrode, such as a perforated ring or mesh electrode, or a plate-shaped electrode, such as a secondary gas distributor.

[0022]

[0023] The one or more insulators 110 a, 110 b may be a dielectric material such as a ceramic or a metal oxide, e.g., aluminum oxide and / or aluminum nitride, and may contact the first electrode 108 and electrically and thermally isolate the first electrode 108 from the gas distributor 112 and the chamber body 102. The gas distributor 112 may define an aperture 118 for distributing process precursors to the process volume 120. The gas distributor 112 may be coupled to a first power source 142, such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that may be coupled to a process chamber. In some implementations, the first power source 142 may be an RF power source.

[0023]

[0024] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed of conductive and / or non-conductive components. For example, the body of the gas distributor 112 can be conductive, while the faceplate of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered, for example, by a first power source 142, as shown in FIG. 1, or the gas distributor 112 can be coupled to ground in some embodiments.

[0024]

[0025] The first electrode 108 may be coupled to a first tuned circuit 128 that may control the ground path of the processing chamber 100. The first tuned circuit 128 may include a first electronic sensor 130 and a first electronic controller 134. The first electronic controller 134 may be or include a variable capacitor or other circuit element. The first tuned circuit 128 may be or include one or more inductors 132. The first tuned circuit 128 may be any circuit that allows for a variable or controllable impedance under plasma conditions present in the processing volume 120 during processing. In some embodiments, as shown, the first tuned circuit 128 may include a first circuit leg and a second circuit leg coupled in parallel between ground and the first electronic sensor 130. The first circuit leg may include a first inductor 132A. The second circuit leg may include a second inductor 132B coupled in series with the first electronic controller 134. The second inductor 132B may be disposed between the first electronic controller 134 and a node connecting both the first and second circuit legs to the first electronic sensor 130. The first electronic sensor 130 may be a voltage or current sensor and may be coupled to the electronic controller 134. This may allow for some degree of closed-loop control of the plasma conditions within the process volume 120.

[0025]

[0026] The second electrode 122 may be coupled to the substrate support 104. The second electrode 122 may be integrated into the substrate support 104 or coupled to a surface of the substrate support 104. The second electrode 122 may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed configuration of conductive elements. The second electrode 122 may be a tuning electrode and may be coupled to a second tuning circuit 136 by a conduit 146 (e.g., a cable having a selected resistance, such as 50 ohms) disposed within a shaft 144 of the substrate support 104. The second tuning circuit 136 may include a second electronic sensor 138 and a second electronic controller 140, which may be a second variable capacitor. The sensor 138 may thus be a voltage sensor or a current sensor and may be coupled to the second electronic controller 140 to provide further control over plasma conditions within the process space 120.

[0026]

[0027] A third electrode 124, which may be a bias electrode and / or an electrostatic chucking electrode, may be coupled to the substrate support 104. The third electrode may be coupled to a second power source 150 through a filter 148. The filter 148 may be an impedance matching circuit. The second power source 150 may be DC power, pulsed DC power, RF bias power, pulsed RF power or bias power, or any combination of these or other power sources. In some embodiments, the second power source 150 may be RF bias power.

[0027]

[0028] The lid assembly 106 and substrate support 104 of FIG. 1 can be used with any processing chamber for plasma or thermal processing. The processing chamber 100 can provide real-time control of plasma conditions within the processing volume 120 during processing. The substrate 103 can be placed on the substrate support 104, and processing gases can be flowed through the lid assembly 106 using an inlet 114 according to any desired flow scheme. The inlet 114 can include delivery from a remote plasma source unit 116, which can be fluidly coupled to the chamber, and a bypass 117 for processing gas delivery that, in some embodiments, may not flow through the remote plasma source unit 116. Gases can be exhausted from the processing chamber 100 through an outlet 152. Power can be coupled to the gas distributor 112 to establish a plasma within the processing volume 120. In some embodiments, an electrical bias can be applied to the substrate using a third electrode 124.

[0028]

[0029] Upon exciting a plasma in the process volume 120, a potential difference may be established between the plasma and the first electrode 108. A potential difference may also be established between the plasma and the second electrode 122. The electronic controllers 134, 140 may then be used to adjust the flow characteristics of the ground paths represented by the two tuned circuits 128 and 136. Set points may be delivered to the first tuned circuit 128 and the second tuned circuit 136 to provide independent control of the center-to-edge deposition rate and plasma density uniformity. In embodiments where both electronic controllers are variable capacitors, the electronic sensors may independently adjust the variable capacitors to maximize the deposition rate and minimize thickness non-uniformity.

[0029]

[0030] Each of the tuning circuits 128, 136 may have a variable impedance that can be adjusted using the corresponding electronic controller 134, 140. If the electronic controller 134, 140 is a variable capacitor, the capacitance range of each of the variable capacitors and the inductance of the first inductor 132A and the second inductor 132B may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, and each variable capacitor may have a minimum value in its capacitance range. Thus, when the capacitance of the first electronic controller 134 is at its minimum or maximum, the impedance of the first tuning circuit 128 may be high, resulting in a plasma shape with minimal aerial or lateral coverage above the substrate support 104. When the capacitance of the first electronic controller 134 reaches a value that minimizes the impedance of the first tuning circuit 128, the aerial coverage of the plasma grows to its maximum, effectively covering the entire working area of ​​the substrate support 104. As the capacitance of the first electronic controller 134 deviates from the minimum impedance setting, the plasma shape may shrink from the chamber walls and the air coverage above the substrate support may decrease. The second electronic controller 140 has a similar effect, increasing or decreasing the air coverage above the substrate support as the capacitance of the second electronic controller 140 changes.

[0030]

[0031] The electronic sensors 130, 138 can be used to tune the corresponding circuits 128, 136 in a closed loop. Depending on the type of sensor used, a set point for current or voltage can be attached to each sensor, and the sensors can be provided with control software that determines adjustments to the corresponding electronic controllers 134, 140 to minimize deviations from the set point. As a result, the plasma shape can be selected and dynamically controlled during processing. While the above description is based on the electronic controllers 134, 140 being variable capacitors, it will be understood that any electronic component having an adjustable characteristic can be used to provide the tuning circuits 128 and 136 with an adjustable impedance.

[0031]

[0032] 2 illustrates exemplary steps of a method 200 of processing a chamber in accordance with some embodiments of the present technique. The method may be performed in a variety of processing chambers, including the processing chamber 100 described above. Method 200 may include one or more processes prior to the start of the method, including front-end processing, polishing, cleaning, deposition, etching, or any other process that may be performed prior to the described processes. Method 200 may include numerous optional processes that may or may not be particularly relevant to some embodiments of the method in accordance with the present technique. For example, many of the processes are described to provide a broader range of structure formations, but are not critical to the technique or may be performed by alternative methodologies, as described further below.

[0032]

[0033] In step 205, method 200 may include providing one or more deposition precursors to a semiconductor processing chamber. A substrate may be disposed within a processing region of the semiconductor processing chamber. The one or more deposition precursors may be provided through a gas distributor, such as gas distributor 112, which defines apertures, such as aperture 118, for distributing the processing precursors within the processing region or volume. The one or more deposition precursors may include a silicon-containing precursor. Silicon-containing precursors may include organosilanes, including silanes, disilanes, and other materials. Additional silicon-containing precursors may include silicon, carbon, oxygen, or nitrogen, such as trisilylamine. The additional deposition precursors may include oxygen-containing precursors, nitrogen-containing precursors, or any other semiconductor precursors used to form silicon-containing materials. The one or more deposition precursors may or may not include delivery of additional precursors, such as a carrier gas or one or more dopant precursors for depositing doped silicon-containing materials.

[0033]

[0034] In step 210, method 200 may include depositing a silicon-containing material on a substrate. During method 200, the silicon-containing material may also be deposited on one or more components of the semiconductor processing chamber. For example, the silicon-containing material may be deposited on a component within the chamber body or processing region, such as on the substrate support, below the substrate support, near the chamber outlet, or around / on any other component. Depending on the deposition precursor provided to the semiconductor processing chamber in step 205, various silicon-containing materials may be deposited. For example, if the deposition precursor includes silicon and oxygen, a material containing silicon and oxygen may be deposited. Alternatively, if the deposition precursor includes silicon and nitrogen, a material containing silicon and nitrogen may be deposited. It is contemplated that the deposition precursor may include any number of components.

[0034]

[0035] The silicon-containing material deposited in step 210 can be formed at a variety of temperatures and processes. Depending on the material being formed, process conditions may be modified to deposit a silicon-containing material, such as a silicon- and oxygen-containing material or a silicon- and nitrogen-containing material. During step 210, plasma power may be provided to generate plasma effluents of one or more deposition precursors. The application of plasma power may increase the deposition rate of the silicon-containing material and / or increase the conformality of the deposited material.

[0035]

[0036] In step 215, the method 200 may include providing one or more cleaning precursors to the semiconductor processing chamber. The one or more cleaning precursors may include a fluorine-containing precursor. The fluorine-containing precursor may include one or more fluorine-containing materials such as a fluorocarbon, atomic fluorine (F), diatomic fluorine (F), an interhalogen fluoride such as bromine trifluoride (BF) or chlorine trifluoride (ClF), nitrogen trifluoride (NF), sulfur hexafluoride (SF), or xenon difluoride (XF). In embodiments, the fluorine-containing precursor may contain hydrogen, such as hydrofluoric acid (HF), ammonium fluoride (NHF), ammonium bifluoride (NHHF), HF-pyridine, tetrafluorohydrazine (NF), tetramethylammonium fluoride ((CHNF), tetra-n-butylammonium fluoride ((CHNF), NHF, NHF, or hydrazinium fluorides. In some embodiments, the fluorine-containing precursor may be free of NH, which can lead to the formation of greenhouse gases and increased processing costs.

[0036]

[0037] As previously described, one or more deposition precursors may be provided through a gas distributor defining openings for distributing the process precursors into the processing region or processing volume. Any one or more cleaning precursors may be provided through the bottom of the chamber. For example, in embodiments, one or more cleaning precursors may be provided through an opening in the chamber below a substrate support, such as the substrate support 104. By providing one or more cleaning precursors below the substrate support, chamber cleaning may be concentrated in areas below the substrate support where unwanted buildup may occur. Furthermore, providing one or more cleaning precursors below the substrate support may minimize interaction between the one or more cleaning precursors and silicon-containing materials deposited on the substrate. In embodiments, one or more cleaning precursors, such as fluorine-containing precursors, may be provided in a plasma-free manner in the processing region. Providing the cleaning precursor in a plasma-free manner may eliminate the need for an additional plasma generation step, such as in a remote plasma source unit, thereby reducing the complexity of method 200. Furthermore, forming a remote plasma of one or more cleaning precursors may emit greenhouse gases. Additionally, remote plasma source unit operations can be expensive and unreliable.

[0037]

[0038] In step 215, the method 200 may also include providing an activated precursor or a co-reactant. It is also contemplated that the activated precursor or co-reactant may be provided with one or more cleaning precursors and / or before one or more cleaning precursors. For example, the activated precursor may be provided before one or more cleaning precursors, or the co-reactant may be provided with a fluorine-containing precursor. Like the one or more cleaning precursors, the activated precursor and / or co-reactant may be provided through an opening in the chamber below the substrate support.

[0038]

[0039] An activation precursor can be provided to treat silicon-containing materials deposited on one or more components of a semiconductor processing chamber before treating the silicon-containing material with a fluorine-containing precursor. The activation precursor can interact with the silicon-containing material and weaken the bonds of the silicon-containing material. For example, in the case of a material containing silicon and oxygen, the activation precursor can weaken the Si-O bonds in the silicon-containing material. With the Si-O bonds weakened, one or more cleaning precursors, such as a fluorine-containing precursor, can more easily remove the silicon-containing material deposited on the chamber and chamber components. Some activation precursors activate the silicon-containing material, transferring an electropositive center to the central Si atom and facilitating nucleophilic attack and removal of the silicon-containing material. In embodiments, the activation precursor can be or include water or steam (HO), alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), glycol (e.g., dimethyl glycol), ammonia (NH), primary, secondary, or tertiary amines, trifluoroacetic acid, or combinations thereof. The activation precursor may additionally or alternatively comprise a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination thereof. In some embodiments, an energy source such as microwave energy, IR energy, UV energy, laser energy, or a combination thereof may be provided to activate the silicon-containing material.

[0039]

[0040] In addition to the activated precursor increasing the kinetics of removal of the silicon-containing material, the weakened silicon-containing material may also direct / attract one or more cleaning precursors toward the weakened silicon-containing material, thereby increasing the selectivity and efficiency of removal, such as selectivity to silicon-containing materials deposited on one or more chamber components and, for example, aluminum or other metal chamber components.

[0040]

[0041] A co-reactant may be provided to modify one or more cleaning precursors, such as a fluorine-containing precursor. The co-reactant may interact with one or more cleaning precursors to weaken bonds in the cleaning precursor. For example, in the case of a fluorine-containing precursor, the co-reactant may weaken the fluorine bonds in the fluorine-containing precursor. Weaker fluorine bonds may be more easily broken than unmodified fluorine bonds, making it easier for the fluorine to remove silicon-containing materials. In addition to weakening fluorine bonds and increasing the polarization of the fluorine-containing precursor, the co-reactant may impart energy to one or more cleaning precursors, such as through external ionization, thereby also making it easier for the silicon-containing materials to be removed by the one or more cleaning precursors. In embodiments, the co-reactant may be or include water or steam (HO), alcohol (e.g., methanol, isopropyl alcohol, butanol, etc.), glycol (e.g., dimethyl glycol), ammonia (NH), primary, secondary, or tertiary amines, trifluoroacetic acid, or combinations thereof. The co-reactant may additionally or alternatively comprise a plasma effluent of hydrogen, nitrogen, oxygen, fluorine, argon, or a combination thereof. In some embodiments, an energy source such as microwave energy, IR energy, UV energy, laser energy, or a combination thereof may be provided to activate one or more deposition precursors.

[0041]

[0042] In optional step 220, method 200 may include generating a plasma from the cleaning precursor in the processing region. For example, if the one or more cleaning precursors include a fluorine-containing precursor, step 220 may include generating a fluorine-containing plasma from the fluorine-containing precursor in the processing region. Plasma effluents of the fluorine-containing precursor, or one or more other cleaning precursors, may be generated by applying RF power to the processing region. Alternatively or additionally, the fluorine-containing precursor may contact excited species that are purged from the processing region, which may then excite the one or more cleaning precursors, thereby generating a plasma from the cleaning precursor in the processing region.

[0042]

[0043] In step 225, method 200 may include contacting silicon-containing materials on one or more components of the semiconductor processing chamber with one or more cleaning precursors or plasma effluents thereof. In step 225, method 200 may include removing at least a portion of the silicon-containing materials on one or more components of the semiconductor processing chamber using one or more cleaning precursors, such as a fluorine-containing precursor. The one or more cleaning precursors may interact with the silicon-containing materials to volatilize them. For example, a fluorine-containing precursor may interact with the silicon-containing materials to produce silicon tetrafluoride (SiF) and oxygen or nitrogen gaseous by-products. The chamber may then be purged of volatiles to remove the silicon-containing materials from the chamber and / or chamber components. The removed silicon-containing materials may be free of silicon-containing materials formed on the substrate or may be selective to silicon-containing materials formed on the substrate. As previously described, delivery of the one or more cleaning precursors may minimize interaction with silicon-containing materials deposited on the substrate. In some embodiments, the substrate may even be removed before one or more cleaning precursors are provided to the processing region.

[0043]

[0044] As shown in FIG. 2 , method 200 may include repeating steps 205-230 for a number of cycles in step 235. Repeating steps 205-230 may reduce deposition of silicon-containing materials on one or more components of a semiconductor processing chamber. In embodiments, the steps of method 200 may be repeated at least 2 cycles, at least 3 cycles, at least 4 cycles, at least 5 cycles, at least 10 cycles, at least 15 cycles, at least 20 cycles, at least 30 cycles, at least 40 cycles, at least 50 cycles, or more. In other embodiments, the steps of method 200 may be continually repeated as different substrates are positioned within the processing region for deposition of silicon materials.

[0044]

[0045] In some embodiments, the deposition process and the cleaning process may be performed simultaneously. Specifically, depositing a silicon-containing material and removing a portion of the silicon-containing material may be performed simultaneously. As previously described, by providing one or more cleaning precursors to a processing region in a different region than the one or more deposition precursors, deposition may continue without interference from the one or more cleaning precursors.

[0045]

[0046] Processing conditions may affect the steps performed in method 200. Each of the steps of method 200 may be performed at a constant temperature, depending on the embodiment, and in some embodiments, the temperature may be adjusted between different steps. In some embodiments of the present technology, method 200 may be performed at a substrate, pedestal, and / or chamber temperature of about 700°C or less, and may be performed at a temperature of about 650°C or less, about 600°C or less, about 550°C or less, about 500°C or less, about 450°C or less, about 400°C or less, about 350°C or less, about 300°C or less, about 250°C or less, about 200°C or less, about 150°C or less, or less. The temperature may also be maintained at any temperature within these ranges, within a narrower range contained within these ranges, or between any of these ranges. In embodiments, the temperature may be maintained at a temperature at which a silicon-containing material can be deposited, reducing downtime and increasing throughput. Accordingly, in some embodiments, the pressure may be maintained between about 150°C and about 650°C.

[0046]

[0047] The pressure within the semiconductor processing chamber may also affect the processes performed. In embodiments, the pressure may be maintained at less than about 40 Torr. Thus, the pressure may be maintained at about 15 Torr or less, about 14 Torr or less, about 13 Torr or less, about 12 Torr or less, about 11 Torr or less, about 10 Torr or less, about 9 Torr or less, about 8 Torr or less, about 7 Torr or less, about 6 Torr or less, about 5 Torr or less, about 4 Torr or less, about 3 Torr or less, about 2 Torr or less, about 1 Torr or less, or less. The pressure may also be maintained at any pressure within these ranges, narrower ranges contained within these ranges, or between any of these ranges. Conventional techniques may require higher temperatures to activate the removal of silicon-containing materials. However, activation of one or more deposition precursors and / or activation of the silicon-containing materials may result in lower process pressures. Accordingly, in some embodiments, the pressure may be maintained between about 1 Torr and about 10 Torr.

[0047]

[0048] Prior art techniques may use plasma emissions of cleaning precursors, such as fluorine-containing precursors, formed away from the processing region. As previously discussed, using a remote plasma source unit can be time-consuming and generate greenhouse gases. Furthermore, remote plasma source units can be expensive, unreliable, and only capable of sequential deposition and cleaning. Plasma-free cleaning processes have process constraints, such as slow reaction rates, limited process regimes (e.g., temperature), and may require highly reactive chemistries. The present embodiment may overcome challenges associated with the prior art by utilizing plasma-free cleaning chemistries that enable efficient cleaning at a variety of temperatures. As described, the present embodiment may eliminate the need for a remote plasma source unit, thereby improving throughput and preserving the life of the chamber and chamber components.

[0048]

[0049] In the foregoing description, for purposes of explanation, numerous details are presented in order to facilitate an understanding of various embodiments of the present technology. However, it will be apparent to one skilled in the art that particular embodiments may be practiced without some of these details or with additional details.

[0049]

[0050] Although several embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents can be used without departing from the spirit of the embodiments. Additionally, some well-known processes and elements have not been described to avoid unnecessarily obscuring the technology. Therefore, the above description should not be construed as limiting the scope of the technology. Additionally, while a method or process may be described as sequential or stepwise, it should be understood that these steps may be performed simultaneously or in a different order than described.

[0050]

[0051] Where a range of values ​​is provided, unless the context clearly indicates otherwise, each intervening value between the upper and lower limit of that range is specifically disclosed, to the smallest unit of the lower limit. Any narrower range between any stated or unstated intervening value in a stated range, and any other stated or intervening value in that stated range, is also included. The upper and lower limits of such narrower ranges may individually be included or excluded within that range. Each range in which either or both limits are included in the narrower range, or neither limit is included in the narrower range, is also encompassed within the technology and covers any specifically excluded limit in the stated range. When a stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0051]

[0052] As used in this specification and claims, the singular forms "a," "an," and "the" include plural referents unless the context dictates otherwise. Thus, for example, reference to "a precursor" includes a plurality of such precursors, reference to "the material" includes reference to one or more materials and equivalents known to those skilled in the art, and so forth.

[0052]

[0053] Additionally, the terms "comprise(s)", "comprising", "contain(s)", "containing", "include(s)", and "including", when used in this specification and claims, are intended to specify the presence of stated features, integers, components, or steps, but do not exclude the presence or addition of one or more other features, integers, components, steps, acts, or groups.

Claims

1. 1. A semiconductor processing method comprising: providing one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed in a processing region of the semiconductor processing chamber; depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; providing a fluorine-containing precursor to the processing region, the fluorine-containing precursor being plasma-free when provided to the processing region; contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; removing at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; A semiconductor processing method comprising:

2. The semiconductor processing method of claim 1 , wherein the one or more deposition precursors comprise a silicon-containing precursor.

3. 10. The semiconductor processing method of claim 1, wherein the silicon-containing material comprises a silicon, oxygen, and carbon-containing material or a silicon and nitrogen-containing material.

4. The fluorine-containing precursor may be hydrofluoric acid (HF), ammonium fluoride (NH ４ F), ammonium difluoride (NH ４ HF ２ ), HF-pyridine, tetrafluorohydrazine (N ２ F ４ ), tetramethylammonium fluoride ((CH ３ ) ４ NF), tetra-n-butylammonium fluoride ((C ４ H ９ ) ４ NF), N ２ H ５ F.N. ２ H ５ F ２ 10. The semiconductor processing method of claim 1, wherein the compound is selected from the group consisting of hydrazinium fluorides and hydrazinium fluorides.

5. 10. The semiconductor processing method of claim 1, further comprising providing a co-reactant in the processing region with the fluorine-containing precursor, the co-reactant weakening bonds in the fluorine-containing precursor.

6. The co-reactant is water or water vapor (H ２ O), alcohol, glycol, ammonia (NH ３ 6. The semiconductor processing method of claim 5, comprising: a gas containing a fluorine atom; an amine; trifluoroacetic acid; hydrogen; helium; or argon.

7. 10. The semiconductor processing method of claim 1, further comprising generating a fluorine-containing plasma from said fluorine-containing precursor in said processing region.

8. providing an activated precursor to the treatment area along with the fluorine-containing precursor; contacting the silicon-containing material deposited on the one or more components of the semiconductor processing chamber with the activating precursor that weakens bonds in the silicon-containing material; 10. The semiconductor processing method of claim 1, further comprising:

9. The activated precursor is water or water vapor (H ２ O), alcohol, glycol, ammonia (NH ３ 9. The semiconductor processing method of claim 8, comprising: a gas containing a fluorine atom; an amine; trifluoroacetic acid; hydrogen; helium; or argon.

10. 10. The semiconductor processing method of claim 1, wherein the temperature within the semiconductor processing chamber is maintained at about 700[deg.] C. or less.

11. 10. The semiconductor processing method of claim 1, wherein the pressure within the semiconductor processing chamber is maintained at about 10 Torr or less.

12. 1. A semiconductor processing method comprising: i) providing one or more deposition precursors to a semiconductor processing chamber, wherein a substrate is disposed in a processing region of the semiconductor processing chamber; ii) depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber; iii) providing a fluorine-containing precursor and a co-reactant to the treatment region, wherein the co-reactant weakens bonds in the fluorine-containing precursor; iv) contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; v) removing at least a portion of the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; vi) repeating steps i) to v) for at least three cycles; and A semiconductor processing method comprising:

13. the substrate is positioned on a substrate support within the processing region; the fluorine-containing precursor is provided in the processing region below the substrate support; 13. The semiconductor processing method of claim 12.

14. In step iii), water or water vapor (H ２ O), alcohol, glycol, ammonia (NH ３ 13. The semiconductor processing method of claim 12, further comprising providing one or more of the following to the fluorine-containing precursor:

15. 13. The semiconductor processing method of claim 12, further comprising providing one or more of hydrogen, helium or argon to the fluorine-containing precursor in step iii).

16. The fluorine-containing precursor is ammonia (NH ３ 13. The semiconductor processing method of claim 12, wherein the method does not include

17. 13. The semiconductor processing method of claim 12, wherein the temperature within the semiconductor processing chamber is maintained between about 150°C and about 650°C.

18. 1. A semiconductor processing method comprising: providing a silicon-containing precursor to a semiconductor processing chamber, wherein a substrate is disposed within a processing region of the semiconductor processing chamber; depositing a silicon-containing material on the substrate and on one or more components of the semiconductor processing chamber, the silicon-containing material comprising a silicon and oxygen-containing material or a silicon and nitrogen-containing material; activating the silicon-containing material, wherein the activation weakens bonds in the silicon-containing material; providing a fluorine-containing precursor to the treatment area; contacting the silicon-containing material on the one or more components of the semiconductor processing chamber with the fluorine-containing precursor; removing at least a portion of the silicon-containing material with the fluorine-containing precursor; The semiconductor processing method further comprising:

19. 20. The semiconductor processing method of claim 18, wherein said depositing said silicon-containing material and said removing said portion of said silicon-containing material are performed simultaneously.

20. 20. The semiconductor processing method of claim 18, wherein the fluorine-containing precursor provided to the processing region is maintained plasma-free.

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