Display module and display device
The display module addresses the low refresh rate issue by alternating frame display stages within a single period, doubling the refresh rate and reducing stuttering in electronic ink panels.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-13
- Publication Date
- 2026-03-06
AI Technical Summary
Conventional electronic ink display panels suffer from a low refresh rate due to a slow response time of approximately 400 milliseconds, leading to noticeable 'stuttering' during use.
A display module with a pixel unit structure that includes a first and second pixel unit, each receiving a frame of data signals in alternating stages within a display period, effectively doubling the refresh rate by displaying two frames in one period.
The solution significantly improves the refresh rate, reducing the 'stuttering' effect by allowing two frames to be displayed in one period, thereby enhancing the display performance.
Smart Images

Figure 2026507953000001_ABST
Abstract
Description
[Technical Field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims priority from Chinese patent application having application number 202310717687X, filed on June 16, 2023, the entire contents of which are incorporated herein by reference.
[0002] The present application relates to the technical field of display technology, and in particular to display modules and display devices. [Background technology]
[0003] With the development of display technology industry, more and more people are placing higher requirements on the display effect of display panels, among which, electronic ink (E-Ink) display panels are gradually entering the public's sights due to their unique light reflection display mode, and their scale in the display market is becoming increasingly larger.
[0004] Typically, electronic ink display panels display images by electrophoretic movement of different colored charged particles in electronic ink within an electric field formed between the upper and lower substrates. However, this electrophoretic display method requires a longer response time for electronic ink, which is approximately 400 milliseconds, which is slower than that of LCD panels. Due to the slow response time, the panel's refresh rate is low, which can cause users to notice a noticeable "stuttering" during use. Summary of the Invention
[0005] The present application provides a display module and a display device that aims to solve the problem of choppy images caused by the low refresh rate of conventional display devices.
[0006] In order to solve the above technical problems, a first technical solution adopted in this application provides a display module, the display module including: a pixel unit, a driving transistor, a scan line, and a data line; the pixel unit includes a pixel electrode, a common electrode, and a microcapsule structure, the pixel electrode and the common electrode are arranged opposite each other, and the microcapsule structure is arranged between the pixel electrode and the common electrode, the microcapsule structure including charged particles; the driving transistor includes a control terminal, a first terminal, and a second terminal, the second terminal is electrically connected to the pixel electrode and is used for driving the pixel unit; the scan line is electrically connected to the control terminal and is used for providing a scan signal to the pixel unit; the data line is electrically connected to the first terminal and is used for providing a data signal to the pixel electrode, wherein the pixel unit includes a first pixel unit and a second pixel unit adjacent to each other;
[0007] Here, the display module comprises a plurality of pixel units, which are arranged in a matrix, and wherein in each display period, in a first stage, the driving transistors corresponding to the first pixel units in the plurality of rows are turned on in sequence, so that the first pixel units in the plurality of rows receive one frame of data signals transmitted by the data lines and display one frame of image; and in a second stage, the driving transistors corresponding to the second pixel units in the plurality of rows are turned on in sequence, so that the second pixel units in the plurality of rows receive the next frame of data signals transmitted by the data lines and display the next frame of image.
[0008] Here, the pixel electrode includes adjacent first and second pixel electrodes, the first pixel electrode, the common electrode and the microcapsule structure form a first pixel unit, the second pixel electrode, the same common electrode and the microcapsule structure form a second pixel unit, the driving transistor includes a first transistor and a second transistor, the second terminal of the first transistor is electrically connected to the first pixel electrode, and the second terminal of the second transistor is electrically connected to the second pixel electrode.
[0009] Here, the first terminal of the first transistor and the first terminal of the second transistor are respectively electrically connected to the same data line, the scanning line includes a first scanning line and a second scanning line, the first scanning line is electrically connected to the control terminal of the first transistor, and the second scanning line is electrically connected to the control terminal of the second transistor, and in each display period, the first scanning line is used to send scanning signals to the first transistor in a first stage, and the second scanning line is used to send scanning signals to the second transistor in a second stage, so that the first pixel unit receives one frame of data signals sent from the data line in the first stage, and the second pixel unit receives the next frame of data signals sent from the data line in the second stage.
[0010] Here, in each display cycle, in a first stage, each first scan line transmits a scanning signal for one frame row by row to turn on the first transistor row by row, and each data line transmits a data signal for one frame to the first pixel unit column by column to display an image for one frame; in a second stage, each second scan line transmits a scanning signal for the next frame row by row to turn on the second transistor row by row, and each data line transmits a data signal for the next frame to the second pixel unit column by column to display an image for the next frame.
[0011] Here, after the first stage is completed, the second stage begins after a preset period has elapsed.
[0012] Here, the control terminal of the first transistor and the control terminal of the second transistor are respectively electrically connected to the same scan line, the data line includes a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor, and in each display period, in a first stage, the scan line is used to send a scan signal to the first transistor, and the first data line is used to send a frame of data signal to the first pixel unit through the first transistor; in a second stage, the scan line is used to send a scan signal to the second transistor, and the second data line is used to send a next frame of data signal to the second pixel unit through the second transistor.
[0013] Here, in each display period, in the first stage, each scanning line transmits one frame of scanning signals row by row so as to turn on the driving transistors row by row, and the first data line transmits one frame of data signals to the first pixel units so as to display one frame of image; after each first data line transmits for a predetermined time, each second data line transmits the next frame of data signals column by column in advance to the second pixel units; in the second stage, each scanning line transmits the next frame of scanning signals row by row, and the second pixel units receive the next frame of data signals to display the next frame of image.
[0014] Here, the scan line includes a first scan line and a second scan line, the first scan line is electrically connected to the control terminal of the first transistor, and the second scan line is electrically connected to the control terminal of the second transistor; the data line includes a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor; in each display period, in the first stage, the first scan line is used to send scan signals to the first transistor, and the first data line is used to send one frame of data signals to the first pixel unit through the first transistor; in the second stage, the second scan line is used to send scan signals to the second transistor, and the second data line is used to send the next frame of data signals to the second pixel unit through the second transistor.
[0015] Here, in each display cycle, in a first stage, the first scanning line transmits scanning signals for one frame row by row to turn on the first transistors row by row, and the first data line transmits data signals for one frame to the first pixel units column by column to display an image for one frame; in a second stage, the second scanning line transmits scanning signals for the next frame row by row to turn on the second transistors row by row, and the second data line transmits data signals for the next frame to the second pixel units column by column to display an image for the next frame.
[0016] Here, the common electrode includes a first common electrode and a second common electrode adjacent to each other, the pixel electrode, the first common electrode and the microcapsule structure form a first pixel unit, and the same pixel electrode, the second common electrode and the microcapsule structure form a second pixel unit, and in each display period, the scan line sends a scan signal to the driving transistor in a first stage and a second stage, in the first stage, the data line sends a data signal of one frame to the pixel electrode through the first terminal, and the first common electrode is used to send a first common voltage signal, so that the first pixel unit receives the data signal of one frame, and in the second stage, the data line sends a data signal of the next frame to the pixel electrode through the first terminal, and the second common electrode is used to send a second common voltage signal, so that the second pixel unit receives the data signal of the next frame.
[0017] In each display period, the scanning lines transmit scanning signals row by row to turn on the driving transistors row by row; in the first stage, the first common electrode transmits a common voltage signal for one frame; the data lines transmit a data signal for one frame to the pixel electrodes column by column, thereby forming a corresponding electric field in the first pixel unit, and displaying an image for one frame; after the data lines transmit the data signal for a predetermined time, the second common electrode transmits a common voltage signal for the next frame; and after the predetermined time has elapsed, the process enters a second stage; in the second stage, the data lines transmit a data signal for the next frame to the pixel electrodes column by column, thereby forming a corresponding electric field in the second pixel unit, and displaying an image for the next frame.
[0018] Here, the pixel electrode includes a first pixel electrode and a second pixel electrode adjacent to each other, the common electrode includes a first common electrode and a second common electrode adjacent to each other, the first pixel electrode is disposed opposite the first common electrode and forms a first pixel unit with a microcapsule structure, the second pixel electrode is disposed opposite the second common electrode and forms a second pixel unit with the microcapsule structure, the driving transistor includes a first transistor and a second transistor, the second terminal of the first transistor is electrically connected to the first pixel electrode, and the second terminal of the second transistor is electrically connected to the second pixel electrode.
[0019] Here, the control terminal of the first transistor and the control terminal of the second transistor are respectively electrically connected to the same scan line, the data line includes a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor, and in each display period, the scan line is used to send scan signals to the driving transistor in a first stage and a second stage, in the first stage, the first data line is used to send a data signal of one frame to the first pixel electrode through the first transistor, and the first common electrode is used to send a first common voltage signal, so that the first pixel unit receives the data signal of one frame; in the second stage, the second data line is used to send a data signal of the next frame to the second pixel electrode through the second transistor, and the second common electrode is used to send a second common voltage signal, so that the second pixel unit receives the data signal of the next frame.
[0020] Here, in each display period, the first scanning line transmits one frame of scanning signals row by row to turn on the driving transistors row by row, and in the first stage, the first common electrode transmits a first common voltage signal, and the first data line transmits one frame of data signals row by row to the first pixel unit to display one frame of image, and in the second stage, the second common electrode transmits a second common voltage signal, and the second data line transmits the next frame of data signals column by column to the second pixel unit to display the next frame of image.
[0021] The first terminal of the first transistor and the first terminal of the second transistor are respectively electrically connected to the same data line, the scan line includes a first scan line and a second scan line, the first scan line is electrically connected to the control terminal of the first transistor, and the second scan line is electrically connected to the control terminal of the second transistor, and in each display period, in a first stage, the first scan line is used to send scan signals to the first transistor, the data line is used to send data signals of one frame to the first pixel electrode through the first transistor, and the first common electrode is used to send a first common voltage signal, so that the first pixel unit receives the data signals of one frame; in a second stage, the second scan line is used to send data signals of the next frame to the second pixel electrode through the second transistor, and the second common electrode is used to send a second common voltage signal, so that the second pixel unit receives the data signals of the next frame.
[0022] Within each display period, in a first stage, the first scan line transmits a scanning signal for one frame row by row, and the first common electrode transmits a first common voltage signal to turn on the first transistor row by row, and the data line transmits a data signal for one frame to the first pixel unit, so as to display an image for one frame; in a second stage, the second scan line transmits a scanning signal for the next frame row by row, and the second common electrode transmits a second common voltage signal to turn on the second transistor row by row, and the data line transmits a data signal for the next frame column by column to the second pixel unit, so as to display an image for the next frame.
[0023] The microcapsule structure includes an electrophoretic medium and positively and negatively charged particles suspended in the electrophoretic medium, the positively and negatively charged particles being charged particles of different colors.
[0024] In order to solve the above technical problem, the second technical solution adopted by this application provides a display device, which includes a display module and a control module, the display module is used to display an image, the display module is the display module according to the above technical solution, and the control module is electrically connected to the display module and used to provide a control signal to the display module, so that within each display period, the display module displays one frame of image in a first stage, and displays the next frame of image in a second stage. [Effects of the Invention]
[0025] The beneficial effects of the present application are as follows: The present application provides a display module and a display device different from those of the prior art, the display module including a plurality of pixel units, each pixel unit including a first pixel unit and a second pixel unit adjacent to each other, for displaying an image, and in each display period, the first pixel unit receives a frame of data signals transmitted via a data line in a first stage to display one frame of screen, and the second pixel unit receives a next frame of data signals transmitted via a data line in a second stage to display the next frame of screen, thereby enabling the display module to display two frames of screen in one display period and doubling the refresh rate of the display module, thereby overcoming the problem of a low refresh rate caused by a slow response speed of the display module, effectively improving the refresh rate of the display module, and reducing the "stuttering" feeling on the screen. [Brief explanation of the drawings]
[0026] In order to more clearly describe the technical solutions in the embodiments of the present application, the following briefly describes the drawings that need to be used in the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. Those skilled in the art can obtain other drawings from these drawings without any creative efforts. [Figure 1]FIG. 10 is a structural schematic diagram of a drive substrate of a display module according to a conventional embodiment. [Figure 2a] 2 is a schematic structural diagram of a pixel unit provided in the embodiment of FIG. 1 when no electric field is applied; [Figure 2b] 2 is a schematic structural diagram of a pixel unit provided in the embodiment of FIG. 1 when displaying black; [Figure 2c] 2 is a schematic structural diagram of a pixel unit provided in the embodiment of FIG. 1 when displaying white; [Figure 3] 1 is a structural schematic diagram of a display module provided in a first embodiment of the present application; [Figure 4] FIG. 2 is a structural schematic diagram of a driving substrate provided in the first embodiment of the present application. [Figure 5] FIG. 10 is a structural schematic diagram of another driving substrate provided in the first embodiment of the present application. [Figure 6] FIG. 2 is a timing diagram of the driving signals of the display module provided in the first embodiment of the present application. [Figure 7] FIG. 2 is a structural schematic diagram of a display module provided in a second embodiment of the present application. [Figure 8] FIG. 10 is a structural schematic diagram of a driving substrate provided in a second embodiment of the present application. [Figure 9] FIG. 10 is a structural schematic diagram of another driving substrate provided in the second embodiment of the present application. [Figure 10] FIG. 10 is a timing diagram of the driving signals of the display module provided in the second embodiment of the present application. [Figure 11] FIG. 10 is a structural schematic diagram of a display module provided in the third embodiment of the present application. [Figure 12] FIG. 10 is a structural schematic diagram of a driving substrate provided in a third embodiment of the present application. [Figure 13] FIG. 10 is a timing diagram of the driving signals of the display module provided in the third embodiment of the present application. [Figure 14] FIG. 10 is a schematic plan view of a display module provided in a fourth embodiment of the present application; [Figure 15]FIG. 10 is a schematic plan view of another display module provided in the fourth embodiment of the present application; [Figure 16] FIG. 10 is a timing diagram of the driving signals of the display module provided in the fourth embodiment of the present application. [Figure 17] FIG. 10 is a schematic plan view of a display module provided in a fifth embodiment of the present application; [Figure 18] FIG. 10 is a timing diagram of the driving signals of the display module provided in the fifth embodiment of the present application. [Figure 19] FIG. 10 is a schematic plan view of a display module provided in a sixth embodiment of the present application; [Figure 20] FIG. 10 is a timing diagram of the driving signals of the display module provided in the sixth embodiment of the present application. [Figure 21] 1 is a structural schematic diagram of a display device provided in a first embodiment of the present application; DETAILED DESCRIPTION OF THE INVENTION
[0027] Hereinafter, the technical solutions of the embodiments of the present application will be clearly and completely described with reference to the drawings of the embodiments of the present application. It should be understood that the described embodiments are only a part of the embodiments of the present application, but not all of them. Based on the embodiments of the present application, all other embodiments that a person skilled in the art can obtain without inventive efforts fall within the scope of protection of the present application.
[0028] The terms "first," "second," and "third" in this application are used for descriptive purposes only and cannot be understood as indicating the number of technical features described. Therefore, features defined as "first," "second," and "third" can explicitly or implicitly include at least one of these features. In the description of this application, "plurality" means at least two, e.g., two, three, etc., unless otherwise clearly and specifically defined. All directional indications (e.g., up, down, left, right, front, rear, etc.) in the embodiments of this application are used to interpret the relative positional relationships, movement situations, etc. between components in a specific position (e.g., as shown in the drawings). If the specific position changes, the directionality changes accordingly. The terms "comprise," "have," and any variations thereof used in this specification are intended to cover non-exclusive inclusions. For example, a process, method, product, or apparatus comprising a series of steps or units is not limited to the enumerated steps or units, but may optionally include unenumerated steps or units, or may optionally include other steps or units specific to the process, method, product, or apparatus.
[0029] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described with reference to the embodiment may be included in at least one embodiment of the present application. The appearance of such a combination in various places in the specification does not necessarily refer to the same embodiment, nor does it mean that the embodiments are mutually exclusive, independent, or alternative embodiments. As will be understood by those skilled in the art, both explicitly and implicitly, the embodiments described herein can be combined with other embodiments.
[0030] Hereinafter, the present application will be described in detail with reference to the accompanying drawings and embodiments.
[0031] Referring to Figures 1 and 2a, Figure 1 is a structural diagram of a driving substrate of a display module provided according to a conventional embodiment, and Figure 2a is a structural diagram of a pixel unit provided according to the embodiment of Figure 1 when no electric field is applied. In the conventional technology, an electrophoretic display module 100a includes a driving substrate 10a and a counter substrate 20a arranged opposite to each other, and a microcapsule structure 30a arranged therebetween. Here, the driving substrate 10a includes a substrate 11a, a driving circuit layer 12a, and an electrode layer, which includes a plurality of pixel electrodes 13a distributed in an array. The counter substrate 20a includes a plurality of common electrodes 22a, where the pixel electrodes 13a and the common electrode 22a arranged opposite to each other and the microcapsule structure 30a arranged therebetween form a pixel unit 40a. Specifically, the driving circuit layer 12a includes a plurality of scan lines 15 extending along a first direction X, a plurality of data lines 16a extending along a second direction Y, and a plurality of driving transistors 14a, the driving transistors 14a corresponding to the pixel units 40a one-to-one, each scan line 15 electrically connected to the control terminal 141a of the driving transistor 14a in the corresponding row, each data line 16a electrically connected to the first terminal 142a of the driving transistor 14a in the corresponding column, and the second terminal 143a of the driving transistor 14a electrically connected to the corresponding pixel electrode 13a. Here, the first direction X intersects with the second direction Y, and in the embodiment of the present application, the first direction X and the second direction Y are perpendicular to each other.
[0032] 2a, the microcapsule structure 30a disposed between the pixel electrode 13a and the common electrode 22a contains white positively charged particles 31a and black negatively charged particles 32a. When no potential is applied to the pixel electrode 13a and the common electrode 22a, the positively charged particles 31a and the negatively charged particles 32a are randomly distributed within the microcapsule structure 30a, and no image is displayed.
[0033] 2b, which is a structural schematic diagram of the pixel unit provided by the embodiment of FIG. 1 when it displays black. When a negative potential is applied to the pixel electrode 13a and a positive potential is applied to the common electrode 22a, i.e., the potential of the common electrode 22a is higher than the potential of the pixel electrode 13a, and an electric field is formed from the common electrode 22a toward the pixel electrode 13a, the positively charged particles 31a move to the pixel electrode 13a in an "electrophoretic" manner, and the negatively charged particles 32a move to the common electrode 22a, and the pixel unit 40a displays black.
[0034] 2c, which is a structural schematic diagram of the pixel unit provided by the embodiment of FIG. 1 when it displays white. When a positive potential is applied to the pixel electrode 13a and a negative potential is applied to the common electrode 22a, i.e., the potential of the pixel electrode 13a is higher than the potential of the common electrode 22a, and an electric field is formed from the pixel electrode 13a toward the common electrode 22a, the negatively charged particles 32a migrate to the pixel electrode 13a in an "electrophoretic" manner, and the positively charged particles 31a migrate to the common electrode 22a, and the pixel unit 40a displays white.
[0035] In the above display mode, the positively charged particles 31a and the negatively charged particles 32a move in an "electrophoretic" manner, which results in a response speed of generally 500 ms or more, which makes the refresh rate of the display module 100a lower than 10 Hz, resulting in poor dynamic display effects and a "jerky" feeling on the screen.
[0036] The display module 100 (shown in FIG. 3) provided by the embodiment of the present application displays an image by each pixel unit 40 including a first pixel unit 41 and a second pixel unit 42 adjacent to each other. In each display period T, the first pixel unit 41 receives one frame of data signals transmitted from the data line 16 in a first stage T1 and displays one frame of image, and the second pixel unit 42 receives the next frame of data signals transmitted from the data line 16 in a second stage T2 and displays the next frame of image, so that the display module 100 can display two frames of image in one display period T, and the refresh rate of the display module 100 can be doubled. This overcomes the problem of a low refresh rate caused by the slow response speed of the display module 100a, effectively improving the refresh rate of the display module 100a and reducing the jerky feeling of images.
[0037] The present application will be described in detail below with reference to the drawings and embodiments.
[0038] 3 to 5, Fig. 3 is a structural schematic diagram of a display module provided in the first embodiment of the present application, Fig. 4 is a structural schematic diagram of a driving substrate provided in the first embodiment of the present application, and Fig. 5 is a structural schematic diagram of another driving substrate provided in the first embodiment of the present application. In this embodiment, a display module 100 is provided. The display module 100 includes a pixel unit 40, a driving transistor 14, a scan line 15, and a data line 16. Here, a plurality of pixel units 40 are arranged in an array, and each pixel unit 40 includes a pixel electrode 13, a common electrode 22, and a microcapsule structure 30. The pixel electrode 13 is disposed opposite the common electrode 22, and the microcapsule structure 30 is disposed between the pixel electrode 13 and the common electrode 22. Specifically, the microcapsule structure 30 includes an electrophoretic medium and positively charged particles 31 and negatively charged particles 32 suspended in the electrophoretic medium, and the positively charged particles 31 and negatively charged particles 32 are charged particles of different colors, and the specific colors can be set according to actual usage needs and are not specifically limited. In the embodiment of the present application, the positively charged particles 31 and negatively charged particles 32 are taken as an example to be white particles and black particles, respectively.
[0039] Here, the driving transistor 14 includes a control terminal 141, a first terminal 142, and a second terminal 143. The second terminal 143 is electrically connected to the pixel electrode 13 and is used to drive the pixel electrode 13, forming a corresponding electric field between the pixel electrode 13 and the common electrode 22, thereby causing the charged particles to move regularly. Here, the scan line 15 is electrically connected to the control terminal 141 of the driving transistor 14, thereby providing a scan signal to the pixel unit 40 through the driving transistor 14. The data line 16 is electrically connected to the first terminal 142 of the driving transistor 14, thereby providing a data signal to the pixel unit 40 through the driving transistor 14, thereby causing the pixel unit 40 to display a corresponding color. Specifically, the control terminal 141 is the gate of the driving transistor 14, the first terminal 142 is the source of the driving transistor 14, and the second terminal 143 is the drain of the driving transistor 14. The driving transistor 14 may be a thin film transistor (TFT), and the specific type can be selected according to actual needs and is not particularly limited thereto.
[0040] In this embodiment, the pixel unit 40 includes a first pixel unit 41 and a second pixel unit 42. When the display module 100 displays an image, in each display period T, the first pixel unit 41 is used to display one frame of image in the first stage T1, and the second pixel unit 42 is used to display the next frame of image in the second stage T2. This allows the display module 100 to display two frames of image in one display period T, and doubles the refresh rate of the display module 100. This overcomes the problem of low refresh rate caused by the slow response speed of the display module 100a, effectively improving the refresh rate of the display module 100 and improving the "jerky" feeling of the image.
[0041] Specifically, in each pixel unit 40, the pixel electrode 13 includes adjacent first and second pixel electrodes 131 and 132, the first pixel electrode 131, the common electrode 22, and the microcapsule structure 30 forming a first pixel unit 41, and the second pixel electrode 132, the same common electrode 22, and the microcapsule structure 30 forming a second pixel unit 42. The driving transistor 14 includes a first transistor 144 and a second transistor 145, and a second terminal 143 of the first transistor 144 is electrically connected to the first pixel electrode 131, and a second terminal 143 of the second transistor 145 is electrically connected to the second pixel electrode 132. Specifically, the data line 16 is disposed between the first pixel unit 41 and the second pixel unit 42, thereby shortening the wiring length between the data line 16 and the first pixel unit 41 and / or the second pixel unit 42 and favoring the wiring layout. The first terminal 142 of the first transistor 144 and the first terminal 142 of the second transistor 145 are electrically connected to the data line 16, respectively, so that the data line 16 provides a data signal to the first pixel unit 41 and the second pixel unit 42, respectively.
[0042] Specifically, the scan line 15 includes a first scan line 151 and a second scan line 152. The first scan line 151 is electrically connected to the control terminal 141 of the first transistor 144 and is used to control the timing at which the first pixel unit 41 can receive a data signal. The second scan line 152 is electrically connected to the control terminal 141 of the second transistor 145 and is used to control the timing at which the second pixel unit 42 can receive a data signal. Specifically, as shown in FIGS. 4 and 5 , the first scan line 151 and the second scan line 152 may be disposed on the same side of the pixel unit 40 or on opposite sides of the pixel unit 40, and may be disposed according to actual needs and are not limited thereto.
[0043] As shown in FIG. 6, FIG. 6 is a timing diagram of the driving signals of the display module provided in the first embodiment of the present application. In this embodiment, a driving method for the display module is provided. Taking an example in which the pixel units 40 are arranged in three rows and three columns, during each display period T, in the first stage T1, each first scan line 151 transmits one frame of scan signals Gout1-1, Gout2-1, Gout3-1 row by row, thereby turning on the first transistors 144 row by row. At the same time, in the first stage T1, each corresponding data line 16 transmits one frame of data signals Data1-1, Data2-1, Data3-1 column by column to the first pixel units 41, thereby causing the first pixel units 41 to display one frame of image. After the first scan line 151 transmits for a certain time t, it enters the second phase T2, and each second scan line 152 transmits the scan signals Gout1-2, Gout2-2, Gout3-2 of the next frame row by row, thereby turning on the second transistors 145 row by row. At the same time, each data line 16 transmits the data signals Data1-2, Data2-2, Data3-3 of the next frame to the second pixel units 42 column by column in the corresponding second phase T2, thereby causing the second pixel units 42 to display the image of the next frame.
[0044] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T, and compared with the refresh rate f of the conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and thereby effectively reducing the "stuttering" effect appearing on the display module 100a. In this embodiment, in each display period T, the time difference t between the first stage T1 and the second stage T2 can be specifically set according to actual needs.
[0045] 7 to 9, Fig. 7 is a structural schematic diagram of a display module provided in the second embodiment of the present application, Fig. 8 is a structural schematic diagram of a driving substrate provided in the second embodiment of the present application, and Fig. 9 is a structural schematic diagram of another driving substrate provided in the second embodiment of the present application. The differences from the first embodiment are as follows: in this embodiment, in the pixel units 40 of the same row, the control terminal 141 of the first transistor 144 and the control terminal 141 of the second transistor 145 are electrically connected to the same corresponding scan line 15, which is used to control the timing at which the pixel units 40 of the row can receive data signals, i.e., one row of pixel units 40 is driven by one scan line 15. Specifically, the data line 16 includes a first data line 161 and a second data line 162, the first data line 161 is electrically connected to the first terminal 142 of the first transistor 144 and is used to provide a data signal to the first pixel unit 41, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145 and is used to provide a data signal to the second pixel unit 42. Specifically, as shown in Figures 8 and 9, in this embodiment, in each pixel unit 40, the first data line 161 and the second data line 162 may be disposed on opposite sides of the pixel unit 40, or may be disposed between the first pixel unit 41 and the second pixel unit 42. The first data line 161 may be disposed outside the first pixel unit 41, and the second scan line 152 may be disposed between the first pixel unit 41 and the second pixel unit 42, or the first data line 161 may be disposed between the first pixel unit 41 and the second pixel unit 42, and the second data line 162 may be disposed outside the second pixel unit 42, which may be disposed according to actual needs, and there is no specific limitation thereto.
[0046] Specifically, in each display period T, in a first stage T1, the scan line 15 is used to transmit a scan signal to the first transistor 144, and the first data line 161 is used to transmit a frame of data signals to the first pixel unit 41 through the first transistor 144. In a second stage T2, the scan line 15 is used to transmit a scan signal to the second transistor 145, and the second data line 162 is used to transmit the next frame of data signals to the second pixel unit 42 through the second transistor 145.
[0047] 10, which is a timing diagram of the driving signals of the display module provided in the second embodiment of the present application. Specifically, taking the pixel units 40 as an example, with three rows and three columns, during each display period T, in the first stage T1, the scan lines 15 transmit one frame of scan signals Gout1-1, Gout2-1, Gout3-1 row by row, thereby turning on the driving transistors 14 row by row. At the same time, during this stage, the first data lines 161 transmit one frame of data signals Data1-1, Data2-1, Data3-1 column by column to the first pixel units 41, thereby causing the first pixel units 41 to display the image of the frame. After each first data line 161 transmits for a certain time t1, the second data line 162 pre-transmits the data signals Data1-2, Data2-2, and Data3-2 of the next frame to the second pixel unit 42. At this time, the scanning line 15 has not yet transmitted the scanning signals of the next frame, so the second pixel unit 42 does not display the image of the next frame. After the second data line 162 transmits for a certain time t2, the second stage T2 begins, in which the scanning line 15 transmits the scanning signals of the next frame row by row, and the second pixel unit 42 receives the data signals Data1-2, Data2-2, and Data3-2 of the next frame transmitted by the second data line 162, so that the second pixel unit 42 displays the image of the next frame.
[0048] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T, and compared with the refresh rate f of the conventional electrophoretic display module 100a, the structure of the display module 100 can increase the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and thereby effectively improving the image "stuttering" that appears on the display module 100a. In this embodiment, in each display period T, the time difference (T1+T2) between the first stage T1 and the second stage T2 can be specifically set according to actual needs.
[0049] 11 and 12, FIG. 11 is a structural schematic diagram of a display module provided in a third embodiment of the present application, and FIG. 12 is a structural schematic diagram of a driving substrate provided in the third embodiment of the present application. The differences from the first and second embodiments are as follows: In this embodiment, the scan line 15 includes a first scan line 151 and a second scan line 152, the first scan line 151 is electrically connected to the control terminal 141 of the first transistor 144, and the second scan line 152 is electrically connected to the control terminal 141 of the second transistor 145. The data line 16 includes a first data line 161 and a second data line 162, the first data line 161 is electrically connected to the first terminal 142 of the first transistor 144, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145. Here, the specific arrangement of the first scan lines 151 and the second scan lines 152 may be the same as or similar to the specific arrangement of the first scan lines 151 and the second scan lines 152 according to the first embodiment, and may achieve the same technical effects. The specific arrangement of the first data lines 161 and the second data lines 162 may be the same as or similar to the specific arrangement of the first data lines 161 and the second data lines 162 according to the second embodiment, and may achieve the same technical effects. For details, please refer to the above description, and further description will be omitted here.
[0050] Specifically, in each display period T, in a first stage T1, the first scan line 151 is used to transmit a scan signal to the first transistor 144, and the first data line 161 is used to transmit a frame of data signals to the first pixel unit 41 through the first transistor 144. In a second stage T2, the second scan line 152 is used to transmit a scan signal to the second transistor 145, and the second data line 162 is used to transmit the next frame of data signals to the second pixel unit 42 through the second transistor 145.
[0051] 13, which is a timing diagram of the driving signals of the display module provided by the third embodiment of the present application. Specifically, taking the pixel units 40 as an example, with three rows and three columns, during each display period T, the first scan line 151 transmits one frame of scan signals Gout1-1, Gout2-1, and Gout3-1 row by row, thereby turning on the first transistors 144 row by row. At the same time, during this period, the first data line 161 transmits one frame of data signals Data1-1, Data2-1, and Data3-1 column by column to the first pixel units 41, thereby causing the first pixel units 41 to display one frame of an image. After the first scan line 151 transmits for a certain time t, it enters a second phase T2, in which the second scan line 152 transmits the scan signals Gout1-2, Gout2-2, Gout3-2 of the next frame row by row, thereby turning on the second transistors 145 row by row, and during this phase, the 22nd data line 16 transmits the data signals Data1-2, Data2-2, Data3-2 of the next frame column by column to the second pixel unit 42, thereby allowing the second pixel unit 42 to display the image of the next frame.
[0052] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T, and compared with the refresh rate f of a typical electrophoretic display module 100a, the structure of the display module 100 can improve the image refresh rate to twice the normal refresh rate f, thereby significantly improving the image refresh rate and effectively reducing the "stuttering" effect that appears on the display module 100a. In this embodiment, in each display period T, the time difference T between the first stage T1 and the second stage T2 can be specifically set according to actual needs.
[0053] 14 and 15, Fig. 14 is a schematic planar structure diagram of a display module provided by a fourth embodiment of the present application, and Fig. 15 is a schematic planar structure diagram of another display module provided by the fourth embodiment of the present application. In this embodiment, the common electrode 22 includes adjacent first and second common electrodes 221 and 222, and the first and second common electrodes 221 and 222 may be arranged parallel to the scan lines 15 or parallel to the data lines 16, as required. Here, the pixel electrode 13, the first common electrode 221, and the microcapsule structure 30 form a first pixel unit 41, and the same pixel electrode 13, the second common electrode 222, and the microcapsule structure 30 form a second pixel unit 42. That is, in this pixel unit 40, the first pixel unit 41 and the second pixel unit 42 share the pixel electrode 13, and the part of the pixel electrode 13 facing the first common electrode 221, the first common electrode 221, and the microcapsule structure 30 therebetween form the first pixel unit 41, and the part of the pixel electrode 13 facing the second common electrode 222, the second common electrode 222, and the microcapsule structure 30 therebetween form the second pixel unit 42.
[0054] Specifically, within each display period T, the scan line 15 transmits scan signals to the driving transistor 14 in a first phase T1 and a second phase T2. In the first phase T1, the data line 16 transmits one frame of data signals to the pixel electrode 13 via the first terminal 142, and the first common electrode 221 is used to transmit a first common voltage signal Com1, so that the first pixel unit 41 receives the one frame of data signals. In the second phase T2, the data line 16 transmits the next frame of data signals to the pixel electrode 13 via the first terminal 142, and the second common electrode 222 is used to transmit a second common voltage signal Com2, so that the second pixel unit 42 receives the next frame of data signals.
[0055] 16, which is a timing diagram of the driving signals of the display module provided by the fourth embodiment of the present application. Specifically, taking the pixel units 40 as an example, with three rows and three columns, in each display period T, the scan lines 15 transmit one frame of scan signals Gout1, Gout2, Gout3 row by row, and at the same time, the first common electrode 221 transmits one frame of common voltage signal Com1. After the Com1 signal is transmitted at a certain time t1, the data lines 16 transmit one frame of data signals Data1-1, Data2-1, Data3-1 to the pixel electrodes 13 column by column, thereby forming corresponding electric fields in the first pixel units 41. That is, the data lines 16 transmit one frame of data signals Data1-1, Data2-1, Data3-1 to the first pixel units 41 column by column, thereby displaying one frame of an image in the first pixel units 41. After the data line 16 transmits the data signal of the frame for a certain time t2, the second common electrode 222 transmits the common voltage signal Com2 of one frame. At this time, the data line 16 has not yet transmitted the data signal of the next frame, so the corresponding electric field has not yet been formed in the second pixel unit 42, and the image of the next frame is not displayed. After the common voltage signal Com2 is transmitted for a certain time t3, the second stage T2 begins, and the data line 16 transmits the data signals Data1-2, Data2-2, and Data3-2 of the next frame to the pixel electrode 13 by column, so that the corresponding electric field is formed in the second pixel unit 42, i.e., the data line 16 transmits the data signals Data1-2, Data2-2, and Data3-2 of the next frame by column to the second pixel unit 42, so that the image of the next frame is displayed in the second pixel unit 42.
[0056] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T. Compared with the refresh rate f of the conventional electrophoretic display module 100a, the structure of the display module 100 can improve the image refresh rate to twice the conventional refresh rate f. The image refresh rate is significantly improved, thereby effectively improving the "stuttering" effect of the image displayed on the display module 100a. In this embodiment, the time difference (t1+t2+t3) between the first stage T1 and the second stage T2 in each display period T can be specifically set according to actual needs.
[0057] 17, which is a schematic planar diagram of a display module provided in a fifth embodiment of the present application. In this embodiment, the pixel electrode 13 includes a first pixel electrode 131 and a second pixel electrode 132 adjacent to each other, and the common electrode 22 includes a first common electrode 221 and a second common electrode 222 adjacent to each other. The first pixel electrode 131 is disposed opposite the first common electrode 221 and forms a first pixel unit 41 with the microcapsule structure 30. The second pixel electrode 132 is disposed opposite the second common electrode 222 and forms a second pixel unit 42 with the microcapsule structure 30. The driving transistor 14 includes a first transistor 144 and a second transistor 145. The second terminal 143 of the first transistor 144 is electrically connected to the first pixel electrode 131, and the second terminal 143 of the second transistor 145 is electrically connected to the second pixel electrode 132. The control terminal 141 of the first transistor 144 and the control terminal 141 of the second transistor 145 are electrically connected to the same scan line 15. The data line 16 includes a first data line 161 and a second data line 162. The first data line 161 is electrically connected to the first terminal 142 of the first transistor 144, and the second data line 162 is electrically connected to the first terminal 142 of the second transistor 145. Specifically, the arrangement of the first data line 161 and the second data line 162 may be the same as or similar to the arrangement of the first data line 161 and the second data line 162 in the second embodiment, and the same technical effects can be achieved. The arrangement of the first common electrode 221 and the second common electrode 222 may be the same as or similar to the arrangement of the first common electrode 221 and the second common electrode 222 in the fourth embodiment, and the same technical effects can be achieved. For details of the above, please refer to the specific description above and will not be described again here.
[0058] Specifically, in each display period T, the scan line 15 is used to transmit scan signals to the driving transistor 14 in a first phase T1 and a second phase T2. In the first phase T1, the first data line 161 is used to transmit a data signal of one frame to the first pixel electrode 131 via the first transistor 144, and the first common electrode 221 is used to transmit a first common voltage signal, so that the first pixel unit 41 receives the data signal of one frame. In the second phase T2, the second data line 162 is used to transmit a data signal of the next frame to the second pixel electrode 132 via the second transistor 145, and the second common electrode 222 is used to transmit a second common voltage signal, so that the second pixel unit 42 receives the data signal of the next frame.
[0059] 18, which is a timing diagram of the driving signals of the display module provided in the fifth embodiment of the present application. Specifically, taking the pixel units 40 as an example, with three rows and three columns, within each display period T, the scan line 15 sends Gout1, Gout2, and Gout3 for each row, thereby turning on the driving transistors 14 for each row. In the first stage T1, the first common electrode 221 sends the first common voltage signal Com1. At the same time, the first data line 161 sends one frame of data signals Data1-1, Data2-1, and Data3-1 for each column to the first pixel units 41, thereby causing the first pixel units 41 to display one frame of an image. After the first data line 161 transmits the frame data signal for a certain time t, it enters the second stage T2, in which the second common electrode 222 transmits the second common voltage signal Com2, and at the same time, the second data line 162 transmits the next frame data signals Data1-2, Data2-2, and Data3-2 to the second pixel unit 42, thereby causing the second pixel unit 42 to display the next frame image.
[0060] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T, and compared with the refresh rate f of the conventional electrophoretic display module 100a, the structure of the display module 100 can improve the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and thereby effectively reducing the "stuttering" effect appearing on the display module 100a. In this embodiment, in each display period T, the time difference t between the first stage T1 and the second stage T2 can be specifically set according to actual needs.
[0061] Referring to Figure 19, Figure 19 is a schematic plan view of a display module provided in a sixth embodiment of the present application. The sixth embodiment differs from the fifth embodiment in the following respects: In this embodiment, the first terminal 142 of the first transistor 144 and the first terminal 142 of the second transistor 145 are electrically connected to the same data line 16. The scan line 15 includes a first scan line 151 and a second scan line 152, where the first scan line 151 is electrically connected to the control terminal 141 of the first transistor 144, and the second scan line 152 is electrically connected to the control terminal 141 of the second transistor 145. That is, in this embodiment, the first pixel unit 41 and the second pixel unit 42 are electrically connected to the same data line 16, and the first pixel unit 41 and the second pixel unit 42 are electrically connected to the first scan line 151 and the second scan line 152, respectively. Here, the installation manner of the first scan lines 151 and the second scan lines 152 may be the same as or similar to the specific installation manner of the first scan lines 151 and the second scan lines 152 according to the first embodiment, and the same technical effects can be achieved. The installation manner of the first common electrodes 221 and the second common electrodes 222 may be the same as or similar to the installation manner of the first common electrodes 221 and the second common electrodes 222 according to the fourth embodiment, and the same technical effects can be achieved. For details of the above, please refer to the specific description above, and description thereof will be omitted here.
[0062] Specifically, in each display period T, in a first stage T1, the first scan line 151 is used to transmit a scan signal to the first transistor 144, the data line 16 is used to transmit a frame of data signals to the first pixel electrode 131 via the first transistor 144, and the first common electrode 221 is used to transmit a first common voltage signal, so that the first pixel unit 42 receives the frame of data signals. In a second stage T2, the second scan line 152 is used to transmit a next frame of data signals to the second pixel electrode 132 via the second transistor 145, and the second common voltage 222 is used to transmit a second common voltage signal, so that the second pixel unit 42 receives the next frame of data signals.
[0063] 20, which is a timing diagram of the driving signals of the display module provided in the sixth embodiment of the present application. Specifically, taking the pixel units 40 as an example, with three rows and three columns, during each display period T, the first scan line 151 transmits one frame of scan signals Gout1-1, Gout2-1, Gout3-1 row by row, thereby turning on the first transistors 144 row by row. At the same time, during this period, the first common electrode 221 transmits the first common voltage signal Com1, and the data line 16 transmits one frame of data signals Data1-1, Data2-1, Data3-1 to the first pixel units 41, thereby causing the first pixel units 41 to display one frame of an image. After the first scan line 151 transmits for a certain time t, it enters the second phase T2, in which the second scan line 152 transmits the scan signals Gout1-2, Gout2-2, Gout3-2 of the next frame row by row, thereby turning on the second transistors 145 row by row. At the same time, during this phase, the second common electrode 222 transmits the second common voltage signal Com2, and the second data line 162 transmits the data signals Data1-2, Data2-2, Data3-3 of the next frame column by column to the second pixel unit 42, thereby allowing the second pixel unit 42 to display the image of the next frame.
[0064] The above driving method enables the display module 100 to transmit two frames of image signals within one display period T, and compared with the refresh rate f of the conventional electrophoretic display module 100a, the structure of the display module 100 can improve the image refresh rate to twice the conventional refresh rate f, significantly improving the image refresh rate and thereby effectively reducing the "stuttering" effect appearing on the display module 100a. In this embodiment, in each display period T, the time difference t between the first stage T1 and the second stage T2 can be specifically set according to actual needs.
[0065] 21, which is a structural schematic diagram of a display device provided in an embodiment of the present application. In this embodiment, a display device is provided. The display device includes a display module 100 and a control module 200.
[0066] Here, the display module 100 is used to display images, and the specific structure and function of the display module 100 are the same as or similar to those of the display module 100 of the above embodiment, and can achieve the same technical effects. For details, please refer to the above specific description, and the description will be omitted here.
[0067] Here, the control module 200 is electrically connected to the display module 100 and is used to provide control signals (such as clock control signals, power control signals, gate driving signals, source driving signals, etc. required for the display module 100) to the display module 100, so that in each display period, the display module 100 displays one frame of image in the first stage T1 and the next frame of image in the second stage T2. In this way, by performing division control on the pixel units 40, the display module 100 can display two frames of image in one display period T, which greatly improves the refresh rate of the display device and effectively reduces the "stuttering" sensation that occurs when the display device displays images.
[0068] In a specific embodiment, the display device may further include a backlight module, which is disposed opposite the display module 100 and is used to provide backlight for the display module 100. When the environment where the display device is located is dark, the backlight module is turned on to provide a light source for the display module 100, so that the display device can be used in multiple scenes and the backlight intensity can be adjusted according to different light environments to provide supplementary light for the display module 100, allowing the display device to always maintain an optimal display effect and thereby improving user comfort.
[0069] The above are embodiments of the present application and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by utilizing the contents of the specification and drawings of the present application, or any directly or indirectly applicable to other related technical fields, are also included in the patent protection scope of the present application. [Explanation of symbols]
[0070] 100a, 100 display module 10a, 10 Drive board 11a, 11 board 12a, 12 drive circuit layer 13a, 13 pixel electrodes 131 first pixel electrode 132 second pixel electrode 14a, 14 drive transistor 141a, 141 control terminal 142a, 142 first terminal 143a, 143 2nd terminal 144 First Transistor 145 Second Transistor 15a, 15 scan lines 151 First Scan Line 152 Second Scan Line 16a, 16 data lines 161 First data line 162 Second data line 20a, 20 opposing substrate 21a, 21 board 22a, 22 common electrode 221 1st common electrode 222 2nd common electrode 30a, 30 Microcapsule structure 31a, 31 positively charged particles 32a, 32 negatively charged particles 40a, 40 pixel unit 41 1st pixel unit 42 2nd pixel unit 200 Control Module T display period T1 First Stage T2 Second Stage X first direction Y Second direction
Claims
1. A display module including a pixel unit, a driving transistor, a scan line, and a data line, the pixel unit includes a pixel electrode, a common electrode, and a microcapsule structure, the pixel electrode and the common electrode are disposed opposite to each other, the microcapsule structure is disposed between the pixel electrode and the common electrode, and the microcapsule structure contains charged particles; the driving transistor includes a control terminal, a first terminal and a second terminal, the second terminal is electrically connected to the pixel electrode and is used to drive the pixel unit; the scan lines are electrically connected to the control terminals and are used to provide scan signals to the pixel units; the data line is electrically connected to the first terminal and is used to provide a data signal to the pixel electrode; wherein the pixel unit includes adjacent first and second pixel units, and in each display period, the first pixel unit is used to receive a frame of data signals transmitted by the data line in a first stage, and the second pixel unit is used to receive the next frame of data signals transmitted by the data line in a second stage, and the first stage is before the second stage.
2. the display module includes a plurality of pixel units, the pixel units being arranged in a matrix; wherein, in each display period, in the first stage, the driving transistors corresponding to the first pixel units of a plurality of rows are sequentially turned on, so that the first pixel units of a plurality of rows receive the data signals of one frame transmitted by the data lines and display an image of one frame; 2. The display module of claim 1, wherein in the second stage, the driving transistors corresponding to the second pixel units in multiple rows are sequentially turned on so that the second pixel units in multiple rows receive the data signals of the next frame transmitted by the data lines and display an image of the next frame.
3. the pixel electrode includes a first pixel electrode and a second pixel electrode adjacent to each other, the first pixel electrode, the common electrode and the microcapsule structure form the first pixel unit, and the second pixel electrode, the same common electrode and the microcapsule structure form the second pixel unit; 3. The display module of claim 2, wherein the driving transistor includes a first transistor and a second transistor, the second terminal of the first transistor being electrically connected to the first pixel electrode, and the second terminal of the second transistor being electrically connected to the second pixel electrode.
4. a first terminal of the first transistor and a first terminal of the second transistor are electrically connected to the same data line; the scanning lines include a first scanning line and a second scanning line, the first scanning line is electrically connected to the control terminal of the first transistor, and the second scanning line is electrically connected to the control terminal of the second transistor; 4. The display module of claim 3, wherein in each display period, the first scanning line is used to transmit the scanning signal to the first transistor in the first stage, and the second scanning line is used to transmit the scanning signal to the second transistor in the second stage, so that the first pixel unit receives the data signal of one frame transmitted from the data line in the first stage, and the second pixel unit receives the data signal of the next frame transmitted from the data line in the second stage.
5. In each display period, in the first stage, each of the first scan lines transmits the scan signal of one frame row by row so as to turn on the first transistor row by row, and each of the data lines transmits the data signal of one frame column by column to the first pixel unit so as to display an image of one frame; 5. The display module of claim 4, wherein in the second stage, each of the second scanning lines transmits the scanning signals of the next frame row by row so as to turn on the second transistors row by row, and each of the data lines transmits the data signals of the next frame column by column to the second pixel units so as to display an image of the next frame.
6. The display module according to claim 5 , wherein the second stage is initiated when a preset time has elapsed after the first stage is completed.
7. the control terminal of the first transistor and the control terminal of the second transistor are electrically connected to the same scanning line; the data lines include a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor; 4. The display module of claim 3, wherein in each display cycle, in the first stage, the scanning lines are used to transmit the scanning signals to the first transistors, and the first data lines are used to transmit the data signals of one frame to the first pixel units via the first transistors; and in the second stage, the scanning lines are used to transmit the scanning signals to the second transistors, and the second data lines are used to transmit the data signals of the next frame to the second pixel units via the second transistors.
8. In each display period, in the first stage, each of the scan lines transmits the scan signals of one frame row by row, so as to turn on the driving transistors row by row; the first data lines transmit the data signals of one frame to the first pixel units row by row, so as to display an image of one frame; and after each of the first data lines transmits for a predetermined time, each of the second data lines transmits the data signals of the next frame to the second pixel units column by column in advance; 8. The display module of claim 7, wherein in the second stage, each of the scanning lines transmits the scanning signal of the next frame row by row, and the second pixel unit receives the data signal of the next frame to display the next frame image.
9. the scanning lines include a first scanning line and a second scanning line, the first scanning line is electrically connected to the control terminal of the first transistor, and the second scanning line is electrically connected to the control terminal of the second transistor; the data lines include a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor; 4. The display module of claim 3, wherein in each display cycle, in the first stage, the first scanning line is used to transmit the scanning signal to the first transistor, and the first data line is used to transmit the data signal of one frame to the first pixel unit via the first transistor; and in the second stage, the second scanning line is used to transmit the scanning signal to the second transistor, and the second data line is used to transmit the data signal of the next frame to the second pixel unit via the second transistor.
10. In each display period, in the first stage, the first scan line transmits the scan signal of one frame row by row so as to turn on the first transistor row by row, and the first data line transmits the data signal of one frame column by column to the first pixel unit so as to display an image of one frame; 10. The display module of claim 9, wherein in the second stage, the second scanning line transmits the scanning signal of the next frame row by row to turn on the second transistor row by row, and the second data line transmits the data signal of the next frame column by column to the second pixel unit to display an image of the next frame.
11. the common electrode includes a first common electrode and a second common electrode adjacent to each other, the pixel electrode, the first common electrode and the microcapsule structure form the first pixel unit, and the same pixel electrode, the second common electrode and the microcapsule structure form the second pixel unit; 3. The display module of claim 2, wherein in each display period, the scanning lines transmit the scanning signals to the driving transistors in the first and second stages, and in the first stage, the data lines transmit the data signals of one frame to the pixel electrodes through the first terminals, and the first common electrodes are used to transmit first common voltage signals, so that the first pixel units receive the data signals of one frame; and in the second stage, the data lines transmit the data signals of a next frame to the pixel electrodes through the first terminals, and the second common electrodes are used to transmit second common voltage signals, so that the second pixel units receive the data signals of the next frame.
12. In each display period, the scan lines transmit the scan signals row by row to turn on the drive transistors row by row; In the first step, the first common electrode transmits a common voltage signal of one frame, and the data line transmits the data signal of one frame to the pixel electrode column by column, thereby forming a corresponding electric field in the first pixel unit, and displaying an image of one frame; After the data line transmits the data signal for a predetermined time, the second common electrode transmits a common voltage signal of the next frame, and after the predetermined time has elapsed, the second stage is entered; 12. The display module of claim 11, wherein in the second stage, the data lines transmit the data signals of the next frame to the pixel electrodes column by column, thereby forming corresponding electric fields in the second pixel units and displaying an image of the next frame.
13. the pixel electrode includes a first pixel electrode and a second pixel electrode adjacent to each other, the common electrode includes a first common electrode and a second common electrode adjacent to each other, the first pixel electrode is disposed opposite to the first common electrode and forms the first pixel unit together with the microcapsule structure, the second pixel electrode is disposed opposite to the second common electrode and forms the second pixel unit together with the microcapsule structure, 3. The display module of claim 2, wherein the driving transistor includes a first transistor and a second transistor, the second terminal of the first transistor being electrically connected to the first pixel electrode, and the second terminal of the second transistor being electrically connected to the second pixel electrode.
14. the control terminal of the first transistor and the control terminal of the second transistor are electrically connected to the same scanning line; the data lines include a first data line and a second data line, the first data line is electrically connected to the first terminal of the first transistor, and the second data line is electrically connected to the first terminal of the second transistor; 14. The display module of claim 13, wherein in each display period, the scanning lines are used to transmit the scanning signals to the driving transistors in the first and second stages, and in the first stage, the first data lines are used to transmit the data signals of one frame to the first pixel electrodes via the first transistors, and the first common electrodes are used to transmit first common voltage signals, so that the first pixel units receive the data signals of one frame; and in the second stage, the second data lines are used to transmit the data signals of a next frame to the second pixel electrodes via the second transistors, and the second common electrodes are used to transmit second common voltage signals, so that the second pixel units receive the data signals of the next frame.
15. a first scan line transmits the scan signal row by row so as to turn on the drive transistor row by row in each display period; In the first step, the first common electrode transmits the first common voltage signal, and the first data line transmits the data signal of one frame to the first pixel unit by column to display an image of one frame; 15. The display module of claim 14, wherein in the second stage, the second common electrode transmits the second common voltage signal, and the second data line transmits the data signal of a next frame to the second pixel unit by column to display an image of the next frame.
16. the first terminal of the first transistor and the first terminal of the second transistor are electrically connected to the same data line; the scanning lines include a first scanning line and a second scanning line, the first scanning line is electrically connected to the control terminal of the first transistor, and the second scanning line is electrically connected to the control terminal of the second transistor; 14. The display module of claim 13, wherein in each display period, in the first stage, the first scan line is used to transmit the scan signal to the first transistor, the data line is used to transmit the data signal of one frame to the first pixel electrode via the first transistor, and the first common electrode is used to transmit a first common voltage signal, so that the first pixel unit receives the data signal of one frame; and in the second stage, the second scan line is used to transmit the data signal of the next frame to the second pixel electrode via the second transistor, and the second common electrode is used to transmit a second common voltage signal, so that the second pixel unit receives the data signal of the next frame.
17. In each display period, in the first stage, the first scan line transmits the scan signal of one frame row by row, so as to turn on the first transistor row by row, and the first common electrode transmits the first common voltage signal; and the data line transmits the data signal of one frame to the first pixel unit, so as to display an image of one frame; 17. The display module of claim 16, wherein in the second stage, the second scan line transmits the scan signal of the next frame row by row to turn on the second transistor row by row, the second common electrode transmits the second common voltage signal, and the data line transmits the data signal of the next frame column by column to the second pixel unit to display an image of the next frame.
18. 2. The display module of claim 1, wherein the microcapsule structure includes an electrophoretic medium and positively charged particles and negatively charged particles suspended in the electrophoretic medium, the positively charged particles and the negatively charged particles being the charged particles of different colors.
19. A display device including a display module and a control module, The display module is used to display an image, and the display module is the display module according to claim 1 ; The control module is electrically connected to the display module and is used to provide a control signal to the display module, so that in each display period, the display module displays one frame of image in a first stage and the next frame of image in a second stage.