System and method for wedge-based predictive mode signaling

Wedge-based partitioning modes improve video encoding/decoding accuracy by better representing complex video objects, addressing suboptimal partitioning in existing technologies.

JP2026509317APending Publication Date: 2026-03-18TENCENT AMERICA LLC
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Patent Information

Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-05-05
Publication Date
2026-03-18

AI Technical Summary

Technical Problem

Existing video encoding and decoding technologies face challenges in accurately partitioning video blocks for complex objects, leading to suboptimal motion prediction and quality of encoding/decoding.

Method used

Implementing wedge-based partitioning modes that allow for more accurate representation of video object shapes, improving motion prediction and overall video encoding/decoding quality.

Benefits of technology

Enhances the accuracy of motion prediction and quality of video encoding/decoding by using wedge-based partitioning modes that better represent complex video objects.

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Abstract

The various embodiments described herein include methods and systems for encoding and decoding video. In a first embodiment, the method includes receiving video data comprising a plurality of blocks, including a first block. The method includes obtaining a syntax element value from the video data indicating a wedge mode index corresponding to a first partition mode from a plurality of partition modes for the first block, wherein the wedge mode index is greater than 16. The method further includes determining that the first partition mode is associated with a composite wedge-based prediction for the first block. The method also includes partitioning the first block into a first section and a second section according to the first partition mode and the wedge mode index, decoding the first section according to a first predictor, and decoding the second section according to a second predictor.
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Description

Technical Field

[0001]

[0001] Cross - reference to Related Applications This application claims priority to U.S. Provisional Patent Application No. 63 / 432,686, filed on December 14, 2022, entitled "Improvement of Wedge - Based Prediction Mode Signaling", and also claims priority to U.S. Patent Application No. 18 / 143,522, filed on May 4, 2023, entitled "Systems and Methods for Wedge - Based Prediction Mode Signaling", all of which are incorporated herein by reference in their entirety.

[0002]

[0002] Technical Field The disclosed embodiments are generally related to video encoding and decoding, including but not limited to systems and methods for block partitioning and signaling.

Background Art

[0003]

[0003] Digital video is supported by a variety of electronic devices such as digital televisions, laptop or desktop computers, tablet computers, digital cameras, digital recording devices, digital media players, video game consoles, smartphones, video teleconferencing devices, video streaming devices, etc. The electronic devices transmit and receive digital video data or perform other communications via a communication network, and / or store digital video data in a storage device. Due to the limited bandwidth capacity of the communication network and the limited memory resources of the storage device, video coding may be used to compress video data according to one or more video coding standards before the video data is communicated or stored.

[0004]

[0004] Multiple video codec standards have been developed. For example, video coding standards include AV1 (AOMedia Video 1), VVC (Versatile Video Coding), JEM (Joint Exploration test Model), HEVC / H.265 (High-Efficiency Video Coding), AVC / H.264 (Advanced Video Coding), and MPEG (Moving Picture Expert Group) coding. Video coding generally utilizes prediction methods (e.g., interpretation, intrapretation, or similar) that take advantage of the redundancy inherent in video data. Video coding aims to compress video data into a format that uses a lower bitrate while avoiding or minimizing degradation of video quality.

[0005]

[0005] HEVC, also known as H.265, is a video compression standard designed as part of the MPEG-H project. The ITU-T and ISO / IEC published the HEVC / H.265 standard in 2013 (version 1), 2014 (version 2), 2015 (version 3), and 2016 (version 4). VVC (Versatile Video Coding), also known as H.266, is a video compression standard intended as a successor to HEVC. The ITU-T and ISO / IEC published the VVC / H.266 standard in 2020 (version 1) and 2022 (version 2). AV1 is an open video coding format designed as an alternative to HEVC. On January 8, 2019, verified version 1.0.0 was released along with errata 1 of the specification. [Overview of the project]

[0006]

[0006] This disclosure describes various techniques that a video bitstream decoder may use to improve the quality and / or efficiency of decoding. A video encoder may also implement these techniques during encoding (e.g., reconstruction of encoded frames and / or hypothesis testing).

[0007]

[0007] During the video coding process, video data is separated into blocks. In this disclosure, the term “block” can be interpreted as a prediction block, coding block, or coding unit (CU), as will be described in more detail later. Geometrically dividing the blocks takes into account the two-dimensional geometry of the video object. After partitioning, it is possible to use different motion predictors for each section of the block. In the case of non-lossless compression, this partitioning approach improves the quality (accuracy) of encoding / decoding more complex objects.

[0008]

[0008] According to some embodiments, a video encoding method is provided. The method includes: (i) acquiring video data comprising a plurality of blocks including a first block; (ii) identifying a first partition mode from a plurality of partition modes for the first block; (iii) partitioning the first block into a first section and a second section according to the first partition mode; (iv) encoding the first section according to a first predictor and encoding the second section according to a second predictor; and (v) signaling the first partition mode.

[0009]

[0009] According to some embodiments, a video decoding method is provided. The method includes: (i) obtaining video data from a bitstream, which includes a plurality of blocks including a first block; (ii) identifying a first partition mode from a plurality of partition modes for the first block; (iii) partitioning the first block into a first section and a second section according to the first partition mode; and (iv) reconstructing the first block, which includes reconstructing the first section using a first predictor and reconstructing the second section using a second predictor.

[0010]

[0010] According to some embodiments, a video decoding method performed on an arithmetic system having memory and one or more processors includes: (i) receiving video data comprising a plurality of blocks including a first block; (ii) obtaining a syntax element value from the video data indicating a wedge mode index corresponding to a first partition mode from a plurality of partition modes for the first block, wherein the wedge mode index is greater than 16; (iii) determining that the first partition mode is associated with a composite wedge-based prediction for the first block; (iv) partitioning the first block into a first section and a second section according to the first partition mode and the wedge mode index; and (v) decoding the first section according to a first predictor and decoding the second section according to a second predictor.

[0011]

[0011] According to some embodiments, an arithmetic system is provided, such as a streaming system, a server system, a personal computer system, or other electronic device. The arithmetic system includes memory and control circuits for storing one or more instruction sets. The one or more instruction sets include instructions for performing any of the methods described herein. In some embodiments, the arithmetic system includes encoder components and / or decoder components.

[0012]

[0012] According to some embodiments, a non-temporary computer-readable storage medium is provided. The non-temporary computer-readable storage medium stores one or more instruction sets for execution by an arithmetic system. The one or more instruction sets include instructions for performing any of the methods described herein.

[0013]

[0013] Accordingly, devices and systems are disclosed along with methods for encoding / decoding video. Such methods, devices and systems may complement or replace conventional methods, devices and systems for video encoding / decoding.

[0014]

[0014] The features and advantages described herein are not necessarily exclusive, and in particular, several additional features and advantages will be apparent to those skilled in the art from the drawings, specification and claims provided herein. Furthermore, it should be noted that the language used herein has been chosen primarily for readability and explanatory purposes and not necessarily to describe or limit the subject matter described herein. [Brief explanation of the drawing]

[0015]

[0015] To enable a more detailed understanding of this disclosure, a more specific description can be provided by referring to the features of various embodiments, some of which are shown in the accompanying drawings. However, the accompanying drawings are merely illustrative of the relevant features of this disclosure and are therefore not intended to necessarily limit this description, for this description may allow for other valid features that will be understood by those skilled in the art by reading this disclosure. [Figure 1]

[0016] Figure 1 is a block diagram showing an exemplary communication system according to some embodiments. [Figure 2A]

[0017] Figure 2A is a block diagram showing exemplary elements of an encoder component according to some embodiments. [Figure 2B]

[0018] Figure 2B is a block diagram showing exemplary elements of a decoder component according to some embodiments. [Figure 3]

[0019] Figure 3 is a block diagram showing an exemplary server system according to one embodiment. [Figure 4A]

[0020] Figures 4A-4D show exemplary coding tree structures according to some embodiments. [Figure 4B]

[0020] Figures 4A-4D show exemplary coding tree structures according to some embodiments. [Figure 4C]

[0020] Figures 4A-4D show exemplary coding tree structures according to some embodiments. [Figure 4D]

[0020] Figures 4A-4D show exemplary coding tree structures according to some embodiments. [Figure 5A]

[0021] Figure 5A shows an example of geometrically divided mode prediction according to some embodiments. [Figure 5B]

[0022] Figures 5B-5C show exemplary partition mode blending in some embodiments. [Figure 5C]

[0022] Figures 5B-5C show an exemplary partition mode blend according to some embodiments. [Figure 5D-1]

[0023] Figure 5D shows an exemplary wedge-based partitioning according to some embodiments. [Figure 5D-2]

[0023] Figure 5D shows an exemplary wedge-based partitioning according to some embodiments. [Figure 6A]

[0024] Figure 6A is a flowchart showing an exemplary video encoding method according to some embodiments. [Figure 6B]

[0025] Figure 6B is a flowchart showing an exemplary video decoding method according to some embodiments.

[0026] In accordance with common practice, the various features shown in the drawings are not necessarily drawn to scale, and like reference numerals can be used throughout the specification and drawings to indicate like features.

DETAILED DESCRIPTION OF THE INVENTION

[0016]

[0027] The present disclosure describes, among other things, using various partitioning techniques for partitioning video blocks for better motion prediction and higher quality coding. For example, existing partitioning modes may not be optimal for more complex video objects. In these cases, a more accurate partitioning mode can better represent the shape of the video object, and thus can improve the accuracy of motion prediction and, consequently, the quality / accuracy of video encoding and decoding.

[0017]

[0028] Exemplary systems and devices Figure 1 is a block diagram showing a communication system 100 according to some embodiments. The communication system 100 includes a source device 102 and a plurality of electronic devices 120 (e.g., electronic device 120-1 to electronic device 120-m) that are coupled to each other so as to be able to communicate with one or more networks. In some embodiments, the communication system 100 is a streaming system for use with video-enabled applications such as video conferencing applications, digital TV applications, and media storage and / or distribution applications.

[0018]

[0029] Source device 102 includes a video source 104 (e.g., a camera component or media storage) and an encoder component 106. In some embodiments, the video source 104 is a digital camera (e.g., configured to generate an uncompressed video sample stream). The encoder component 106 generates one or more encoded video bitstreams from the video stream. The video stream from video source 104 may be a large amount of data compared to the encoded video bitstream 108 generated by the encoder component 106. Since the encoded video bitstream 108 is a smaller amount of data (less data) compared to the video stream from the video source, the encoded video bitstream 108 requires less bandwidth to transmit and less storage space to store compared to the video stream from video source 104. In some embodiments, source device 102 does not include the encoder component 106 (e.g., it is configured to transmit uncompressed video data to a network 110).

[0019]

[0030] One or more networks 110 represent any number of networks that transmit information between the source device 102, the server system 112, and / or the electronic device 120, and include, for example, wired and / or wireless communication networks. One or more networks 110 can exchange data via circuit-switched and / or packet-switched channels. Typical networks include telecommunications networks, local area networks, wide area networks, and / or the Internet.

[0020]

[0031] One or more networks 110 include a server system 112 (e.g., a distributed / cloud computing system). In some embodiments, the server system 112 is or includes a streaming server (configured to store and / or distribute video content, e.g., an encoded video stream from a source device 102). The server system 112 includes a coder component 114 (configured to encode and / or decode video data, e.g., video data). In some embodiments, the coder component 114 includes an encoder component and / or a decoder component. In various embodiments, the coder component 114 is instantiated as hardware, software, or a combination thereof. In some embodiments, the coder component 114 is configured to decode an encoded video bitstream 108 and re-encode the video data using different encoding standards and / or methods to produce encoded video data 116. In some embodiments, the server system 112 is configured to produce multiple video formats and / or encodings from the encoded video bitstream 108.

[0021]

[0032] In some embodiments, the server system 112 functions as a Media-Aware Network Element (MANE). For example, the server system 112 may be configured to prune an encoded video bitstream 108 to fit potentially different bitstreams to one or more electronic devices 120. In some embodiments, the MANE is provided separately from the server system 112.

[0022]

[0033] Electronic device 120-1 includes a decoder component 122 and a display 124. In some embodiments, the decoder component 122 is configured to decode the encoded video data 116 to produce an output video stream that can be rendered on a display or other type of rendering device. In some embodiments, one or more electronic devices 120 do not include a display component (e.g., they are communicably coupled to an external display device and / or include media storage). In some embodiments, electronic device 120 is a streaming client. In some embodiments, electronic device 120 is configured to access a server system 112 to retrieve the encoded video data 116.

[0023]

[0034] The source device and / or multiple electronic devices 120 are sometimes referred to as “terminal devices” or “user devices.” In some embodiments, the source device 102 and / or one or more electronic devices 120 are instances of a server system, a personal computer, a portable device (e.g., a smartphone, tablet, or laptop), a wearable device, a video conferencing device, and / or other types of electronic devices.

[0024]

[0035] In an example of the operation of the communication system 100, the source device 102 transmits the encoded video bitstream 108 to the server system 112. For example, the source device 102 can encode a stream of pictures captured by the source device. The server system 112 receives the encoded video bitstream 108 and can decode and / or encode the encoded video bitstream 108 using the coder component 114. For example, the server system 112 can apply encoding to the video data that is more optimal for network transmission and / or storage. The server system 112 can transmit the encoded video data 116 (e.g., one or more encoded video bitstreams) to one or more electronic devices 120. Each electronic device 120 can decode the encoded video data 116 to restore the video picture and optionally display it.

[0025]

[0036] In some embodiments, the transmission described above is unidirectional data transmission. Unidirectional data transmission is sometimes used in media serving applications, etc. In some embodiments, the transmission described above is bidirectional data transmission. Bidirectional data transmission is sometimes used in video conferencing applications, etc. In some embodiments, the encoded video bitstream 108 and / or encoded video data 116 are encoded and / or decoded according to any video coding / compression standard described herein, such as HEVC, VVC, and / or AV1.

[0026]

[0037] Figure 2A is a block diagram showing exemplary elements of an encoder component 106 according to some embodiments. The encoder component 106 receives a source video sequence from a video source 104. In some embodiments, the encoder component includes a receiver (e.g., a transceiver) component configured to receive the source video sequence. In some embodiments, the encoder component 106 receives a video sequence from a remote video source (e.g., a video source that is a component of a device different from the encoder component 106). The video source 104 can provide the source video sequence in the form of a digital video sample stream that can have any suitable bit depth (e.g., 8-bit, 10-bit, or 12-bit), any color space (e.g., BT.601 YCrCb, or RGB), and any suitable sampling structure (e.g., YCrCb 4:2:0 or YCrCb 4:4:4). In some embodiments, the video source 104 is a storage device that stores previously captured / prepared video. In some embodiments, the video source 104 is a camera that captures local image information as a video sequence. The video data may be provided as a series of separate pictures that convey motion when viewed sequentially. The pictures themselves may be organized as a spatial array of pixels, and each pixel may contain one or more samples, depending on the sampling structure, color space, etc., used. Those skilled in the art will readily understand the relationship between pixels and samples. The following description focuses on samples.

[0027]

[0038] The encoder component 106 is configured to encode and / or compress pictures from a source video sequence into an encoded video sequence 216 in real time or under other time constraints required by the application. Imposing an appropriate coding rate is one of the functions of the controller 204. In some embodiments, the controller 204 controls and is functionally coupled to other functional units, as described below. Parameters set by the controller 204 may include rate control-related parameters (e.g., lambda values ​​for picture skip, quantizer, and / or rate distortion optimization techniques), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. Those skilled in the art will readily be able to identify other functions of the controller 204, as they may accompany the encoder component 106 optimized for a particular system design.

[0028]

[0039] In some embodiments, the encoder component 106 is configured to operate in a coding loop. In a simplified example, the coding loop includes a source coder 202 (which is responsible for generating symbols, such as a symbol stream, based on the input picture to be encoded and a reference picture) and a (local) decoder 210. The decoder 210 reconstructs the symbols to create sample data in a similar manner to a (remote) decoder (if the compression between the symbols and the coded video bitstream is lossless). The reconstructed sample stream (sample data) is input to the reference picture memory 208. Since decoding the symbol stream yields a bit-exact result independent of the decoder's location (local or remote), the contents of the reference picture memory 208 are also bit-exact between the local encoder and the remote encoder. In this way, the prediction portion of the encoder interprets the same sample values ​​as the decoder would interpret when using predictions during decoding, as reference picture samples. This principle of reference picture synchronization (and, for example, the resulting drift when synchronization cannot be maintained due to channel errors) is known to those skilled in the art.

[0029]

[0040] The operation of decoder 210 may be the same as that of a remote decoder such as decoder component 122, which is described in detail below in relation to Figure 2B. However, a brief reference to Figure 2B suggests that since symbols are available and the encoding / decoding of symbols to the coded video sequence by the entropy coder 214 and parser 254 is lossless, the entropy decoding portion of decoder component 122, including buffer memory 252 and parser 254, may not be fully implemented within local decoder 210.

[0030]

[0041] The insight possible at this point is that any decoder technique present in the decoder, excluding analysis / entropy decoding, must exist in substantially the same functional form in the corresponding encoder. For this reason, the disclosed subject matter focuses on the operation of the decoder. The description of encoder techniques can be omitted as it is the inverse of the comprehensively described decoder techniques. More detailed explanations are required only in specific areas and are provided below.

[0031]

[0042] As part of its operation, the source coder 202 can perform motion-compensated predictive coding (predictive coding of the input frame by referencing one or more previously coded frames from the video sequence designated as reference frames). In this method, the coding engine 212 codes the difference between the pixel blocks of the input frame and the pixel blocks of the reference frame that can be selected as predictive references for the input frame. The controller 204 can manage the coding operation of the source coder 202, which includes, for example, setting parameters and subgroup parameters used to encode the video data.

[0032]

[0043] The decoder 210 decodes the coded video data of frames that can be designated as reference frames, based on symbols generated by the source coder 202. The operation of the coding engine 212 may, advantageously, be a non-lossless process. Once the coded video data is decoded by a video decoder (not shown in Figure 2A), the reconstructed video sequence may be a replica of the source video sequence with some errors. The decoder 210 replicates the decoding process, which can be performed by a remote video decoder with respect to the reference frame and can cause the reconstructed reference frame to be stored in the reference picture memory 208. In this way, the encoder component 106 locally stores a copy of the reconstructed reference frame having common content as the reconstructed reference frame to be retrieved by the remote video decoder (assuming no transmission errors).

[0033]

[0044] The predictor 206 is capable of performing predictive searches on the coding engine 212. That is, for a new frame to be coded, the predictor 206 can search the reference picture memory 208 for sample data (as candidate reference pixel blocks) or specific metadata (e.g., reference picture motion vectors, block shapes, etc.) that can function as appropriate predictive references for the new picture. The predictor 206 can find appropriate predictive references by operating on a sample block-by-pixel block basis. In some cases, the input picture may have predictive references drawn from multiple reference pictures stored in the reference picture memory 208, as determined by the search results obtained by the predictor 206.

[0034]

[0045] The outputs of all the aforementioned functional units can be subjected to entropy coding in the entropy coder 214. The entropy coder 214 converts the symbols generated by the various functional units into coded video sequences by lossless compression of the symbols according to techniques known to those skilled in the art (e.g., Huffman coding, variable-length coding, and / or arithmetic coding).

[0035]

[0046] In some embodiments, the output of the entropy coder 214 is coupled to a transmitter. The transmitter may be configured to buffer the coded video sequences created by the entropy coder 214 and prepare them for transmission over a communication channel 218 (which may be a hardware / software link to a storage device that stores the coded video data). The transmitter may be configured to merge the coded video data from the source coder 202 with other data to be transmitted, such as coded audio data and / or auxiliary data streams (source not shown). In some embodiments, the transmitter may transmit additional data along with the coded video. The source coder 202 may include such data as part of the coded video sequence. The additional data may include a time / space / SNR enhancement layer, other forms of redundant data (e.g., redundant pictures and slices), supplemental enhancement information (SEI) messages, visual usability information (VUI) parameter set fragments, and the like.

[0036]

[0047] The controller 204 can manage the operation of the encoder component 106. During the coding period, the controller 204 can assign a specific encoded picture type to each coded picture, and the encoded picture type may affect the coding technique applied to each picture. For example, a picture may be designated as an intra-picture (I-picture), a predictive picture (P-picture), or a bidirectional predictive picture (B-picture). An intra-picture can be coded and decoded without using any other frames in the sequence as a source for prediction. Some video codecs allow different types of intra-pictures, including, for example, Independent Decoder Refresh (IDR) pictures. Those skilled in the art will be aware of these variations of I-pictures, as well as their respective uses and characteristics, and therefore they will not be repeated here. A predictive picture can be coded and decoded using intra-prediction or inter-prediction, and it is possible to predict the sample value of each block using at most one motion vector and a reference index. Bidirectional prediction pictures are encoded and decoded using intra-prediction or inter-prediction, and can predict the sample values ​​of each block using at most two motion vectors and a reference index. Similarly, multiple prediction pictures can use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0037]

[0048] A source picture may generally be spatially subdivided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each), and each block may be coded. Blocks may be predictively coded by referencing other (already coded) blocks, as determined by the coding specification applied to each picture in the block. For example, a block of picture I may be coded unpredictably, or it may be predictedly coded by referencing an already coded block of the same picture (spatial prediction or intra-prediction). A picture block of picture P may be coded unpredictably by spatial prediction or temporal prediction by referencing one previously coded reference picture. A block of picture B may be coded unpredictably by spatial prediction or temporal prediction by referencing one or two previously coded reference pictures.

[0038]

[0049] Video can be captured as multiple source pictures (video pictures) in a time series. Intra-picture prediction (often abbreviated as intra-prediction) utilizes spatial correlations within a given picture, while inter-picture prediction utilizes (temporal or other) correlations between pictures. In one example, a particular picture being encoded / decoded (called the current picture or current picture) is divided into blocks. If a block in the current picture is similar to a reference block in a reference picture that has been previously coded and is still buffering in the video, the block in the current picture can be coded by a vector called a motion vector. The motion vector points to a reference block in the reference picture and, if multiple reference pictures are used, can have a third dimension to identify the reference pictures.

[0039]

[0050] The encoder component 106 is capable of performing coding operations in accordance with a given video coding technique or standard, as described in any part of this invention. In this operation, the encoder component 106 may perform various compression processes, including predictive coding processes that utilize temporal and spatial redundancy in the input video sequence. Thus, the coded video data can conform to the syntax specified by the video coding technique or standard being used.

[0040]

[0051] Figure 2B is a block diagram showing exemplary elements of a decoder component 122 according to one embodiment. The decoder component 122 in Figure 2B is coupled to channel 218 and display 124. In one embodiment, the decoder component 122 includes a transmitter coupled to a loop filter unit 256, which is configured to transmit data to the display 124 (for example, via a wired or wireless connection).

[0041]

[0052] In some embodiments, the decoder component 122 includes a receiver coupled to channel 218, configured to receive data from channel 218 (e.g., via a wired or wireless connection). The receiver may be configured to receive one or more coded video sequences to be decoded by the decoder component 122. In some embodiments, the decoding of each coded video sequence is independent of other coded video sequences. Each coded video sequence may be received from channel 218 (which may be a hardware / software link to a storage device storing coded video data). The receiver can receive coded video data together with other data, such as coded audio data and / or auxiliary data streams, which can be transmitted using entities (not shown). The receiver can isolate coded video sequences from other data. In some embodiments, the receiver receives additional (redundant) data along with the coded video. The additional data may be included as part of the coded video sequence. Additional data may be used by the decoder component 122 to decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, time, space, or SNR enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0042]

[0053] According to some embodiments, the decoder component 122 includes a buffer memory 252, a parser 254 (sometimes called an entropy decoder), a scaler / inverse unit 258, an intra-picture prediction unit 262, a motion compensation prediction unit 260, an aggregator 268, a loop filter unit 256, a reference picture memory 266, and a current picture memory 264. In some embodiments, the decoder component 122 is implemented as an integrated circuit, a series of integrated circuits, and / or other electronic circuits. In some embodiments, the decoder component 122 is implemented at least partially in software.

[0043]

[0054] Buffer memory 252 is coupled between channel 218 and parser 254 (for example, to address network jitter). In some embodiments, buffer memory 252 is isolated from decoder component 122. In some embodiments, a separate buffer memory is provided between the output of channel 218 and decoder component 122. In some embodiments, in addition to the buffer memory 252 inside decoder component 122 (for example, configured to handle replay timing), a separate buffer memory is provided outside decoder component 122 (for example, to address network jitter). When receiving data from a storage / transfer device with sufficient bandwidth and controllability, or from an isosynchronous network, buffer memory 252 may not be necessary or can be reduced in size. For use in best-effort packet networks such as the Internet, the buffer memory 252 is required and may be relatively large in size, and is advantageously adaptable in size, and may also be implemented, at least partially, in an external operating system or similar element (not shown) outside of the decoder component 122.

[0044]

[0055] The parser 254 is configured to reconstruct symbols 270 from the coded video sequence. The symbols may include, for example, information used to manage the operation of the decoder component 122, and / or information for controlling a rendering device such as the display 124. The rendering device control information may take the form of, for example, Supplemental Extension Information (SEI) messages or Video Availability Information (VUI) parameter set fragments (not shown). The parser 254 parses (entropy decodes) the coded video sequence. The coding of the coded video sequence can follow video coding techniques or standards, and can follow principles well known to those skilled in the art, including variable-length coding, Huffman coding, and arithmetic coding with or without context sensitivity. The parser 254 can extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder, based on at least one parameter corresponding to a group. Subgroups can include groups of pictures (GOP), pictures, tiles, slices, macroblocks, coding units (CU), blocks, transformation units (TU), and prediction units (PU). Parser 254 can also extract information such as transformation coefficients, quantization parameter values, and motion vectors from the coded video sequence.

[0045]

[0056] The reconstruction of symbol 270 may include multiple different units depending on the type of coded video picture or part thereof (inter and intra pictures, inter and intra blocks, etc.) and other factors. Which units are included and how they are involved can be controlled by parser 254 using subgroup control information analyzed from the coded video sequence. The flow of such subgroup control information between parser 254 and subsequent units is not depicted for clarity.

[0046]

[0057] Beyond the functional blocks already described, the decoder component 122 can be conceptually subdivided into numerous functional units, as described below. In actual implementations operating under commercial constraints, many of these units may interact closely with each other and be integrated with each other, at least partially. However, for the purpose of illustrating the subject matter disclosed, the conceptual subdivision into the following functional units is maintained.

[0047]

[0058] The scaler / inverse unit 258 receives control information (such as the transformation to be used, block size, quantization factor, and / or quantization scaling matrix) along with the quantization transformation coefficients from the parser 254 as symbol 270. The scaler / inverse unit 258 can output a block containing sample values ​​that can be input to the aggregator 268.

[0048]

[0059] In some cases, the output samples of the scaler / inverse unit 258 relate to intra-coded blocks; that is, blocks that do not use predictive information from a previously reconstructed picture, but can use predictive information from a previously reconstructed portion of the current picture. Such predictive information can be provided by the intra-picture predictive unit 262. The intra-picture predictive unit 262 can generate blocks of the same size and shape as the block being reconstructed, using surrounding reconstructed information taken from the current (partially reconstructed) picture from the current picture memory 264. The aggregator 268 can add the predictive information generated by the intra-picture predictive unit 262 to the output sample information provided by the scaler / inverse unit 258, sample by sample.

[0049]

[0060] In other cases, the output samples of the scaler / inverse unit 258 are associated with intercoded and potentially motion-compensated blocks. In such cases, the motion-compensated prediction unit 260 can access the reference picture memory 266 to capture samples to be used for prediction. After motion-compensating the captured samples according to the symbols 270 associated with the blocks, these samples can be added by the aggregator 268 to the output of the scaler / inverse unit 258 (in this case, called residual samples or residual signals) to generate output sample information. The address in the reference picture memory 266 from which the motion-compensated prediction unit 260 retrieves the prediction samples may be controlled by a motion vector. The motion vector may be available to the motion-compensated prediction unit 260 in the form of a symbol 270, which may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolation of sample values, motion vector prediction mechanisms, etc., such as being fetched from the reference picture memory 266 when the exact motion vectors of subsamples are used.

[0050]

[0061] The output samples of the aggregator 268 can be subjected to various loop filtering techniques within the loop filter unit 256. The video compression technique may include in-loop filtering techniques, which are controlled by parameters contained in the coded video bitstream and made available to the loop filter unit 256 as symbols 270 from the parser 254, but may also respond to metadata obtained during decoding of earlier parts (in the order of decoding) of the coded picture or coded video sequence, and may also respond to previously reconstructed and loop-filtered sample values.

[0051]

[0062] The output of the loop filter unit 256 can be output to a rendering device such as the display 124, or it can be made into a sample stream that can be stored in the reference picture memory 266 for use in future inter-picture prediction.

[0052]

[0063] Certain coded pictures, once fully reconstructed, can be used as reference pictures for future predictions. Once a coded picture is fully reconstructed and identified as a reference picture (for example, by parser 254), the current reference picture can become part of reference picture memory 266, and a fresh current picture memory can be re-designated before starting the reconstruction of subsequent coded pictures.

[0053]

[0064] The decoder component 122 may perform decoding operations according to a predetermined video compression technique, which may be documented in a standard such as one described herein. The coded video sequence may conform to the syntax defined by the video compression technique or standard being used, in the sense that it conforms to the syntax of the video compression technique or standard, as defined in the video compression technique documentation or standard, particularly the profile documentation within it. Also, in order to conform to certain video compression techniques or standards, the complexity of the coded video sequence may be within a range defined by the level of the video compression technique or standard. In some cases, the level may limit the maximum picture size, maximum frame rate, maximum reconstruction sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. The limitations set by the level may, in some cases, be further limited by the HRD (Hypothetical Reference Decoder) specification and metadata for HRD buffer management signaled in the coded video sequence.

[0054]

[0065] Figure 3 is a block diagram showing a server system 112 according to some embodiments. The server system 112 includes a control circuit 302, one or more network interfaces 304, memory 314, a user interface 306, and one or more communication buses 312 for interconnecting these components. In some embodiments, the control circuit 302 includes one or more processors (e.g., CPU, GPU, and / or DPU). In some embodiments, the control circuit includes one or more field-programmable gate arrays (FPGAs), hardware accelerators, and / or one or more integrated circuits (e.g., application-specific integrated circuits).

[0055]

[0066] The network interface 304 may be configured to interface with one or more communication networks (e.g., wireless, wired, and / or optical networks). These communication networks may be local, wide-area, metropolitan, vehicle and industrial, real-time, latency-tolerant, etc. Examples of communication networks include Ethernet, wireless LAN, cellular networks (including GSM, 3G, 4G, 5G, LTE, etc.), wired or wireless wide-area digital TV networks (including cable TV, satellite TV, and terrestrial broadcast TV), and vehicle and industrial networks including CANBus. Such communications can be one-way, receive-only (e.g., broadcast TV), one-way transmit-only (e.g., CANbus to a specific CANbus device), or two-way (e.g., to other computer systems using local or wide-area digital networks). Such communications may include communications to one or more cloud computing networks.

[0056]

[0067] The user interface 306 includes one or more output devices 308 and / or one or more input devices 310. The input devices 310 may include one or more of the following: a keyboard, mouse, trackpad, touchscreen, data glove, joystick, microphone, scanner, camera, etc. The output devices 308 may include one or more of the following: an audio output device (e.g., a speaker), a visual output device (e.g., a display or monitor), etc.

[0057]

[0068] Memory 314 may include high-speed random-access memory (such as DRAM, SRAM, DDR RAM, and / or other random-access solid-state memory devices) and / or non-volatile memory (such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, and / or other non-volatile solid-state storage devices). Memory 314 optionally includes one or more storage devices located far from the control circuit 302. Memory 314, or alternatively the non-volatile solid-state memory devices within Memory 314, includes a non-temporary computer-readable storage medium. In some embodiments, Memory 314, or the non-temporary computer-readable storage medium of Memory 314, stores the following programs, modules, instructions, and data structures, or subsets or supersets thereof: • An operating system that includes procedures for handling various basic system services and for performing hardware-dependent tasks.316 A network communication module 318 used to connect the server system 112 to other computing devices via one or more network interfaces 304 (for example, via wired and / or wireless connections); A coding module 320 for performing various functions related to encoding and / or decoding data such as video data; in some embodiments, the coding module 320 is an instance of the coder component 114. The coding module 320 includes, but is not limited to, one or more of the following: Regarding the decoder component 122, a decoding module 322 for performing various functions related to decoding encoded data, as described above; and Regarding the encoder component 106, the encoding module 340 performs various functions related to the encoded data, as described above; For example, picture memory 352 for storing pictures and picture data for use with coding module 320; in some embodiments, picture memory 352 includes one or more of reference picture memory 208, buffer memory 252, current picture memory 264, and reference picture memory 266.

[0058]

[0069] In some embodiments, the decoding module 322 includes an analysis module 324 (for example, configured to perform the various functions described above with respect to the parser 254), a transformation module 326 (for example, configured to perform the various functions described above with respect to the scalar / inverse transformation unit 258), a prediction module 328 (for example, configured to perform the various functions described above with respect to the motion compensation prediction unit 260 and / or the intra-picture prediction unit 262), and a filter module 330 (for example, configured to perform the various functions described above with respect to the loop filter unit 256).

[0059]

[0070] In some embodiments, the coding module 340 includes a code module 342 (for example, configured to perform the various functions described above with respect to the source coder 202, coding engine 212, and / or entropy coder 214) and a prediction module 344 (for example, configured to perform the various functions described above with respect to the predictor 206). In some embodiments, the decoding module 322 and / or the coding module 340 include a subset of the modules shown in Figure 3. For example, a shared prediction module is used by both the decoding module 322 and the coding module 340.

[0060]

[0071] Each of the specific modules described above stored in memory 314 corresponds to a set of instructions for performing the functions described herein. The modules identified above (e.g., sets of instructions) do not necessarily have to be implemented as separate software programs, procedures, or modules; therefore, various subsets of these modules can be combined or otherwise rearranged in various embodiments. For example, the coding module 320 may optionally not include separate decoding and coding modules, but rather use the same set of modules to perform both sets of functions. In some embodiments, memory 314 stores a subset of the modules and data structures identified above. In some embodiments, memory 314 stores additional modules and data structures not described above, such as an audio processing module.

[0061]

[0072] In some embodiments, the server system 112 includes a web or hypertext transfer protocol (HTTP) server, a file transfer protocol (FTP) server, and web pages and applications implemented using CGI (Common Gateway Interface) scripts, PHP (PHP Hyper-text Preprocessor), ASP (Active Server Pages), HTML (Hyper Text Markup Language), XML (Extensible Markup Language), Java, JavaScript, AJAX (Asynchronous JavaScript and XML), XHP, Javelin, WURFL (Wireless Universal Resource File), etc.

[0062]

[0073] Figure 3 shows a server system 112 according to some embodiments, but it is primarily intended as a functional description of various features that may be present in one or more server systems, rather than a structural overview of the embodiments described herein. In practice, as will be apparent to those skilled in the art, the items shown separately can be combined, and some can be separated. For example, some of the items shown separately in Figure 3 can be implemented on a single server, and a single item can be implemented by one or more servers. The actual number of servers used to implement server system 112, and how functions are allocated among them, will vary from implementation to implementation and, optionally, partially depend on the amount of data traffic the server system handles during peak and average usage periods.

[0063]

[0074] Exemplary coding approach Figures 4A-4D show exemplary coding tree structures according to some embodiments. As shown in the first coding tree structure (400) in Figure 4A, some coding approaches (e.g., VP9) use four different partition trees, starting from a 64x64 level and going down to a 4x4 level, with some additional constraints for the 8x8 block. In Figure 4A, the partition designated as R can be described as recursive in that the same partition tree is iterated at lower scales until the lowest 4x4 level is reached.

[0064]

[0075] As shown in the second coding tree structure (402) in Figure 4B, some coding approaches (e.g., AV1) extend the partition tree to 10 different structures, increasing the maximum size (e.g., referred to as a superblock in VP9 / AV1 terminology) to start at 128x128. The second coding tree structure includes 4:1 / 1:4 rectangular partitions, which are not present in the first coding tree structure. The partition type with three subpartitions in the second row of Figure 4B is referred to as a T-type partition. Rectangular partitions in this tree structure cannot be further subdivided. In addition to the coding block size, the coding tree depth can be defined to indicate the subdivision depth from the root node. For example, the coding tree depth of the root node (e.g., 128x128) is set to 0, and the coding tree depth increases by 1 after the tree block is subdivided one more time.

[0065]

[0076] For example, instead of enforcing a fixed translation unit size as in VP9, ​​AV1 allows chroma coding blocks to be partitioned into multiple translation units of various sizes, represented by recursive partitions that descend up to two levels. To accommodate AV1's extended coding block partitioning, square, 2:1 / 1:2, and 4:1 / 1:4 translation sizes are supported, ranging from 4x4 to 64x64. For chroma blocks, only the largest possible translation unit is permitted.

[0066]

[0077] As an example, in HEVC, a CTU can be partitioned into CUs (multiple) by utilizing a quadtree structure, represented as a coding tree, to adapt to various local features. In some embodiments, the decision of whether to code a picture area using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level. Each CU can be further partitioned into one, two, or four PUs according to the PU partitioning type. Within a single PU, the same prediction process is applied, and the relevant information is transmitted to the decoder on a PU basis. After obtaining residual blocks by applying the prediction process based on the PU partitioning type, the CU can be partitioned into TUs according to another quadtree structure, such as the coding tree of the CU. One of the key features of the HEVC structure is the presence of multiple partition concepts, including CUs, PUs, and TUs. In HEVC, a CU or TU can only be square in shape, while a PU can be square or rectangular for inter-prediction blocks. In HEVC, a single coding block can be further partitioned into four square sub-blocks, and transformations can be performed at each sub-block (TU). Each TU can be recursively further subdivided into smaller TUs (using quadruple splitting), which are called Residual Quad-Tree (RQT). In picture boundaries, such as in HEVC, implicit quadruple splitting may be used, resulting in blocks maintaining the quadruple splitting until their size fits the picture boundary.

[0067]

[0078] A quadtree using nested multi-type trees with binary and ternary partitioning segmentation structures, such as in VVC, can potentially replace the concept of multiple partition unit types, eliminating the distinction between CU, PU, ​​and TU concepts except where necessary for CUs that are too large for the maximum translation length, and supporting greater flexibility in CU partition shapes. In a coding tree structure, a CU can have either a square or rectangular shape. An ACTU is first partitioned by a quadtree (also referred to as a quad-tree) structure. The quadtree leaf nodes can be further partitioned by a multi-type tree structure. As shown in the third coding tree structure (404) in Figure 4C, the multi-type tree structure includes four partition types. For example, the multi-type tree structure is: Vertical binary tree (SPLIT_BT_VER), Horizontal binary tree (SPLIT_BT_HOR), Vertical ternary tree (SPLIT_TT_VER), and Includes horizontal ternary trees (SPLIT_TT_HOR). A multi-type tree leaf node is called a CU, and as long as the CU is not too large relative to the maximum transformation length, this segmentation is used for prediction and transformation processing without any further partitioning. This means that in most cases, the CU, PU, ​​and TU have the same block size in a quadtree with a nested multi-type tree coding block structure. The exception occurs when the supported maximum transformation length is smaller than the width or height of the color component of the CU. An example of block partitioning for one CTU(406) is shown in Figure 4D, which illustrates an example of a quadtree with a nested multi-type tree coding block structure.

[0068]

[0079] As with VVC, the maximum supported luma conversion size may be 64x64, and the maximum supported chroma conversion size may be 32x32. If the width or height of the CB is greater than the maximum conversion width or height, the CB will be automatically split horizontally and / or vertically to fit the conversion size limits in those directions.

[0069]

[0080] The coding tree scheme, as in VTM7, supports the ability for lumens and chromians to have separate block tree structures. In some cases, with respect to P and B slices, lumens and chromians within a single CTU share the same coding tree structure. However, for I slices, lumens and chromians can have separate block tree structures. When separate block tree modes are applied, a lumens CTB is partitioned into CUs by one coding tree structure, and a chromians CTB is partitioned into chromians CUs by another coding tree structure. This means that a CU in an I slice may contain or consist of coding blocks for the lumens component or coding blocks for two chromians, and that, unless the video is monochrome, a CU in a P or B slice may always contain or consist of coding blocks for all three color components.

[0070]

[0081] To support extended coding block partitions, multiple transformation sizes (e.g., ranging from 4 to 64 points for each dimension) and transformation shapes (e.g., squares or rectangles with width / height ratios of 2:1 / 1:2 and 4:1 / 1:4) may be used, as in AV1.

[0071]

[0082] Motion estimation involves determining a motion vector that describes the transformation from one image (picture) to another. The reference image (or block) can be from adjacent frames in a video sequence. The motion vector can be related to the entire image (global motion estimation) or to a specific block. Furthermore, the motion vector may correspond to a translation or warping model that approximates the motion (e.g., rotation and translation in three dimensions, as well as zoom). The estimated motion can be improved in some situations (e.g., for more complex video objects) by further partitioning the blocks.

[0072]

[0083] The geometric partitioning mode (GPM) can be used to focus on inter-picture prediction CUs. When GPM is applied to a CU, the CU is divided into two parts by a linear partition boundary. The position of the partition boundary can be mathematically defined by an angular parameter φ and an offset parameter ρ. These parameters can be quantized and incorporated into a GPM partitioning index lookup table. The GPM partitioning index of the current CU can be coded into a bitstream. For example, for a CU with size w×h = 2k×2l (2 l) (in terms of luma samples), 64 partitioning modes are supported by GPM in VVCs, where k,l ∈ {3...6}. GPM may be disabled for CUs with aspect ratios greater than 4:1 or less than 1:4, because, for example, narrow CUs rarely contain geometrically separated patterns.

[0073]

[0084] After partitioning, the two GPM sections (partitions) contain individual motion information, which can be used to predict the corresponding section within the current CU. In some embodiments, only unidirectional motion-compensated prediction (MCP) is permitted for each section of the GPM, and as a result, the memory bandwidth required for MCP in the GPM is equal to that for normal bidirectional MCP. To simplify the coding of motion information and reduce the number of possible combinations for the GPM, it is possible to code the motion information in merge mode. The GPM merge candidate list can be derived from a conventional merge candidate list to ensure that it contains only unidirectional motion information.

[0074]

[0085] Figure 5A shows the GPM prediction process according to one embodiment. The current block 510 is partitioned into a right section and a left section by partition 516. The right-hand prediction portion of the current block 510 (e.g., CU) of the current picture 502 (e.g., having a size of w × h) is predicted by MV0 from reference block 512 of reference picture 504, while the left-hand portion is predicted by MV1 from reference block 514 of reference picture 506.

[0075]

[0086] Figure 5B shows an exemplary blend matrix for a partition (e.g., partition 516) according to one embodiment. In this example, the final GPM prediction (PG) is generated by performing a blend process using integer blend matrices W0 and W1 containing weights ranging from, for example, 0 to 8. It can be expressed as follows: Formula 1 - Blend Prediction

[0076]

number

[0077]

[0087] The generated GPM prediction (PG) can be subtracted from the original signal to produce a residual. The residual is then transformed, quantized, and coded into a bitstream, for example, using a standard VVC transform, quantization, and entropy coding engine. On the decoder side, the signal is reconstructed by adding the residual to the GPM prediction PG. A skip mode may also be supported by the GPM, for example, when the residual is negligible. For instance, the residual is dropped by the encoder, and the GPM prediction PG is used directly by the decoder as the reconstructed signal.

[0078]

[0088] GPM can be further enhanced, for example, by GPM+TM, GPM+MMVD, and Inter+Intra GPM. As shown in Figure 5C, the blend strength or blend area width θ may be fixed for all different content. In some embodiments, the weighting values ​​in the blend mask are given by a ramp function.

[0079] Formula 2 - Blend Slope Function

[0080]

number

[0081]

number

[0089] Such a design may not always be optimal because a fixed blend area width cannot always provide the best blend quality for various types of video content. For example, video content typically contains strong textures and sharp edges, requiring a narrow blend area to preserve edge information. In the case of camera-captured content, blending is usually required; however, the blend area width can depend on numerous factors, such as the actual boundaries of moving objects and the distinction between the behavior of two partitions.

[0082]

[0090] To address this issue, an adaptive blending scheme can be used for GPMs, which dynamically adjusts the width of the blend area surrounding the GPM partition boundary. For example, the blend area width (θ) can be selected from a predefined set of values ​​{0, 1, 2, 4, 8}. The optimal blend area width can be determined in the encoder for each GPM CU and signaled to the decoder based on the syntax element merge_gpm_blending_width_idx. For example, all predefined blend intensity values ​​can be shiftable, while all clipping and shift operations in the GPM blending process can be maintained without any modification.

[0083]

[0091] Furthermore, it is possible to increase the weight range from [0,8] to [0,32] to accommodate the increased width of the GPM blend area. Specifically, the weights can be calculated as follows: Equation 4- is the quantized gradient function with increased

[0084]

number

[0092] Wedge-based prediction is a compound prediction mode similar to GPM (e.g., the one in AV1). Wedge-based prediction can be used in both inter-internal and inter-intra combinations. The boundaries of moving objects are often difficult to approximate with on-grid block partitions. The solution is to pre-define a codebook of 16 possible wedge partitions and signal the wedge index in the bitstream when the coding unit chooses to further partition in such a way. The 16-ary shape codebook, which includes partition directions that are horizontal, vertical, or diagonal (e.g., with a gradient of ±2 or ±0.5), is designed for both square blocks 540 and rectangular blocks 542, as shown in Figure 5D. In many cases, to mitigate spurious high-frequency components resulting from directly juxtaposing two predictors, it is possible to smooth the edges around the intended partition using soft-cliff-shaped 2-D wedge masks (for example, m(i,j) is close to 0.5 around the edge and gradually changes to a binary weight at both ends).

[0085]

[0093] Current wedge designs in AV1 and AVM support 16 modes because multi-symbol adaptive context coding used in AV1 and AVM allows up to 16 symbols to be signaled in a single syntax element. Expanding the number of modes in a wedge can further improve coding performance.

[0086]

[0094] Figure 6A is a flowchart of a video coding method 600 according to one embodiment. The method 600 may be executed in an arithmetic system (e.g., server system 112, source device 102, or electronic device 120) having a control circuit and a memory for storing instructions for execution by the control circuit. In one embodiment, the method 600 is executed by executing instructions stored in the memory of the arithmetic system (e.g., memory 314).

[0087]

[0095] The system acquires video data containing multiple blocks, including a first block (602). The system identifies the first partition mode from multiple partition modes for the first block (604). The system partitions the first block into a first section and a second section according to the first partition mode (606). The system encodes the first section according to a first predictor and the second section according to a second predictor (608). The system signals the first partition mode (610).

[0088]

[0096] In some embodiments, multiple partition modes include a large number of wedge modes. In some embodiments, the number of wedge modes is not limited to 16. In some embodiments, the number of wedge modes is 68.

[0089]

[0097] In some embodiments, the wedge mode index is signaled using binary codewords. For example, the wedge index is binarized using truncated binary code, where, for instance, lower-frequency modes receive more bin assignments and higher-frequency modes receive fewer bin assignments. In this example, each bin can have only zero or one value and is coded by current adaptive context-based coding or simple context-bypass coding. The frequency of the wedge mode can be derived based on decoder (or coded) side information or predefined.

[0090]

[0098] In some embodiments, the wedge index is binarized using the Exp-Golomb code. This binarization may be more efficient if the frequencies between different modes are more evenly distributed.

[0091]

[0099] In some embodiments, the wedge index is signaled by two syntax elements, angle and distance (offset), which are determined based on the physical meaning of the wedge mode and can be predefined or calculated in a lookup table from the wedge index (or from the wedge index for angle / distance). For example, the angle syntax element and the distance syntax element are signaled separately using multi-symbol adaptive context coding. The context can be the block size or the number of similar angles / distances in nearby blocks. As an example, at most 16 angles and at most 4 distances are supported, and if an angle is greater than 180 degrees, that angle is considered equal to 0 or 90 degrees, and three distances are used to avoid overlap.

[0092]

[0100] The following code example 1 shows exemplary angles and distances for a wedge index lookup table (for example, one used by decoder components during analysis).

[0093] Code Example 1 - Wedge Index Lookup

[0094]

number

[0101] In some embodiments, the wedge direction (0 or 1) is signaled first, followed by an angle value (0-9), and then a number of distance values ​​are signaled depending on whether the wedge direction is 0 or 1. For example, if the angle direction is equal to 0, one of four distance values ​​is signaled, and if the angle direction is equal to 1, one of three distance values ​​is signaled.

[0095]

[0102] In some embodiments, the wedge index is signaled by three syntax elements: angular direction, angle, and distance. For example, the angular direction syntax element indicates which group the current angle belongs to. Lookup tables and functions can be used to derive the angle / distance from the index, or vice versa. For example, the angular direction value indicates whether the current angle is less than, greater than, or equal to 180 degrees. As another example, it is possible to context-code the wedge sign syntax element, which indicates which part of the wedge division originates from P0. For example, the context of the wedge sign depends on the signaled angle of the wedge mode.

[0096]

[0103] In some embodiments, a wedge index is signaled by two syntax elements: a wedge group index and a wedge index within the group. For example, these two syntax elements are signaled by multi-symbol adaptive context coding.

[0097]

[0104] In some embodiments, supported wedge modes are divided into several groups according to a predefined rule. The predefined rule may be the same for all video sequences, or it may be signaled at the sequence level, frame level, tile level, slice level, or superblock level.

[0098]

[0105] In some embodiments, the supported wedge modes are divided into multiple groups based on encoded / decoded side information, which includes, but is not limited to, the current sequence, frame, slice, tile, superblock row, and / or the reconfigured sample values ​​or wedge mode index of the coded blocks in the superblock.

[0099]

[0106] For example, supported wedge modes are divided into several groups based on the wedge mode information of the block being coded, and the supported wedge modes for the current block are divided into several groups based on the statistics / distribution of the wedge modes of the block being coded in the current sequence, frame, slice, tile, superblock row, and / or superblock.

[0100]

[0107] Figure 6B is a flowchart of a video decoding method 650 according to one embodiment. The method 650 may be performed in an arithmetic system (e.g., a server system 112, a source device 102, or an electronic device 120) having a control circuit and a memory for storing instructions for execution by the control circuit. In one embodiment, the method 650 is performed by executing instructions stored in the memory of the arithmetic system (e.g., memory 314).

[0101]

[0108] The system acquires video data containing a plurality of blocks, including a first block (652). In some embodiments, acquiring video data includes receiving video data containing a plurality of blocks, including a first block. In some embodiments, the system acquires from the video data a syntax element value indicating a wedge mode index corresponding to the first partition mode from a plurality of partition modes for the first block, where the wedge mode index is greater than 16. The system identifies the first partition mode from a plurality of partition modes for the first block (654). In some embodiments, the system determines that the first partition mode is associated with a composite wedge-based prediction for the first block. The system partitions the first block into a first section and a second section according to the first partition mode (and optionally according to the wedge mode index) (656). In some embodiments, the system decodes the first section according to a first predictor and the second section according to a second predictor. The system reconfigures a first block (658), the reconfiguration including rebuilding a first section using a first predictor and reconfiguring a second section using a second predictor. In some embodiments, method 650 includes the components, systems, and / or processes described above with respect to Figure 6A.

[0102]

[0109] However, while Figures 6A and 6B show multiple logical stages in a specific order, the order-independent stages may be rearranged, and other stages may be combined or divided. Any rearrangements or other groupings not specifically mentioned will be obvious to those skilled in the art, and therefore the orders and groupings presented herein are not exhaustive. Furthermore, it should be recognized that various stages may be implemented in hardware, firmware, software, or any combination thereof.

[0103]

[0110] The following are some exemplary embodiments.

[0104]

[0111] (A1) In one embodiment, some embodiments include a video encoding method (e.g., method 600). In some embodiments, the method is performed on an arithmetic system having memory and control circuits (e.g., server system 112). In some embodiments, the method is performed on a coding module (e.g., coding module 320). In some embodiments, the method is performed on an entropy coder (e.g., entropy coder 214). The method includes: (i) acquiring video data comprising a plurality of blocks including a first block; (ii) identifying a first partition mode from a plurality of partition modes for the first block; (iii) partitioning the first block into a first section and a second section according to the first partition mode; (iv) encoding the first section according to a first predictor and encoding the second section according to a second predictor; and (v) signaling the first partition mode. In some embodiments, the number of partition modes is greater than 16. For example, the number of partition modes is 68. In some embodiments, the multiple partition modes include multiple wedge partitions.

[0105]

[0112] (A2) In some embodiments of A1, the method includes indexing a plurality of partition modes to generate a partition mode index, and signaling a first partition mode includes signaling a partition mode index.

[0106]

[0113] (A3) In some embodiments of A1 or A2, the partition mode index is signaled using a binary codeword. In some embodiments, signaling a first partition mode includes signaling a first partition mode using a binary codeword.

[0107]

[0114] (A4) In some embodiments of A1-A3, the partition mode index is binarized using the Exp-Golomb code. In some cases where the frequencies are more evenly distributed between different modes, the Exp-Golomb code is more efficient than the binary code. In some embodiments, the first partition mode is binarized using the Exp-Golomb code.

[0108]

[0115] (A5) In some embodiments of A1-A3, the partition mode index is binarized using truncated binary code. In some embodiments, the first partition mode is binarized using truncated binary code.

[0109]

[0116] (A6) In some embodiments of A5, binarizing the partition mode index involves assigning a bin to each of the partition modes, which involves assigning more bins to the lower-frequency modes of the partition modes compared to the higher-frequency modes of the partition modes. In some embodiments, the partition mode frequencies are either predefined or derived based on decoder (or coding) side information.

[0110]

[0117] (A7) In some embodiments of A6, each bin is coded by adaptive context-based coding. In some embodiments, each bin is coded by context-bypass coding.

[0111]

[0118] (A8) In some embodiments of A1-A7, the first partition mode includes a partition line, which is signaled using a first syntax element for the angle of the partition line and a second syntax element for the offset of the partition line. For example, at most 16 angles and at most 4 offsets can be supported. In this example, if the angle is 180 degrees or more, the angle is equal to 0 degrees or 90 degrees, and three distances are used to avoid overlap.

[0112]

[0119] (A9) In some embodiments of A8, the angle and offset are predefined in a lookup table. For example, the angle and offset (often also called distance) are predefined in a lookup table from the partition index. In some embodiments, the angle and offset are calculated. In some embodiments, the angle and offset are defined based on the physical meaning of the partition mode.

[0113]

[0120] (A10) In some embodiments of A8 or A9, the first syntax element and the second syntax element are signaled separately using multi-symbol adaptive context coding. For example, the context may include the block size, the number of similar angles in one or more neighboring blocks, and / or the number of a number of similar offsets in one or more neighboring blocks.

[0114]

[0121] (A11) In some embodiments of A8-A10, the method further includes signaling a partition line direction for a partition line. For example, the partition line direction is an angular direction. In some embodiments, the partition line direction is signaled before the angle is signaled. In some embodiments, the partition line direction syntax element indicates the group to which the current angle belongs. In some embodiments, similar lookup tables and functions are used to derive the angle / offset from an index and / or the index from an angle / offset. In some embodiments, the partition line direction value indicates whether the angle is less than 180 degrees or greater than (and / or equal to) 180 degrees.

[0115]

[0122] (A12) In some embodiments of A11, a first number of offset values ​​is signaled according to a partition line direction having a first direction, and a second number of offset values ​​is signaled according to a partition line direction having a second direction, where the second number of offset values ​​is different from the first number of offset values. For example, if the partition line direction is equal to 0, one of four distance values ​​is signaled, and if the partition line direction is equal to 1, one of three distance values ​​is signaled.

[0116]

[0123] (A13) In some embodiments of A1-A12, the signaling of the first partition mode includes signaling a first predictor for encoding a first section. In some embodiments, signaling the first predictor includes signaling a reference block of the first section. In some embodiments, signaling the first predictor includes using a partition sign syntax element to indicate which part of the partition (e.g., a first section or a second section) comes from P0. In some embodiments, the partition sign syntax element is context-coded, for example, with the context of the partition code, which depends on the signaled angle of the partition mode.

[0117]

[0124] (A14) In some embodiments of A1-A13, the first partition mode is signaled using a first syntax element for a partition group among a plurality of partition modes and a second syntax element for an index associated with the partition group. In some embodiments, the first and second syntax elements are signaled using multi-symbol adaptive context coding.

[0118]

[0125] (A15) In some embodiments of A14, multiple partition modes are divided into multiple partition groups according to one or more predefined rules. For example, one or more predefined rules are the same for all video sequences. As another example, one or more predefined rules are signaled at the sequence level, frame level, tile level, slice level, or superblock level. In some embodiments, groups are selected based on syntax elements. In some embodiments, groups are selected based on contextual information.

[0119]

[0126] (A16) In some embodiments of A14 or A15, multiple partition modes are divided into multiple partition groups according to previously decoded information. For example, previously decoded information may include partition mode indices and / or reconstructed sample values ​​of coded blocks in the current sequence, frame, slice, tile, superblock, and / or superblock row. As another example, supported partition modes are divided into multiple groups based on partition mode information of coded blocks, and supported partition modes for the current block are divided into multiple groups based on the partition mode statistics and / or distribution of coded blocks in the current sequence, frame, slice, tile, superblock, and / or superblock row. In some embodiments, each of the multiple groups has its own predictive indicator.

[0120]

[0127] (B1) In other embodiments, some embodiments include a video decoding method (e.g., method 650). In some embodiments, the method is performed on an arithmetic system having memory and control circuits (e.g., server system 112). In some embodiments, the method is performed on a coding module (e.g., coding module 320). In some embodiments, the method is performed on a parser (e.g., parser 254). The method includes: (i) obtaining video data from a bitstream, comprising a plurality of blocks, including a first block; (ii) identifying a first partition mode from a plurality of partition modes for the first block; (iii) partitioning the first block into a first section and a second section according to the first partition mode; and (iv) reconstructing the first block, comprising reconstructing the first section using a first predictor and reconstructing the second section using a second predictor.

[0121]

[0128] (B2) According to some embodiments, the method includes: (i) receiving video data comprising a plurality of blocks including a first block; (ii) obtaining a syntax element value from the video data indicating a wedge mode index corresponding to a first partition mode from a plurality of partition modes for the first block, wherein the wedge mode index is greater than 16; (iii) determining that the first partition mode is associated with a composite wedge-based prediction for the first block; (iv) partitioning the first block into a first section and a second section according to the first partition mode and the wedge mode index; and (v) decoding the first section according to a first predictor and decoding the second section according to a second predictor, one or more of the above steps.

[0129] (B3) In some embodiments of B1 or B2, the wedge mode index is equal to 68.

[0122]

[0130] (B4) In any of the embodiments of B1-B3, the method further includes the step of reconfiguring a first block, the reconfiguration step including reconfiguring a first section using a first predictor and reconfiguring a second section using a second predictor.

[0123]

[0131] (B5) In some embodiments of B1-B4, the wedge-mode index is signaled using a binary codeword.

[0124]

[0132] (B6) In some embodiment of B1-B5, the wedge-mode index is binarized using truncated binary code.

[0125]

[0133] (B7) In some embodiments of B1-B6, the first partition mode includes a partition line, which is signaled using a first syntax element for the angle of the partition line and a second syntax element for the offset of the partition line.

[0126]

[0134] (B8) In some embodiments of B7, the angle and offset are predefined in the lookup table.

[0127]

[0135] (B9) In some embodiments of B7 or B8, the first syntax element and the second syntax element are signaled separately using multi-symbol adaptive context coding.

[0128]

[0136] (B10) In some embodiments of B7-B9, the partition line direction is signaled with respect to the partition line.

[0129]

[0137] (B11) In some embodiments of B10, a first number of offset values ​​is signaled according to a partition line direction having a first direction, and a second number of offset values ​​is signaled according to a partition line direction having a second direction, where the second number of offset values ​​is different from the first number of offset values.

[0130]

[0138] (B12) In any of the embodiments of B1-B11, the method further includes the step of obtaining a first predictor from video data for encoding a first section.

[0131]

[0139] (B13) In some embodiments of B1-B12, the first partition mode is signaled using a first syntax element for a partition group among a plurality of partition modes and a second syntax element for an index associated with the partition group.

[0132]

[0140] (B14) In some embodiments of B13, multiple partition modes are divided into multiple partition groups according to one or more predefined rules.

[0133]

[0141] (B15) In some embodiments of B13 or B14, multiple partition modes are divided into multiple partition groups according to previously decoded information.

[0134]

[0142] (B16) In some embodiments of B1-B15, the bitstream corresponds to video encoded according to any of A1-A14.

[0135]

[0143] The methods described herein may be used individually or in combination in any order. Each method can be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In some embodiments, the processing circuit executes a program stored on a non-temporary computer-readable medium.

[0136]

[0144] In another embodiment, some embodiments include an arithmetic system (e.g., server system 112) which includes a control circuit (e.g., control circuit 302) and a memory coupled to the control circuit (e.g., memory 314), the memory which stores one or more instruction sets configured to be executed by the control circuit, the one or more instruction sets which include instructions for performing any of the methods described herein (e.g., A1-A16 and B1-B16 above).

[0137]

[0145] In yet another embodiment, some embodiments include a non-temporary computer-readable storage medium that stores one or more instruction sets executed by the control circuits of the arithmetic system, the one or more instruction sets including instructions for performing any of the methods described herein (e.g., A1-A16 and B1-B16 above).

[0138]

[0146] The terms "first," "second," etc., may be used in this case to describe various elements, but it should be understood that these elements should not be limited by these terms. These terms are simply used to distinguish one element from another.

[0139]

[0147] The terms used herein are intended solely to describe specific embodiments and are not intended to be limitations on the claims. Where used in the description of embodiments and in the appended claims, the singular forms "a" and "an" and "the" are intended to include the plural forms unless the context explicitly indicates otherwise. Furthermore, the terms "and / or" as used herein are understood to refer to and encompass any one or more of the relatedly enumerated items and all possible combinations thereof. The terms "comprises" and / or "comprising," where used in this specification, specify the existence of the described features, integers, steps, operations, elements, and / or components, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0140]

[0148] When used in this context, the term "if" can be interpreted as meaning "in the case" or "when" the stated premise is true, "in response to the determination that," "according to the determination that," or "in response to the detection that." Similarly, the phrases "if it is determined that [the stated premise is true]," "if [the stated premise is true]," and "if [the stated premise is true]" can be interpreted as meaning "when it is determined that the stated premise is true," "in response to the determination that," "according to the determination that," "when [something] is detected," or "in response to the detection that."

[0141]

[0149] The above description has been given with reference to specific embodiments for illustrative purposes. However, the above exemplary discussion is not intended to be exhaustive or to limit the claims to the exact form disclosed. Many modifications and variations are possible from the perspective of the above teachings. The embodiments have been selected and described to best illustrate the operating principles and practical applications, thereby enabling those skilled in the art to implement them.

Claims

1. A video decoding method performed on a computing system having memory and one or more processors, comprising: Steps include receiving video data that includes multiple blocks, including a first block; Steps include: obtaining a syntax element value from the video data that indicates a wedge mode index corresponding to a first partition mode from a plurality of partition modes for the first block, wherein the wedge mode index is greater than 16; The step of determining that the first partition mode is associated with a composite wedge-based prediction for the first block; The steps of partitioning the first block into a first section and a second section according to the first partition mode and the wedge mode index; and A step of decoding the first section according to a first predictor and decoding the second section according to a second predictor; A method that includes this.

2. A method according to claim 1, wherein the wedge-mode index is signaled using a binary codeword.

3. A method according to claim 1, wherein the wedge-mode index is signaled using truncated binary code.

4. The method according to claim 1, wherein the first partition mode includes a partition line, the partition line is signaled using a first syntax element relating to the angle of the partition line and a second syntax element relating to the offset of the partition line.

5. The method according to claim 4, wherein the angle and the offset are predefined in a lookup table.

6. The method according to claim 4, wherein the first syntax element and the second syntax element are signaled separately using multi-symbol adaptive context coding.

7. The method according to claim 4, wherein the partition line direction is signaled with respect to the partition line.

8. A method according to claim 7, wherein a first number of offset values ​​is signaled in accordance with the partition line direction having a first direction, and a second number of offset values ​​is signaled in accordance with the partition line direction having a second direction, wherein the second number of offset values ​​is different from the first number of offset values.

9. A method according to claim 1, further comprising the step of obtaining a first predictor for encoding the first section from the video data.

10. A method according to claim 1, wherein the first partition mode is signaled using a first syntax element for a partition group of the plurality of partition modes and a second syntax element for an index of the partition group.

11. The method according to claim 10, wherein the plurality of partition modes are divided into a plurality of partition groups according to one or more predefined rules.

12. The method according to claim 10, wherein the plurality of partition modes are divided into a plurality of partition groups according to previously decoded information.

13. The method according to claim 1, wherein the wedge mode index is equal to 68.

14. The method according to claim 1, further comprising a reconfiguration step of reconfiguring the first block, wherein the reconfiguration step includes reconfiguring the first section using the first predictor and reconfiguring the second section using the second predictor.

15. An arithmetic system comprising a control circuit, a memory, and one or more instruction sets stored in the memory and configured to be executed by the control circuit, wherein the one or more instruction sets cause the control circuit to execute the method according to any one of claims 1 to 14.

16. A computer program that causes a computer to perform the method described in any one of claims 1 to 14.

Citation Information

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