Light-emitting substrate and method for manufacturing the same, backlight light source, display device

Abstract

The present invention provides a light-emitting substrate, a method for manufacturing the same, a backlight light source, and a display device. The light-emitting substrate includes a base including a plurality of light-emitting regions, a plurality of light-emitting elements located within each of the plurality of light-emitting regions, connecting lines located within each light-emitting region and configured to connect the light-emitting elements within each light-emitting region, and a first auxiliary plating portion located within each light-emitting region and electrically insulated from the connecting lines and the light-emitting elements.

Description

Technical Field

[0005]

[0001] The present disclosure relates to the technical field of displays, and particularly to a light-emitting substrate and a manufacturing method thereof, a backlight light source and a display device including the light-emitting substrate.

Background Art

[0002] Mini Light Emitting Diode (abbreviated as Mini LED) and Micro Light Emitting Diode (abbreviated as Micro LED) are new LED display technologies derived from small-pitch LEDs. Usually, the size of Mini LED is about 100-300 μm, and the size of Micro LED is 100 μm or less. Mini LED and Micro LED display devices have the advantages of self-emission, all-solid state, long life, high brightness, low power consumption, small volume, ultra-high resolution, applicability in harsh environments such as high temperature and radiation, and insensitivity of materials to environmental influences. Therefore, they can be widely applied in display fields such as display screens, backlight light sources and lighting, and are called the next-generation new display technologies.

Summary of the Invention

[0003] According to one aspect of the present disclosure, there is provided a light-emitting substrate including a base including a plurality of light-emitting regions, a plurality of light-emitting elements located in each of the plurality of light-emitting regions, a connection line located in each light-emitting region and configured to connect the light-emitting elements in each light-emitting region, and a first auxiliary plating portion located in each light-emitting region and electrically insulated from the connection line and the light-emitting elements.

[0004] In some embodiments, each light-emitting region includes a region occupied by the connection line and a blank region not occupied by the connection line, the first auxiliary plating portion is located in the blank region, the first auxiliary plating portion includes a main body portion extending along a first direction, the main body portion divides the blank region into a first portion and a second portion, and the area of the first portion and the area of the second portion are substantially equal.

[0005] In some embodiments, the first auxiliary plating portion further includes a sub-portion extending in a second direction and connected to the main body portion, wherein the first and second directions intersect.

[0006] In some embodiments, the main body of the first auxiliary plating portion includes a first end and a second end facing each other in the first direction, the first end being closer to a connecting line located in the same light-emitting region as the first auxiliary plating portion than the second end, and the sub-part being connected to the second end of the main body.

[0007] In some embodiments, the first auxiliary plating portion has an open ring structure.

[0008] In some embodiments, the first auxiliary plating portion further includes a sub-portion extending in a second direction and connected to the main body, the first and second directions intersect, and the main body is a rectangular ring including an opening, thereby constituting the open ring structure.

[0009] In some embodiments, the main body of the first auxiliary plating portion includes a first edge and a second edge facing each other in the first direction, and a side edge connecting the first edge and the second edge, the opening is located on the side edge, the first edge is closer to a connecting line located in the same light-emitting region as the first auxiliary plating portion than the second edge, the sub-part includes a first sub-part and a second sub-part, the first sub-part is connected to the second edge and the side edge of the main body, the second sub-part is connected to the side edge of the main body and is closer to the second edge than the first edge, and the opening is located between the first sub-part and the second sub-part.

[0010] In some embodiments, the first auxiliary plating portion includes three third sub-parts extending in the first direction and four fourth sub-parts extending in the second direction, the first and second directions intersect, two of the four fourth sub-parts include an opening, and the third and fourth sub-parts are connected to form an L-shaped open ring structure for the contour of the first auxiliary plating portion, any two adjacent third sub-parts of the three third sub-parts are spaced approximately equal in distance, and any two adjacent fourth sub-parts of the four fourth sub-parts are spaced approximately equal in distance.

[0011] In some embodiments, the light-emitting substrate further includes a bonding region, a plurality of bonding electrodes located within the bonding region, and a second auxiliary plating portion located on both sides of the plurality of bonding electrodes in a second direction and electrically insulated from the plurality of bonding electrodes.

[0012] In some embodiments, the second auxiliary plating portion includes a plurality of auxiliary plating electrodes, wherein the width of each auxiliary plating electrode in the second direction is equal to the width of each bonding electrode in the second direction, and the distance between any two adjacent auxiliary plating electrodes among the plurality of auxiliary plating electrodes is equal to the distance between any two adjacent bonding electrodes among the plurality of bonding electrodes.

[0013] In some embodiments, the light-emitting substrate further includes a third auxiliary plating portion located on the side of the plurality of bonding electrodes away from the light-emitting region and electrically insulated from the plurality of bonding electrodes, wherein the third auxiliary plating portion is elongated, and the length of the third auxiliary plating portion in the second direction is greater than the length of the plurality of bonding electrodes spanning in the second direction.

[0014] In some embodiments, the third auxiliary plating section is connected to the second auxiliary plating section.

[0015] In some embodiments, the third auxiliary plating portion is not connected to the second auxiliary plating portion, and the distance between the third auxiliary plating portion and the second auxiliary plating portion is equal to the distance between any two adjacent bonding electrodes among the plurality of bonding electrodes.

[0016] In some embodiments, the light-emitting substrate further includes alignment marks and annular auxiliary plating portions surrounding the alignment marks and electrically insulated from the alignment marks.

[0017] In some embodiments, one annular auxiliary plating portion surrounds one alignment mark.

[0018] In some embodiments, one annular auxiliary plating portion surrounds multiple alignment marks.

[0019] In some embodiments, the light-emitting substrate further includes a plurality of drive voltage signal lines extending in a first direction. The plurality of light-emitting regions are arranged in multiple rows and columns, and each light-emitting region in a column includes one drive voltage signal line, and a plurality of connecting lines located in the same column are connected to the same drive voltage signal line, and the connecting lines located within each light-emitting region and the drive voltage signal lines connected to the connecting lines each have a first spacing from a first auxiliary plating portion located within the light-emitting region. The first auxiliary plating portion is located on the same layer as the connecting lines and the drive voltage signal lines, and the second auxiliary plating portion is located on the same layer as the bonding electrode, the connecting lines and the drive voltage signal lines.

[0020] In some embodiments, each light-emitting region includes a region occupied by the connecting line and a blank region not occupied by the connecting line, the first auxiliary plating portion is located in the blank region and has an open ring structure, and the line width of the first auxiliary plating portion is greater than or equal to the line width of the drive voltage signal line.

[0021] In some embodiments, the light-emitting substrate further includes a plurality of drive circuits, each light-emitting region including one drive circuit, the drive circuit being connected to a light-emitting element located within the light-emitting region, and each drive circuit in each row of light-emitting regions being sequentially cascaded; and a plurality of common voltage signal lines extending in the first direction, each light-emitting region in each row including one common voltage signal line, the common voltage signal line being connected to the ground terminal of each drive circuit in the light-emitting region of the row.

[0022] In some embodiments, the light-emitting substrate further includes a plurality of power signal lines extending in the first direction, wherein each light-emitting region of a row includes one power signal line, and the power signal line is connected to the power terminal of each drive circuit within the light-emitting region of the row; a plurality of addressing signal lines extending in the first direction, wherein each light-emitting region of a row includes one addressing signal line, and the addressing signal line is connected to the address terminal of the first stage drive circuit within the light-emitting region of the row; and a plurality of feedback signal lines extending in the first direction, wherein each light-emitting region of a row includes one feedback signal line, and the feedback signal line is connected to the output terminal of the final stage drive circuit within the light-emitting region of the row.

[0023] In some embodiments, the distance between the drive voltage signal line in the light-emitting region of each column and the feedback signal line in the light-emitting region of another column adjacent to the light-emitting region of that column is equal to the first distance.

[0024] In some embodiments, the first interval is approximately 200 μm.

[0025] In some embodiments, the plurality of light-emitting elements are arranged in multiple rows and columns, and the drive voltage signal line, the common voltage signal line, and the feedback signal line extend in the first direction and extend beyond the first row of light-emitting elements, or are at least flush with the first row of light-emitting elements.

[0026] According to another aspect of the present disclosure, a backlight source including the light-emitting substrate described in any one of the above embodiments is provided.

[0027] According to yet another aspect of the present disclosure, a display device including the light-emitting substrate described in any one of the above embodiments is provided.

[0028] According to still yet another aspect of the present disclosure, a method for manufacturing a light-emitting substrate includes: providing a base including a plurality of light-emitting regions; forming a connection line and a first auxiliary plating portion in each light-emitting region of the base; and attaching a light-emitting element to a side of the connection line and the first auxiliary plating portion in each light-emitting region away from the base, wherein the connection line is configured to connect the light-emitting elements in each light-emitting region, and the first auxiliary plating portion is electrically insulated from the connection line and the light-emitting element.

[0029] In some embodiments, the light-emitting substrate further includes a bonding region. The step of forming a connection line and a first auxiliary plating portion in each light-emitting region of the base further includes applying a conductive layer on the base and patterning the conductive layer, so as to simultaneously form a signal line, the connection line and the first auxiliary plating portion located in the light-emitting region, a plurality of bonding electrodes located in the bonding region, a second auxiliary plating portion, and a third auxiliary plating portion. The signal line extends in a first direction, and the signal line includes a driving voltage signal line, a common voltage signal line, a power supply signal line, an addressing signal line, and a feedback signal line. The plurality of light-emitting regions are arranged in multiple rows and multiple columns, and each column of light-emitting regions includes one driving voltage signal line, one common voltage signal line, one power supply signal line, one addressing signal line, and one feedback signal line. The second auxiliary plating portion is located on both sides in a second direction of the plurality of bonding electrodes, and is electrically insulated from the plurality of bonding electrodes. The second direction intersects the first direction. The third auxiliary plating portion is located on a side of the plurality of bonding electrodes away from the light-emitting region, and is electrically insulated from the plurality of bonding electrodes. The third auxiliary plating portion is in a long strip shape, and the length of the third auxiliary plating portion in the second direction is greater than the length of the plurality of bonding electrodes spanning in the second direction.

[0030] In some embodiments, the step of applying a conductive layer on the base and patterning the conductive layer includes forming a first conductive layer on the base, forming a patterned photoresist on a side of the first conductive layer away from the base, forming a second conductive layer on a surface of the first conductive layer not shielded by the photoresist by an electroplating additive method, where the thickness of the second conductive layer is greater than the thickness of the first conductive layer, peeling the photoresist, and etching the exposed first conductive layer.

[0031] In some embodiments, the ratio of the area of the second conductive layer to the area of the base is about 30% - 40%.

[0032] In some embodiments, the base includes four process edges, and the method further includes the steps of forming elongated fourth auxiliary plating portions on the four process edges of the base, wherein the orthographic projection of the four process edges onto the base is within the orthographic projection of each of the four fourth auxiliary plating portions onto the base, and cutting the four process edges. [Brief explanation of the drawing]

[0033] To more clearly illustrate the technical concepts of the embodiments of this disclosure, the drawings that may be used in the embodiments are briefly described below. As will be apparent, the drawings described below represent only a few embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these without any creative work.

[0034] [Figure 1] Figure 1 shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 2] Figure 2 shows a schematic diagram of the drive circuit and signal line arrangement for the light-emitting substrate in Figure 1. [Figure 3] Figure 3 shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 4] Figure 4 shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 5] Figure 5 shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 6] Figure 6 shows the wiring method for the bonding region of the light-emitting substrate according to an embodiment of the present disclosure. [Figure 7] Figure 7 shows an enlarged schematic diagram of region I in Figure 6. [Figure 8] Figure 8 shows an enlarged schematic diagram of region I in Figure 6. [Figure 9A] Figure 9A shows a schematic plan view of a partial structure of a light-emitting substrate in a related technology. [Figure 9B] Figure 9B shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 10]Figure 10 shows the arrangement method of the alignment marks on the light-emitting substrate and the annular auxiliary plating portion surrounding the alignment marks according to an embodiment of the present disclosure. [Figure 11] Figure 11 shows another arrangement method for the alignment marks on the light-emitting substrate and the annular auxiliary plating portion surrounding the alignment marks according to an embodiment of the present disclosure. [Figure 12] Figure 12 shows yet another arrangement method for the alignment marks on the light-emitting substrate and the annular auxiliary plating portion surrounding the alignment marks according to an embodiment of the present disclosure. [Figure 13] Figure 13 shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure. [Figure 14] Figure 14 shows a block diagram of a backlight light source according to an embodiment of the present disclosure. [Figure 15] Figure 15 shows a block diagram of a display device according to an embodiment of the present disclosure. [Figure 16] Figure 16 shows a flowchart of a method for manufacturing a light-emitting substrate according to an embodiment of the present disclosure. [Figure 17] Figure 17 shows a schematic diagram of a method for manufacturing a light-emitting substrate according to an embodiment of the present disclosure. [Figure 18] Figure 18 shows a schematic diagram of another method for manufacturing a light-emitting substrate according to an embodiment of the present disclosure. [Modes for carrying out the invention]

[0035] The technical concepts of the embodiments of this disclosure will be described clearly and completely below with reference to the drawings of the embodiments of this disclosure. As will be obvious, the embodiments described are only a selection of embodiments of this disclosure, not all embodiments. Any other embodiments that a person skilled in the art could obtain without creative work based on the embodiments of this disclosure are all within the scope of this disclosure.

[0036] Because Mini LEDs and Micro LEDs have many advantages as described above, more and more manufacturers are replacing conventional LEDs in backlight sources with Mini LEDs or Micro LEDs, forming backlight sources based on Mini LEDs or Micro LEDs. As the technology matures, the competition to reduce costs is also intensifying. The manufacturing process for signal lines in the back panel of Mini LED or Micro LED backlight products has been simplified from a double conductive layer process (e.g., using seven masks) to the current single conductive layer process (e.g., using two masks), thereby significantly reducing production costs.

[0037] In large, high-resolution display panels, wiring widths need to be increasingly narrow, but the narrower the wiring width, the higher its resistance. Reducing a double conductive layer to a single conductive layer requires a certain degree of increase in the thickness of the single conductive layer wiring to meet voltage drop requirements and achieve similar electrical properties to the double conductive layer. The wiring material is typically copper. Generally, if the copper thickness is less than 2 μm, the wiring can be manufactured using sputtering; if the copper thickness is greater than 2 μm, the wiring is usually manufactured using plating. As the trend towards product sophistication increases, the copper thickness requirements also increase, for example, copper thicknesses can be 20 μm, 30 μm, or even 50 μm, and these high-thickness copper layers must all be manufactured by plating. Plating methods typically include subtractive and additive methods. The subtractive method involves first laying a conductive layer over the entire surface of the substrate, and then selectively removing some of the conductive layer to obtain a patterned conductive layer. The additive method involves selectively depositing a conductive layer onto the substrate surface by shielding it with photoresist, thereby forming a patterned conductive layer. When the conductive layer thickness exceeds 8 μm, the subtractive method results in long etching times and large etching deviations, consequently reducing the mass productivity of the product. In contrast, the additive method is unaffected by the thickness of the conductive layer, and the etching deviation is virtually zero.

[0038] However, additive plating methods require the fabrication of a photoresist as a barrier, and therefore belong to the category of patterned plating methods. Barrier parameters (e.g., width, spacing, density distribution) have a certain effect on the plating effect, and especially when "island" wiring is present on the substrate, this can lead to a decrease in the thickness uniformity of the conductive layer. When bonding a light-emitting device to a light-emitting substrate containing a conductive layer of non-uniform thickness, the height difference between the cathode pad and anode pad of the light-emitting device exceeds the range that can be covered with solder paste. As a result, bonding fails, leading to a decrease in the light emission uniformity of the light-emitting substrate or the inability to achieve normal light emission function.

[0039] In view of the above circumstances, the embodiments of this disclosure provide light-emitting substrates that can at least mitigate or overcome some or all of the above-mentioned defects and other potential defects.

[0040] Figure 1 shows a schematic plan view of a partial structure of the light-emitting substrate 100. The light-emitting substrate 100 includes a base 10 including a plurality of light-emitting regions E, a plurality of light-emitting elements 101 located within each of the plurality of light-emitting regions E, connecting lines 102 located within each light-emitting region E and configured to connect the light-emitting elements 101 within each light-emitting region E, and a first auxiliary plating portion 103 located within each light-emitting region E and electrically insulated from the connecting lines 102 and the light-emitting elements 101.

[0041] Figure 1 shows a partial structure of the light-emitting substrate 100, and therefore only shows the four light-emitting regions E of the light-emitting substrate 100. The four light-emitting regions E are arranged in 2 rows and 2 columns, for example, the light-emitting region E located in the i-th row and j-th column, the light-emitting region E located in the i+1-th row and j-th column, and the light-emitting region E located in the i+1-th row and j+1-th column. Each light-emitting region E is surrounded by a dashed rectangular frame. However, as explained above, the light-emitting substrate 100 contains multiple light-emitting regions E, and the multiple light-emitting regions E are arranged in multiple rows and multiple columns. The number of light-emitting elements 101 contained within each light-emitting region E can be flexibly designed according to specific needs. When each light-emitting region E contains multiple light-emitting elements 101, these light-emitting elements 101 can be interconnected in series, parallel, or a combination of series and parallel via connecting lines 102. The light-emitting elements 101 may be Mini LEDs or Micro LEDs. Typically, the size of a Mini LED is about 100-300 μm, and the size of a Micro LED is 100 μm or less.

[0042] As shown in Figure 1, if the first auxiliary plating section 103 is not provided on the light-emitting substrate 100, there are almost no other signal lines near the connection line 102 in the light-emitting region E, resulting in a large blank area near the connection line 102, which causes the connection line 102 to become an island wiring. Furthermore, since the line width of the signal line VLED is clearly larger than the line width of the connection line 102, the non-uniformity of the thickness and distribution of this wiring poses a significant problem for the additive plating method. Consequently, the thickness of the connection line 102 formed by the additive plating method is clearly larger than the thickness of other signal lines on the light-emitting substrate 100, which is disadvantageous for achieving thickness uniformity. On the other hand, in the embodiment of this disclosure, by providing the first auxiliary plating section 103 in the light-emitting region E, the distribution of wiring within the light-emitting region E becomes more uniform, improving the island effect of the connection line 102, thereby reducing or avoiding the influence of the island effect on the uniformity of the plating, and the thickness of the connection line 102 almost matches the thickness of other signal lines on the light-emitting substrate 100, thereby improving the thickness uniformity of the wiring on the light-emitting substrate 100. When bonding light-emitting elements 101 to the light-emitting substrate 100, the cathode pad and anode pad of the light-emitting elements 101 are at approximately the same height, thereby ensuring that each light-emitting element 101 is stably bonded to the pad and providing a uniform light-emitting effect to the light-emitting substrate 100.

[0043] Each light-emitting region E includes a region occupied by the connecting lines 102 and a blank region not occupied by the connecting lines 102, and the first auxiliary plating portion 103 is located in the blank region. As shown in Figure 1, the first auxiliary plating portion 103 includes a main body portion 1031 extending in a first direction D1, where the first direction D1 is, for example, the vertical direction in the figure. The main body portion 1031 divides the blank region into a first portion P1 and a second portion P2, with the areas of the first portion P1 and the second portion P2 being approximately equal. By providing the main body portion 1031 of the first auxiliary plating portion 103 in the center of the blank region, the main body portion 1031 divides the blank region into a first portion P1 and a second portion P2 with approximately equal areas, thereby dividing the blank region almost equally with the first auxiliary plating portion 103. This improves the effect of uneven distribution of wiring within the light-emitting region E, mitigates or eliminates the island effect, and distributes the wiring as uniformly as possible within the light-emitting region E.

[0044] The first auxiliary plating portion 103 may have a variety of possible shapes, including but not limited to L-shaped, T-shaped, cross-shaped, annular structures of open rings, and irregular shapes. In some embodiments, the first auxiliary plating portion 103 further includes a sub-portion 1032 that extends in a second direction D2 and is connected to the main body portion 1031, where the first direction D1 and the second direction D2 intersect, and for example, the second direction D2 may be the horizontal direction in the figure. In this case, the first auxiliary plating portion 103 may be L-shaped, T-shaped, or cross-shaped. In one embodiment, as shown in Figure 1, the main body 1031 of the first auxiliary plating portion 103 includes a first end 1031A and a second end 1031B facing each other in a first direction D1, with the first end 1031A being closer to the connecting line 102 located in the same light-emitting region E as the first auxiliary plating portion 103 than the second end 1031B, and the sub-part 1032 being connected to the second end 1031B of the main body 1031, thereby giving the first auxiliary plating portion 103 an L-shape. Of course, in alternative embodiments, the shape of the first auxiliary plating portion 103 that satisfies the above arrangement method may be T-shaped. By positioning the sub-part 1032 of the first auxiliary plating portion 103 on the side away from the connecting line 102, the sub-part 1032 can evenly divide the small blank area below the light-emitting region E, which is further advantageous for improving the thickness uniformity of the conductive layer on the light-emitting substrate 100.

[0045] Furthermore, while a method that achieves an effect similar to the subtractive method by filling the blank areas of the light-emitting region E with an auxiliary plating pattern can similarly balance the effect of thickness uniformity due to the additive plating process, in this method, the proportion of the single-layer conductive layer is very large, for example, the area of ​​the conductive layer / the area of ​​the base is ≥ 85%, and the large-area, high-thickness conductive layer has a very large impact on the stress of the substrate, and the consumption of additives in the plating process is an important part of the constraints on the plating cost. A large proportion of the conductive layer means that the amount of additives consumed is large, and at the same time, the amount of the conductive layer material itself is also large, which significantly increases the cost of the plating process. On the other hand, in the light-emitting substrate 100 according to the embodiment of this disclosure, by precisely designing the shape of the first auxiliary plating portion 103 to be L-shaped, T-shaped, or cross-shaped, it is possible not only to have the conductive layer of the light-emitting substrate 100 have almost the same thickness, but also to not completely fill the blank areas of the light-emitting region E with the first auxiliary plating portion 103. This sophisticated shape design of the first auxiliary plating section 103 allows the ratio of the conductive layer area to the base area to be controlled to 30-40%, reducing the cost of the plating process by more than 50% compared to a solution that fills the blank areas of the light-emitting region E with an auxiliary plating pattern. This provides a low-cost solution that is feasible for mass production of the additive plating method.

[0046] As further shown in Figure 1, the light-emitting substrate 100 further includes a plurality of drive voltage signal lines VLEDs extending in a first direction D1, with each column of light-emitting region containing one drive voltage signal line VLED, and a plurality of connecting lines 102 located in the same column connected to the same drive voltage signal line VLED. In some embodiments, the line width of the first auxiliary plating portion 103 may be the same as the line width of the drive voltage signal line VLED. Each connecting line 102 located within each light-emitting region E and the drive voltage signal line VLED connected to the connecting line 102 have a first spacing S1 with the first auxiliary plating portion 103 located within the light-emitting region E, thereby satisfying electrical requirements such as preventing crosstalk. For example, in the light-emitting region E of the ith row and jth column in the upper left of Figure 1, the connecting line 102 and the first auxiliary plating portion 103 have a first spacing S1, and the drive voltage signal line VLED and the first auxiliary plating portion 103 also have a first spacing S1. The value of the first interval S1 is related to parameters such as the voltage required to drive the light-emitting element 101 and the wiring spacing requirements for the drive voltage signal line VLED, and the value of the first interval S1 may differ depending on the product. Assuming that an electrical safety distance is ensured, the first auxiliary plating section 103 should be as close as possible to the connection line 102 and the drive voltage line VLED, that is, the value of the first interval S1 should be as small as possible, because the closer the first auxiliary plating section 103 is to the isolated connection line 102 and the drive voltage signal line VLED, the better the auxiliary plating effect. The values ​​of the first interval S1 within each light-emitting region E should be the same. In one embodiment, the voltage required to drive the light-emitting element 101 is about 20V, the safety reference distance corresponding to this voltage is 200μm, and the spacing between the drive voltage signal line VLED and other wiring must be 200μm or more, so the first interval S1 can be designed to be 200μm. In one alternative embodiment, the voltage required to drive the light-emitting element 101 is approximately 40V, the safety reference distance corresponding to this voltage is 400μm, and the spacing between the drive voltage signal line VLED and other wiring must be 200μm or more. Therefore, the first spacing S1 can be designed to be 400μm.

[0047] Figure 2 shows a schematic plan view of the same partial structure of the light-emitting substrate 100 as in Figure 1, but Figure 2 emphasizes the arrangement of each wiring and drive circuit of the light-emitting substrate 100. As shown in Figure 2, the light-emitting substrate 100 further includes a plurality of drive circuits 110 and a plurality of common voltage signal lines GND extending in a first direction D1. The drive circuits 110 may be integrated circuits, for example, package chips having a plurality of terminals, and the drive circuits 110 may include, for example, an address terminal Di, a power terminal Pwr, an output terminal Out, and a ground terminal Gnd. Each light-emitting region E includes one drive circuit 110, which is connected to a light-emitting element 101 located within the light-emitting region E, and the drive circuits 110 in each row of light-emitting regions are sequentially cascaded. Each row of light-emitting regions includes one common voltage signal line GND, which is connected to the ground terminal Gnd of each drive circuit 110 in the light-emitting region of that row. In each light-emitting region of a row, one drive voltage signal line VLED is connected to the light-emitting element 101 in that row's light-emitting region via a connecting line 102, and one common voltage signal line GND is connected to the ground terminal Gnd of each drive circuit 110 in that row's light-emitting region. The drive voltage signal line VLED is configured to supply a drive voltage to the light-emitting element 101, and the common voltage signal line GND is configured to supply a common voltage (e.g., ground voltage) to the drive circuit 110. For example, if it is necessary to make a light-emitting element 101 in a particular light-emitting region E light up, a voltage difference is generated on both sides of the light-emitting element 101 by setting the drive voltage to a high voltage and the common voltage to a low voltage, thereby driving the light-emitting element 101 in that light-emitting region E to light up.

[0048] In some embodiments, as shown in Figure 2, the light-emitting substrate 100 may further include a plurality of power signal lines PWR extending in a first direction D1, a plurality of addressing signal lines ADDR extending in a first direction D1, and a plurality of feedback signal lines FB extending in a first direction D1, and each row of light-emitting regions includes one power signal line PWR, one addressing signal line ADDR, and one feedback signal line FB. The power signal line PWR is connected to the power terminal Pwr of each drive circuit 110 in the light-emitting area of ​​each row and is configured to supply power voltage to each drive circuit 110 in the light-emitting area of ​​each row; the addressing signal line ADDR is connected to the address terminal Di of the first stage drive circuit 110 in the light-emitting area of ​​each row and is configured to transmit an address signal to the address terminal Di of the first stage drive circuit 110 in the light-emitting area of ​​each row; and the feedback signal line FB is connected to the output terminal Out of the final stage drive circuit 110 in the light-emitting area of ​​each row and is configured to receive signals transmitted from the final stage drive circuit 110.

[0049] The distance between the drive voltage signal line VLED in the light-emitting region of each column and the feedback signal line FB in the light-emitting region of another column adjacent to the light-emitting region of that column is equal to the first distance S1, and the distances between the drive voltage signal line VLED and the feedback signal line FB in two different adjacent columns of light-emitting regions should be very similar. For example, as shown in Figure 2, the distance between the drive voltage signal line VLED in the light-emitting region of the (j+1)th column and the feedback signal line FB in the light-emitting region of the jth column is equal to the first distance S1. In some embodiments, the first distance is approximately 200 μm. The distance between adjacent wirings in the light-emitting region of each column, for example, the distance between the power signal line PWR and the addressing signal line ADDR, may be less than the first distance S1. In some embodiments, the distance between the power signal line PWR and the addressing signal line ADDR in the light-emitting region of each column is approximately 100 μm.

[0050] The connection line 102, the first auxiliary plating section 103, the drive voltage signal line VLED, the common voltage signal line GND, the power supply signal line PWR, the addressing signal line ADDR, the feedback signal line FB, the light-emitting element pad, and the drive circuit pad are arranged on the same layer of the light-emitting substrate 100, and in the manufacturing process, they may be formed from the same conductive layer by a plating additive method. The material of the conductive layer may be any suitable material, for example, copper.

[0051] Figure 3 shows a schematic plan view of the partial structure of the light-emitting substrate 200. Except for the first auxiliary plating portion 203, the light-emitting substrate 200 shown in Figure 3 has almost the same structure as the light-emitting substrate 100 shown in Figure 1, and therefore the same reference numerals indicate the same components. For the sake of brevity, redundant explanations of the commonalities between the light-emitting substrate 200 in Figure 3 and the light-emitting substrate 100 in Figure 1 will be omitted, and only the differences will be explained below.

[0052] As shown in Figure 3, the light-emitting substrate 200 includes a plurality of light-emitting elements 101 located within each of the plurality of light-emitting regions E, connecting lines 102 located within each light-emitting region E and configured to connect the light-emitting elements 101 within each light-emitting region E, and a first auxiliary plating portion 203 located within each light-emitting region E and electrically insulated from the connecting lines 102 and the light-emitting elements 101. Each light-emitting region E includes a region occupied by the connecting lines 102 and a blank region not occupied by the connecting lines 102, and the first auxiliary plating portion 203 is located in the blank region. The first auxiliary plating portion 203 includes a main body portion 2031 extending in a first direction D1, and the main body portion 2031 divides the blank region into a first part and a second part, with the area of ​​the first part and the area of ​​the second part being approximately equal. By positioning the main body 2031 of the first auxiliary plating section 203 in the center of the blank area, the main body 2031 divides the blank area into a first and second section of approximately equal area, allowing the first auxiliary plating section 203 to divide the blank area almost equally. This improves the effect of uneven distribution of wiring within the light-emitting region E, mitigates or eliminates the island effect, and distributes the wiring as uniformly as possible within the light-emitting region E.

[0053] The first auxiliary plating section 203 has an open-ring structure. For example, the main body 2031 of the first auxiliary plating section 203 is an open-ring rectangular ring. In this application, the term "open-ring structure" means that the shape of the open-ring structure is an open polygonal figure, as opposed to a closed polygonal figure. Because the first auxiliary plating section 203 is close to the drive voltage signal line VLED, if the first auxiliary plating section 203 has a closed-ring structure, when the wiring around the closed-ring first auxiliary plating section 203 (e.g., the drive voltage signal line VLED, the connection line 102, the common voltage signal line GND, etc.) is energized, the closed-ring structure is affected by the current of the surrounding wiring and generates a coupling signal, which further affects the voltage of the surrounding wiring and causes electromagnetic crosstalk (EMI). By designing the main body 2031 of the first auxiliary plating section 203 as an open-ring structure, electromagnetic crosstalk can be avoided.

[0054] As shown in Figure 3, the first auxiliary plating portion 203 further includes two sub-parts extending in the second direction D2 and connected to the main body portion 2031, which are the first sub-part 2032A and the second sub-part 2032B, respectively. The main body portion 2031 includes a first edge 2031A and a second edge 2031B that face each other in the first direction D1, and a side edge 2031C connecting the first edge 2031A and the second edge 2031B. The first edge 2031A is closer to the connecting line 102 located in the same light-emitting region E as the first auxiliary plating portion 203 than the second edge 2031B, and the opening 2033 of the rectangular ring is located at the side edge 2031C, thereby making the rectangular ring an open ring. The first sub-part 2032A is connected to the second edge 2031B and the side edge 2031C of the main body 2031, and the second sub-part 2032B is connected to the side edge 2031C of the main body 2031 and is closer to the second edge 2031B than to the first edge 2031A, with the opening 2033 located between the first sub-part 2032A and the second sub-part 2032B. By arranging the two sub-parts 2032A and 2032B of the first auxiliary plating part 203 on the side away from the connecting line 102, the two sub-parts can uniformly divide the small blank area below the light-emitting region E, which is further advantageous for improving the thickness uniformity of the conductive layer on the light-emitting substrate 200.

[0055] The minimum distance between the first edge 2031A of the main body 2031 of the first auxiliary plating section 203 and the connecting line 102 in the light-emitting region E is the first interval S1, where "minimum distance" refers to the distance between the first edge 2031A of the first auxiliary plating section 203 and the part of the connecting line 102 closest to the first edge 2031A. The minimum distance between the second edge 2031B of the main body 2031 of the first auxiliary plating section 203 and the connecting line 102 in the adjacent light-emitting region E is the first interval S1, and similarly, "minimum distance" refers to the distance between the second edge 2031B of the first auxiliary plating section 203 and the part of the connecting line 102 in the adjacent light-emitting region E closest to the second edge 2031B. The distance between the two sub-sections 2032A and 2032B of the first auxiliary plating section 203 and the drive voltage signal line VLED is the first interval S1, for each sub-section. In some embodiments, the first interval S1 is approximately 200 μm.

[0056] In the light-emitting substrate 200 according to the embodiment of this disclosure, by precisely designing the shape of the first auxiliary plating portion 203, not only can the thickness uniformity of the conductive layer of the light-emitting substrate 200 be improved, but the first auxiliary plating portion 203 does not completely fill the blank areas of the light-emitting region E. This precise shape design of the first auxiliary plating portion 203 allows the ratio of the conductive layer area to the base area to be controlled to 30-40%, and the cost of the plating process can be reduced by more than 50% compared to a solution in which the blank areas of the light-emitting region E are filled with the auxiliary plating pattern, providing a low-cost solution that is feasible for mass production of the additive plating method.

[0057] Figure 4 shows a schematic plan view of the partial structure of the light-emitting substrate 300. Except for the first auxiliary plating portion 303, the light-emitting substrate 300 shown in Figure 4 has almost the same structure as the light-emitting substrate 100 shown in Figure 1, and therefore the same reference numerals indicate the same components. For the sake of brevity, redundant explanations of the commonalities between the light-emitting substrate 300 in Figure 4 and the light-emitting substrate 100 in Figure 1 will be omitted, and only the differences will be explained below.

[0058] As shown in Figure 4, the light-emitting substrate 300 includes a plurality of light-emitting elements 101 located within each of the plurality of light-emitting regions E, connecting lines 102 located within each light-emitting region E and configured to connect the light-emitting elements 101 within each light-emitting region E, and a first auxiliary plating portion 303 located within each light-emitting region E and electrically insulated from the connecting lines 102 and the light-emitting elements 101. The entire outer casing of the first auxiliary plating portion 303 is an L-shaped ring. Each light-emitting region E includes a region occupied by the connecting lines 102 and a blank region not occupied by the connecting lines 102, and the first auxiliary plating portion 303 is located in the blank region. The first auxiliary plating portion 303 includes a main body portion 3031 extending in a first direction D1 (for example, a partial structure of the first auxiliary plating portion 303 enclosed by a dashed rectangular frame in the i-th row and j+1-th column), and the main body portion 3031 divides the blank region into a first part and a second part, with the area of ​​the first part and the area of ​​the second part being approximately equal. By positioning the main body 3031 of the first auxiliary plating section 303 in the center of the blank area, the main body 3031 divides the blank area into a first and second section of approximately equal area, allowing the first auxiliary plating section 303 to divide the blank area almost equally. This improves the effect of uneven distribution of wiring within the light-emitting region E, mitigates or eliminates the island effect, and allows the wiring to be distributed as uniformly as possible within the light-emitting region E.

[0059] The first auxiliary plating portion 303 has an open ring structure to prevent electromagnetic crosstalk from occurring in the surrounding wiring. The first auxiliary plating portion 303 includes three third sub-parts 3032 extending in the first direction D1 and four fourth sub-parts 3033 extending in the second direction D2. Two of the four fourth sub-parts 3033 include an opening 3034, and the connection between each third sub-part 3032 and fourth sub-part 3033 gives the contour of the first auxiliary plating portion 303 an L-shaped open ring structure. By having any two adjacent third sub-parts 3032 of the three third sub-parts 3032 with approximately equal spacing S2, the blank area can be evenly divided in the first direction D1 by the first auxiliary plating part 303, and by having any two adjacent fourth sub-parts 3033 of the four fourth sub-parts 3033 with approximately equal spacing S3, the blank area can be evenly divided in the second direction D2 by the first auxiliary plating part 303. By evenly dividing the blank area in the lateral and vertical directions, the effect of uneven distribution of wiring within the light-emitting region E is further improved, the island effect is mitigated or eliminated, and the wiring can be distributed as uniformly as possible within the light-emitting region E.

[0060] Regarding the differences from the first auxiliary plating portion 103, the distance between the first auxiliary plating portion 303 located within each light-emitting region E and the drive voltage signal line VLED located in the same row of light-emitting region as the first auxiliary plating portion 303 is S4, and the distance between the first auxiliary plating portion 303 located within each light-emitting region E and the connecting line 102 located within the same light-emitting region E is S5. Distants S4 and S5 may be the same or different, but both are greater than the first distance S1.

[0061] In the light-emitting substrate 300 according to the embodiment of this disclosure, by precisely designing the shape of the first auxiliary plating portion 303, not only can the thickness uniformity of the conductive layer of the light-emitting substrate 300 be improved, but the first auxiliary plating portion 303 does not completely fill the blank areas of the light-emitting region E. This precise shape design of the first auxiliary plating portion 303 allows the ratio of the conductive layer area to the base area to be controlled to 30-40%, and the cost of the plating process can be reduced by more than 50% compared to a solution in which the blank areas of the light-emitting region E are filled with the auxiliary plating pattern, providing a low-cost solution that is feasible for mass production of the additive plating method.

[0062] Figure 5 shows a schematic plan view of a substructure within one light-emitting region E of the light-emitting substrate 400. Except for the first auxiliary plating portion 403, the light-emitting substrate 400 shown in Figure 5 has almost the same structure as the light-emitting substrate 100 shown in Figure 1, and therefore the same reference numerals indicate the same components. For the sake of brevity, redundant explanations of the commonalities between the light-emitting substrate 400 in Figure 5 and the light-emitting substrate 100 in Figure 1 will be omitted, and only the differences will be explained below.

[0063] As shown in Figure 5, the light-emitting substrate 400 includes a plurality of light-emitting elements 101 located within each of the plurality of light-emitting regions E, connecting lines 102 located within each light-emitting region E and configured to connect the light-emitting elements 101 within each light-emitting region E, and a first auxiliary plating portion 403 located within each light-emitting region E and electrically insulated from the connecting lines 102 and the light-emitting elements 101. Each light-emitting region E includes a region occupied by the connecting lines 102 and a blank region not occupied by the connecting lines 102, and the first auxiliary plating portion 403 is located in the blank region.

[0064] The first auxiliary plating portion 403 includes an opening 4033, thereby creating an open-ring structure for the first auxiliary plating portion 403, which prevents electromagnetic crosstalk from occurring in the surrounding wiring. The line width W2 of the first auxiliary plating portion 403 is greater than or equal to the line width W1 of the drive voltage signal line VLED. In some embodiments, the line width W2 of the first auxiliary plating portion 403 may be 1 to 10 times the line width W1 of the drive voltage signal line VLED. The wider the line width W2 of the first auxiliary plating portion 403, the better the auxiliary plating effect, and the thickness of the conductive layer in the area where it is located approaches the thickness of the full-surface coating. However, the proportion of the corresponding conductive layer increases to some extent, and therefore, the line width W2 of the first auxiliary plating portion 403 should be controlled within a reasonable range. The distance between the first auxiliary plating portion 403 and the connecting line 102 and the drive voltage signal line VLED may be equal to the first distance S1. In some embodiments, the first distance S1 may be equal to approximately 200 μm.

[0065] In the light-emitting substrate 400 according to the embodiment of this disclosure, by precisely designing the shape of the first auxiliary plating portion 403, not only can the thickness uniformity of the conductive layer of the light-emitting substrate 400 be improved, but the first auxiliary plating portion 403 does not completely fill the blank areas of the light-emitting region E. This precise shape design of the first auxiliary plating portion 403 allows the ratio of the conductive layer area to the base area to be controlled to 30-40%, and the cost of the plating process can be reduced by more than 50% compared to a solution in which the blank areas of the light-emitting region E are filled with the auxiliary plating pattern, providing a low-cost solution that is feasible for mass production of the additive plating method.

[0066] Figures 1 to 5 show various shapes of the first auxiliary plating section as examples, and the specific shape can be changed according to the connection line design within the main light area of ​​different projects. The first auxiliary plating section divides the blank area evenly (e.g., first auxiliary plating section 103, 203, 303) or is provided around the blank area (e.g., first auxiliary plating section 403), but in either case, it is positioned as close as possible to the connection line 102. By providing the first auxiliary plating section, the wiring can be distributed as uniformly as possible within the light-emitting area E, thereby mitigating or eliminating the effect of uneven film layer thickness due to uneven distribution of island wiring within the light-emitting area E, controlling the ratio of the conductive layer area to the base area to 30-40%, and significantly reducing the cost of the plating process.

[0067] Furthermore, the entire light-emitting substrate may employ first auxiliary plating sections of the same shape, or a combination of first auxiliary plating sections of different shapes may be employed, and the specific arrangement method can be flexibly changed as needed. For example, the display area of ​​the light-emitting substrate may employ first auxiliary plating sections of a certain shape, while the non-display area surrounding the display area of ​​the light-emitting substrate may employ first auxiliary plating sections of a different shape.

[0068] In some embodiments, the first auxiliary plating portion described in any one of the embodiments above (e.g., 103, 203, 303, 403) and the drive voltage signal line VLED are located in the same layer. In some alternative embodiments, the first auxiliary plating portion described in any one of the embodiments above (e.g., 103, 203, 303, 403), the drive voltage signal line VLED, and the connecting line 102 are located in the same layer. In this application, the term "A and B are located in the same layer" means that A and B are manufactured in a single process, and similarly, the term "A, B, and C are located in the same layer" means that A, B, and C are manufactured in a single process.

[0069] Figure 6 shows the arrangement of the bonding region of the light-emitting substrate, and the light-emitting substrate shown in Figure 6 may be any one of the light-emitting substrates 100, 200, 300, and 400 described in the above embodiment. As shown in the figure, the light-emitting substrate further includes a bonding region B, a plurality of bonding electrodes 105 located within the bonding region B, and second auxiliary plating portions 106 located on both sides of the plurality of bonding electrodes 105 in a second direction D2 and electrically insulated from the plurality of bonding electrodes 105. Because the wiring in the fan-out region above the bonding region B is relatively dense, if the second auxiliary plating portions 106 are not provided near the bonding electrodes 105, the thickness of the bonding electrodes 105 in the bonding region B will not match the thickness of the wiring in the fan-out region. Providing the second auxiliary plating portions 106 on both sides of the bonding electrodes 105 is advantageous in matching the thickness of the bonding electrodes 105 with the thickness of the wiring in the fan-out region.

[0070] Figure 7 is a partially enlarged view of region I in Figure 6. As shown in Figures 6 and 7, the second auxiliary plating section 106 includes a plurality of auxiliary plating electrodes 1061, the width W3 in the second direction D2 of each auxiliary plating electrode 1061 is equal to the width W3 in the second direction D2 of each bonding electrode 105, and the spacing S6 between any two adjacent auxiliary plating electrodes 1061 is equal to the spacing S6 between any two adjacent bonding electrodes 105. Since the wiring on the light-emitting substrate is formed from the same conductive layer, it is advantageous for the process to have the line width and wiring spacing of the bonding electrode 105 and the auxiliary plating electrode 1061 match.

[0071] In some embodiments, the second auxiliary plating portion 106 and the drive voltage signal line VLED are located in the same layer. In some alternative embodiments, the second auxiliary plating portion 106, the drive voltage signal line VLED, the connecting line 102, and the bonding electrode 105 are located in the same layer. As stated above, terms such as "A and B are located in the same layer" mean that A and B are manufactured in a single process. In some embodiments, as shown in Figures 6 and 7, the light-emitting substrate may further include a third auxiliary plating portion 107 located away from the light-emitting region E of the plurality of bonding electrodes 105 and electrically insulated from the plurality of bonding electrodes 105. The third auxiliary plating portion 107 is elongated, and the length L1 of the third auxiliary plating portion 107 in the second direction D2 is greater than the length L2 over which the plurality of bonding electrodes 105 span the second direction D2, so that the plurality of bonding electrodes 105 can be surrounded by the third auxiliary plating portion 107. By providing a third auxiliary plating portion 107 on the side of the bonding electrode 105 away from the light-emitting region E, it is advantageous to further match the thickness of the bonding electrode 105 with the thickness of the wiring in the fan-out region.

[0072] In the first direction D1, the third auxiliary plating portion 107 and the bonding electrode 105 have an appropriate distance from each other to avoid the third auxiliary plating portion 107 contacting the bonding electrode 105 due to bonding misalignment accuracy, and further to avoid causing a short circuit risk between each bonding electrode 105. In some embodiments, the distance between the third auxiliary plating portion 107 and the bonding electrode 105 may be 0.6 mm.

[0073] As shown in Figure 7, the third auxiliary plating portion 107 may be connected to the second auxiliary plating portion 106, that is, one end of the third auxiliary plating portion 107 is in contact with the second auxiliary plating portion 106 and the other end of the third auxiliary plating portion 107 is in contact with another second auxiliary plating portion 106. In an alternative embodiment, as shown in Figure 8, the third auxiliary plating portion 107 does not have to be connected to the second auxiliary plating portion 106. In this case, there is a certain distance between the third auxiliary plating portion 107 and the second auxiliary plating portion 106. In some embodiments, this distance may be equal to the distance S6 between any two adjacent bonding electrodes 105 among the plurality of bonding electrodes 105.

[0074] Furthermore, if the shape of the light-emitting substrate is a regular rectangle, the shape of the light-emitting region (or light region) and the shapes of the various auxiliary plating parts can be designed as described in the above embodiment. However, the shapes of the light-emitting region and the various auxiliary plating parts in each of the above embodiments can be flexibly changed according to the specific shape of the light-emitting substrate. For example, if the shape of the light-emitting substrate is irregular, for example, if the four corners of the light-emitting substrate are arc-shaped, the shapes of the light-emitting region and auxiliary plating parts can be modified to suit the irregularly shaped light-emitting substrate.

[0075] Figure 9A shows a schematic plan view of a partial structure of a light-emitting substrate in the related technology, showing four light-emitting elements 11, which are arranged in two rows and two columns, with two light-emitting elements 11 located in the first row and the remaining two light-emitting elements 11 located in the second row. The inventors of the present application have found that in the related technology, functional wiring is arranged so as to be flush with the light-emitting elements 11 in the second row at most, and does not extend to the light-emitting elements 11 in the first row. For example, the drive voltage signal line VLED is connected to the light-emitting elements 11 in the second row, and its end is flush with the light-emitting elements 11 in the second row, but the end of the common voltage signal line GND does not reach the light-emitting elements 11 in the second row. As a result, the region where the light-emitting elements 11 in the first row are located, for example region A in the figure, becomes a large blank area without wiring, and thereafter the thickness of the pads of the light-emitting elements 11 in the first row is clearly greater than the thickness of the pads of the light-emitting elements 11 in the other rows after plating. For example, the pad thickness of the light-emitting elements 11 in the second row to the last row is approximately 6 μm, which meets the design requirements. However, the pad thickness of the light-emitting elements 11 in the first row is approximately 14 μm, which far exceeds the area that can be covered with solder paste. As a result, the light-emitting elements 11 cannot be properly bonded to the pad, and the light-emitting elements in the first row of the light-emitting substrate cannot achieve normal light-emitting function.

[0076] Figure 9B shows a schematic plan view of a partial structure of a light-emitting substrate according to an embodiment of the present disclosure, showing two rows of light-emitting elements, which are the first row of light-emitting elements and the second row of light-emitting elements, respectively. The light-emitting substrate shown in Figure 9B may be the light-emitting substrate described in any one of the embodiments described above. In each light-emitting substrate according to an embodiment of the present disclosure, the functional wiring extends in the first direction D1 and extends beyond the first row of light-emitting elements 101, or is at least flush with the first row of light-emitting elements 101. For example, as shown in Figure 9B, the end of the common voltage signal line GND is flush with at least the first row of light-emitting elements 101 in the first direction D1, and both the drive voltage signal line VLED and the feedback signal line FB extend in the first direction D1 and extend beyond the first row of light-emitting elements 101. By pulling up the functional wiring, it can be positioned up to the first row of light-emitting elements 101, or even beyond the first row of light-emitting elements 101, thereby including uniformly distributed wiring in the original blank area, as shown in area C of Figure 9B. This allows the pad thickness of the first row of light-emitting elements 101 to be approximately the same as the pad thickness of the other rows of light-emitting elements 101, and the entire light-emitting substrate can emit light uniformly.

[0077] Figure 10 shows a schematic diagram of a partial structure of a light-emitting substrate, which may be the light-emitting substrate described in any one of the embodiments described above. As shown in Figure 10, the light-emitting substrate may further include alignment marks 108 and an annular auxiliary plating portion 109 surrounding the alignment marks 108 and electrically insulated from the alignment marks 108. The alignment marks 108 are marks to assist in the alignment of the film material during the process and are usually located in areas of the substrate without wiring, for example, on the process edge and / or effective edge of the light-emitting substrate. The term "effective edge" refers to the edge of the light-emitting substrate in the finished state, while the term "process edge" refers to the outer boundary of the product that plays an auxiliary role in the production process due to the need for process capability. The process edge is outside the effective edge and is usually larger in size than the effective edge. The process edge is used to place alignment marks required for processes such as white ink printing, electroless gold plating, and cutting, and after the manufacturing process is completed, the process edge can be cut to create an effective edge on the light-emitting substrate. The alignment marks 108 may have various appropriate shapes; for example, the alignment marks 108 shown in Figure 10 are cross-shaped, the alignment marks 108 shown in Figure 11 are circular, and the alignment marks 108 shown in Figure 12 are cross-shaped or square. In some embodiments, the line width of the annular auxiliary plating portion 109 is 0.2 to 5.0 mm, and the distance between the annular auxiliary plating portion 109 and the alignment marks 108 is 0.02 to 0.5 mm.

[0078] By providing annular auxiliary plating portions 109 around all alignment marks 108, the thickness of the island-shaped alignment marks 108 is prevented from becoming too large, and a thickness level equivalent to that of the conductive layer within the light-emitting region E of the light-emitting substrate can be maintained, thereby enabling the alignment marks 108 to be successfully captured and recognized in subsequent processes.

[0079] In some embodiments, for example as shown in Figure 10 or Figure 11, one annular auxiliary plating portion 109 surrounds one alignment mark 108. In some alternative embodiments, for example as shown in Figure 12, one annular auxiliary plating portion 109 surrounds multiple alignment marks 108.

[0080] Figure 13 shows a schematic plan view of the partial structure of the light-emitting substrate 500. As described above, the manufacturing stage of the light-emitting substrate includes process edges around the periphery of the light-emitting substrate. In some embodiments, elongated fourth auxiliary plating portions can be formed on each of the four process edges during manufacturing, and the orthogonal projections of the four process edges onto the base are each within the orthogonal projections of the four fourth auxiliary plating portions onto the base. After the relevant manufacturing process is completed, the four process edges can be cut. By providing elongated fourth auxiliary plating portions on each of the four process edges, the entire periphery of the light-emitting substrate 500 can be covered with the fourth auxiliary plating portions, which is advantageous for improving the thickness uniformity of the conductive layer around the light-emitting substrate.

[0081] The above describes the design of auxiliary plating in different regions of the light-emitting substrate with reference to different drawings, but the designs of auxiliary plating in different regions may be integrated on the same light-emitting substrate. As shown in Figure 13, the first auxiliary plating 103 / 203 / 303 / 403 may be arranged in the light-emitting region of the light-emitting substrate 500, the second auxiliary plating 106 and the third auxiliary plating 107 may be arranged in the bonding region of the light-emitting substrate 500, the fourth auxiliary plating 1 may be arranged on the four process edges, and an annular auxiliary plating 1 may be arranged around the alignment marks. The arrangement of these auxiliary plating 103 / 203 / 303 / 403 may be arranged in the bonding region of the light-emitting substrate 500, the fourth auxiliary plating 106 may be arranged on the four process edges, and an annular auxiliary plating 107 may be arranged around the alignment marks.

[0082] Figure 14 shows a block diagram of a backlight light source 600, which includes a light-emitting substrate as described in any one of the embodiments described above. The backlight light source 600 can be used as a backlight light source for a display device to provide a display light source to the display panel of the display device. Of course, the backlight light source 600 can also be used in any other device that requires a light source, and the embodiments of this disclosure do not particularly limit the use of the backlight light source 600.

[0083] Since the backlight light source 600 can have almost the same technical effects as the light-emitting substrates described in each of the above embodiments, for the sake of brevity, a redundant explanation of the technical effects of the backlight light source 600 will be omitted here.

[0084] Figure 15 shows a block diagram of the display device 700, which includes a light-emitting substrate as described in any one of the embodiments above. In some embodiments, the display device 700 may be a liquid crystal display device, which includes a liquid crystal panel and a backlight light source provided on the non-display side of the liquid crystal panel, the backlight light source including a light-emitting substrate as described in any one of the embodiments above, and can be used for display operation, for example, to achieve HDR dimming. The liquid crystal display device may have a more uniform backlight brightness and a better display contrast. The display device 700 may be any suitable display device, including but not limited to any product or component having a display function, such as a mobile phone, tablet computer, television, display, notebook computer, digital photo frame, navigator, and e-book reader.

[0085] Since the display device 700 can have substantially the same technical effects as the light-emitting substrates described in each of the above embodiments, for the sake of brevity, a redundant explanation of the technical effects of the display device 700 will be omitted here.

[0086] Figure 16 shows a flowchart of the method 800 for manufacturing a light-emitting substrate, and the method 800 is applicable to the light-emitting substrate described in any one of the embodiments described above. Using the light-emitting substrate 100 shown in Figure 1 as an example, the method 800 may include the following steps.

[0087] S801: Provides a base 10 including multiple light-emitting regions E.

[0088] S802: A connecting line 102 and a first auxiliary plating portion 103 are formed within each light-emitting region E of the base 10.

[0089] S803: A light-emitting element 101 is attached to the side of the first auxiliary plating section 103 away from the base 10 and the connecting wire 102 of each light-emitting region E. The connecting wire 102 is configured to connect the light-emitting elements 101 within each light-emitting region E, and the first auxiliary plating section 103 is electrically insulated from the connecting wire 102 and the light-emitting elements 101.

[0090] As shown in Figure 1, if the first auxiliary plating portion 103 is not provided on the light-emitting substrate 100, there are almost no other signal lines near the connection line 102 in the light-emitting region E, resulting in a large blank area near the connection line 102, which causes the connection line 102 to become an island wiring. Furthermore, since the line width of the signal line VLED is clearly larger than the line width of the connection line 102, the non-uniformity of the thickness and distribution of this wiring poses a significant problem for the additive plating method. Consequently, the thickness of the connection line 102 formed by the additive plating method is clearly larger than the thickness of other signal lines on the light-emitting substrate 100, which is disadvantageous for achieving thickness uniformity. On the other hand, in the embodiment of this disclosure, by forming the first auxiliary plating portion 103 in the light-emitting region E, the distribution of wiring within the light-emitting region E becomes more uniform, the island effect of the connection line 102 is improved, and the influence of the island effect on the uniformity of plating is reduced or avoided, the thickness of the connection line 102 almost matches the thickness of other signal lines on the light-emitting substrate 100, and the thickness uniformity of the wiring on the light-emitting substrate 100 is improved. When bonding light-emitting elements 101 to the light-emitting substrate 100, the cathode pad and anode pad of the light-emitting elements 101 are at approximately the same height, thereby ensuring that each light-emitting element 101 is stably bonded to the pad and providing a uniform light-emitting effect to the light-emitting substrate 100.

[0091] In some embodiments, the light-emitting substrate further includes a bonding region B, and step S802 may further include a substep of simultaneously forming signal lines, connection lines 102 located in the light-emitting region E and a first auxiliary plating portion 103, a plurality of bonding electrodes 105 located in the bonding region B, a second auxiliary plating portion 106 and a third auxiliary plating portion 107, light-emitting element pads and drive circuit pads by applying a conductive layer on the base 10 and patterning the conductive layer. The signal lines extend in a first direction D1 and include a drive voltage signal line VLED, a common voltage signal line GND, a power supply signal line PWR, an addressing signal line ADDR, and a feedback signal line FB, and each row of light-emitting regions includes one drive voltage signal line VLED, one common voltage signal line GND, one power supply signal line PWR, one addressing signal line ADDR, and one feedback signal line FB. The second auxiliary plating portion 106 is located on both sides of the multiple bonding electrodes 105 in the second direction D2, and is electrically insulated from the multiple bonding electrodes 105. The second direction D2 intersects with the first direction D1, for example, the first direction D1 is the vertical direction in the figure, and the second direction D2 is the horizontal direction in the figure. The third auxiliary plating portion 107 is located on the side away from the light-emitting region E of the multiple bonding electrodes 105, and is electrically insulated from the multiple bonding electrodes 105. The third auxiliary plating portion 107 is elongated, and the length L1 of the third auxiliary plating portion 107 in the second direction D2 is greater than the length L2 over which the multiple bonding electrodes 105 straddle the second direction D2. The third auxiliary plating portion 107 may or may not be connected to the second auxiliary plating portion 106.

[0092] The connection line 102, the first auxiliary plating portion 103, the drive voltage signal line VLED, the common voltage signal line GND, the power signal line PWR, the addressing signal line ADDR, the feedback signal line FB, the light-emitting element pad, and the drive circuit pad are formed from the same conductive layer using a single mask. The material of the conductive layer may be any suitable material, for example, copper. In related technologies, the above wiring is usually formed by two conductive layers. Compared to a double conductive layer process, the single-layer conductive layer process according to the embodiment of this disclosure is more optimized and less expensive.

[0093] In some embodiments, method 800 may further include the steps of forming elongated fourth auxiliary plating portions on four process edges of a base, wherein the orthographic projection of each of the four process edges onto the base lies within the orthographic projection of each of the four fourth auxiliary plating portions onto the base, and cutting the four process edges. By providing elongated fourth auxiliary plating portions on all four process edges, the entire periphery of the light-emitting substrate can be covered with the fourth auxiliary plating portions, which is advantageous for improving the uniformity of the thickness of the conductive layer around the light-emitting substrate.

[0094] Figure 17 shows a more detailed schematic diagram of the method for manufacturing a light-emitting substrate, and the method will be described below with reference to Figure 17.

[0095] S901: A single buffer layer PVX0 is fabricated on the base by a sputtering process. This buffer layer PVX0 can reduce the influence of the conductive layer on the stress of the base in subsequent processes, thereby reducing the warpage of the base. The base may be, for example, a glass substrate.

[0096] S902: A first conductive layer is manufactured on the buffer layer PVX0 by a sputtering process, and this first conductive layer can function as a seed layer for a subsequent thicker conductive layer for plating. The first conductive layer may be a copper layer.

[0097] S903: A patterned photoresist is formed on the side away from the base of the first conductive layer by processes such as coating, photolithography, and development, to serve as a barrier when the second conductive layer is subsequently formed.

[0098] S904: A second conductive layer is formed on the surface of the first conductive layer that is not shielded by the photoresist using an additive plating method, and the thickness of the second conductive layer is greater than the thickness of the first conductive layer. The second conductive layer may be a copper layer.

[0099] S905: The photoresist is peeled off to expose the first conductive layer.

[0100] S906: The exposed first conductive layer is etched by an etching process to form a patterned conductive layer. The patterned conductive layer may include the connection line 102, the first auxiliary plating portion 103, the drive voltage signal line VLED, the common voltage signal line GND, the power supply signal line PWR, the addressing signal line ADDR, the feedback signal line FB, the light-emitting element pad, and the drive circuit pad.

[0101] Steps S901 to S906 can be achieved with just one mask. Compared to conventional techniques that use two masks, the process using one mask is more optimized and less expensive. The patterned second conductive layer formed by this novel additive plating method allows the ratio of the area of ​​the second conductive layer to the area of ​​the base to be controlled to 30-40%, reducing the cost of the plating process by more than 50% compared to solutions that fill the blank areas of the light-emitting region E with auxiliary plating patterns. This provides a low-cost solution that is feasible for mass production of additive plating methods.

[0102] S907: A white ink process is performed, specifically forming an insulating layer on the side away from the base of the second conductive layer, the insulating layer preventing oxidation of the exposed second conductive layer. The insulating layer may be any suitable material, for example, white ink.

[0103] S908: An electroless nickel-gold plating process is performed, specifically forming a single metal plating layer on the surface that separates from the base of the insulating layer by a chemical oxidation-reduction reaction, and this metal plating layer can protect the exposed second conductive layer in areas not covered by the insulating layer (e.g., light-emitting element pads and drive circuit pads) from oxidation.

[0104] S909: A die bonding process is performed to bond the light-emitting element 101 to the corresponding pad on the light-emitting substrate.

[0105] Figure 18 shows a schematic diagram of another method for manufacturing a light-emitting substrate, which is almost identical to the method shown in Figure 17, with only a few differences in the steps. For brevity, only the differences between the method in Figure 18 and the method in Figure 17 will be explained below; for common parts, please refer to the explanation in Figure 17.

[0106] The patterned first conductive layer, photoresist, and second conductive layer are formed using the exact same method as in steps S901 to S906.

[0107] S907': Perform the OSP (Organic Solderability Preservatives) process. Specifically, an organic soldering protective film is formed on the side of the second conductive layer away from the base. This organic soldering protective film protects the second conductive layer and prevents oxidation of the exposed second conductive layer. Under the high temperature of subsequent soldering, the organic soldering protective film can be removed with flux, allowing the exposed second conductive layer to quickly bond with the molten solder and form a strong solder joint.

[0108] S908': A white ink process is performed, specifically forming an insulating layer on the side of the organic soldering protective film away from the base, the insulating layer further protecting the second conductive layer and preventing its oxidation. The insulating layer may be any suitable material, for example, white ink.

[0109] S909': A die bonding process is performed to bond the light-emitting element 101 to the corresponding pad on the light-emitting substrate.

[0110] To ensure clarity, terms such as first, second, third, etc., may be used herein to describe various elements, components, regions, layers, and / or parts, but these elements, components, regions, layers, and / or parts are not limited to these terms. These terms are used solely to distinguish one element, component, region, layer, or part from another region, layer, or part. Accordingly, the first element, component, region, layer, or part considered above may be referred to as the second element, component, region, layer, or part without departing from the implications of this disclosure.

[0111] Spatial relative terms such as “row,” “column,” “below,” “above,” “left,” and “right” can be used herein, for convenience of explanation, to describe the relationship between one element or feature illustrated and another (or several) elements or features. To make it clear, these spatial relative terms are intended to cover different orientations of the device during use or operation other than the illustrated orientation. For example, if the device in the figure is inverted, an element described as “below another element or feature” would be oriented as “above another element or feature.” Thus, the exemplary term “below…” can cover both the orientation of being above… and the orientation of being below…. The device may be oriented in other ways (90-degree rotation or other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Also to make it clear, when a layer is described as “between two layers,” there may be only one layer between the two layers, or there may be one or more intermediate layers.

[0112] The terms used herein are intended solely to describe specific embodiments and do not limit the disclosure. As used herein, unless the context expressly specifies otherwise, the singular forms “one,” “one,” and “the” are intended to also include the plural forms. For further understanding, the terms “composes” and / or “includes,” as used herein, specify the presence of such features, wholes, steps, operations, elements, and / or components, but do not exclude the presence of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof, or the addition of one or more other features, wholes, steps, operations, elements, components, and / or groups thereof. As used herein, the terms “and / or” include any and all combinations of one or more of the associated enumerated items. In the descriptions herein, any reference to terms such as “one embodiment” and “another embodiment” means that the specific features, structures, materials, or properties described in conjunction with that embodiment are included in at least one embodiment of the disclosure. In this specification, illustrative descriptions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, any one or more of the specific features, structures, materials, or properties described herein can be combined as appropriate in any example or instance. Notwithstanding that they do not contradict each other, those skilled in the art can combine or link different examples or instances and their features as described herein.

[0113] To ensure clarity, when an element or layer is described as "on another element or layer," "connected to another element or layer," "coupled to another element or layer," or "adjacent to another element or layer," it may be directly on another element or layer, directly connected to another element or layer, directly coupled to another element or layer, or directly adjacent to another element or layer, and an intermediate element or layer may exist. Conversely, when an element is described as "directly in another element or layer," "directly connected to another element or layer," "directly coupled to another element or layer," or "directly adjacent to another element or layer," no intermediate element or layer exists. However, in no case should "on top of..." or "directly on top of..." be interpreted as requiring one layer to completely cover the layer below.

[0114] Examples of the disclosure described herein will be explained with reference to schematic diagrams (and intermediate structures) of idealized embodiments thereof. Accordingly, variations in the illustrated shapes are conceivable, for example, as a result of manufacturing techniques and / or tolerances. Accordingly, the examples of the disclosure should not be construed as being limited to specific shapes of the regions illustrated herein, and should include, for example, variations in shape due to manufacturing. Accordingly, the illustrated regions are essentially illustrative, and their shapes are not intended to illustrate the actual shapes of regions of the device or to limit the scope of the disclosure.

[0115] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as those commonly understood by those skilled in the art. For clarity, terms as defined in commonly used dictionaries should be interpreted as having the meaning consistent with their meaning in their respective fields and / or in the context of this specification, and not as idealized or overly formal unless explicitly defined and interpreted herein.

[0116] While embodiments for carrying out the invention of this disclosure have been described above, the scope of protection of this disclosure is not limited thereto. Changes and substitutions that a person skilled in the art can easily conceive without departing from the technical scope disclosed herein should be included in the scope of protection of this disclosure. Accordingly, the scope of protection of this disclosure should be in accordance with the scope of protection of the claims described above. [Explanation of Symbols]

[0117] 10 base 11 Light-emitting element 100 Light-emitting substrates 101 Light-emitting element 102 connecting wire 103 First auxiliary plating section 105 Bonding electrodes 106 Second auxiliary plating section 107 Third auxiliary plating section 108 Alignment Marks 109 Annular auxiliary plating section 110 Drive Circuit 200 light-emitting substrates 203 First auxiliary plating section 300 Light-emitting substrates 303 First auxiliary plating section 400 Light-emitting substrates 403 First auxiliary plating section 500 light-emitting substrates 600 backlight light sources 700 Display device 1031 Main body 1031A 1st end 1031B 2nd end 1032 Sub-section 1061 Electrode 2031 Main body 2031A First Edge 2031B Second Edge 2031C Side Edge 2032A Sub-section 1 2032B Second Subsection 2033 Aperture 3031 Main body 3032 Third Sub-section 3033 Section 4 3034 Aperture 4033 Aperture

Claims

1. A light-emitting substrate, A base containing multiple light-emitting regions, Multiple light-emitting elements located within each of the multiple light-emitting regions, A connecting line located within each light-emitting region and configured to connect the light-emitting elements within each light-emitting region, A light-emitting substrate including a first auxiliary plating portion located within each light-emitting region and electrically insulated from the connecting wire and the light-emitting element.

2. Each light-emitting region includes a region occupied by the connecting line and a blank region not occupied by the connecting line, the first auxiliary plating portion is located in the blank region, the first auxiliary plating portion includes a main body portion extending along a first direction, the main body portion divides the blank region into a first portion and a second portion, the area of ​​the first portion and the area of ​​the second portion are substantially equal, the light-emitting substrate according to claim 1.

3. The light-emitting substrate according to claim 2, wherein the first auxiliary plating portion further includes a sub-portion extending in a second direction and connected to the main body portion, and the first direction and the second direction intersect.

4. The light-emitting substrate according to claim 3, wherein the main body of the first auxiliary plating portion includes a first end and a second end facing each other in the first direction, the first end is closer to a connecting line located in the same light-emitting region as the first auxiliary plating portion than the second end, and the sub portion is connected to the second end of the main body.

5. The light-emitting substrate according to claim 2, wherein the first auxiliary plating portion has an open ring structure.

6. The light-emitting substrate according to claim 5, wherein the first auxiliary plating portion further includes a sub-portion extending in a second direction and connected to the main body portion, the first direction and the second direction intersect, and the main body portion is a rectangular ring including an opening, thereby constituting the open ring structure.

7. The main body of the first auxiliary plating portion includes a first edge and a second edge facing each other in the first direction, and a side edge connecting the first edge and the second edge, the opening is located on the side edge, and the first edge is closer to the connecting line located in the same light-emitting region as the first auxiliary plating portion than the second edge. The light-emitting substrate according to claim 6, wherein the sub-part includes a first sub-part and a second sub-part, the first sub-part is connected to the second edge and side edge of the main body, the second sub-part is connected to the side edge of the main body and is closer to the second edge than to the first edge, and the opening is located between the first sub-part and the second sub-part.

8. The first auxiliary plating portion includes three third sub-parts extending in the first direction and four fourth sub-parts extending in the second direction, the first and second directions intersect, two of the four fourth sub-parts include openings, and the third sub-parts and the fourth sub-parts are connected, thereby forming an L-shaped open ring structure for the contour of the first auxiliary plating portion. The light-emitting substrate according to claim 5, wherein any two adjacent third sub-parts among the three third sub-parts are spaced approximately equal apart, and any two adjacent fourth sub-parts among the four fourth sub-parts are spaced approximately equal apart.

9. Bonding area and, A plurality of bonding electrodes located within the bonding region, The light-emitting substrate according to any one of claims 1 to 8, further comprising: a second auxiliary plating portion located on both sides of the plurality of bonding electrodes in a second direction and electrically insulated from the plurality of bonding electrodes.

10. The light-emitting substrate according to claim 9, wherein the second auxiliary plating portion includes a plurality of auxiliary plating electrodes, the width of each auxiliary plating electrode in the second direction is equal to the width of each bonding electrode in the second direction, and the distance between any two adjacent auxiliary plating electrodes among the plurality of auxiliary plating electrodes is equal to the distance between any two adjacent bonding electrodes among the plurality of bonding electrodes.

11. The light-emitting substrate according to claim 9, further comprising a third auxiliary plating portion located on the side of the plurality of bonding electrodes away from the light-emitting region and electrically insulated from the plurality of bonding electrodes, wherein the third auxiliary plating portion is elongated, and the length of the third auxiliary plating portion in the second direction is greater than the length of the plurality of bonding electrodes spanning in the second direction.

12. The light-emitting substrate according to claim 11, wherein the third auxiliary plating portion is connected to the second auxiliary plating portion.

13. The light-emitting substrate according to claim 11, wherein the third auxiliary plating portion is not connected to the second auxiliary plating portion, and the distance between the third auxiliary plating portion and the second auxiliary plating portion is equal to the distance between any two adjacent bonding electrodes among the plurality of bonding electrodes.

14. Alignment marks and The light-emitting substrate according to any one of claims 1 to 8, further comprising an annular auxiliary plating portion surrounding the alignment mark and electrically insulated from the alignment mark.

15. The light-emitting substrate according to claim 14, wherein one annular auxiliary plating portion surrounds one alignment mark.

16. The light-emitting substrate according to claim 14, wherein one annular auxiliary plating portion surrounds a plurality of alignment marks.

17. It further includes a plurality of drive voltage signal lines extending in the first direction, The aforementioned multiple light-emitting regions are arranged in multiple rows and columns, and each light-emitting region in a column includes one drive voltage signal line, and multiple connection lines located in the same column are connected to the same drive voltage signal line. Each connecting line located within the light-emitting region and the drive voltage signal line connected to the connecting line have a first distance from the first auxiliary plating portion located within the light-emitting region. The first auxiliary plating portion is located on the same layer as the connecting wire and the drive voltage signal wire. The light-emitting substrate according to any one of claims 9-13, wherein the second auxiliary plating portion is located on the same layer as the bonding electrode, the connecting line, and the drive voltage signal line.

18. The light-emitting substrate according to claim 17, wherein each light-emitting region includes a region occupied by the connecting line and a blank region not occupied by the connecting line, the first auxiliary plating portion is located in the blank region and has an open ring structure, and the line width of the first auxiliary plating portion is greater than or equal to the line width of the drive voltage signal line.

19. A plurality of drive circuits, each light-emitting region includes one drive circuit, the drive circuit is connected to a light-emitting element located within the light-emitting region, and each drive circuit in each row of light-emitting regions is sequentially cascaded with the plurality of drive circuits. The light-emitting substrate according to claim 17, further comprising a plurality of common voltage signal lines extending in the first direction, wherein each light-emitting region of a row includes one common voltage signal line, and the common voltage signal line is connected to the ground terminal of each drive circuit within the light-emitting region of the row.

20. A plurality of power signal lines extending in the first direction, wherein each light-emitting region of the row includes one power signal line, and the power signal line is connected to a plurality of power signal lines connected to the power terminals of each drive circuit within the light-emitting region of the row. A plurality of addressing signal lines extending in the first direction, wherein each light-emitting region of the column includes one addressing signal line, and the addressing signal line is connected to a plurality of addressing signal lines connected to the address terminal of the first stage drive circuit within the light-emitting region of the column, The light-emitting substrate according to claim 19, further comprising a plurality of feedback signal lines extending in the first direction, wherein each light-emitting region of a row includes one feedback signal line, and the feedback signal line is connected to the output terminal of the final stage drive circuit within the light-emitting region of the row.

21. The light-emitting substrate according to claim 20, wherein the distance between the drive voltage signal line in the light-emitting region of each row and the feedback signal line in the light-emitting region of another row adjacent to the light-emitting region of the row is equal to the first distance.

22. The light-emitting substrate according to claim 21, wherein the first interval is approximately 200 μm.

23. The light-emitting substrate according to claim 20, wherein the plurality of light-emitting elements are arranged in multiple rows and columns, and the drive voltage signal line, the common voltage signal line, and the feedback signal line extend in the first direction and extend beyond the first row of light-emitting elements, or are flush with at least the first row of light-emitting elements.

24. A backlight light source including a light-emitting substrate according to any one of claims 1 to 23.

25. A display device comprising a light-emitting substrate according to any one of claims 1 to 23.

26. A method for manufacturing a light-emitting substrate, A step of providing a base that includes multiple light-emitting regions, The steps include forming connecting lines and first auxiliary plating portions within each light-emitting region of the base, The process includes the step of attaching connecting wires to each light-emitting region and a light-emitting element to the side of the first auxiliary plating portion that is away from the base, A method for manufacturing a light-emitting substrate, wherein the connecting wires are configured to connect light-emitting elements within each light-emitting region, and the first auxiliary plating portion is electrically insulated from the connecting wires and the light-emitting elements.

27. The light-emitting substrate further includes bonding regions, and the step of forming connecting lines and first auxiliary plating portions within each light-emitting region of the base is, The method further includes the step of applying a conductive layer to the base and patterning the conductive layer to simultaneously form a signal line, the connecting line located in the light-emitting region and the first auxiliary plating portion, a plurality of bonding electrodes located in the bonding region, a second auxiliary plating portion and a third auxiliary plating portion, The signal line extends in a first direction and includes a drive voltage signal line, a common voltage signal line, a power supply signal line, an addressing signal line, and a feedback signal line, and the plurality of light-emitting regions are arranged in multiple rows and columns, and each light-emitting region in each column includes one drive voltage signal line, one common voltage signal line, one power supply signal line, one addressing signal line, and one feedback signal line. The second auxiliary plating portion is located on both sides of the plurality of bonding electrodes in the second direction, is electrically insulated from the plurality of bonding electrodes, and the second direction intersects the first direction. The method according to claim 26, wherein the third auxiliary plating portion is located on the side of the plurality of bonding electrodes away from the light-emitting region, is electrically insulated from the plurality of bonding electrodes, the third auxiliary plating portion is elongated, and the length of the third auxiliary plating portion in the second direction is greater than the length of the plurality of bonding electrodes spanning in the second direction.

28. The step of applying a conductive layer to the base and patterning the conductive layer is, The steps include forming a first conductive layer on the base, The steps include forming a patterned photoresist on the side of the first conductive layer away from the base, A step of forming a second conductive layer on the surface of the first conductive layer that is not shielded by the photoresist by an additive plating method, wherein the thickness of the second conductive layer is greater than the thickness of the first conductive layer. The step of peeling off the photoresist, The method according to claim 27, comprising the step of etching the exposed first conductive layer.

29. The method according to claim 28, wherein the ratio of the area of ​​the second conductive layer to the area of ​​the base is approximately 30% to 40%.

30. The base includes four process edges, and the method is A step of forming elongated fourth auxiliary plating portions on four process edges of the base, wherein the orthographic projection of the four process edges onto the base is within the orthographic projection of each of the four fourth auxiliary plating portions onto the base, The method according to any one of claims 26-29, further comprising the step of cutting the four process edges.

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