Microelectronic devices including contact structures, and related electronic systems and methods

Abstract

The microelectronic device includes a laminated structure comprising alternating conductive and insulating structures arranged in tiers. Each tier individually comprises a conductive structure and an insulating structure. The microelectronic device includes a staircase structure having steps including the lateral ends of the tiers, and contacts on the steps at various heights of the staircase structure. The contacts include a liner material. The microelectronic device includes a conductive plug structure located beneath the liner material of the contacts and including a lateral portion within voids in at least some of the conductive structures, and a vertical portion above the lateral portion. Related electronic systems and methods are also disclosed.

Description

[Technical Field]

[0001] [Claiming priority] This application takes priority on the filing date of U.S. Patent Application No. 18 / 427,720, filed on 30 January 2024, which claims the benefit under Section 119(e) of U.S. Patent Provisional Patent Application No. 63 / 491,410, filed on 21 March 2023, each of which is incorporated herein by reference in whole.

[0002] This disclosure relates to the field of design and manufacture of microelectronic devices in general, in various embodiments. More specifically, this disclosure relates to microelectronic devices (e.g., memory devices such as 3D NAND memory devices) that include a stepped structure and contact structures at various step heights of the stepped structure, and also to electronic systems and methods for forming such microelectronic devices. [Background technology]

[0003] A constant goal of the microelectronics industry has been to increase the recording density (e.g., the number of memory cells per memory die) of memory devices such as non-volatile memory devices (e.g., NAND flash memory devices). One way to increase the recording density in non-volatile memory devices is to utilize vertical memory array (also called "3D memory array") architectures. Conventional vertical memory arrays include vertical memory strings extending through openings in one or more conductive stacked structures that include tiers of conductive and insulating structures. Each vertical memory string may include at least one select device coupled in series to a contiguous combination of vertically stacked memory cells. Such a configuration allows for a greater number of switching devices (e.g., transistors) to be installed per unit of die area (i.e., length and width of the utilization surface used) compared to structures with conventional planar (e.g., 2D) arrangements of transistors, by building the array upward (e.g., vertically) on the die.

[0004] A vertical memory array architecture generally includes an electrical connection between the conductive structures of the tiers of the conductive stacked structure of the memory device and the access lines (e.g., word lines) so that the memory cells of the vertical memory array can be uniquely selected for write, read, or erase operations. One way of forming such an electrical connection includes forming a so-called “staircase” (or “staircase step”) structure at the edge (e.g., horizontal end) of the tiers of the conductive stacked structure of the memory device. The staircase structure includes individual “steps” that define a contact area of ​​the conductive structure where a conductive contact structure may be located to provide electrical access to the conductive structure. The conductive contact structure is formed to contact the step, physically and electrically, to provide electrical access to the conductive structure associated with each step. Since the steps are installed at various heights within the staircase structure, the conductive contact structures are formed within an opening that exhibits a high aspect ratio (HAR).

[0005] [Disclosure] Embodiments described herein include microelectronic devices comprising a staircase structure and a contact structure at various step heights of the staircase structure, and also include associated electronic systems and methods for forming such microelectronic devices. According to one embodiment described herein, the microelectronic device includes a laminated structure comprising alternating conductive and insulating structures arranged in tiers, each comprising a conductive structure and an insulating structure individually; a staircase structure having steps including lateral ends of the tiers; contacts located on the steps at various heights of the staircase structure and comprising a liner material; and a conductive plug structure below the liner material of the contacts, comprising a lateral portion in a void in at least some of the conductive structures and a vertical portion above the lateral portion.

[0006] A method for forming a microelectronic device according to an additional embodiment described herein includes forming a pre-layer structure comprising a vertically alternating arrangement of insulating material and sacrificial material arranged in a pre-tier; forming a dielectric material on a stepped structure within the pre-layer structure, wherein the stepped structure has steps including the lateral ends of the pre-tier of the pre-layer structure; replacing the sacrificial material with a conductive structure; forming openings extending through the dielectric material and exposing portions of the conductive structure at the steps of the stepped structure; selectively forming the conductive material in voids in the conductive structure and in openings for forming conductive plug structures, wherein each conductive plug structure comprises a lateral portion in voids in at least some of the conductive structures and a vertical portion above the lateral portion; and forming conductive contacts on the steps of the stepped structure, wherein each conductive contact comprises a liner material and additional conductive material, respectively, in the openings and above the conductive material of the conductive plug structure.

[0007] According to further embodiments described herein, an electronic system includes a processor operably coupled to input and output devices, and a microelectronic device operably coupled to the processor, the microelectronic device including a laminated structure having a vertically alternating arrangement of conductive and insulating structures arranged in tiers, a stepped structure within the laminated structure having steps including lateral edges of the tiers, a contact structure terminating at the steps of the stepped structure, a conductive plug between the steps of the stepped structure and the liner material of the contact structure, and a conductive filler material circumferentially surrounding at least some of the conductive plugs, the conductive filler material being between vertically opposing portions of the conductive material within at least some of the conductive structures of the laminated structure. [Brief explanation of the drawing]

[0008] [Figure 1A]A simplified partial longitudinal cross-sectional view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 1B] A simplified partial longitudinal cross-sectional view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 1C] A simplified partial longitudinal cross-sectional view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 1D] A simplified partial longitudinal cross-sectional view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 1E] A simplified partial top view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 1F] A simplified partial longitudinal cross-sectional view showing various processing steps of a method for forming a microelectronic device according to an embodiment of the present disclosure. [Figure 2] A simplified partial cutaway perspective view of a microelectronic device according to an embodiment of the present disclosure. [Figure 3] A block diagram of an electronic system according to an embodiment of the present disclosure.

Embodiments for Carrying Out the Invention

[0009] The following description provides specific details, such as material composition, shape, and size, in order to provide a complete disclosure of embodiments of this disclosure. However, those skilled in the art will understand that embodiments of this disclosure can be carried out without using these specific details. In fact, embodiments of this disclosure can be carried out in connection with conventional microelectronic device manufacturing techniques used in the relevant industry. In addition, the following description does not constitute a complete process flow for manufacturing microelectronic devices (e.g., memory devices such as NAND flash memory devices). The structures described below do not constitute a complete microelectronic device. Only the processing operations and structures necessary for understanding embodiments of this disclosure are detailed below. Additional operations to construct a complete microelectronic device from such structures can be carried out by conventional manufacturing techniques.

[0010] As used herein, the terms “vertical,” “longitudinal,” “horizontal,” and “lateral” are based on the main plane of the structure and are not necessarily defined by the Earth’s gravitational field. A “horizontal” or “lateral” direction is substantially parallel to the main plane of the structure, and a “vertical” or “longitudinal” direction is substantially perpendicular to the main plane of the structure. The main plane of the structure is defined by the faces of the structure that have a relatively large area compared to the other faces of the structure. In relation to the figure, a “horizontal” or “lateral” direction may be perpendicular to the indicated “Z” axis, parallel to the indicated “X” axis, and / or parallel to the indicated “Y” axis, and a “vertical” or “longitudinal” direction may be parallel to the indicated “Z” axis, perpendicular to the indicated “X” axis, and perpendicular to the indicated “Y” axis.

[0011] As used herein, the term “intersection” means, including, the location where two or more features (e.g., regions, structures, materials, openings, devices) or, in lieu thereof, two or more parts of one feature meet. For example, the intersection between a first feature extending in a first direction (e.g., the X direction) and a second feature extending in a second direction different from the first direction (e.g., the Y direction, the Z direction) may be the location where the first feature and the second feature meet.

[0012] As used herein, the term “substantially” with respect to a given parameter, property, or condition means and includes to the extent that a person skilled in the art would understand that the given parameter, property, or condition is satisfied with some degree of variability, such as within tolerance. For example, depending on the specific parameter, property, or condition that is substantially satisfied, the parameter, property, or condition may be satisfied by at least 90.0%, at least 95.0%, at least 99.0%, at least 99.9%, or even up to 100.0%.

[0013] As used herein, “about” or “approximately” with respect to a particular parameter includes that parameter, and any variation from that parameter to a degree that a person skilled in the art can understand is within the tolerance for that parameter. For example, “about” or “approximately” with respect to a certain parameter may include additional values ​​within the range of 90.0% to 108.0% of that parameter, such as those within the range of 95.0% to 105.0%, 97.5% to 102.5%, 99.0% to 101.0%, 99.5% to 100.5%, and 99.9% to 100.1%.

[0014] As used herein, "conductive material" means and includes one or more of the following electrical conductive materials: metals (e.g., tungsten (W), titanium (Ti), molybdenum (Mo), niobium (Nb), vanadium (V), hafnium (Hf), tantalum (Ta), chromium (Cr), zirconium (Zr), iron (Fe), ruthenium (Ru), osmium (Os), cobalt (Co), rhodium (Rh), iridium (Ir), nickel (Ni), palladium (Pd), platinum (Pt), copper (Cu), silver (Ag), gold (Au), aluminum (Al)), alloys (e.g., cobalt-based alloys, iron-based alloys, nickel-based alloys, iron-nickel-based alloys, cobalt-nickel-based alloys, iron-cobalt-based alloys, cobalt-nickel-iron-based alloys, aluminum-based alloys, copper-based alloys, magnesium (Mg)-based alloys, titanium-based alloys, steels, low-carbon steels, stainless steels), conductive metal-containing materials (e.g., conductive metal nitrides, conductive metal silicides, conductive metal carbides, conductive metal oxides), and conductive doped semiconductor materials (e.g., conductive doped polysilicon, conductive doped germanium (Ge), conductive doped silicon germanium (SiGe)). In addition, "conductive structure" means and includes a structure formed from and including a conductive material.

[0015] As used herein, "insulating material" means at least one dielectric oxide material (e.g., silicon dioxide (SiO x ), phosphosilicate glass, borosilicate glass, borophosphosilicate glass, fluorosilicate glass, aluminum oxide (AlO x ), hafnium oxide (HfO x ), niobium oxide (NbO x ), titanium oxide (TiO x ), zirconium oxide (ZrO x ), tantalum oxide (TaO x ), and magnesium oxide (MgO x )) and at least one dielectric nitride material (e.g., silicon nitride (SiN y)) at least one dielectric oxynitride material (e.g., silicon oxynitride (SiO x N y )), and at least one dielectric carboxynitride material (e.g., silicon carboxynitride (SiO2) x C z N y This means, including, electrical insulating materials such as one or more of the following formulas (e.g., SiO2). x AlO x , HfO x NbO x , TiO x SiN y SiO x N y SiO x C z N y ) represents a material containing, in average proportions, "x" atoms of one element, "y" atoms of another element (e.g., Si, Al, Hf, Nb, Ti), "z" atoms of an additional element (if any). These formulas represent relative atomic ratios rather than strict chemical structures, and insulating materials may contain one or more stoichiometric compounds and / or one or more non-stoichiometric compounds, and the values ​​of "x", "y", and "z" (if any) may be integers or non-integers. As used herein, "non-stoichiometric compounds" means, and include, compounds that cannot be expressed in proportions of clearly defined natural numbers and have an elemental composition that violates the law of definite proportions. In addition, "insulating structure" means, and includes, structures formed from insulating materials and structures containing insulating materials.

[0016] According to embodiments described herein, a microelectronic device includes a laminated structure comprising alternating conductive and insulating structures arranged in tiers, each tier individually comprising a conductive structure and an insulating structure. The laminated structure includes a staircase structure having steps that include the lateral ends of the tiers. Contacts (e.g., conductive contact structures) are located on the steps at various heights of the staircase structure, and conductive plug structures are located beneath the liner material of the contacts. The conductive plug structure includes a lateral portion within a void (e.g., a central region in the vertical direction) in at least some of the conductive structures, and a vertical portion above the lateral portion. In some embodiments, the conductive plug structure comprises a different material composition from the conductive structures of the laminated structure. The lateral extent of each lateral portion of the conductive plug structure may be greater than the lateral extent of each of its vertical portions, and the lateral extents of each lateral portion of the conductive plug structure may differ from one another across the laminated structure. The conductive plug structure can facilitate improved alignment (e.g., vertical alignment) between the contacts of the laminated structure and the conductive structure, and can facilitate the formation of electrical connections between the contacts of the laminated structure and the conductive structure.

[0017] Microelectronic devices can be formed by selectively forming conductive material within voids in a conductive structure and within openings (e.g., contact openings) above a stepped structure, thereby forming a conductive plug structure prior to forming contacts. In some embodiments, the conductive plug structure is formed to contain tungsten, and the conductive structure is formed to contain one or more of titanium, ruthenium, aluminum, and molybdenum. The conductive material can be formed within voids in a conductive structure relatively close to an opening, without the conductive material being formed in additional voids in the conductive structure relatively far from the opening. The lateral portion of the conductive material and the vertical portion of the conductive plug structure can be formed in a single material formation process.

[0018] Conductive plug structures can facilitate the formation of electrical connections between the contacts and conductive structures of a laminated structure without causing an undesirable increase in the overall width (e.g., horizontal footprint) of the laminated structure. In addition, the formation of conductive plug structures can promote improved electrical insulation between vertically adjacent conductive structures in the laminated structure, thereby reducing the occurrence of bridges (e.g., electrical connections) between two or more vertically adjacent conductive structures. In some examples, bridges between vertically adjacent conductive structures in conventional microelectronic devices can occur due to so-called "over-etching" during the manufacturing of conventional contacts. Bridges can be reduced by forming conductive plug structures prior to the formation of contacts, compared to when conventional contacts are formed only on top of conventional conductive structures.

[0019] Furthermore, conventional conductive structures may contain voids (e.g., seams) during the formation of the laminated structure, which increases the resistance during operation of conventional microelectronic devices. However, forming the lateral portion of the conductive plug structure within the voids in the conductive structure, and forming the vertical portion above the lateral portion of the conductive plug structure prior to the formation of the contacts, can improve the electrical connection between the contacts of the laminated structure and the conductive structure, thereby reducing the resistance (e.g., electrical resistance level) of the conductive material of the conductive structure without significantly impairing conductivity. Moreover, forming the conductive plug structure with a different material composition (e.g., a tungsten-containing material) than the material composition of the conductive structure of the laminated structure (e.g., a non-tungsten-containing material such as titanium, ruthenium, aluminum, or molybdenum) can also reduce resistance. By forming the conductive plug structure (e.g., its lateral portion), voids in the conductive structure can be reduced, and the structural stability of the laminated structure can be increased.

[0020] Figures 1A to 1F illustrate a method for forming a microelectronic device structure according to embodiments of the present disclosure. Figures 1A to 1D are simplified longitudinal cross-sectional views of the microelectronic device structure 100. Figure 1E shows an enlarged portion of a simplified overhead view of the microelectronic device structure 100 along the cross-sectional line EE of Figure 1D, and Figure 1F shows an enlarged portion of a longitudinal cross-sectional view of box F of Figure 1D. In Figure 1A, the microelectronic device structure 100 may include a laminated structure 101 perpendicular to a source structure 102 (e.g., a source plate, at least one source wire) and an insulating material 104 perpendicular to the source structure 102. The insulating material 104 may be interposed perpendicularly between the source structure 102 and the laminated structure 101. The source structure 102 may be formed from and may include a semiconductor material doped with, for example, at least one P-type conductive material (e.g., polysilicon doped with at least one P-type dopant such as boron, aluminum, and gallium or more) or at least one N-type conductive material (e.g., polysilicon doped with at least one N-type dopant such as arsenic, phosphorus, and antimony). The insulating material 104 may be an insulating material (e.g., SiO2 x It may be formed from and may contain an insulating carbon-containing material.

[0021] The laminated structure 101 includes an alternating vertical arrangement (e.g., in the Z direction) of at least two different materials. For example, the laminated structure 101 (e.g., a conductive laminated structure) may include an alternating vertical arrangement of insulating structures 106 and conductive structures 108 arranged in tiers 110 (e.g., conductive tiers). Each tier 110 may individually include one or more insulating structures 106 and one or more conductive structures 108 directly perpendicular to the insulating structures 106. In some embodiments, the insulating material 104 acts as the bottom insulating structure 106 that is perpendicular to the source structure 102 (e.g., directly above the source structure 102) so that no additional insulating material is present between the source structure 102 and the laminated structure 101. The insulating structures 106 of the laminated structure 101 may also be referred to herein as “insulating materials”, and the conductive structures 108 of the laminated structure 101 may also be referred to herein as “conductive materials”. In some embodiments, the number (e.g., quantity) of tiers 110 in the stacked structure 101 ranges from 32 tiers 110 to 256 tiers 110. In some embodiments, the stacked structure 101 includes 128 tiers 110. However, the disclosure is not limited in this way, and the stacked structure 101 may include different quantities of tiers 110. The stacked structure 101 may include at least one (e.g., one, two, or more) deck structures located vertically above the source structure 102. For example, the stacked structure 101 may include a single-deck structure, or alternatively, a dual-deck structure for a 3D memory device (e.g., a 3D NAND flash memory device).

[0022] The insulating structure 106 is, for example, made of at least one dielectric oxide material (e.g., SiO2). x Phosphosilicate glass, borosilicate glass, borophosphosilicate glass, fluorosilicic acid glass, AlO x , HfO x NbO x , TiO x , ZrO x TaO x , and MgO xIt may be formed from and may include at least one dielectric material (one or more of the following). In some embodiments, the insulating structure 106 is formed from and may include silicon dioxide (SiO2).

[0023] The conductive structure 108 may be formed from and may include conductive materials that non-limitingly contain n-type doped polysilicon, p-type doped polysilicon, undoped polysilicon, or metals. In some embodiments, the conductive structure 108 contains n-type doped polysilicon. In other embodiments, the conductive structure 108 contains tungsten (w). In other embodiments, the conductive structure 108 contains a material that contains one or more of titanium (Ti), ruthenium (Ru), aluminum (Al), and molybdenum (Mo).

[0024] The conductive structure 108 of the laminated structure 101 can be used as an access line (e.g., word line) structure (e.g., access line plate, word line plate) of the microelectronic device structure 100. The conductive structure 108 can be formed individually to at least partially replace the initial sacrificial material (e.g., nitride material) by a so-called "replacement gate" or "gate last" process. Alternatively, the microelectronic device structure 100 may be formed by a so-called "gate first" process, in which a tier 110 having alternating conductive structures 108 and insulating structures 106 is formed prior to the formation of additional structures, as described in more detail below. For example, a tier 110 having alternating conductive structures 108 and insulating structures 106 exists in the microelectronic device structure 100 prior to the formation of additional structures.

[0025] The microelectronic device structure 100 may be formed to include a staircase structure 112 within a staircase region of a stacked structure 101. The staircase structure 112 may be formed, for example, by etching each of the tiers 110 to define a step 114 at each lateral end of the tier 110. In some embodiments, the staircase structure 112 is formed prior to forming the conductive structure 108 through a replacement gate process. A liner material 116 may be formed so as to be above the staircase structure 112 in the vertical direction (e.g., in the Z direction), and then a dielectric material 118 may be formed to fill the valleys 120 (e.g., spaces, openings) above the staircase structure 112 in the vertical direction. The staircase structure 112 (and the valleys 120 partially defined by the staircase structure 112) has a stepped cross-sectional shape in the ZX plane, as shown in Figure 1A. The stepped cross-sectional shape of the staircase structure 112 (and the valleys 120) may be defined by the geometric configuration of the steps 114 of the staircase structure 112. Although Figure 1A illustrates only a single staircase structure 112, additional staircase structures 112 may be formed before, simultaneously with, or after the formation of staircase structure 112. For example, a second staircase structure may be formed opposite staircase structure 112.

[0026] The liner material 116 may be formed so as to be above the staircase structure 112, the uppermost tier 110 of the insulating structure 106, and the conductive structure 108 in the vertical direction (e.g., in the Z direction). As shown in Figure 1A, the liner material 116 may include an upper portion extending horizontally (e.g., in the X direction) across the upper surface of the step 114 and substantially covering it, and a lateral portion extending vertically (e.g., in the Z direction) across the sides of the step 114 and substantially covering it. The liner material 116 may be formed to include a substantially continuous material (e.g., substantially continuous liner material) that is in contact with or above the step 114 of the staircase structure 112. In other embodiments, the liner material 116 includes an upper portion that is in contact with the upper surface of the step 114, without including a lateral portion that covers the sides of the step 114.

[0027] The liner material 116 may include one or more insulating liner materials (e.g., a first liner material 116a (Figure 1F) and a second liner material 116b (Figure 1F) on top of the first liner material 116a). For example, the first liner material 116a may be formed from and include at least one insulating material, such as one or more of the materials described above with respect to the insulating structure 106. The second liner material 116b may exhibit etching selectivity with respect to the insulating structure 106, the dielectric material 118, and the first liner material 116a of the liner material 116. The second liner material 116b may be, for example, silicon nitride (Si3N4), silicon oxycarbide (SiO2). x C y ), silicon oxynitride (SiO x N y ), silicon hydride oxycarbide (SiC x O y H z ), or silicon oxycarbonite (SiO x C y N z The second liner material 116b may be formed from and include one or more of the following: silicon nitride (Si3N4) material containing silicon atoms, carbon atoms, oxygen atoms and hydrogen atoms, silicon oxide (SiO3N4) x This may include low-k dielectric materials such as dielectric nitride materials or dielectric oxide materials, which have a dielectric constant (k) lower than that of SiO2 material or carbon-doped silicon oxide material. In some embodiments, the first liner material 116a of the liner material 116 contains SiO2, and the second liner material 116b of the liner material 116 contains Si3N4.

[0028] The upper dielectric material 122, which functions as a masking material, may be placed on top of the uppermost tier of the tiers 110 of the laminated structure 101. The upper dielectric material 122 may be formed from and may include, for example, one or more insulating materials such as phosphosilicate glass (PSG), borosilicate glass (BSG), fluorosilicate glass (FSG), borophosphosilicate glass (BPSG), and silicon dioxide (SiO2). In some embodiments, the upper dielectric material 122 has the same material composition as the insulating structure 106 (e.g., SiO2).

[0029] In some examples, voids 124 (e.g., gaps) may be formed within the dielectric material 118 during the fabrication of the microelectronic device structure 100. For example, the dielectric material 118 may contain one or more of the voids 124 during the formation of the dielectric material 118 within a valley 120 exhibiting a high aspect ratio (HAR). Furthermore, additional voids 126 (e.g., gaps, seams) may be formed within at least some regions 128 (e.g., a central region in the vertical direction) of the conductive structure 108 during the fabrication of the laminated structure 101. For example, the conductive structure 108 may contain one or more of the additional voids 126 within region 128 as a result of material formation (e.g., growth, deposition) processes used to form the conductive material (e.g., W) of the conductive structure 108. In some examples, the additional voids 126 may be located at the site of residual portions of sacrificial material (e.g., nitride material) of a tier 110 that has been removed during a replacement gate process.

[0030] Referring again to Figure 1A, the opening 130 (e.g., a contact opening) may be formed within the dielectric material 118 above the stepped structure 112. The opening 130 extends vertically through the upper dielectric material 122, the dielectric material 118, and the liner material 116, exposing the conductive structure 108 of the laminated structure 101 and the step 114 of the stepped structure 112. The opening 130 may have any suitable lateral cross-sectional shape, such as substantially circular, substantially square, substantially elliptical, or substantially triangular cross-sectional shapes. In some embodiments, each of the openings 130 individually exhibits a substantially circular cross-sectional shape with a substantially circular cross-sectional area. Although four openings 130 are shown in Figure 1A for clarity, additional openings 130 may be formed within the dielectric material 118 above the laminated structure 101.

[0031] The opening 130 may extend from the upper surface of the upper dielectric material 122 to or within the uppermost conductive structure 108 of each step 114 of the stepped structure 112. For example, the lower vertical boundary of the opening 130 may be defined by the upper surface of the conductive structure 108 (e.g., step 114 of the stepped structure 112). Alternatively or in addition to this, at least some of the openings 130 may extend below the upper surface of the conductive structure 108 and into a portion of its conductive material (e.g., the upper portion), exposing additional voids 126 within region 128. The openings 130 may be individually formed to intersect with additional voids 126 within region 128 of the conductive structure 108 at intersection 129. The horizontal boundary of the opening 130 may be defined by the respective surfaces (e.g., sides) of the upper dielectric material 122, the dielectric material 118, the liner material 116, and the remaining portion of the conductive material of the conductive structure 108. The opening 130 may be configured to receive a structure that is later formed (for example, its size is determined and its shape is given), as shown in Figure 1D.

[0032] At least some of the openings 130 have different depths and / or aspect ratios (e.g., height-to-width ratio, depth-to-width ratio) than the other openings 130. Some or all of the aspect ratios may be high aspect ratios (HARs), for example, with respect to the shallowest opening 130 being at least about 3:1 (e.g., at least about 10:1). The openings 130 in the figure are shown with vertical side walls, but in some embodiments the side walls may be angled (e.g., tapered).

[0033] Referring to Figure 1B, a conductive material (e.g., one or more of the conductive materials described above with respect to the conductive material of the conductive structure 108, such as W) is selectively formed (e.g., grown) only on the conductive structure 108 exposed within the opening 130 to form the selective conductive material 132. For example, after forming the opening 130, native oxides are removed from the exposed conductive structure 108 (e.g., at the bottom of the opening 130), and then the exposed surface of the conductive structure 108 is surface-treated to prepare the exposed surface for the formation (e.g., growth, deposition) of the selective conductive material 132. The selective conductive material 132 can then be selectively formed (e.g., grown, deposited) only on the exposed portion of the conductive structure 108 without being formed on the upper dielectric material 122, the dielectric material 118 including the portion of the dielectric material 118 in the void 124, and the liner material 116.

[0034] The selective conductive material 132 may be crystalline (e.g., single crystal, polycrystalline) or amorphous, either entirely or partially. In addition, the material composition of the selective conductive material 132 may be substantially the same as or different from the material composition of the conductive material of the conductive structure 108. For example, the selective conductive material 132 may have a different material structure (e.g., a crystalline structure) than the material structure of the conductive structure 108. In some embodiments, the selective conductive material 132 contains tungsten, and the conductive structure 108 contains one or more of titanium, ruthenium, aluminum, and molybdenum, such that the conductive structure 108 is substantially tungsten-free.

[0035] The selective conductive material 132 may be formed from and may include a material composition adjusted to reduce (e.g., minimize) additional voids 126 that may occur during the formation of the conductive structure 108 of the laminated structure 101. Thus, the material composition of the selective conductive material 132 may be selected to improve the properties during the formation (e.g., deposition, growth) of such material. The selective conductive material 132 may include a single material or, instead, multiple (e.g., two or more) materials with clear boundaries. For example, the formation of the selective conductive material 132 may include forming a first portion (e.g., a liner) having a first material composition adjacent to (e.g., directly in contact with) the conductive material of the conductive structure 108, and then forming a second portion having a second material composition adjacent to (e.g., directly in contact with) the first portion. The formation of the selective conductive material 132 may be used to reduce the possibility of voids, gaps, and other occurrences during the formation of the laminated structure 101, and to improve metal-to-metal contact between the selective conductive material 132 and the conductive material of the conductive structure 108 without allowing (e.g., promoting) the accumulation of the selective conductive material 132 along the sidewalls of the dielectric material 118, for example, within the opening 130.

[0036] In some embodiments, the selective conductive material 132 is formed using PVD or CVD processes. The selective conductive material 132 may be formed from and may include a material configured to improve the formation and conductivity of the material. For example, the selective conductive material 132 may be formed from and may include a single-phase material (e.g., either a β-phase tungsten material or an α-phase tungsten material). The selective conductive material 132 may be formed (e.g., grown, deposited) adjacent to (e.g., directly in contact with) an exposed surface (e.g., top, side) of the conductive structure 108. The conductive material of the conductive structure 108 may be used as a seed material for forming the selective conductive material 132. In some embodiments, the phase (e.g., β-phase, α-phase) of the selective conductive material 132 depends at least partially on the phase (e.g., β-phase, α-phase) of the material of the conductive structure 108, for example, in embodiments that include a precursor material of the selective conductive material 132 grown in direct contact with the conductive structure 108.

[0037] In yet another embodiment, the selective conductive material 132 is formed using ALD treatment. In some such embodiments, the selective conductive material 132 is formed from a precursor containing tungsten hexafluoride (WF6) and silane (SiH4) for forming the selective conductive material 132. Thus, in some embodiments, the selective conductive material 132 is formed from a halogen-containing precursor. In some such embodiments, the selective conductive material 132 contains at least some halogen (e.g., fluorine).

[0038] For example, a precursor material (e.g., a semiconducting liner material) may be formed from and include at least one semiconducting material, such as silicon material, silicon germanium material, boron material, germanium material, gallium arsenide, gallium nitride material, and indium phosphide material, or more thereof. In a non-limiting example, the precursor material may be formed from and include at least one silicon material. As used herein, the term “silicon material” means and includes materials containing elemental silicon or silicon compounds. The precursor material may be formed from and include, for example, one or more single-crystal silicon and polycrystalline silicon. In some embodiments, the precursor material includes polycrystalline silicon.

[0039] The precursor material may be formed to exhibit desired dimensions (e.g., height, width) at least partially based on the desired dimensions of the selected conductive material 132, and may be formed using one or more conventional conformal deposition processes, such as one or more of conventional conformal CVD and conventional ALD processes. In some embodiments, the precursor material is doped (e.g., impregnated) with one or more dopants (e.g., chemical species). The dopants of the doped precursor material may include materials that promote or facilitate the subsequent formation of tungsten (e.g., β-phase tungsten) from the doped precursor material, as will be further detailed below. In some embodiments, the dopant includes at least one N-type dopant, such as one or more of phosphorus (P), arsenic (Ar), antimony (Sb), and bismuth (Bi). In additional embodiments, the dopant includes at least one P-type dopant, such as boron (B), aluminum (Al), and gallium (Ga). In further embodiments, the dopant comprises one or more of the following: carbon (C), fluorine (F), chlorine (Cl), bromine (Br), hydrogen (H), deuterium (2H), helium (He), neon (Ne), and argon (Ar).

[0040] The precursor material of the selective conductive material 132 may be doped with at least one dopant to form a doped precursor material using conventional treatments not detailed herein (e.g., conventional injection treatment, conventional diffusion treatment). As a non-limiting example, one or more phosphorus-containing species (e.g., phosphorus atoms, phosphorus-containing molecules, phosphide ions, phosphorus-containing ions) may be injected into the precursor material to form a doped precursor material. Phosphorus-containing species include, for example, phosphide ions (P 3- ) include. As another non-limiting example, one or more arsenic-containing species (e.g., arsenic atoms, arsenic-containing molecules, arsenic ions, arsenic-containing ions) may be injected into a precursor material to form a doped precursor material. The arsenic-containing species may be, for example, arsenic ions (As 3+) includes. In some embodiments, after dopant injection, the amount of dopant in the doped precursor material is in the range of about 0.001 atomic% to about 10 atomic%. Individual portions of the doped precursor material of the selected conductive material 132 may individually exhibit a substantially uniform distribution of dopant within their semiconducting material, or they may individually exhibit a non-uniform distribution of dopant within their semiconducting material.

[0041] Subsequently, the portion of the doped precursor material can be converted into a selective conductive material 132 containing tungsten and a dopant from the doped precursor material. In this conversion process, the portion of the doped precursor material containing the dispersed dopant (e.g., a silicon material such as polycrystalline silicon) can be converted to tungsten relatively faster than the portion of the undoped semiconducting material.

[0042] At least some of the tungsten in the selective conductive material 132 may include β-phase tungsten. β-phase tungsten has a metastable A15 cubic structure. The particles of β-phase tungsten may generally have a cylindrical shape. The tungsten contained in the selective conductive material 132 may exist only in the β phase, or it may exist in both the β(β) phase and the α(α) phase. If present, the α-phase tungsten has a metastable body-centered cubic structure. The particles of α-phase tungsten may generally have an isometric shape. When the selective conductive material 132 contains both β-phase tungsten and α-phase tungsten, the amount of β-phase tungsten contained therein may differ from the amount of α-phase tungsten contained therein, or it may be substantially the same as the amount of α-phase tungsten contained therein. In some embodiments, the amount of β-phase tungsten contained in the selective conductive material 132 is greater than the amount of α-phase tungsten contained therein. For example, at least the majority of the tungsten contained in the selective conductive material 132 (e.g., more than 50%, such as about 60%, 70%, 80%, 90%, 95%, or 99%) may be in the β-phase.

[0043] The dopants contained in the selective conductive material 132 may be substantially the same as the dopants contained in the doped precursor material employed to form the selective conductive material 132. For example, the dopants used to form the selective conductive material 132 (e.g., N-type dopants, P-type dopants, other dopants) may be present in the selective conductive material 132 after its formation. In some embodiments, the selective conductive material 132 comprises β-phase tungsten doped with one or more of As and P. The dopants in the selective conductive material 132 may support (e.g., facilitate and promote) the stability of its β-phase tungsten.

[0044] The selective conductive material 132 may exhibit a substantially uniform distribution of its dopants, or it may exhibit a non-uniform distribution of its dopants. The distribution of dopants in the selective conductive material 132 may be substantially the same as, or different from, the distribution of dopants in the doped precursor material.

[0045] The selective conductive material 132 can be formed by treating a precursor material doped with one or more chemical species that facilitate the conversion of its semiconducting material (e.g., silicon material) to tungsten (e.g., β-phase tungsten, α-phase tungsten). In a non-limiting example, if the doped precursor material includes a doped silicon material such as doped polycrystalline silicon, the doped precursor material can be treated with tungsten hexafluoride (WF6) to form the selective conductive material 132. The silicon (Si) in the doped precursor material reacts with WF6 to produce tungsten (W) and silicon tetrafluoride (SiF4). The resulting SiF4 is removed as a gas. The resulting W remains as a dopant in the doped precursor material, forming the selective conductive material 132. The doped precursor material can be treated with WF6 at temperatures ranging from about 200°C to about 500°C, for example, using a conventional CVD apparatus.

[0046] Continuing to refer to Figure 1B, the selected conductive material 132 may be in direct physical contact with the conductive structure 108 within the horizontal portion of the additional void 126 (e.g., within region 128 of the conductive structure 108) and within the vertical portion of the opening 130. Thus, the selected conductive material 132 extends in at least one horizontal direction (e.g., X direction, Y direction) and a vertical direction substantially orthogonal to the horizontal direction (e.g., Z direction). The formation of the selected conductive material 132 forms a lateral portion 134 within the additional void 126 within region 128 of the conductive structure 108, and a vertical portion 136 within the lower portion of the opening 130, thereby forming a conductive plug structure 137. The conductive plug structure 137 includes the lateral portion 134 (e.g., conductive filler material) and the vertical portion 136 (e.g., conductive plug, plug region) of the selected conductive material 132.

[0047] The selected conductive material 132 of the conductive plug structure 137 can be formed (e.g., in a single forming operation) to a desired lateral width (e.g., horizontal width) and a desired thickness (e.g., vertical height). The selected conductive material 132 can at least partially (e.g., substantially) fill additional voids 126 in the vicinity of the opening 130 such that the lateral width of the lateral portion 134 is relatively larger than the lateral width of the opening 130. The lateral portion 134 of the selected conductive material 132 can be substantially surrounded by the conductive material of the conductive structure 108. For example, the selected conductive material 132 can be adjacent (e.g., directly adjacent) to the conductive material of the conductive structure 108 in one or more horizontal (e.g., X, Y directions) and vertical (e.g., Z direction) directions. In addition, the selected conductive material 132 can at least partially (e.g., substantially) fill the lower portion of at least some (e.g., each) of the opening 130. In some embodiments, an additional portion of the selected conductive material 132 substantially encloses the lower portion of the opening 130 (for example, substantially laterally).

[0048] In some embodiments, additional voids 126 within region 128 of the conductive structure 108 may be enlarged (e.g., laterally recessed, vertically recessed) through one or more material removal processes prior to the formation of selected conductive material 132 therein. For example, residual portions of the conductive material of the conductive structure 108 may remain near the opening 130 and at least partially “pinch” and close (e.g., seal) the region between the opening 130 and the additional voids 126. Residual portions of the conductive material of the conductive structure 108 near the opening 130 may be selectively removed, such as by etching, to recess the conductive material of the conductive structure 108 within region 128 and enlarge the additional voids 126. Thus, portions of the conductive material centrally located within the conductive structure 108 may be recessed (e.g., removed), and additional portions of the conductive material of the conductive structure 108 may be located on the outer periphery of the conductive structure 108 (e.g., adjacent to the insulating structure 106). The selected conductive material 132 may be formed adjacent to (e.g., directly adjacent to) the exposed surfaces of the conductive material of the conductive structure 108, in the region 128 of the conductive structure 108 to form the lateral portion 134, and in the lower portion of the opening 130 to form the vertical portion 136 of the conductive plug structure 137. The selected conductive material 132 may substantially completely fill the remainder of the region 128 of the conductive structure 108 to extend substantially sufficiently between the exposed surfaces (e.g., top, bottom, and side) of the conductive material of the conductive structure 108.

[0049] In some embodiments, at least some vertical portions 136 of the conductive plug structure 137 extend vertically higher than the liner material 116 such that the upper surface of the vertical portion 136 is positioned vertically higher than the upper surface of the liner material 116 in step 114, and therefore vertically higher than the upper surface of the conductive structure 108. In some embodiments, the thickness of the vertical portion 136 of the conductive plug structure 137 is one times or greater than the initial thickness of each of the conductive structures 108. Individual vertical portions 136 of the selected conductive material 132 may be formed to the same thickness as the grown (e.g., deposited) conductive material. In additional embodiments, the upper surface of the vertical portion 136 of the conductive plug structure 137 may be substantially coplanar with the upper surfaces of one or more of the liner material 116 and the conductive structure 108 in step 114.

[0050] In some embodiments, the formation of the opening 130 results in some loss of material from the exposed portion (e.g., upper portion) of the conductive structure 108. In some such embodiments, the vertical portion 136 of the selected conductive material 132 formed within the opening 130 extends to varying heights higher than the top surface of each conductive structure 108 and to varying depths lower than the top surface of the conductive structure 108. In some embodiments, at least some of the vertical portions 136 of the conductive plug structure 137 are recessed vertically relative to the liner material 116 such that the uppermost boundary (e.g., top surface) of the vertical portion 136 is lower vertically than the lowermost boundary (e.g., bottom surface) of the liner material 116 (e.g., at or below the height of the top surface of the conductive structure 108 in step 114). In some such embodiments, the conductive plug structure 137 has substantially no liner material on the sides of the vertical portion 136 of the conductive plug structure 137. In yet another embodiment, the vertical portion 136 of the conductive plug structure 137 is adjacent to the conductive structure 108 horizontally but not vertically. For example, at least some of the vertical portions 136 of the conductive plug structure 137 may be vertically recessed compared to the upper surface of the conductive structure 108 such that the upper surface of the vertical portion 136 is vertically lower than the upper surface of the conductive structure 108 in step 114.

[0051] As shown in Figure 1B, the additional void 126 within region 128 of the conductive structure 108 may include a first region 126a (e.g., an unfilled region) and a second region 126b (e.g., a filled region). The first region 126a of the additional void 126 may be located away from the opening 130 (e.g., insulated and relatively far away), and thus away from the lateral portion 134 of the selected conductive material 132. Thus, at least some (e.g., each) of the first region 126a may substantially not contain the selected conductive material 132. The second region 126b may be located near the opening 130 (e.g., relatively nearby) and may be at least partially (e.g., substantially completely) filled with the selected conductive material 132 when forming the lateral portion 134 of the selected conductive material 132. Since the selected conductive material 132 is formed through the opening 130, its lateral portion 134 may be formed in the second region 126b without being formed in the first region 126a of the additional void 126.

[0052] In some embodiments, the selected conductive material 132 within the second region 126b of the additional void 126 is positioned substantially in the center along the horizontal centerline of the conductive structure 108. The horizontal centerline of the selected conductive material 132 is substantially aligned with the horizontal centerline of the conductive structure 108, and substantially equal portions of the conductive material of the conductive structure 108 may be located above and below the selected conductive material 132. However, the disclosure is not limited in this way, and the additional void 126 may be located in additional locations (e.g., relatively close to the insulating structure 106 of the laminated structure 101). For example, the horizontal centerline of the selected conductive material 132 may be positioned higher or lower than the horizontal centerline of the conductive structure 108, such that opposing portions of the conductive material of the conductive structure 108 include unequal thickness (e.g., height) above and below the selected conductive material 132 within region 128 of the conductive structure 108. In some embodiments, the additional void 126 is directly adjacent to one or more of the insulating structures 106.

[0053] During the formation of the conductive material for the conductive structure 108, additional voids 126 (e.g., seams) within at least some regions 128 of the conductive structure 108 may be formed non-uniformly as a result of the material formation operation during the formation of the laminated structure 101. The location and size (e.g., vertical size, horizontal size, volume) of the additional voids 126 may vary within the laminated structure 101 of the microelectronic device structure 100. Thus, the location of the second region 126b of the additional voids 126, including the lateral portion 134 of the selected conductive material 132, may vary (e.g., irregularly) across the conductive structure 108 of the tier 110. The first region 126a may or may not communicate with (e.g., be physically connected to) the second region 126b. Furthermore, individual conductive structures 108 within the various tiers 110 of the laminated structure 101 may or may not contain additional voids 126. The lateral portion 134 within the second region 126b of the additional void 126 may be adjacent to (e.g., adjacent vertically, adjacent horizontally, or in direct contact with) the vertical portion 136 of the selected conductive material 132. By forming the selected conductive material 132 within the region 128 of the conductive structure 108 in a second processing operation, the conductive structure 108 containing the selected conductive material 132 may have fewer voids in the tier 110 compared to a conventional conductive structure formed using a single processing operation (e.g., a single deposition operation of a single conductive material).

[0054] With respect to Figure 1C, after forming the lateral portion 134 and vertical portion 136 of the selected conductive material 132 (also referred to herein as the conductive plug structure 137), the liner material 138 of the contact structure 142 (Figure 1D) may be formed within the opening 130 (e.g., conformally). The liner material 138 may be continuous along the vertical distance between the upper dielectric material 122 and the dielectric material 118. The liner material 138 may be formed from and may include insulating materials such as oxide materials, nitride materials or oxynitride materials. In some embodiments, the liner material 138 is ALD SiO xThis includes high-quality silicon dioxide materials. The liner material 138 can be substantially uniform and substantially conformal when deposited. For example, the liner material 138 can be a substantially uniform and substantially conformal silicon dioxide material (e.g., a highly uniform and highly conformal silicon dioxide material). The liner material 138 can be prepared to form openings of HAR, such as openings with HAR of at least about 20:1, at least about 50:1, at least about 100:1, or at least about 1000:1, without forming voids. The liner material 138 can exhibit etching selectivity with respect to the surrounding material, including the liner material 116. The liner material 138 is formed by conventional techniques such as CVD or ALD. In some embodiments, the liner material 138 is formed by plasma-enhanced ALD (PEALD).

[0055] In some embodiments, so-called "punch-through" etching is subsequently performed to remove portions of the liner material 138 and expose the portion below the vertical portion 136 of the conductive plug structure 137. In some embodiments, the bottom surface of the remaining portion of the liner material 138 extends to or beyond the top surface of the vertical portion 136 of the conductive plug structure 137. In other embodiments, one or more portions of the liner material 116 and the dielectric material 118 are laterally exposed below the bottom surface of the liner material 138, such that the liner material 138 terminates at a position higher than the height level of the vertical portion 136 of the conductive plug structure 137. By forming the selective conductive material 132 prior to the formation of the liner material 138 and the implementation of its punch-through etching, over-etching can be reduced compared to conventional forming processes.

[0056] Referring to Figure 1D, after the liner material 138 is formed, an additional conductive material 140 may be formed within the opening 130 to form a contact structure 142. The additional conductive material 140 may be formed to substantially fill the remaining portion of the opening 130 that extends vertically through the upper dielectric material 122 and dielectric material 118 to the conductive plug structure 137 (e.g., its vertical portion 136). The contact structure 142 includes the liner material 138 and the additional conductive material 140.

[0057] In some embodiments, the vertical portion 136 of the conductive plug structure 137 is directly positioned between the liner material 138 and additional conductive material 140 of the contact structure 142 and the lateral portion 134 of the conductive plug structure 137. The contact structure 142 can be vertically separated from the conductive structure 108 of the laminated structure 101 by the vertical portion 136 of the conductive plug structure 137. For example, the vertical portion 136 of the conductive plug structure 137 may be vertically interposed between the contact structure 142 and the conductive structure 108 so that the additional conductive material 140 is vertically separated (e.g., in the Z direction) from the conductive material of the conductive structure 108 by the conductive plug structure 137. In other embodiments, the additional conductive material 140 of the contact structure 142 extends to and contacts the conductive structure 108. For example, the additional conductive material 140 of the contact structure 142 may directly contact (e.g., directly physically contact) the conductive material of the conductive structure 108 when the vertical portion 136 of the conductive plug structure 137 is horizontally adjacent to the conductive structure 108 and is recessed vertically compared to its upper surface.

[0058] In some embodiments, the additional conductive material 140 extends vertically through a portion (e.g., the whole) of the liner material 116 when the vertical portion 136 of the conductive plug structure 137 is recessed vertically compared to the liner material 116 (e.g., a second liner material 116b (Figure 1F)). The additional conductive material 140 may therefore be substantially surrounded by the liner material 138 and may also be in physical contact (e.g., direct physical contact) with the vertical portion 136 of the conductive plug structure 137. For example, contact structures 142 may extend through the dielectric material 118 and, in some embodiments, through the liner material 116, to individually touch the upper surface of the vertical portion 136 of the conductive plug structure 137. Other sides (e.g., sidewalls) of the contact structures 142 may individually exhibit a tapered vertical shape in which the upper portion of the individual contact structures 142 has a larger limiting dimension (e.g., width) than its lower portion.

[0059] The additional conductive material 140 may comprise one or more of the conductive materials described above with respect to the conductive structure 108. In some embodiments, the additional conductive material 140 of the contact structure 142 comprises the same material composition as the conductive structure 108 (e.g., W). In some embodiments, the material composition of the conductive plug structure 137 differs from the material composition of one or more (e.g., each) of the conductive structures 108 of the laminated structure 101 and the material composition of the additional conductive material 140 of the contact structure 142. The upper surface of the contact structure 142 may be planarized for further processing on the contact structure 142, for example, by one or more CMP operations to promote or enhance the planarity of the upper boundary (e.g., top surface) of the contact structure 142. Four contact structures 142 are shown in Figure 1D for clarity, but additional contact structures 142 may be formed within the microelectronic device structure 100.

[0060] Figure 1E shows a magnified portion of a simplified overhead view of the microelectronic device structure 100 along the section line EE of Figure 1D. For clarity and to facilitate understanding of the drawing and its associated descriptions, surrounding materials are not shown in Figure 1E. It is understood that the lateral portion 134 of the selected conductive material 132 of the conductive plug structure 137 is recessed vertically within the region 128 (Figure 1D) of the conductive structure 108, but for clarity, it is shown with a dashed line to indicate the location of the lateral portion 134 in an additional void 126 (Figure 1D) relative to the location of the contact structure 142.

[0061] In some embodiments, the vertical portion 136 includes an additional portion 136a of the selected conductive material 132. The additional portion 136a may extend horizontally (e.g., in the X and Y directions) beyond the outer horizontal boundary of the contact structure 142 (e.g., its liner material 138), and therefore beyond the outer horizontal boundary of the vertical portion 136 of the selected conductive material 132, as shown in Figure 1E. The additional portion 136a of the selected conductive material 132 may optionally surround the vertical portion 136 of the selected conductive material 132 laterally on each step 114 (Figure 1D) of the staircase structure 112 (Figure 1D) at a height of one or more of the conductive structure 108 and the first liner material 116a (Figure 1F). Thus, the additional portion 136a may be positioned horizontally near the vertical portion 136 of the selected conductive material 132 and may at least partially (e.g., substantially) surround it.

[0062] In some embodiments, an additional portion 136a of the selective conductive material 132 horizontally surrounds the lower portion of the contact structure 142. In other embodiments, the additional portion 136a extends horizontally beyond the outer horizontal boundary of the contact structure 142 without being positioned horizontally close to the contact structure 142, such that the uppermost surface of the selective conductive material 132 is lower vertically than the liner material 138 of the contact structure 142. In yet another embodiment, the vertical portion 136 of the selective conductive material 132 is below the contact structure 142 vertically, without the additional portion 136a extending horizontally beyond the outer horizontal boundary of the contact structure 142.

[0063] Other configurations are possible, but as shown in Figure 1E, at least a portion of the contact structure 142, including the liner material 138 and the additional conductive material 140, may be located within the horizontal boundary (e.g., horizontal area) of the lateral portion 134 of the conductive plug structure 137. Furthermore, the vertical portion 136 may be located within the horizontal boundary of the lateral portion 134 of the conductive plug structure 137. The lateral dimensions of individual contact structures 142 (e.g., first width W1, diameter in the X direction) may be relatively smaller than the lateral dimensions (e.g., second width W2, diameter in the X direction) of the vertical portion 136 of the conductive plug structure 137 (e.g., additional portion 136a). In other embodiments, the second width W2 is approximately the same size as the first width W1. Since each contact structure 142 may individually exhibit a tapered vertical shape, the second width W2 of the vertical portion 136 of the conductive plug structure 137 may be relatively larger than the first width W1 in the lower portion, without being relatively larger than the first width W1 in the upper portion of the contact structure 142. The lateral dimension (e.g., third width W3, diameter in the X direction) of the lateral portion 134 of the conductive plug structure 137 may be relatively larger than one or more (e.g., each) of the first width W1 and the second width W2. The location and width (e.g., horizontal width) of the additional voids 126 (Figure 1D) may differ from one another within the stacked structure 101 of the microelectronic device structure 100, and the third width W3 of the lateral portion 134 of the conductive plug structure 137 may differ from one another (e.g., different) across the stacked structure 101.

[0064] As an unrestricted example, the first width W1 could be within the range of approximately 80 nm to approximately 200 nm, such as from approximately 80 nm to approximately 100 nm, from approximately 100 nm to approximately 150 nm, or from approximately 150 nm to approximately 200 nm. The second width W2 could be within the range of approximately 100 nm to approximately 250 nm, such as from approximately 100 nm to approximately 150 nm, from approximately 150 nm to approximately 200 nm, or from approximately 200 nm to approximately 250 nm. The third width W3 could be larger than the second width W2 by a multiple between approximately 2 and 10 times (for example, by about one order of magnitude). As an unrestricted example, the second width W2 could be within the range of approximately 110 nm to approximately 180 nm, and the third width W3 could be within the range of approximately 200 nm to approximately 800 nm. For example, the third width W3 can be in the range of approximately 200 nm to approximately 400 nm, approximately 400 nm to approximately 600 nm, or approximately 600 nm to approximately 800 nm, or even larger, depending on the various widths of the additional void 126. Since the lateral portion 134 of the conductive plug structure 137 is within the uppermost conductive structure 108, the third width W3 is such that the horizontal boundary of the lateral portion 134 does not extend horizontally beyond the step 114 (Figure 1D) in at least one direction (e.g., the positive X direction). However, one or more of the lateral portions 134 of the conductive plug structure 137 may extend horizontally (e.g., in the negative X direction) beyond the horizontal boundary of the step 114 above.

[0065] Figure 1F shows an enlarged portion of the longitudinal section of box F in Figure 1D. For clarity and to facilitate understanding of the drawing and its associated descriptions, surrounding materials are not shown in Figure 1F. At least some of the openings 130 (Figure 1D) extend below the top surface 108a of the individual conductive structures 108 and within the conductive material portion (e.g., the upper portion) of the conductive structure 108, and the openings 130 may expose at least some of the additional voids 126 (e.g., the second region 126b) within the region 128 of the conductive structure 108. During the formation of the microelectronic device structure 100, the openings 130 may be formed to extend below the top surface 108a without extending to or beyond the bottom surface 108b of the conductive structure 108. In forming the conductive plug structure 137, the vertical portions 136 of the selected conductive material 132 may extend below the upper surface 108a without extending to or beyond the lower surface 108b of the conductive structure 108. In some embodiments, at least some of the vertical portions 136 of the selected conductive material 132 extend below the upper surface of the lateral portion 134 (for example, within a second region 126b) without extending beyond the lower surface of the lateral portion 134. While it is understood that the selected conductive material 132 may include a single, continuous portion of the conductive material, for simplicity, the lateral portion 134 and the vertical portion 136 are illustrated as separate portions of the selected conductive material 132.

[0066] The vertical portion 136 is in direct contact (e.g., direct physical contact) with the lateral portion 134 of the conductive plug structure 137, and also in direct contact with any additional portion 136a of the conductive plug structure 137, if present. The elongated portion of the lateral portion 134 extends in at least one horizontal direction (e.g., the X direction, the Y direction), and the elongated portion of the vertical portion 136 extends in a vertical direction perpendicular to the horizontal direction (e.g., the Z direction). The lateral portion 134 substantially surrounds the vertical portion 136 of the conductive plug structure 137 in at least one horizontal direction (e.g., substantially surrounds it in the lateral direction). The lateral portion 134 of the conductive plug structure 137 may be formed within the region 128 of the conductive structure 108, and the vertical portion 136 of the conductive plug structure 137 may be formed within the opening 130 (Figure 1D) in a single material forming process. The lateral portion 134 and the vertical portion 136 (including, for example, an additional portion 136a) of the conductive plug structure 137 may have substantially the same material composition, without any immediately recognizable physical interface between them. Alternatively, the lateral portion 134 and the vertical portion 136 of the conductive plug structure 137 may have different material compositions, such that the material composition of the vertical portion 136 (e.g., the plug region) differs from that of the lateral portion 134 of the conductive plug structure 137.

[0067] The lateral portion 134 and vertical portion 136 of the selected conductive material 132 can individually form a roughly "L-shaped" structure of the conductive plug structure 137 in the vicinity of the top conductive structure 108 in each step 114. Thus, the conductive plug structure 137 physically contacts the top conductive structure 108 in step 114 on at least two consecutive sides (e.g., the lateral side and the vertical side). Thus, a multidimensional (e.g., two-dimensional) contact area of ​​the top conductive structure 108 can be exposed for the formation of two corresponding and consecutive sides of the conductive plug structure 137 that contact the conductive structure 108. Exposing the multidimensional contact area of ​​the top conductive structure 108 further increases the available area of ​​the conductive plug structure 137 having one more side (e.g., two sides) for forming the selected conductive material 132.

[0068] As already described with respect to Figure 1B, the first region 126a of the additional void 126 may be away from the opening 130 (Figure 1D) and therefore away from the lateral portion 134 of the selected conductive material 132. The second region 126b may be located near the opening 130 and may be filled at least partially (e.g., substantially) with the selected conductive material 132. Thus, the second region 126b is relatively close to the contact structure 142, while the first region 126a is relatively far from the contact structure 142. As shown in Figure 1F, the second region 126b, including the lateral portion 134 of the selected conductive material 132, may be located within the uppermost conductive structure 108 at each step 114 of the stepped structure 112 and in direct contact with the vertical portion 136 of the conductive plug structure 137. The first region 126a may optionally be located within the conductive structure 108 that is perpendicular to the uppermost conductive structure 108. Thus, the second region 126b may be located below the contact structure 142 and near the end surface of step 114, and the first region 126a may optionally be located below the second region 126b of the additional void 126. In Figure 1F, one step 114 is shown as being defined by two tiers 110, but instead, one step 114 may be defined by one (e.g., only one) tier 110.

[0069] As shown in Figure 1F, the lower surface of the contact structure 142 (e.g., additional conductive material 140 of the contact structure 142) may be in direct contact with the upper surface of the vertical portion 136 of the selected conductive material 132 along the first interface 144 (e.g., the horizontal interface). Furthermore, one or more sides (e.g., transverse sides, horizontal sides) of the vertical portion 136 of the selected conductive material 132 may be in direct contact with the sides of the remaining portion of the conductive structure 108 of the laminated structure 101 (Figure 1D) along the second interface 146 (e.g., the vertical interface).

[0070] The additional portion 136a may optionally be positioned adjacent to the vertical portion 136 of the selected conductive material 132, as shown by the dashed line in Figure 1F, for example, between the top surface 108a of the conductive structure 108 and the outer side wall of the vertical portion 136. The additional portion 136a of the selected conductive material 132 may be positioned vertically above (e.g., vertically overlapping) the top surface 108a of the conductive structure 108 along a third interface 148 (e.g., a horizontal interface). Thus, the additional portion 136a of the selected conductive material 132 may have a lateral width greater than the lateral width of the contact structure 142. In some embodiments, the upper portion of the conductive structure 108 is substantially surrounded by the selected conductive material 132 of the conductive plug structure 137 on at least three consecutive sides. For example, the lateral portion 134 of the selected conductive material 132 may be below the upper portion of the conductive structure 108 in the vertical direction and may be in direct contact with it, the vertical portion 136 of the selected conductive material 132 may be adjacent to the upper portion of the conductive structure 108 in the horizontal direction and may be in direct contact with it, and an additional portion 136a of the selected conductive material 132 may be above the upper portion of the conductive structure 108 in the vertical direction and may be in direct contact with it.

[0071] In some embodiments, an additional portion 136a of the selected conductive material 132 extends horizontally over the upper surface 108a of the conductive structure 108, such that the additional portion 136a is non-uniform (e.g., irregular, asymmetrical) depending on the formation of the selected conductive material 132 within the opening 130 (Figure 1D) and within the second region 126b of the additional void 126. In other embodiments, the side surface (e.g., vertical sidewall) of the vertical portion 136 of the selected conductive material 132 is substantially aligned with one or more (e.g., each) of the liner material 116 and the conductive structure 108, without the additional portion 136a that is above the conductive structure 108 in the vertical direction.

[0072] As shown in Figure 1F, the first liner material 116a of the liner material 116 (Figure 1D) may be above the step 114 in the perpendicular direction, and the second liner material 116b may be above the first liner material 116a in the perpendicular direction and may be in direct contact with it. The thickness of the first liner material 116a may be in the range of about 5 nm to about 15 nm, such as about 5 nm to about 10 nm or about 10 nm to about 15 nm, and the thickness of the second liner material 116b may be in the range of about 20 nm to about 40 nm, such as about 20 nm to about 30 nm or about 30 nm to about 40 nm. However, the disclosure is not limited in this way, and these thicknesses may differ from those described above. In some embodiments, the thickness of the second liner material 116b is greater than the thickness of the first liner material 116a.

[0073] In some embodiments, the upper portion of the conductive plug structure 137 extends beyond the upper surface 108a of the conductive structure 108 by about 10 nm or less (e.g., in the range of about 2 nm to about 10 nm) such that the upper surface of the vertical portion 136 of the conductive plug structure 137 at the first interface 144 is vertically recessed compared to the lower surface of the second liner material 116b. In some such embodiments, the conductive plug structure 137 extends vertically within the first liner material 116a and the conductive structure 108 without extending vertically to or inside the second liner material 116b. In other embodiments, the conductive plug structure 137 extends beyond the upper surface of the first liner material 116a, or instead extends within or beyond the vertical extent of the second liner material 116b.

[0074] The first height H1 of the conductive structure 108 (defined as the vertical dimension between the upper surface 108a and the lower surface 108b of the conductive structure 108) can be in the range of approximately 20 nm to approximately 40 nm, such as approximately 20 nm to approximately 25 nm, approximately 25 nm to approximately 30 nm, approximately 30 nm to approximately 35 nm, or approximately 35 nm to approximately 40 nm. The second height H2 of the conductive plug structure 137 (defined as the vertical dimension between the lower surface of the contact structure 142 and the rest of the conductive structure 108) can be in the range of approximately 25 nm to approximately 50 nm, such as approximately 25 nm to approximately 30 nm, approximately 30 nm to approximately 35 nm, approximately 35 nm to approximately 40 nm, approximately 40 nm to approximately 45 nm, or approximately 45 nm to approximately 50 nm. However, the disclosure is not limited in this way, and this height may differ from those described above. In some embodiments, the second height H2 of the conductive plug structure 137 may be substantially greater than or equal to the first height H1 of the conductive structure 108.

[0075] By forming the conductive plug structure 137 prior to the formation of the contact structure 142, a reduction in the failure rate of electrical connections between the contact structure 142 and the conductive structure 108 of the laminated structure 101 during use and operation of the microelectronic device structure 100 can be facilitated. In some embodiments, the failure rate can be reduced by about 73% or even higher percentages (e.g., about 88%, about 96%) compared to the failure rate of conventional structures of 3D NAND structures. Thus, the reduction in the failure rate can be achieved while the pitch of adjacent structures continues to be scaled down to smaller values, the thickness of the conductive structure 108 (e.g., height in the Z direction) continues to decrease, and the high aspect ratio (HAR) continues to increase.

[0076] Figure 2 is a partial cutaway perspective view of a portion of a microelectronic device 201 (a memory device such as a dual-deck 3D NAND flash memory device) including a microelectronic device structure 200. The microelectronic device structure 200 may be substantially similar to the microelectronic device structure 100 described above with respect to Figures 1A to 1F. As shown in Figure 2, the microelectronic device structure 200 may include a stepped structure 220 (e.g., stepped structure 112 (Figure 1D)) that defines contact areas (e.g., conductive layers, conductive plates such as conductive structure 108 (Figure 1D)) for connecting access lines 206 to conductive tiers 205. The microelectronic device structure 200 may include a vertical string 207 of memory cells 203 coupled in series with each other. The vertical string 207 may extend vertically (e.g., in the Z direction) and perpendicular to the conductive lines and tiers 205, such as the data line 202, source tier 204 (e.g., source structure 102 (Figure 1D)), conductive tier 205, access line 206, first selection gate 208 (e.g., upper selection gate, drain selection gate (SGDs), selection line 209, and second selection gate 210 (e.g., lower selection gate, source selection gate (SGS)). The selection gate 208 may be divided horizontally (e.g., in the Y direction) into a plurality of blocks 232 that are divided horizontally (e.g., in the Y direction) from one another by slots 230.

[0077] Vertical conductive contacts 211 (e.g., contact structure 142 (Figure 1D)) can electrically couple the illustrated components to each other. For example, a selection line 209 may be electrically coupled to a first selection gate 208, and an access line 206 may be electrically coupled to a conductive tier 205. The microelectronic device 201 may also include a control unit 212 located below the memory array, which may include at least one of a string driver circuit, a pass gate, a circuit for gate selection, a circuit for selecting conductive lines (e.g., data line 202, access line 206), a circuit for signal amplification, and a circuit for signal detection. The control unit 212 may be electrically coupled to, for example, a data line 202, a source tier 204, an access line 206, a first selection gate 208, and a second selection gate 210. In some embodiments, the control unit 212 includes a CMOS (complementary metal-oxide-semiconductor) circuit. In such embodiments, the control unit 212 may be characterized as having a “CMOS underarray” (“CuA”) configuration.

[0078] The first selection gate 208 may extend horizontally in a first direction (e.g., the X direction) and may be coupled to each first group of vertical strings 207 of the memory cells 203 at a first end (e.g., the upper end) of the vertical string 207. The second selection gate 210 may be formed in a substantially planar configuration and may be coupled to the vertical string 207 at a second, opposing end (e.g., the lower end) of the vertical string 207 of the memory cells 203.

[0079] A data line 202 (e.g., a bit line) may extend horizontally in a second direction (e.g., the Y direction) at an angle (e.g., orthogonal) to a first direction from which the first selection gate 208 extends. The data line 202 may be coupled to each second group of vertical strings 207 at the first end (e.g., the upper end) of the vertical string 207. The first group of vertical strings 207 coupled to each first selection gate 208 may share a particular vertical string 207 with the second group of vertical strings 207 coupled to each data line 202. Thus, a particular vertical string 207 may be selected at the intersection of a particular first selection gate 208 and a particular data line 202. Thus, the first selection gate 208 may be used to select the memory cell 203 of the vertical string 207 of the memory cell 203.

[0080] Conductive tiers 205 (e.g., word line plates) may extend in each horizontal plane. Conductive tiers 205 may be stacked vertically such that each conductive tier 205 is coupled to all of the vertical strings 207 of the memory cells 203, and the vertical strings 207 of the memory cells 203 extend vertically through the conductive tiers 205. Conductive tiers 205 may be coupled to or form the control gate of the memory cell 203 to which the conductive tier 205 is coupled. Each conductive tier 205 may be coupled to one memory cell 203 of a particular vertical string 207 of the memory cell 203.

[0081] The first selection gate 208 and the second selection gate 210 may operate to select a specific vertical string 207 of a memory cell 203 between a specific data line 202 and a source tier 204. Thus, a specific memory cell 203 may be selected and electrically coupled to the data line 202 by the operation (e.g., by selection) of the appropriate first selection gate 208, second selection gate 210 and conductive tier 205 coupled to the specific memory cell 203.

[0082] The stepped structure 220 may be configured to provide electrical connections between the access lines 206 and the tiers 205 through vertical conductive contacts 211. That is, a particular level of the tiers 205 may be selected via the access lines 206 energized to each conductive contact 211 energized to a particular tier 205. Data lines 202 may be electrically coupled to the vertical strings 207 through a conductive contact structure 234.

[0083] Therefore, in some embodiments, the microelectronic device includes a laminated structure comprising alternating conductive and insulating structures arranged in tiers. Each tier individually comprises a conductive structure and an insulating structure. The microelectronic device includes a staircase structure having steps including the lateral ends of the tiers, and contacts on the steps at various heights of the staircase structure. The contacts include a liner material. The microelectronic device includes a conductive plug structure located beneath the liner material of the contacts, comprising a lateral portion in a void in at least some of the conductive structures, and a vertical portion above the lateral portion.

[0084] Furthermore, in some embodiments, a method for forming a microelectronic device includes forming a pre-layer structure comprising alternating vertical arrangements of insulating material and sacrificial material arranged in pre-tiers, and forming dielectric material on a stepped structure within the pre-layer structure. The stepped structure has steps including the lateral ends of the pre-tiers of the pre-layer structure. The method includes replacing the sacrificial material with a conductive structure, forming openings extending through the dielectric material and exposing portions of the conductive structure at the steps of the stepped structure, and selectively forming the conductive material within voids in the conductive structure and within openings for forming conductive plug structures. The conductive plug structure individually comprises lateral portions within voids and vertical portions above the lateral portions in at least some of the conductive structures. The method includes forming conductive contacts on the steps of the stepped structure. The conductive contacts individually comprise liner material and additional conductive material within openings and above the conductive material of the conductive plug structure.

[0085] Microelectronic devices (e.g., microelectronic device 201) and microelectronic device structures (e.g., microelectronic device structures 100, 200) including the lateral portion 134 and vertical portion 136 of the conductive plug structure 137 adjacent to the contact structure 142 in embodiments of the present disclosure may be used in embodiments of the electronic systems of the present disclosure. For example, Figure 3 is a block diagram of an electronic system 303 according to an embodiment of the present disclosure. The electronic system 303 may include, for example, a computer or computer hardware component, a server or other networking hardware component, a mobile phone, a digital camera, a personal digital assistant (PDA), a portable media (e.g., music) player, for example, an iPad® tablet or a Surface® tablet, an e-reader, a navigation device, or a tablet capable of Wi-Fi communication or cellular communication. The electronic system 303 includes at least one memory device 305. The memory device 305 may include, for example, the microelectronic device structures described herein (e.g., microelectronic device structures 100, 200), or a microelectronic device (e.g., microelectronic device 201) described with respect to Figures 1A to 1F and 2, which includes a lateral portion 134 and a vertical portion 136 of a conductive plug structure 137 adjacent to a contact structure 142.

[0086] The electronic system 303 may further include at least one electronic signal processor device 307 (often referred to as a “microprocessor”). The electronic signal processor device 307 may optionally include embodiments of the microelectronic devices or microelectronic device structures described herein (e.g., one or more of the microelectronic devices 201 or microelectronic device structures 100, 200 described with respect to Figures 1A to 1F and Figure 2). The electronic system 303 may further include one or more input devices 309 for a user to input information to the electronic system 303, such as a mouse, other pointing device, keyboard, touchpad, buttons, or control panel. The electronic system 303 may further include one or more output devices 311 for outputting information to the user (e.g., visual or auditory output), such as a monitor, display, printer, audio output jack, speaker, etc. In some embodiments, the input device 309 and the output device 311 may include a single touchscreen device that can be used both to input information into the electronic system 303 and to output visual information to the user. The input device 309 and the output device 311 may communicate electrically with one or more of the memory device 305 and the electronic signal processor device 307.

[0087] Therefore, in some embodiments, the electronic system includes a processor operably coupled to input and output devices, and a microelectronic device operably coupled to the processor. The microelectronic device includes a laminated structure having a vertically alternating arrangement of conductive and insulating structures arranged in tiers, a staircase structure within the laminated structure having steps including the lateral edges of the tiers, a contact structure terminating at the steps of the staircase structure, a conductive plug between the steps of the staircase structure and the liner material of the contact structure, and a conductive filler material circumferentially surrounding at least some of the conductive plugs. The conductive filler material is located between vertically opposing portions of the conductive material within at least some of the conductive structures of the laminated structure.

[0088] Embodiments of the present disclosure are further characterized, non-limitingly, as described below.

[0089] Embodiment 1: The microelectronic device includes a laminated structure comprising alternating conductive structures and insulating structures arranged in tiers, each containing a conductive structure and an insulating structure; a staircase structure having steps including the lateral ends of the tiers; contacts located on the steps at various heights of the staircase structure and comprising a liner material; and a conductive plug structure located below the liner material of the contacts, comprising a lateral portion in a void in at least some of the conductive structures and a vertical portion above the lateral portion.

[0090] Embodiment 2: A microelectronic device according to Embodiment 1, wherein the vertical portion of the conductive plug structure is directly placed between the contact liner material and the lateral portion of the conductive plug structure, and the conductive plug structure substantially has no liner material in contact with the vertical side wall of the vertical portion of the conductive plug structure.

[0091] Embodiment 3: A microelectronic device according to Embodiment 1 or Embodiment 2, wherein the contacts include a conductive material substantially surrounded by a liner material, and the material composition of the conductive material of the contacts is substantially the same as the material composition of the conductive structure of the laminated structure.

[0092] Embodiment 4: A microelectronic device according to any one of Embodiments 1 to 3, wherein the conductive plug structure includes a material composition different from that of the laminated conductive structure.

[0093] Embodiment 5: A microelectronic device according to any one of Embodiments 1 to 4, wherein the conductive plug structure includes an additional portion extending beyond the horizontal boundary of the contact, the additional portion being directly adjacent in a perpendicular direction to the conductive structure of the laminated structure.

[0094] Embodiment 6: A microelectronic device according to any one of Embodiments 1 to 5, wherein the conductive plug structure extends at a position lower than the upper surface of the conductive structure of the laminated structure, and each conductive plug structure individually exhibits a height greater than or equal to the height of each of the conductive structures.

[0095] Embodiment 7: A microelectronic device according to any one of Embodiments 1 to 6, wherein the conductive plug structure individually forms L-shaped structures near the best conductive structure that partially defines the step.

[0096] Embodiment 8: A microelectronic device according to any one of Embodiments 1 to 7, wherein the lateral width of each lateral portion of the conductive plug structure is greater than the lateral width of its vertical portion, and the lateral widths of each lateral portion of the conductive plug structure differ from one another across the stacked structure.

[0097] Embodiment 9: A microelectronic device according to any one of Embodiments 1 to 8, wherein the conductive structure in the step is in direct physical contact with the conductive plug structure, and the upper portion of the conductive structure is substantially surrounded by additional conductive material of the conductive plug structure on at least three consecutive sides.

[0098] Embodiment 10: A method for forming a microelectronic device, comprising: forming a pre-layer structure comprising a vertically alternating arrangement of insulating material and sacrificial material arranged in a pre-tier; forming a dielectric material on a stepped structure within the pre-layer structure, wherein the stepped structure has steps including the lateral ends of the pre-tier of the pre-layer structure; replacing the sacrificial material with a conductive structure; forming openings extending through the dielectric material and exposing portions of the conductive structure at the steps of the stepped structure; selectively forming the conductive material in voids in the conductive structure and in openings for forming conductive plug structures, wherein each conductive plug structure comprises a lateral portion in voids in at least some of the conductive structures and a vertical portion above the lateral portion; and forming conductive contacts on the steps of the stepped structure, wherein each conductive contact comprises a liner material and additional conductive material, respectively, in the openings and above the conductive material of the conductive plug structure.

[0099] Embodiment 11: A method of Embodiment 10, further comprising forming a conductive plug structure to include tungsten, and forming a conductive structure to include one or more of titanium, ruthenium, aluminum, and molybdenum, wherein the conductive structure is substantially free of tungsten.

[0100] Embodiment 12: A method according to either Embodiment 10 or 11, wherein selectively forming a conductive material includes substantially completely filling the remaining voids in a conductive structure relatively close to the opening without forming a conductive material in additional voids in a conductive structure relatively far from the opening.

[0101] Embodiment 13: A method according to any one of Embodiments 10 to 12, further comprising selectively forming an additional portion of conductive material extending beyond the horizontal boundary of a conductive contact, wherein the additional portion of conductive material is formed to be in direct physical contact with the conductive structure and the vertical portion of the conductive plug structure.

[0102] Embodiment 14: A method according to any one of Embodiments 10 to 13, wherein selectively forming a conductive material includes forming a lateral portion of a conductive plug structure within a void in a conductive structure and forming a vertical portion of a conductive plug structure within an opening, all within a single material forming process.

[0103] Embodiment 15: The method according to Embodiments 10 to 14, further comprising selectively removing a portion of the conductive structure adjacent to an opening prior to selectively forming the conductive material, wherein the selective formation of the conductive material includes growing the conductive material along the exposed surface of the remaining portion of the conductive structure.

[0104] Embodiment 16: An electronic system comprising a processor operably coupled to an input device and an output device, and a microelectronic device operably coupled to the processor, wherein the microelectronic device comprises a laminated structure having a vertically alternating arrangement of conductive and insulating structures arranged in tiers, a staircase structure within the laminated structure having steps including lateral edges of the tiers, a contact structure terminating at the steps of the staircase structure, a conductive plug between the steps of the staircase structure and the liner material of the contact structure, and a conductive filler material circumferentially surrounding at least some of the conductive plugs, wherein the conductive filler material is located between vertically opposing portions of the conductive material within at least some of the conductive structures of the laminated structure.

[0105] Embodiment 17: The electronic system of Embodiment 16, wherein the conductive filler material substantially surrounds the conductive plug in at least one horizontal direction, and the conductive filler material has a larger lateral dimension than the contact structure.

[0106] Embodiment 18: An electronic system according to Embodiment 16 or 17, wherein the conductive plug is in direct contact with the conductive filler material, and the upper surface of the conductive plug extends at a position higher than the upper surface of the conductive structure in the step.

[0107] Embodiment 19: An electronic system according to any one of Embodiments 16 to 18, wherein the conductive plug and the conductive filler material are in physical contact with one of the conductive structures of the lateral and vertical laminated structures.

[0108] Embodiment 20: An electronic system according to any one of Embodiments 16 to 19, further comprising a nitride liner material located on a step of a staircase structure, wherein the uppermost boundary of the conductive plug is positioned lower vertically than the lowermost boundary of the nitride liner material.

[0109] While specific explanatory embodiments have been described in relation to the figures, those skilled in the art will understand and recognize that the embodiments included in this disclosure are not limited to those explicitly illustrated and described herein. Rather, many additions, omissions, and improvements to the embodiments described herein can be made without departing from the scope of the embodiments, such as those described in the following claims, including statutory equivalents, included in this disclosure. In addition, features of one embodiment can be combined with features of another disclosed embodiment while remaining within the scope of this disclosure.

Claims

1. A microelectronic device, A laminated structure comprising alternating conductive and insulating structures arranged in tiers, each containing a conductive structure and an insulating structure individually, A staircase structure having steps including the lateral ends of the aforementioned tier, The aforementioned staircase structure has contact points located on the steps at various heights and containing liner material, and A conductive plug structure located beneath the liner material of the contact, The lateral portion within the void in at least some of the aforementioned conductive structures, The vertical portion located above the aforementioned horizontal portion, The conductive plug structure includes, The microelectronic device, including the above.

2. A microelectronic device according to claim 1, The microelectronic device wherein the vertical portion of the conductive plug structure is directly positioned between the liner material of the contact and the lateral portion of the conductive plug structure, and the conductive plug structure substantially lacks liner material in contact with the vertical side wall of the vertical portion of the conductive plug structure.

3. A microelectronic device according to claim 1, The microelectronic device wherein the contact comprises a conductive material substantially surrounded by the liner material, and the material composition of the conductive material of the contact is substantially the same as the material composition of the conductive structure of the laminated structure.

4. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the conductive plug structure includes a material composition different from that of the conductive structure of the laminated structure.

5. A microelectronic device according to any one of claims 1 to 3, The conductive plug structure includes an additional portion extending beyond the horizontal boundary of the contact, the additional portion being directly adjacent in a perpendicular direction to the conductive structure of the laminated structure, the microelectronic device.

6. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the conductive plug structure extends at a position lower than the upper surface of the conductive structure of the laminated structure, and each conductive plug structure individually exhibits a height greater than or equal to the height of each of the conductive structures.

7. A microelectronic device according to any one of claims 1 to 3, The conductive plug structure of the microelectronic device comprises L-shaped structures individually formed near the best conductive structure that partially defines the step.

8. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the lateral width of each lateral portion of the conductive plug structure is greater than the lateral width of its vertical portion, and the lateral widths of each lateral portion of the conductive plug structure differ from one another across the stacked structure.

9. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the conductive structure in the step is in direct physical contact with the conductive plug structure, and the upper portion of the conductive structure is substantially surrounded on at least three consecutive sides by additional conductive material of the conductive plug structure.

10. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the lateral portion of the conductive plug structure substantially surrounds the vertical portion in at least one horizontal direction, and the lateral portion of the conductive plug structure has a larger lateral dimension than the contact.

11. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the vertical portion of the conductive plug structure is in direct contact with the lateral portion thereof, and the upper surface of the vertical portion of the conductive plug structure extends at a position higher than the upper surface of the conductive structure in the step.

12. A microelectronic device according to any one of claims 1 to 3, The microelectronic device wherein the vertical portion and the horizontal portion of the conductive plug structure are in physical contact with one of the conductive structures of the laminated structure on the horizontal and vertical sides.

13. A microelectronic device according to any one of claims 1 to 3, The microelectronic device further comprises a nitride liner material located on the steps of the staircase structure, wherein the uppermost boundary of the conductive plug structure is lower vertically than the lowermost boundary of the nitride liner material.

14. A method for forming a microelectronic device, Forming a pre-layered structure that includes alternating vertical arrangements of insulating material and sacrificial material placed in the pre-tier, Forming a dielectric material on a staircase structure within the pre-layered structure, wherein the staircase structure has steps including the lateral ends of the pre-tiers of the pre-layered structure. Replacing the aforementioned sacrificial material with a conductive structure, An opening is formed that extends through the dielectric material and exposes the portion of the conductive structure at the step of the staircase structure, The conductive material is selectively formed within the voids in the conductive structure and within the openings for forming the conductive plug structures, wherein each conductive plug structure is individually formed. The lateral portion within the void in at least some of the conductive structures, and The vertical portion located above the aforementioned horizontal portion, Including forming, and Forming a conductive contact on the step of the staircase structure, wherein the conductive contact comprises, individually, a liner material and an additional conductive material within the opening and on the conductive material of the conductive plug structure. The method comprising the above.

15. The method according to claim 14, Forming the conductive plug structure to include tungsten, and The method further comprising forming the conductive structure to contain one or more of titanium, ruthenium, aluminum, and molybdenum, wherein the conductive structure is substantially free of tungsten.

16. The method according to claim 14 or 15, The method for selectively forming the conductive material includes substantially filling the remaining portion of the voids in the conductive structure relatively close to the opening without forming the conductive material in additional voids in the conductive structure relatively far from the opening.

17. The method according to claim 14 or 15, The method further comprising selectively forming an additional portion of the conductive material that extends beyond the horizontal boundary of the conductive contact, wherein the additional portion of the conductive material is formed to be in direct physical contact with the conductive structure and the vertical portion of the conductive plug structure.

18. The method according to claim 14 or 15, The method for selectively forming the conductive material comprises, within a single material forming process, forming the lateral portion of the conductive plug structure within the void in the conductive structure and forming the vertical portion of the conductive plug structure within the opening.

19. The method according to claim 14 or 15, Prior to selectively forming the conductive material, the method further includes selectively removing portions of the conductive structure adjacent to the opening, The method for selectively forming the conductive material includes growing the conductive material along the exposed surface of the rest of the conductive structure.

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