Online dynamic resolution of time-based temperature estimation

Abstract

A measurement method for estimating the junction temperature of a power semiconductor module includes: a. replicating a pulse current; b. simultaneously injecting a first replicated pulse current to a control electrode of a power transistor of the power semiconductor module and a second replicated pulse current to an emulator circuit including a resistor in series with a capacitor; c. comparing a voltage signal of the power transistor with a voltage signal of the emulator circuit to generate a comparison signal; d. measuring a duration (Δt) of the voltage signal of the power transistor until the voltage signal of the emulator circuit reaches the same value as a function of the comparison signal; e. converting the measured duration (Δt) into an estimated value of the junction temperature (T J ). ​​​

Description

[Technical Field]

[0001] This disclosure relates to the field of monitoring and related calibration methods for power semiconductors applicable during the operating life of such components. Priority is claimed in European Patent Application No. 23305442.8, filed on 29 March 2023, the contents of which are incorporated herein by reference. [Background technology]

[0002] Since temperature is one of the main causes of failure, it is common practice to monitor the temperature of power semiconductor devices / modules, such as multi-chip power modules, for protection, regulation, and health monitoring. Power semiconductor datasheets provide the maximum junction temperature at which the device can operate without thermal runaway and the resulting fatal failure. Therefore, monitoring junction temperature, or at least maximum junction temperature measurements, is crucial to ensuring the safe operation of the device.

[0003] Generally, the free surface area of ​​a die is very small. Attaching a sensor to it is difficult, and in some cases even impossible. The number of external connections is large, and the acquisition system is complex. Doing so under laboratory conditions is extremely difficult. In actual industrial and operational situations, using individual PN junction sensors is not practical. Furthermore, the sensor must be integrated inside the power module package, which means the presence of the sensor must be planned from the very beginning of the module's design and cannot be retrofitted to an existing power module.

[0004] Many temperature-sensitive electrical parameter (TSEP)-based methods and in-chip sensors are known for online junction temperature estimation on power semiconductors. This allows direct access to junction temperature without the need for external sensors. Typically, the TSEP of a transistor is measured using an analog-to-digital converter (ADC). The use of an ADC can be a limitation for low-cost systems, as its resolution and sampling rate directly affect the quality of the temperature estimation. The TSEP of a transistor can be a time value. More specifically, the TSEP of a transistor can be measured as the duration relative to a detection threshold. Measuring time can be problematic due to the low sensitivity of temperature versus time. The simplest method is to monitor the passage of temperatures exceeding a critical safety temperature value. This can be done using an analog comparator that compares the TSEP value to a threshold. Such a technique is described in European Patent Application Publication No. 3855145. In this way, an ADC is not required, but this limits the measurement to a single specific temperature value. The specific temperature value is adjusted to correspond to the over-temperature of a particular power transistor. However, such methods have the following limitations: -Only one temperature is monitored. The predetermined temperature threshold is generally selected according to the datasheet provided by the manufacturer. - While it is possible to monitor multiple temperature values, this directly impacts the complexity of the circuit and calibration. In fact, multiple temperatures can be monitored by duplicating the monitoring circuit. Consequently, the number of emulator components increases, and so does the calibration effort. - Over-temperature detection (OTD) circuit hardware must be unique to each monitored device. TSEP characteristics are unique to each device, and calibration must be performed for each OTD circuit. This limits the functionality of the OTD for a single specific transistor. - The OTD circuit is not modifiable and cannot be adjusted during operation. For example, it is not possible to rule out deviations in the TSEP in the device's mission profile, which could potentially alter the OTD's operation by correcting the measured temperature value. - If the TSEP of a power transistor is time, it has low sensitivity to time versus temperature. This results in lower accuracy / precision and / or requires expensive signal conditioning circuitry. [Overview of the Initiative]

[0005] This disclosure will improve the situation.

[0006] A measurement method for estimating the junction temperature of a power semiconductor module, a. Duplicating a pulsed current into two duplicated pulsed currents, b. A first replicated pulse current to the control electrode of the power transistor of the power semiconductor module, A second replicated pulse current is sent to the emulator circuit, which includes a capacitor and a resistor in series. Injecting them simultaneously, c. Comparing the voltage signal of the power transistor with the voltage signal of the emulator circuit and generating a comparison signal, d. As a function of the comparison signal, the duration of the voltage signal of the power transistor is measured until it reaches the same value as the voltage signal of the emulator circuit, e. Converting the measured duration into an estimated value of the joint temperature. A method including this is proposed.

[0007] In another embodiment, a power semiconductor module, At least one power transistor, A current pulse source provided via the control electrode of the power transistor, A current copy device configured to replicate the current provided by a current pulse source, An emulator circuit including a capacitor and a resistor in series, A comparator configured to compare the voltage signal of the power transistor with the voltage signal of the emulator circuit and generate a comparison signal. A power semiconductor module equipped with the above features is proposed.

[0008] In another embodiment, computer software is proposed that includes instructions for carrying out the method defined herein when the software is executed by a processor. In yet another embodiment, a computer-readable non-temporary recording medium is proposed on which the software is registered to carry out the method defined herein when the software is executed by a processor.

[0009] The following features can be implemented selectively, individually, or in combination with other features.

[0010] The resistor in the emulator circuit is adjustable. The value of the resistor is set so that the temperature estimation range amplitude is selected. The capacitor in the emulator circuit is adjustable. The value of the capacitor is set so that the temperature estimation range position is selected.

[0011] This method, f. Modify the value of the resistor in the emulator circuit so that the corresponding temperature estimation range is corrected and the estimated junction temperature approaches the center of the corrected temperature estimation range. g1. If the estimated junction temperature is sufficiently concentrated in the center of the corrected temperature estimation range according to a predetermined standard, the value of the capacitor in the emulator circuit is modified to increase sensitivity. g2. If the estimated junction temperature according to the predetermined criteria is not sufficiently concentrated in the center of the corrected temperature estimation range, the value of the capacitor in the emulator circuit is modified to reduce sensitivity. It also includes.

[0012] This method further includes repeatedly modifying the value of the resistor while the duration t is fixed at a value close to 0 until the generated comparison signal corresponds to the situation where the voltage signal of the power transistor is equal to the voltage signal of the emulator circuit.

[0013] The module further comprises a controller configured to adjust the resistor and / or the capacitor.

[0014] Other features, details and advantages are shown in the following detailed description and drawings.

Brief Description of Drawings

[0015] [Figure 1] It is a schematic diagram of a module according to some embodiments.

[0016] [Figure 2] It is a graphical display of the measured output voltage and the corresponding comparison signal during a current pulse.

[0017] [Figure 3] It is a graphical display of the measured output voltage and the corresponding comparison signal during a current pulse.

[0018] [Figure 4] It is a graphical display of the linear relationship of the signal duration as a function of the temperature estimated from the comparison as in [Figure 2] and [Figure 3].

[0019] [Figure 5] It is a figure similar to [Figure 2] or [Figure 3] when Cg > Cemu.

[0020] [Figure 6] It is a figure similar to [Figure 2] or [Figure 3] when Cg < Cemu.

[0021] [Figure 7]This is a graph of the temperature-time resolution as a function of the emulator's capacitance.

[0022] [Figure 8] This is a schematic diagram of the controller configuration for adjusting the emulator circuit.

[0023] [Figure 9] This is a flowchart of an algorithm that can be executed according to the embodiment.

[0024] [Figure 10] This is a flowchart of an algorithm that can be executed according to the embodiment.

[0025] [Figure 11] This is a flowchart of an algorithm that can be executed according to the embodiment.

[0026] [Figure 12] This is a graphical representation of the dynamic adaptation of the emulator circuit.

[0027] [Figure 13] This is a flowchart of an algorithm that can be executed according to the embodiment.

[0028] [Figure 14] This is a flowchart of an algorithm that can be executed according to the embodiment.

[0029] [Figure 15] This is a schematic diagram of one embodiment of dynamic adaptation of an emulator circuit. [Modes for carrying out the invention]

[0030] Here, the term "power" is used in its general sense within the field of energy conversion (power electronics). Furthermore, the solutions described below are intended for use during the operating life of power semiconductor modules under "normal" conditions, meaning that they are not limited to laboratory or test bench settings under ideal and controlled conditions such as post-manufacturing quality control stages.

[0031] Here, we refer to [Figure 1] which shows the module power semiconductor module 1. Power semiconductor module 1 is, At least one power transistor TR, A current pulse source CPS is provided via the control electrode G of the power transistor TR, A current copy CC configured to replicate the current provided by a current pulse source, Capacitor C emu and a resistor R in series emu An emulator circuit EMU including, Here, the voltage signal V of the power transistor TR is shown. ge and the voltage signal V of the emulator circuit EMU emu Compare this with the comparison signal V CMP Comparator COMP configured to generate It is equipped with.

[0032] In [Figure 1], module 1 is further equipped with a time detector CHR. The time detector CHR receives the comparison signal V CMP It is configured to measure the duration of [something]. Structurally, the time detector CHR can be a specific module by itself, or a submodule functionally integrated into the comparator COMP.

[0033] Next, we will describe an example of a measurement method for estimating the junction temperature of a power semiconductor module, as shown in [Figure 1].

[0034] In the first operation, the pulsed current is replicated into two identical pulsed currents. In the example of [Figure 1], the pulsed current from the current pulse source CPS is replicated by a current copier CC, for example, a "current mirror circuit". The purpose is to inject the same current pulse into the transistor TR and the emulator circuit EMU simultaneously.

[0035] In the second operation, the first replicated pulse current and the second replicated pulse current are simultaneously injected into the control electrode of the power transistor TR and the emulator circuit EMU, respectively. In the example of [Figure 1], the control electrode is the gate G of the transistor TR. By doing so, the internal gate resistance of the transistor (which exists within the structure of the transistor) is used as TSEP.

[0036] In the third operation, the resulting voltages V ge and V emu are compared. In the example of [Figure 1], the gate-emitter voltage V ge of the transistor TR and the output voltage V emu of the emulator circuit EMU are compared by a comparator COMP.

[0037] The resulting voltages V ge and V emu can be described by the following equations [Equation 1] and [Equation 2], respectively.

[0038]

Equation

[0039]

Equation

[0040] In the equations, I is the current, t is the time, and R g (T j ) is the gate resistance.

[0041] The gate resistance R gIt depends linearly on temperature and can be described by the following equation [Equation 3].

[0042]

number

[0043] In this example, the comparison is binary, and the transistor voltage is greater than or equal to the emulator circuit voltage (V ge ≥V emu ), output signal V CMP is equal to "1", otherwise (V ge <V emu ) is equal to "0". Therefore, the transistor voltage is equal to the emulator circuit voltage (V CMP The duration of a condition where the value is 1 or greater can be measured using equations [Equation 1] and [Equation 2], according to the following equation [Equation 4].

[0044]

number

[0045] Here, since the difference values ​​themselves are irrelevant, the difference is analyzed as binary ("1" or "0"). Only the duration of the sign of the difference is analyzed. In various embodiments, the comparison of two voltages can be performed in different ways, for example, by analogy.

[0046] The relationship between time and temperature is independent of the current injection value. Therefore, this method is robust against imperfections in the current pulse source CPS and allows for good accuracy and low drift even when a low-cost current injection circuit is used. Temperature can be measured without an additional ADC, and the junction temperature T j This significantly reduces the cost of measurement. Instead, a Time-to-Digital Converter (TDC) can be used, or even the Time-to-Digital Converter can be implemented on the same FPGA that ultimately generates the control signals for the switches and other functions of Module 1.

[0047] V ge and V emu The comparison is shown graphically in [Figure 2], [Figure 3], and [Figure 4]. [Figure 2] corresponds to the implementation at the first temperature T1, while [Figure 3] corresponds to the implementation at the second temperature T2.

[0048] In the fourth operation, the measured duration Δt is converted to the junction temperature T by a linear relationship of duration Δt as a function of temperature T. As shown in [Figure 4], the relationship is converted to various temperatures T n This can be inferred from multiple measurements.

[0049] A time-to-digital converter (TDC) can be used to perform a conversion that includes a known TDC. Some TDCs offer better resolution than 1 ns. For example, a component with the industry standard "TDC7401ZAXRe" has a resolution of 55 ps. The temperature resolution can be expressed as a function of the TDC resolution using the following equation [Equation 5].

[0050]

number

[0051] The temperature-time resolution can easily be less than 1°C / ns, meaning that a TDC with a resolution of 55 ps can achieve a temperature resolution of less than 0.055°C. To confirm that high resolution can be achieved in this way, a comparison should be made with a 100 mA current injection known in the art and a resistance to a temperature resolution of 0.013 Ω / °C, in which case the temperature resolution is about 0.5°C using a known 14-bit ADC and ±5V rails.

[0052] Temperature resolution, and subsequently accuracy and precision, can be significantly lower than with the latest technologies.

[0053] In the proposed example, the output signal value of comparator COMP can be either 0 or 1. emu and C emu Depending on the value of , two cases are possible. The two cases are shown in [Figure 5] and [Figure 6], respectively. In the first case ([Figure 5]), C g and R g These are C emu and R emu It is higher than the output signal V of comparator COMP. CMP This is equal to "1", and the signal length (duration) is equal to the temperature T j It is proportional to. In the second case ([Figure 6]), C g and R g These are C emu and R emu Lower than. The output signal V of comparator COMP. CMP This is equal to "0", and the signal length (duration) is equal to the temperature T j It is proportional to.

[0054] In this example, the emulator circuit EMU is adjustable, and the resistors R (independently of each other) are adjustable. emu The value of capacitor C can be set. emu The value can be set. In various embodiments, only the resistor or only the capacitor is adjustable. In other embodiments, the emulator circuit EMU is not adjustable.

[0055] Therefore, capacitor C emu If the value can be set, R emu C is independent of the value emu Temperature can be estimated simply by setting R. emu <R g (See Figure 5) and R emu >R g (See Figure 6) In this case, C emu <C g and C emu >C g Therefore, for example, T j After connecting the estimated circuit to transistor TR, the C at the end of manufacturing for module 1 emuOnly calibration can be performed.

[0056] R emu Given a value of, If no signal ("0") is detected at the output of comparator COMP, C emu We must increase it. If only a positive signal ("1") is detected at the output of comparator COMP, C emu We must reduce it.

[0057] Therefore, capacitor C emu If the value can be set, C emu to C g By bringing it closer to this, the temperature-time resolution can be improved. According to equation [Equation 5], C emu The closer the two are, the higher the temperature-time resolution. In [Figure 7], C emu -C g The temperature-time resolution as a function of C is plotted. Here, C emu C g It can be seen that the closer the value is, the higher the resolution.

[0058] (during the operating life of Module 1) Capacitance C emu This reduction can be achieved by using laser-trimmable chip capacitors constructed as laminated capacitors. By vaporizing the top layer with a laser, the capacitance is reduced by decreasing the area of ​​the upper electrode. Depending on the industrial context, the resistance trimming process can be replaced with a capacitor trimming process if it is more convenient.

[0059] calibration Adjustable resistor R emu and adjustable capacitor C emu In some embodiments having an emulator circuit EMU, further calibration operations can be performed. In such cases, module 1 may further include a controller CONT.

[0060] For example, adjustable capacitors and resistors can be digital potentiometers controlled by a controller such as an FPGA. For example only, a component with the industry standard "NCD2400MTR" can be used, providing a 200pF range including 512 isolated 355fF stages. If this range is insufficient to cover the entire range of different device capacitances, the range can be increased by adding several larger capacitors in parallel with one "NCD2400MTR" and controlled by an FPGA, as shown in [Figure 8].

[0061] As a second example, an n-bit R-2R resistor ladder network controlled by an FPGA can be used. This makes it possible to obtain 2n resistor stages that can be directly adjusted by the FPGA. As a third example, a digital potentiometer such as a component with the industry standard "AD5258" containing 64 resistor stages can be used.

[0062] Those skilled in the art will select an emulator circuit EMU, which includes a controller CONT adapted as a function of the driving transistor and operating conditions, to match the capacitance range. By using adjustable capacitors and resistors, the TSEP of the transistor can be automatically calibrated using different algorithms. This allows the transistor (only) to be changed while keeping the temperature measurements operational. In addition, the calibration procedure can be performed periodically throughout the operating life of the transistor (not just under laboratory conditions on a test bench) to balance any TSEP parameter fluctuations.

[0063] Figures 9, 10, and 11 show three examples of available calibration algorithms.

[0064] In the example in [Figure 9], the transistor is exposed to two different temperatures T1 and T2. Capacitor C emu and resistor R emuTo obtain different output voltages between the transistor and the emulator circuit, it is initially set to their lower values. When this calibration algorithm is combined with the comparator COMP described above, this situation is V CMP Corresponds to =1. The assembly is set to one first fixed temperature T1, and the time detection is set to one time t1. The same output voltage (V) is used between the transistor and the emulator circuit. CMP Until you obtain =0, the resistor R emu It gradually increases. Then, time detection is set to another time t2, and different output voltages (V) are exchanged between the transistor and the emulator circuit. CMP Until capacitance C = 1) is obtained, emu This gradually increases. This sets the time detection sensitivity. Finally, the temperature is fixed at a second temperature T2, and the same output voltage (V) is used between the transistor and the emulator circuit. CMP The time scan continues until (=0) is obtained.

[0065] The example in [Figure 9] allows for reduced calibration effort because Module 1 only needs to be exposed to two different temperatures, T1 and T2. A standard (inexpensive) FPGA is sufficient for this purpose.

[0066] In the example in [Figure 10], capacitor C emu Only the value of is modified. The time detection is gradually increased to set the time detection corresponding to the first temperature T1. Then, capacitor C emu The detector resolution is fixed by gradually increasing the voltage. Finally, the temperature is fixed at a second temperature T2, and a different output voltage (V) is set between the transistor and the emulator circuit. CMP Gradually increase the time detection until you obtain =1).

[0067] In the example in [Figure 10], the resistor R is fixed (non-adjustable). emu It is possible to use it.

[0068] The example in [Figure 11] shows the transistor's resistor R. g The resistor R in the emulator circuit emuWhen it is larger than (R g >R emu , see [FIG. 5]), and when the resistance R of the transistor g is smaller than the resistance R of the emulator circuit emu (R g < R emu , see [FIG. 6]), it is adapted to the two situations described above. First, the capacitance C emu is fixed at an intermediate value (for example, the middle of a known range), and the temperature is fixed at a first known temperature T1. The time detection gradually increases. When the output voltage between the transistor and the emulator circuit becomes different and equal (V CMP changes from 1 to 0), it means R in the case of [FIG. 5 g >R emu . Conversely, when the output voltage between the transistor and the emulator circuit becomes equal and different (V CMP changes from 0 to 1), it means R in the case of [FIG. 6 g < R emu . Then, in the first case (R g >R emu ), the capacitance C emu is decreased, and in the second case (R g < R emu ), the capacitance C emu is increased to set the time sensitivity. Then, in the first case (R g >R emu ), the temperature is fixed at a second known temperature T2 and the time detection is gradually increased until the same output voltage is obtained between the transistor and the emulator circuit (VCMP = 0), or in the second case (R g < R emu ), the temperature is fixed at a second known temperature T2 and the time detection is gradually increased until a different output voltage is obtained between the transistor and the emulator circuit (V CMP = 1).

[0069] In the example of [FIG. 11], the value of the resistance R of the emulator circuit with respect to the resistance R of the transistor g is not very important, and R emu may be a fixed resistance value instead of an adjustable value. emu

[0070] ​ One way to expose a transistor to a known temperature (T1 or T2) is to consider the ambient (heat sink) temperature when the transistor is off for several minutes. Another way to expose a transistor to a known temperature is to consider the base plate temperature when the transistor is off for several seconds. Temperature exposure can be performed off-site (i.e., outside the module) and / or on-site using a heat plate by considering the temperatures at two different moments in time.

[0071] Time-based T J Estimated dynamic resolution As explained above, the adjustable resistor R emu and adjustable capacitor C emu The emulator circuit EMU, having the following characteristics, allows for calibration of the emulator circuit EMU as a function of transistors, for example, only once after the manufacturing / assembly process, periodically during the module's operating life (e.g., during maintenance operations), or even during the module's "normal" operation. Below, we focus on a solution specifically adapted to be dynamically implemented during the module's operating life in order to dynamically adjust the temperature estimation resolution by the embedded controller as the temperature changes.

[0072] The estimated temperature range is determined by the resistor R of the emulator circuit EMU. emu Related to this, the temperature amplitude (sensitivity) that can be estimated from time t is related to the capacitor C of the emulator circuit EMU. emu This relates to the following: In other words, in contrast to conventional solutions that require a decisive compromise between large amplitude and high resolution, the solution we propose here enables the automatic and dynamic optimization of the range and resolution for each transistor and each lifetime state (changing characteristics) of each transistor.

[0073] For example, one calibration goal could be to cover a temperature range between 125°C and 200°C (i.e., for protection). Alternatively, the goal could be to cover a range between -40°C and 200°C (i.e., for counting temperature cycles). For a specific temperature range, the calibration can be optimized to maximize sensitivity. To obtain the best accuracy in each temperature range, the junction temperature T J The performance of the estimation circuit can be optimized.

[0074] Junction temperature T J Since this is presumed, the following actions will occur, namely, f. The corresponding temperature estimation range is corrected, and the junction temperature T J The resistor R of the emulator circuit EMU is adjusted so that the estimated value approaches the center of the corrected temperature estimation range. emu Modify the value, g1. Joint temperature T according to the prescribed standard J If the estimated values ​​are sufficiently concentrated in the center of the corrected temperature estimation range, the capacitor C of the emulator circuit EMU will increase sensitivity (and decrease range) emu Modify the value, g2. Joint temperature T according to the prescribed standard J If the estimated values ​​are not sufficiently concentrated in the center of the corrected temperature estimation range, the capacitor C of the emulator circuit EMU will be modified to reduce sensitivity (and expand the range). emu Modify the value This can be implemented.

[0075] The above operation is graphically shown in [Figure 12]. In the first scenario (left side of [Figure 12]), the junction temperature T J is T J1 It is estimated that the value T is such. J1 It is well in the center of the measurement range (curve "A"). Next, increase the sensitivity of time vs. temperature, T J1 Maintain the value of in the middle of the measurement range (curve "B"). Increase the sensitivity of time versus temperature again, and set the value T J1Maintain the temperature in the center of the measurement range again (curve "C"). In the second scenario (right side of [Figure 12]), the junction temperature T J The value changes (in this example, it increases), T J2 It is presumed that the junction temperature T J =T J2 It is outside the measurement range (curve "C"). The sensitivity of time versus temperature is (capacitor C of the emulator circuit). emu (By correcting the value) it decreases, and temperature T J2 It is within the measurement range but not in the center (curve "D"). Estimated temperature T J2 Move the temperature range so that it is in the center (the resistor R of the emulator circuit) emu By modifying the value of the capacitor C in the emulator circuit, the sensitivity of the curve "E" can be increased. emu By correcting the value of (F), the curve "F" can be modified.

[0076] In the example in [Figure 12], the temperature range is maximized so that the approximate temperature range of the transistor can be determined. Once the temperature range is known, the controller applies an algorithm to focus on temperature. emu Set the value, C emu The resolution is optimized by adjusting R. When the transistor temperature changes, the algorithm adjusts R to focus the measurement on the new temperature. emu and C emu Readjust.

[0077] In summary, C emu to C g By bringing it closer to the target, the time sensitivity can be increased. This makes it possible to accurately measure temperatures over a wide range, and by using different algorithms, it becomes possible to overcome the trade-off range / sensitivity. Dynamic iteration is performed using an emulator circuit (R emu and C emu This is done to set the range / sensitivity. The range / sensitivity trade-off can be overcome. In other words, by using several iterations, both a high measurement range and high sensitivity can be achieved.

[0078] For illustrative purposes only, Figures 13 and 14 show examples of dynamic estimation / calibration algorithm implementations. The example in Figure 13 is general, while the example in Figure 14 is more detailed to consider the two cases described above with respect to Figures 5, 6, and 11.

[0079] In various embodiments, adjustable R emu and C emu Dynamic estimation of temperature by using the parameters of fixes the duration t near "0" (R g To obtain (T), this can also be done by (see [Equation 1]). This method is shown in [Figure 15], C emu R is constant, emu This is adjusted (V) until different output voltages are obtained between the transistor and the emulator circuit. CMP =1). This allows a regulator, such as a proportional-integral regulator ("PI" in [Figure 15]), to be used to control the temperature and gate resistance R. g It becomes possible to determine the (T) value without measuring the duration of the output signal of the comparator COMP. g and temperature T J It is possible to estimate this. [Industrial applicability]

[0080] The purpose of the previous explanation is to explain the internal gate resistor R g The objective is to use TSEP to measure the junction temperature of a power transistor in a situation with high resolution, low circuit cost, low calibration effort, and high circuit generality. Optionally, calibration can be performed. Two equal currents are injected simultaneously through the transistor's control electrode (typically the gate) and an equivalent RC circuit called an "emulator circuit." In embodiments where more than measurement / estimation is desired for a particular transistor, an adjustable emulator circuit (with a resistor R) can be used. emu and / or capacitance C emu However, each of the transistors R g and C gThe calibration step can be further performed by using (adjusted to be within the same range) voltage V ge and V emu The values ​​are compared using an analog comparator. The duration of the comparator's output signal (not its own amplitude) is linearly proportional to the transistor temperature. This makes it possible to measure the transistor junction temperature without an ADC. In addition, by using adjustable resistors and capacitors controlled by a controller, such as an FPGA, it is possible to perform in-situ calibration for different component characteristics and repeat the calibration over the module's operating life to compensate for deviations.

[0081] While not limited to these applications, the above modules can be used, for example, as power modules and inverters in the automotive and powertrain technology fields, factory automation, air conditioning systems, HVDC, and renewable energy.

[0082] This disclosure is not limited to the methods, modules, components, and computer software described herein, but is merely an example. The present invention encompasses any alternatives that those skilled in the art might anticipate when reading this text. [Explanation of Symbols]

[0083] 1 module CPS Current Pulse Source CC Current Copier TR Transistor EMU Emulator Circuit COMP comparator CHR Time Detector CONT Controller

Claims

1. A measurement method for estimating the junction temperature of a power semiconductor module (1), a. Replicating a pulsed current into two duplicated pulsed currents, b. The first replicated pulse current to the control electrode (G) of the power transistor (TR) of the power semiconductor module (1), Capacitor (C) ｅｍｕ ) and a series resistor (R ｅｍｕ A second replicated pulse current to the emulator circuit (EMU), including ) and Injecting them simultaneously, c. Voltage signal (V) of the power transistor (TR) ｇｅ ) and the voltage signal (V) of the emulator circuit (EMU) ｅｍｕ ) is compared with the comparison signal (V ＣＭＰ ) to generate, d. The comparison signal (V ＣＭＰ The voltage signal (V) of the emulator circuit (EMU) as a function of ｅｍｕ The voltage signal (V) of the power transistor (TR) until it reaches the same value as ). ｇｅ ) measure the duration (Δt) and e. Converting the measured duration (Δt) into an estimated value of the joint temperature (T Ｊ ) and Methods that include...

2. The resistor (R) of the emulator circuit (EMU) ｅｍｕ ) is adjustable, The aforementioned resistor (R ｅｍｕ The value of ) is set so that the temperature estimation range amplitude is selected. The capacitor (C) of the emulator circuit (EMU) ｅｍｕ The value of the capacitor (C) is adjustable, and ｅｍｕ The value of ) is set so that the temperature estimation range position is selected. The method according to claim 1.

3. The method described above is f. The corresponding temperature estimation range is corrected, and the junction temperature (T Ｊ The resistor (R) of the emulator circuit (EMU) is adjusted so that the estimated value of ) approaches the center of the corrected temperature estimation range. ｅｍｕ Correcting the value of ) and g1. The joint temperature (T) according to the predetermined standard. Ｊ If the estimated value of ) is sufficiently concentrated in the center of the corrected temperature estimation range, the capacitor (C) of the emulator circuit (EMU) is adjusted to increase sensitivity. ｅｍｕ Correcting the value of ) and g2. The joint temperature (T) according to the predetermined standard. Ｊ If the estimated value of ) is not sufficiently concentrated in the center of the corrected temperature estimation range, the capacitor (C) of the emulator circuit (EMU) will be modified to reduce sensitivity. ｅｍｕ Correcting the value of ) The method according to claim 1 or 2, further comprising:

4. While the duration t is fixed to a value close to 0, the generated comparison signal (V ＣＭＰ ) the voltage signal (V) of the power transistor (TR) ｇｅ ) is the voltage signal (V) of the emulator circuit (EMU). ｅｍｕ Until the situation corresponds to that, the resistor (R ｅｍｕ The method according to claim 1 or 2, further comprising iteratively modifying the value of ).

5. A power semiconductor module (1), At least one power transistor (TR), A current pulse source (CPS) is provided via the control electrode (G) of the power transistor (TR), A current copy (CC) configured to replicate the current provided by the current pulse source, Capacitor (C) ｅｍｕ ) and a series resistor (R ｅｍｕ An emulator circuit (EMU) including, The voltage signal (V) of the power transistor (TR) ｇｅ ) and the voltage signal (V) of the emulator circuit (EMU) ｅｍｕ ) is compared with the comparison signal (V ＣＭＰ A comparator (COMP) configured to generate ) A power semiconductor module (1) equipped with the following features.

6. The aforementioned resistor (R ｅｍｕ ) and / or the capacitor (C ｅｍｕ ) A controller configured to adjust (CONT) The power semiconductor module (1) according to claim 5, further comprising the above.

7. Computer software that, when executed by a processor, includes instructions causing the module (1) described in claim 5 or 6 to perform the method described in any one of claims 1 to 4.

8. A computer-readable non-temporary recording medium in which the software is registered to carry out the method described in any one of claims 1 to 4 when the software is executed by the processor.

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