MRAM with an asymmetric structure
The asymmetric MRAM structure optimizes spin collection by preferentially gathering upward vertical spins, addressing inefficiencies in existing MRAM technologies and enhancing data storage performance.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- INTERNATIONAL BUSINESS MACHINE CORPORATION
- Filing Date
- 2024-04-04
- Publication Date
- 2026-04-22
AI Technical Summary
Existing MRAM technologies face challenges in effectively generating and efficiently collecting useful spins, particularly vertical spins, which impact the performance of spin-orbit torque magnetoresistive random-access memory devices.
The MRAM structure is designed with an asymmetric configuration, positioning the magnetic tunnel junction (MTJ) stack and conductive vias to preferentially collect upward vertical spins, utilizing bimetallic wires and spin conductors to enhance spin collection efficiency.
The asymmetric design enhances the performance of MRAM devices by maximizing the collection of upward vertical spins, thereby improving data storage capabilities and device efficiency.
Smart Images

Figure 2026513021000001_ABST
Abstract
Description
Background Art
[0001] This application relates to the manufacture of semiconductor integrated circuits. More particularly, it relates to the structure of a spin-orbit torque magnetoresistive random access memory and a method of manufacturing the same.
[0002] With the explosive increase in digital information, semiconductor memory devices are playing an increasingly important role in the management and organization of this digital information, for example, in the fields of storing, retrieving, and / or converting this digital information. Magnetoresistive random-access memory (MRAM) is a type of non-volatile memory (NVM) that can retain stored data even when the power to the memory device is down or accidentally cut off.
[0003] MTJ technology is based on components known as magnetic tunnel junction (MTJ) stacks consisting of a reference layer, a tunnel barrier layer, and a free layer. Spin-orbit torque MRAM applies the use of spin-orbit torque (SOT) wires to further enhance MRAM performance. During operation, the SOT wires generate spins that are later collected by the MTJ stack, thereby enhancing the performance of the MRAM. However, research topics remain regarding how to effectively generate spins, specifically useful spins, and how these useful spins can be efficiently collected.
Summary of the Invention
[0004] Embodiments of the present invention provide an MRAM structure. The structure comprises a metal wire, the metal wire having a width between a first side and a second side; a length between a first end and a second end; and a longitudinal axis, and being symmetric with respect to the longitudinal axis; conductive vias in contact with a first region of the metal wire; and a magnetic tunnel junction (MTJ) stack disposed in a second region of the metal wire, wherein the MRAM structure is asymmetric with respect to the longitudinal axis.
[0005] According to one embodiment, the metal wire is a first metal wire, and the structure further comprises a second metal wire formed adjacent to the first side of the first metal wire. In one embodiment, the first metal wire comprises a metal having an atomic number greater than 54, and the second metal wire comprises a metal having an atomic number less than 30. In another embodiment, the first metal wire is made of a material selected from the group consisting of tungsten (W), platinum (Pt), and tantalum (Ta), and the second metal wire is made of a material selected from the group consisting of aluminum (Al) and copper (Cu).
[0006] In one embodiment, the MTJ stack comprises a free layer, a tunnel barrier layer above the free layer, and a reference layer above the tunnel barrier layer, wherein the free layer is positioned on at least one of the first and second metal wires.
[0007] According to another embodiment, the first metal wire comprises tungsten (W), platinum (Pt), or tantalum (Ta), and the second metal wire comprises niobium (Nb).
[0008] In one embodiment, the structure further comprises an electrically insulating spin conductor on the first and second metal wires, and a metal spin conductor on the electrically insulating spin conductor, wherein the electrically insulating spin conductor covers a portion of the first metal wire and a portion of the second metal wire adjacent to the portion of the first metal wire.
[0009] In another embodiment, the MTJ stack is positioned on top of the metal spin conductor, and a portion of the metal spin conductor beneath the MTJ stack is in direct contact with the first and second metal wires.
[0010] In yet another embodiment, the structure further comprises a metal stud at the end of the metal spin conductor, the metal stud in contact with the metal spin conductor; the first metal wire; and the second metal wire.
[0011] In one embodiment, the electrically insulating spin conductor contains nickel oxide (NiO), and the metallic spin conductor contains copper (Cu).
[0012] In one embodiment, the conductive vias and the MTJ stack are arranged symmetrically with respect to the longitudinal axis of the metal wire.
[0013] In another embodiment, the MTJ stack is positioned substantially near or beyond the first side edge of the metal wire and covers less than half the width of the metal wire.
[0014] In one embodiment, the metal wire is embedded in a dielectric layer, and the dielectric layer covers the first and second sides of the metal wire.
[0015] According to one embodiment, the structure further comprises an electrically insulating spin conductor and a metallic spin conductor on the electrically insulating spin conductor, wherein the electrically insulating spin conductor covers the edge of the first side of the metallic wire.
[0016] According to another embodiment, the structure further comprises a high-resistance spin conductor covering the first edge of the metal wire.
[0017] In one embodiment, the metal wire is not straight and has one or more curved sections from the first end to the second end.
[0018] Embodiments of the present invention provide an MRAM structure. The structure comprises a bimetallic wire having first and second metallic wires formed side by side; conductive vias in contact with a first region of the bimetallic wire; and a magnetic tunnel junction (MTJ) stack in contact with a second region of the bimetallic wire, wherein the first metallic wire comprises a first metal element having an atomic number greater than 54, and the second metallic wire comprises a second metal element having an atomic number less than 30.
[0019] Embodiments of the present invention provide an MRAM structure. The structure comprises a bimetallic wire having first and second metallic wires formed side by side; conductive vias in contact with a first region of the bimetallic wire; and a magnetic tunnel junction (MTJ) stack in contact with a second region of the bimetallic wire, wherein the first metallic wire is made of tungsten (W), platinum (Pt), or tantalum (Ta), and the second metallic wire is made of copper (Cu) or aluminum (Al). [Brief explanation of the drawing]
[0020] The present invention will be more fully understood and recognized from the following detailed description of embodiments of the invention, which will be interpreted in conjunction with the accompanying drawings.
[0021] [Figure 1] Figures 1A, 1B, and 1C are illustrative side and top views of an MRAM device according to several embodiments of the present invention. [Figure 2] Figures 2A, 2B, and 2C are illustrative side and top views of an MRAM device according to several embodiments of the present invention. [Figure 3] Figures 3A, 3B, and 3C are illustrative side and top views of an MRAM device according to several embodiments of the present invention. [Figure 4] Figures 4A, 4B, and 4C are exemplary diagrams of side and top views of an MRAM device according to some embodiments of the present invention. [Figure 5] Figures 5A, 5B, and 5C are exemplary diagrams of side and top views of an MRAM device according to some embodiments of the present invention.
[0022] [Figure 6] Figures 6A, 6B, 6C, and 6D are top views of an MRAM device according to some embodiments of the present invention.
[0023] [Figure 7] Figures 7A, 7B, and 7C are exemplary diagrams of side and top views of an MRAM device according to some embodiments of the present invention. [Figure 8] Figures 8A, 8B, and 8C are exemplary diagrams of side and top views of an MRAM device according to some embodiments of the present invention. [Figure 9] Figures 9A, 9B, and 9C are exemplary diagrams of side and top views of an MRAM device according to some embodiments of the present invention.
[0024] [Figure 10] Figures 10A, 10B, and 10C are side views of an MRAM device according to some embodiments of the present invention.
[0025] [Figure 11] Figures 11A, 11B, and 11C are top views of an MRAM device according to some embodiments of the present invention.
[0026] [Figure 12] A top view of an MRAM device according to an embodiment of the present invention.
[0027] [Figure 13]Figures 13A to 13E are illustrative diagrams of cross-sectional views of MRAM at various manufacturing stages according to another embodiment of the present invention.
[0028] For the sake of brevity and clarity, it should be understood that the elements shown in the drawings are not necessarily drawn to scale. Furthermore, where applicable, in various functional block diagrams, two connected devices and / or elements may not necessarily be shown as connected. In some other cases, the grouping of certain elements within a functional block diagram may be for illustrative purposes only and may not necessarily suggest that they reside within a single physical entity or that they are embodied within a single physical entity. [Modes for carrying out the invention]
[0029] In the following detailed description and accompanying drawings, please understand that the various layers, structures, and regions shown in the drawings are illustrative and schematic representations, not drawn to scale. Furthermore, for the sake of simplicity, one or more types of layers, structures, and regions commonly used to form semiconductor devices or structures may not be explicitly shown in the given illustrations or drawings. This does not imply that any unexpressed layers, structures, and regions are omitted from actual semiconductor structures. Additionally, please understand that the embodiments discussed herein are not limited to the specific materials, features, and processing steps shown and described herein. In particular, with regard to semiconductor processing steps, it should be emphasized that the description provided herein is not intended to encompass all processing steps that may be required to form a functional semiconductor integrated circuit device. Rather, some processing steps commonly used in forming semiconductor devices, such as wet cleaning and annealing steps, are intentionally omitted herein for the sake of brevity.
[0030] It should be understood that the terms “about” or “substantially” used herein with respect to thickness, width, percentage, range, etc., are intended to mean close or approximate, not exactly. For example, the terms “about” or “substantially” used herein suggest, merely as an example, that there may be a small margin of error, such as 1% or less of the stated quantity. Similarly, the terms “on,” “over,” or “on top of” used herein to describe the positional relationship between two layers or structures are intended to be interpreted broadly and should not be interpreted as excluding the existence of one or more intervening layers or structures.
[0031] Furthermore, while various reference numerals may be used across different drawings, the same or similar reference numerals may be used throughout the drawings to refer to the same or similar features, elements, or structures. Therefore, for the sake of brevity, detailed descriptions of the same or similar features, elements, or structures may not be repeated in each drawing. Labeling of the same or similar elements in some drawings may also be omitted to avoid cluttering the drawings.
[0032] Figures 1A, 1B, and 1C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 1A is a front view of the MRAM device 100, Figure 1B is a top view, and Figure 1C is a left side view. As shown in the top view of Figure 1B, the MRAM device 100 may include a metal wire 101 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 101 is symmetrical with respect to the longitudinal axis 10.
[0033] The MRAM device 100 may further include conductive vias 102 that contact a first region of the metal wire 101, and an MTJ stack 103 that contacts a second region of the metal wire 101. The MTJ stack 103 may include a free layer 103c, a tunnel barrier layer 103b above the free layer 103c, and a reference layer 103a above the tunnel barrier layer 103b.
[0034] According to one embodiment, as shown in the top view of Figure 1B, the MRAM device 100 may be structurally asymmetric with respect to the longitudinal axis 10. For example, an embodiment of the present invention provides positioning the MTJ stack 103 closer to one side of the metal wire 101, such as the first side 11, in order to position the MTJ stack 103 asymmetrically with respect to the longitudinal axis 10, thereby resulting in an MRAM device 100 that is structurally asymmetric with respect to the longitudinal axis 10 of the metal wire 101.
[0035] By positioning the MTJ stack 103 closer to the first side 11 of the metal wire 101, embodiments of the present invention enable the MTJ stack 103 to collect more vertical spins from the metal wire 101, which is, for example, a spin-orbit torque (SOT) wire. As illustrated in the enlarged portion of Figure 1C, during normal operation when current is flowing from the conductive via 102 towards the MTJ stack 103 (to the plane of the paper), the electron spins are generally aligned in a counterclockwise direction, with more vertical spins present on the first (right) side 11 and the second (left) side 12 of the metal wire 101. Because it is positioned on the first (right) side 11 of the metal wire 101, the MTJ stack 103 can collect more upward vertical spins, which helps in aligning the free layer 103c to the reference layer 103a within the MTJ stack 103, thereby enhancing the performance of the MRAM device 100. The horizontal spins above and below the metal wire 101 are generally not very useful in improving MRAM device performance.
[0036] Figures 2A, 2B, and 2C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 2A is a front view of the MRAM device 200, Figure 2B is a top view, and Figure 2C is a left side view. Similar to the MRAM device 100, the MRAM device 200 has a metal wire 201 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 201 is symmetrical with respect to the longitudinal axis 10. However, the MRAM device 200 is structurally asymmetrical with respect to the longitudinal axis 10, for example, due to the arrangement of the MTJ stack 203. For example, compared to the MRAM device 100, the MTJ stack 203 in the MRAM device 200 is located in a second region beyond the edge of the first side 11 of the metal wire 201. The MTJ stack 203 covers less than half, or at most equal to, half the width W of the metal wire 201. The MRAM device 200 further includes conductive vias 202 located in a first region of the metal wire 201.
[0037] The MTJ stack 203 may include a free layer, a tunnel barrier layer, and a reference layer, as in the case of the MTJ stack 103. However, for the sake of simplicity in the illustration, the free layer, tunnel barrier layer, and reference layer of the MTJ stack 203 are not individually labeled, and the same may apply to the MTJ stacks of other MRAM devices shown in subsequent drawings.
[0038] By positioning the MTJ stack 203 beyond the edge, particularly covering less than half the width W of the metal wire 201, the MTJ stack 203 can avoid collecting downward vertical spins that are generally present on the second (left) side 12 of the metal wire 201. If downward vertical spins are collected, they may cancel out the effect of upward vertical spins collected by the MTJ stack 203, thereby weakening the overall effect of spin-orbit torque on MRAM device performance. In other words, embodiments of the present invention provide an MRAM device 200 having a structure that mitigates the collection of downward vertical spins, thereby avoiding their canceling effect on upward vertical spins and thereby enhancing the influence of upward vertical spins on MRAM device performance.
[0039] In the above description, it is assumed that current is injected into the plane of the paper in Figures 1C and 2C, generating upward vertical spins that write the free layer of the MTJ stack to the up state. However, if the current is reversed and flows from the MTJ stack to the conductive vias (outside the plane of the paper), downward vertical spins are generated on the first (right) side 11 of the metal wires 101 and 201. In other words, the spins are in the opposite direction compared to when the current is injected into the plane of the paper. In this case, the downward vertical spins are collected by the free layer of the MTJ stack, thereby writing the free layer to the down state. Hereafter, for the sake of simplicity in describing the embodiments, it is generally assumed that the current flows from the conductive vias to the MTJ stack and then to the plane of the paper. As described above, a similar description may apply if the current is reversed and flows out of the plane of the paper from the MTJ stack to the conductive vias.
[0040] Figures 3A, 3B, and 3C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 3A is a front view of the MRAM device 300, Figure 3B is a top view, and Figure 3C is a left side view. Similar to the MRAM devices 100 and 200, the MRAM device 300 has a metal wire 301 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 301 is symmetrical with respect to the longitudinal axis 10. In Figure 3B and subsequent drawings, for the sake of brevity, the width W and length L are not specifically shown in the drawings.
[0041] Compared to the MRAM device 200, in addition to the conductive vias 302 and MTJ stack 303, the MRAM device 300 further includes a high-resistivity spin conductor layer 304 covering about half of the metal wire 301 on the first side 11 of the metal wire 301. The spin conductor layer 304 may be located immediately beneath the MTJ stack 303 and may be a layer of graphene formed by a chemical vapor deposition (CVD) process. In one embodiment, the spin conductor layer 304 may be a layer of "dirty" copper, where "dirty" copper means copper doped with a small amount (e.g., about 0.1% to 5% ATM) of another element with a lower atomic number to substantially increase the resistivity of the copper (e.g., by 10 times) without significantly reducing its spin diffusion length (e.g., by half). The spin conductor layer 304 is then patterned to cover approximately half of the metal wire 301 on the first (right) side 11 of the metal wire 301. The spin conductor layer 304 can pass upward vertical spins to the MTJ stack 303, that is, it can allow the MTJ stack 303 to collect the upward vertical spins. Meanwhile, due to its high resistance property, the spin conductor layer 304 can limit or prevent the electron current from leaving the metal wire 301 "prematurely," thereby increasing and / or maximizing the time and / or duration for which the electron current generates upward vertical spins as it propagates along the metal wire 301, which can be used to align the free layer to the reference layer in the MTJ stack to enhance the performance of the MRAM device.
[0042] Figures 4A, 4B, and 4C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 4A is a front view of the MRAM device 400, Figure 4B is a top view, and Figure 4C is a left side view. Similar to the MRAM devices 100, 200, and 300, the MRAM device 400 has a metal wire 401 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 401 is symmetrical with respect to the longitudinal axis 10.
[0043] Compared to the MRAM device 200, in addition to the conductive vias 402 and MTJ stack 403, the MRAM device 400 includes an electrically insulating spin conductor layer 404 covering about half of the metal wire 401 on the first side 11 of the metal wire 401. The MRAM device 400 further includes a low-resistance metal spin conductor layer 405 on top of the electrically insulating spin conductor layer 404, and metal studs 406 at the ends of the metal spin conductor layer 405. The metal studs 406 may be in contact with the metal wire 401 and its second end 22.
[0044] The electrically insulating spin conductor layer 404 may be, for example, a layer of nickel oxide (NiO) that has low "resistance" to electron spin but high resistance to electron current. The metallic spin conductor layer 405 may be, for example, a low-resistance metallic layer such as copper (Cu). The metallic spin conductor layer 405 can transfer the vertical spin collected from the metallic wire 401 through the electrically insulating spin conductor layer 404 to the MTJ stack 403. On the other hand, the electrically insulating spin conductor layer 404 prevents the electron current (coming from the conductive via 402) from leaving the metallic wire 401 "prematurely" so that most of the electron current can pass through the entire metallic wire 401 to generate vertical spin. At the second end 22 of the metallic wire 401, any remaining electron current can be collected by the metallic stud 406 and transferred to the MTJ stack 403 via the metallic spin conductor layer 405.
[0045] As described above and shown in their respective drawings, MRAM devices 100, 200, 300, and 400 achieve improved device performance by asymmetrically arranging the MTJ stack to collect more vertical spins of one type, such as the upward type, than vertical spins of the other type, such as the downward type. In one embodiment, the asymmetric arrangement allows the MTJ stack to collect one type of vertical spin and substantially avoid collecting the other type of vertical spin.
[0046] Herein, these dielectric layers may not be specifically shown in Figures 1, 2, 3, and 4, respectively, but it should be noted that the metal wires, conductive vias, and MTJ stacks of the MRAM devices 100, 200, 300, and 400 are generally embedded within one or more dielectric layers. For example, the metal wires 101, 201, 301, and 401 may be spin-orbit torque (SOT) wires, and the first and second sides 11 and 12, and the first and second ends 21 and 22 of the metal wires 101, 201, 301, and 401 are generally surrounded by dielectric layers. Dielectric layers are omitted in the illustrations for the sake of brevity so as not to obscure the illustration of embodiments of the present invention. Some dielectric layers may be omitted in subsequent drawings of the MRAM devices for the same reason.
[0047] Figures 5A, 5B, and 5C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 5A is a front view of the MRAM device 500, Figure 5B is a top view, and Figure 5C is a left side view. Similar to the MRAM device described above, the MRAM device 500 has a metal wire 501 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 501 is symmetrical with respect to the longitudinal axis 10.
[0048] Here, the metal wire 501 may be referred to as the first metal wire. In addition to the conductive via 502 and the MTJ stack 503, the MRAM device 500 may include a second metal wire 504. According to embodiments of the present invention, structural asymmetry of the MRAM device 500 can be achieved by arranging the second metal wire 504 alongside the first metal wire 501, thereby forming a bimetallic wire. In other words, the second metal wire 504 may be formed on or attached to the first side 11 of the first metal wire 501. The first and second metal wires 501 and 504 together may be referred to as a bimetallic wire. When the second metal wire 504 is present, the MRAM device 500 may be structurally asymmetric with respect to the longitudinal axis 10 of the first metal wire 501. Here, although not required, as will be discussed in more detail below with reference to Figures 6A to 6D, in one embodiment the MTJ stack 503 is placed on the metal wire 501 and is symmetrically arranged with respect to the longitudinal axis 10.
[0049] In one embodiment, the first metal wire 501 may contain or be made of a first metallic element having an atomic number greater than 54, which may be known as a “heavy” metal. The second metal wire 504 may contain or be made of a second metallic element having an atomic number less than 30, which may be known as a “light” metal. In another embodiment, the first metal wire 501 may be made of tungsten (W), platinum (Pt), or tantalum (Ta), and the second metal wire 504 may be made of copper (Cu) or aluminum (Al).
[0050] According to embodiments of the present invention, during normal operation, an electron current may flow from the conductive via 502 to the first metal wire 501 toward the MTJ stack 503. Electron spins may be created or generated in a counterclockwise direction within the first metal wire 501. More specifically, upward vertical spins may be created in a region near the first side 11 of the first metal wire 501.
[0051] By forming a second metal wire 504 adjacent to the first side of the first metal wire 501, embodiments of the present invention enable the transfer of these upward vertical spins on the first side 11 of the first metal wire 501 to the second metal wire 504. Once transferred to the second metal wire 504, the upward vertical spins can be more easily retained inside the second metal wire 504, which is a "light" metal, compared to if they remained inside the first metal wire 501, which is a "heavy" metal, where the upward vertical spins may undergo spin-reversal scattering. The upward vertical spins can propagate inside the second metal wire 504 until they descend the metal wire 501 and reach the MTJ stack 503, where they are collected. As described above, here, "light" metal means a metal element with a small atomic number, for example, less than 30, while "heavy" metal means a metal element with a large atomic number, for example, greater than 54.
[0052] Figures 6A, 6B, 6C, and 6D are top views of MRAM devices according to several embodiments of the present invention. More specifically, Figures 6A, 6B, 6C, and 6D show MRAM devices 600 having first and second metal wires 601 and 604, but with different arrangements of conductive vias 602 and MTJ stacks 603. For example, the conductive vias 602 may be located only inside the first metal wire 601, as in Figures 6A, 6C, and 6D, or on the interface region where the first metal wire 601 contacts the second metal wire 604, as in Figure 6B. Furthermore, for example, the MTJ stacks 603 may be located inside the first metal wire, as previously shown in Figure 5B, or partially or entirely inside the second metal wire 604, as in Figures 6A, 6B, 6C, and 6D. Furthermore, as shown in Figures 6C and 6D, the second metal wire 604 may be L-shaped and is formed adjacent to the first side 11 and the second end 22 of the first metal wire 601.
[0053] Figures 7A, 7B, and 7C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 7A is a front view of the MRAM device 700, Figure 7B is a top view, and Figure 7C is a left side view. Similar to the MRAM device described above, the MRAM device 700 has a metal wire 701 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 701 is symmetrical with respect to the longitudinal axis 10.
[0054] Here, the metal wire 701 may be referred to as the first metal wire. In addition to the conductive via 702 and the MTJ stack 703, the MRAM device 700 may include a second metal wire 704. Similar to the MRAM device 500, the second metal wire 704 may be positioned or attached to the first side 11 of the first metal wire 701 to form a bimetal wire. Unlike the MRAM device 500, here the MTJ stack 703 is positioned over the region around the interface between the first and second metal wires 701 and 704.
[0055] In one embodiment, the first metal wire 701 and the second metal wire 704 may include materials that generate spin-orbit torques of opposite signs when current flows through them in the same direction. For example, the first metal wire 701 may be made of either tungsten (W) or tantalum (Ta), and the second metal wire 704 may be made of niobium (Nb).
[0056] According to embodiments of the present invention, during normal operation, an electron current can flow from the conductive via 702 to both the first metal wire 701 and the second metal wire 704 toward the MTJ stack 703. As shown in the enlarged view of Figure 7C, counterclockwise spins of electrons can be created or generated within the first metal wire 701, and clockwise spins of electrons can be created or generated within the second metal wire 704. By positioning the MTJ stack 703 over the interface region between the first and second metal wires 701 and 704, embodiments of the present invention enable a process of collecting the upward vertical spins generated within both the first and second metal wires 701 and 704, thereby enhancing the performance of the MRAM device 700 with more upward vertical spins.
[0057] Figures 8A, 8B, and 8C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 8A is a front view of the MRAM device 800, Figure 8B is a top view, and Figure 8C is a left side view. Similar to the MRAM device described above, the MRAM device 800 has a metal wire 801 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 801 is symmetrical with respect to the longitudinal axis 10.
[0058] Like the MRAM device 700, the MRAM device 800 includes both a first metal wire 801 and a second metal wire 804 that can generate spin-orbit torques of opposite signs when current flows through them in the same direction. For example, the first metal wire 801 may be W or Ta, and the second metal wire 804 may be Nb. The MRAM device 800, like the MRAM device 400, may further include an electrically insulating spin conductor layer 805 covering the interface region of about half of the first metal wire 801 and half of the second metal wire 804. The MRAM device 800 further includes a low-resistance metal spin conductor layer 806 on top of the electrically insulating spin conductor layer 805. Metal studs 807 may be formed at the ends of the metal spin conductor layer 806. The metal studs 807 may be in contact with the first and second metal wires 801 and 804 and their respective ends.
[0059] Like the electrically insulating spin conductor layer 404, the electrically insulating spin conductor layer 805 may be a layer of nickel oxide (NiO) that has low "resistance" to electron spin but high resistance to electron current. The metallic spin conductor layer 806 may be a low-resistance metallic layer, such as copper (Cu), that can transfer the vertical spins collected from the first and second metallic wires 801 and 804 to the MTJ stack 803 via the electrically insulating spin conductor layer 805. On the other hand, the electrically insulating spin conductor layer 805 can guide or force at least the majority of the electron current to pass through the first and second metallic wires 801 and 804 and under the MTJ stack 803 until they reach the metallic stud 807. At the metallic stud 807, any remaining electron current can be collected and transferred to the MTJ stack 803 via the metallic spin conductor layer 806.
[0060] Figures 9A, 9B, and 9C are illustrative diagrams of an MRAM device according to one embodiment of the present invention. More specifically, Figure 9A is a front view of the MRAM device 900, Figure 9B is a top view, and Figure 9C is a left side view. Similar to the MRAM device described above, the MRAM device 900 has a metal wire 901 having a width W between the first side 11 and the second side 12; a length L between the first end 21 and the second end 22; and a longitudinal axis 10. The metal wire 901 is symmetrical with respect to the longitudinal axis 10.
[0061] Similar to the MRAM device 800, the MRAM device 900 includes both first and second metal wires 901 and 904, conductive vias 902, an MTJ stack 903, an electrically isolated spin conductor layer 905, and a metal spin conductor layer 906 above the electrically isolated spin conductor layer 905. Unlike the MRAM device 800, the electrically isolated spin conductor layer 905 of the MRAM device 900 terminates before reaching the region immediately below the MTJ stack 903. The electron current is guided or forced by the electrically isolated spin conductor layer 905 to flow to the region below the MTJ stack 903, and can then pass directly through the metal spin conductor layer 906 to the MTJ stack 903. Thus, a metal stud is not required or necessary at the end of the metal spin conductor layer 906 to collect any remaining electron current.
[0062] Figures 10A, 10B, and 10C are side views of MRAM devices according to several embodiments of the present invention. More specifically, Figure 10A shows an MRAM device 1000 in which conductive vias 1002 can be formed on a metal wire 1001, while an MTJ stack 1003 can be formed below the metal wire 1001; Figure 10B shows an MRAM device 1000 in which both the conductive vias 1002 and the MTJ stack 1003 are formed on the metal wire 1001; and Figure 10C shows an MRAM device 1000 in which the MTJ stack 1003 is formed on the metal wire 1001 via low-resistance vias 1004.
[0063] Figures 11A, 11B, and 11C are top views of MRAM devices according to several embodiments of the present invention. For example, Figure 11A shows an MRAM device 1100 having nonlinear metal wires 1101. The metal wires 1101 may be formed in the shape of the letter "C" to leave some area space. The MRAM device 1100 may also include conductive vias 1102, an MTJ stack 1103, and optionally a high-resistance spin conductor layer 1104 covering the edges of the metal wires 1101. The high-resistance spin conductor layer 1104 may be a layer of graphene formed through a CVD process, or a layer of "dirty" copper as defined above. Furthermore, for example, Figure 11B shows an MRAM device 1100 having nonlinear metal wires 1101 in the shape of the letter "S" to leave some area space, as in the case of Figure 11A. Figure 11C shows an MRAM device 1100 having a non-uniform high-resistance spin conductor layer 1104 covering different portions of a metal wire 1101. Conductive vias 1102 may be partially located on the high-resistance spin conductor layer 1104, while MTJ stacks 1103 may be formed or located entirely on the high-resistance spin conductor layer 1104, within their expanded region.
[0064] Figure 12 is a top view of an MRAM device according to one embodiment of the present invention. More specifically, Figure 12 shows an MRAM structure 1200 which includes a plurality of MRAM devices such as MRAM devices 1211, 1212, 1221, and 1222 arranged together to form an MRAM structure 1200. The plurality of MRAM devices such as MRAM devices 1211, 1212, 1221, and 1222 may be any one or more of the MRAM devices 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, and 1100 described above, and may be operated individually or be operable individually, or may be collectively controlled to jointly realize a desired data storage function.
[0065] The MRAM devices described above may be formed or manufactured using lithography patterning and etching processes, which may include subtractive and additive patterning processes, for example. For example, Figures 13A to 13E are illustrative cross-sectional views of an MRAM device at various manufacturing stages according to one embodiment of the present invention. For example, embodiments of the present invention may include the step of providing a semiconductor substrate 1301 having one or more conductive vias 1302 embedded or formed therein. A hard mask 1303 having openings that expose portions of one or more conductive vias 1302 may be formed on the substrate 1301. A seed layer 1304 may then be directionally deposited inside the openings (Figure 13A). Next, the hard mask 1303 may be removed or lifted, leaving only the seed layer 1304 inside the openings remaining on one or more conductive vias 1302 (Figure 13B). Subsequently, a spin-conducting material layer 1305 can be deposited on the seed layer 1304, and a ferromagnetic material layer 1306 (for forming an MTJ stack) can be deposited or formed on the spin-conducting material layer 1305 (Figure 13C). The structure is then subjected to an annealing process that deforms the seed layer 1304 into one or more SOT wires 1307 (Figure 13D). The ferromagnetic material layer 1306 on the SOT wires 1307 is then patterned to form one or more MTJ stacks 1308 (Figure 13E). The spin-conducting material layer 1305 can then be patterned to form one or more metallic wires 1309, such as spin-conductor wires, formed adjacent to the one or more SOT wires 1307 (Figure 13F).
[0066] It should be understood that the exemplary methods discussed herein can be readily incorporated into other semiconductor processing flows, semiconductor devices, and integrated circuits having various analog and digital or mixed-signal circuits. In particular, integrated circuit dies can be fabricated using various devices such as field-effect transistors, bipolar transistors, metal-oxide-semiconductor transistors, diodes, capacitors, inductors, etc. Integrated circuits according to the present invention can be employed in applications, hardware, and / or electronic systems. Suitable hardware and systems for implementing the present invention may include, but are not limited to, personal computers, communication networks, e-commerce systems, mobile communication devices (e.g., mobile phones), solid-state media storage devices, functional circuits, etc. Systems and hardware incorporating such integrated circuits are considered to be part of the embodiments described herein. Given the teachings of the present invention provided herein, those skilled in the art will be able to contemplate other implementations and applications of the techniques of the present invention.
[0067] Therefore, at least a portion of one or more of the semiconductor structures described herein can be implemented in an integrated circuit. The resulting integrated circuit chip can be distributed by the manufacturer in the form of a raw wafer (i.e., as a single wafer with multiple unpackaged chips), as a bare die, or in a packaged form. In the latter case, the chip can be mounted in a single-chip package (e.g., a plastic carrier with leads fixed to a motherboard or other high-level carrier) or in a multi-chip package (e.g., a ceramic carrier with surface interconnects and / or embedded interconnects). In either case, the chip can then be integrated together with other chips, discrete circuit elements, and / or other signal processing devices as part of either an intermediate product such as a motherboard, or a final product. The final product can be any product containing an integrated circuit chip, ranging from toys and other low-cost applications to displays, keyboards or other input devices, and advanced computer products with a central processor.
[0068] The descriptions of various embodiments of the present invention have been presented for illustrative purposes only and are not intended to be exhaustive; the present invention is not limited to the embodiments disclosed herein. The terminology used herein has been chosen to best describe the principles, practical applications, or technological improvements over the technologies available on the market of the embodiments, and to enable those skilled in the art to understand the embodiments disclosed herein. Many modifications, substitutions, alterations, and equivalents will now come to mind for those skilled in the art. Such modifications, alterations, and / or alternative embodiments can be made without departing from the scope of the present invention and are thus intended and considered to be all included within the scope of the present invention. Accordingly, it should be understood that the appended claims are intended to encompass all such modifications and alterations that fall within the scope of the present invention.
Claims
1. A metal wire, the metal wire having a width between a first side and a second side; a length between a first end and a second end; and a longitudinal axis, and being symmetrical with respect to the longitudinal axis; A conductive via that contacts a first region of the metal wire; and A magnetic tunnel junction (MTJ) stack positioned in the second region of the aforementioned metal wire. An MRAM structure comprising, The MRAM structure is asymmetrical with respect to the longitudinal axis.
2. The MRAM structure according to claim 1, wherein the metal wire is a first metal wire, and further comprises a second metal wire adjacent to the first side of the first metal wire.
3. The MRAM structure according to claim 2, wherein the first metal wire comprises a metal having an atomic number greater than 54, and the second metal wire comprises a metal having an atomic number less than 30.
4. The MRAM structure according to claim 2 or 3, wherein the first metal wire is made of a material selected from the group consisting of tungsten (W), platinum (Pt), and tantalum (Ta), and the second metal wire is made of a material selected from the group consisting of aluminum (Al) and copper (Cu).
5. The MRAM structure according to claim 3 or 4, wherein the MTJ stack comprises a free layer, a tunnel barrier layer above the free layer, and a reference layer above the tunnel barrier layer, the free layer being positioned on at least one of the first and second metal wires.
6. The MRAM structure according to claim 2, wherein the first metal wire comprises tungsten (W), platinum (Pt), or tantalum (Ta), and the second metal wire comprises niobium (Nb).
7. The MRAM structure according to claim 6, further comprising an electrically insulating spin conductor on the first and second metal wires, and a metal spin conductor on the electrically insulating spin conductor, wherein the electrically insulating spin conductor covers a portion of the first metal wire and a portion of the second metal wire adjacent to the portion of the first metal wire.
8. The MRAM structure according to claim 7, wherein the MTJ stack is arranged on the metal spin conductor, and a portion of the metal spin conductor beneath the MTJ stack is in direct contact with the first and second metal wires.
9. The MRAM structure according to claim 7 or 8, further comprising a metal stud at the end of the metal spin conductor, wherein the metal stud is in contact with the metal spin conductor; the first metal wire; and the second metal wire.
10. The MRAM structure according to any one of claims 7 to 9, wherein the electrically insulating spin conductor contains nickel oxide (NiO) and the metallic spin conductor contains copper (Cu).
11. The MRAM structure according to any preceding claim, wherein the conductive vias and the MTJ stack are arranged symmetrically with respect to the longitudinal axis of the metal wire.
12. The MRAM structure according to any preceding claim, wherein the MTJ stack is positioned substantially near or beyond the first side edge of the metal wire and covers less than half the width of the metal wire.
13. The MRAM structure according to claim 12, wherein the metal wire is embedded in a dielectric layer, and the dielectric layer covers the first and second sides of the metal wire.
14. The MRAM structure according to claim 12 or 13, further comprising an electrically insulated spin conductor and a metallic spin conductor on the electrically insulated spin conductor, wherein the electrically insulated spin conductor covers the edge of the first side of the metallic wire.
15. The MRAM structure according to any one of claims 12 to 14, further comprising a high-resistance spin conductor covering the first edge of the metal wire.
16. The MRAM structure according to any prior claim, wherein the metal wire is not linear and has one or more curved portions from the first end to the second end.
17. A bimetallic wire having first and second metal wires formed side by side; A conductive via that contacts a first region of the bimetallic wire; and A magnetic tunnel junction (MTJ) stack that contacts the second region of the bimetallic wire. Equipped with, The first metal wire comprises a first metal element having an atomic number greater than 54, and the second metal wire comprises a second metal element having an atomic number less than 30. MRAM structure.
18. The MRAM structure according to claim 17, wherein the conductive vias are arranged on the first metal wire and the MTJ stack is arranged on the second metal wire.
19. A bimetallic wire having first and second metal wires formed side by side; A conductive via that contacts a first region of the bimetallic wire; and A magnetic tunnel junction (MTJ) stack that contacts the second region of the bimetallic wire. Equipped with, The first metal wire is made of tungsten (W), platinum (Pt), or tantalum (Ta), and the second metal wire is made of copper (Cu) or aluminum (Al). MRAM structure.
20. The MRAM structure according to claim 19, wherein the MTJ stack is arranged on the interface between the first metal wire and the second metal region.