Apparatus and method for reducing standby power consumption in an isolated power conversion system

Abstract

The device includes a secondary controller coupled to the secondary circuit of a power conversion system and a primary controller coupled to the primary circuit of a power conversion system, wherein the primary controller is coupled to the secondary controller through an isolated interface, and the secondary controller is configured to detect whether a load is coupled to the power conversion system, and in response to the load being disconnected from the power conversion system, communicate with the primary controller by pulling down the secondary feedback nodes in the secondary circuit and the primary feedback nodes in the primary circuit for a first predetermined time to reduce power consumption, and in response to the load being reconnected to the power conversion system, communicate with the primary controller by pulling down the secondary feedback nodes in the secondary circuit for a second predetermined time.

Description

Technical Field

[0001]

[0001] Cross - reference to Related Applications This patent application claims the priority of U.S. Patent Application No. 18 / 387,742, titled "Apparatus and Method for Reducing Stand - by Power Consumption in Isolated Power Conversion System", filed on November 7, 2023, and is specifically a continuation application thereof, which is incorporated herein by reference as if the entirety were reproduced.

[0002]

[0002] Embodiments of the present invention relate to a feedback control device and method, and in particular embodiments, relate to a feedback control device and method for reducing power consumption in an isolated power conversion system.

Background Art

[0003]

[0003] A power conversion system (e.g., an adapter) is used to convert an alternating current (ac) voltage from a power company into a direct current (dc) voltage suitable for an electronic device. A power conversion system typically includes an ac / dc stage (e.g., a rectifier) and an isolated dc / dc stage (e.g., an isolated dc / dc converter). The ac / dc stage converts the power from the ac power line and establishes a dc bus for the isolated dc / dc stage. The ac / dc stage may include various electromagnetic interference (EMI) filters and a bridge rectifier formed by four diodes. The EMI filters are utilized to attenuate both differential - mode noise and common - mode noise. The bridge rectifier converts the ac voltage into a full - wave rectified dc voltage. Such a full - wave rectified dc voltage supplies a stable dc input voltage to the isolated dc / dc stage through a plurality of smoothing capacitors coupled to the output of the bridge rectifier.

[0004]

[0004] The isolated DC / DC stage converts the DC bus voltage to a voltage suitable for electronic device loads such as tablets, printers, mobile phones, personal computers, or any combination thereof. The isolated DC / DC stage can be implemented by using various power topologies such as flyback converters, forward converters, half-bridge converters, and full-bridge converters.

[0005]

[0005] In some applications (for example, adapters for supplying power to personal computers), flyback converters are used to regulate the output voltage of a power conversion system. Flyback converters include transformers that provide galvanic isolation to meet various safety requirements. A flyback converter may comprise three controllers: a primary side controller located on the primary side to drive the main switch (primary switch) of the flyback converter; a synchronous rectifier controller located on the secondary side to control the on and off of a synchronous switch to reduce secondary conduction losses; and a secondary side controller located on the secondary side to sense the output voltage and communicate with the primary side controller to achieve various system functions such as closed-loop adjustment and the Universal Serial Bus (USB) power supply protocol.

[0006]

[0006] The flyback converter supplies a regulated output voltage to many devices that utilize the regulated output voltage. Primary and secondary controllers control the power conversion. The controllers have an active mode for actively controlling the flyback converter when the power conversion system is supplying power to the load. To conserve energy, the primary and secondary controllers may have a standby mode. During standby mode, the primary and secondary controllers enter a low-power consumption state because the power required by the load connected to the power conversion system does not require the primary and secondary controllers to control the flyback converter.

[0007]

[0007] In standby mode, in order to maintain the output voltage regulation, the feedback circuits of the flyback converter (e.g., reference voltage, error amplifier, and optical coupler) must continue to operate even when the load is disconnected from the power conversion system. This means that the power consumption of the feedback circuits cannot be saved. Therefore, these feedback circuits always consume power even when the load device is disconnected. It is desirable to have a simple and reliable control method to reduce the power consumption of the feedback circuits and thereby achieve good power conversion efficiency. [Overview of the project]

[0008]

[0008] These and other problems are generally resolved or avoided by preferred embodiments of the present disclosure that provide feedback control devices and methods for reducing power consumption in isolated power conversion systems, and the overall technical advantages are achieved.

[0009]

[0009] According to one embodiment, the device comprises a secondary controller coupled to the secondary circuit of a power conversion system and a primary controller coupled to the primary circuit of a power conversion system, wherein the primary controller is coupled to the secondary controller through an isolated interface, and the secondary controller is configured to: detect whether a load is coupled to the power conversion system; communicate with the primary controller to initiate a sleep mode by pulling down the secondary feedback node in the secondary circuit and the primary feedback node in the primary circuit for a first predetermined time in response to the load being disconnected from the power conversion system, wherein in the sleep mode both the primary and secondary feedback circuits are disabled to reduce power consumption; supply high impedance to the secondary feedback node to reduce power consumption; and communicate with the primary controller to terminate the sleep mode by pulling down the secondary feedback node in the secondary circuit for a second predetermined time in response to the load being reconnected to the power conversion system, wherein after the sleep mode is terminated, the primary and secondary feedback circuits are enabled to restore feedback loop control to adjust the output voltage of the power conversion system.

[0010]

[0010] According to another embodiment, the method includes: a secondary controller detecting whether a load is coupled to a power conversion system comprising a primary circuit and a secondary circuit; communicating with the primary controller by pulling down a secondary feedback node in the secondary circuit and a primary feedback node in the primary circuit for a first predetermined time in response to the load being disconnected from the power conversion system; configuring the secondary feedback nodes to function as high-impedance nodes to reduce power consumption; and communicating with the primary controller by pulling down a secondary feedback node in the secondary circuit for a second predetermined time in response to the load being reconnected to the power conversion system.

[0011]

[0011] According to yet another embodiment, the system comprises an isolated power converter configured to be coupled between a power source and a load, a secondary controller coupled to the secondary circuit of the system, and a primary controller coupled to the primary circuit of the system, wherein the primary controller is coupled to the secondary controller through an isolated interface, and the secondary controller is configured to detect whether a load is coupled to the isolated power converter, notify the primary controller in response to the load being disconnected from the isolated power converter, and reduce the power consumption of the secondary circuit by configuring a secondary feedback node as a high-impedance node, and the primary controller is configured to disable the feedback control loop of the isolated power converter when the load is disconnected from the isolated power converter.

[0012]

[0012] The above provides a fairly broad overview of the features and technical advantages of the Disclosure so that the detailed description of the Disclosure below may be well understood. Further features and advantages of the Disclosure that form the subject matter of the claims of the Disclosure are described below. It should be understood by those skilled in the art that the disclosed concepts and particular embodiments can be readily used as a basis for modifying or designing other structures or processes to accomplish the same objectives of the Disclosure. Furthermore, it should be understood that such equivalent structures do not deviate from the spirit and scope of the Disclosure as set forth in the appended claims.

[0013]

[0013] For a complete understanding of the present disclosure and its advantages, refer to the following description in conjunction with the accompanying drawings. [Brief explanation of the drawing]

[0014] [Figure 1] This is a block diagram of a power conversion system according to various embodiments of the present disclosure. [Figure 2] Figure 1 is a schematic diagram of an isolated power converter according to various embodiments of the present disclosure. [Figure 3]Figure 1 is a schematic diagram of a first implementation of the primary feedback circuit, isolation interface, and secondary feedback circuit shown in various embodiments of the present disclosure. [Figure 4] Figure 1 is a schematic diagram of a second implementation of the primary feedback circuit, isolation interface, and secondary feedback circuit shown in various embodiments of the present disclosure. [Figure 5] This figure shows various waveforms related to the circuits shown in Figures 3 and 4, according to various embodiments of the present disclosure. [Figure 6] This figure shows a state machine for controlling mode transitions of a secondary controller according to various embodiments of the present disclosure. [Figure 7] This figure shows a state machine for controlling mode transitions of a primary controller according to various embodiments of the present disclosure. [Figure 8] This is a flowchart showing the control of the power conversion system shown in Figure 1 according to various embodiments of the present disclosure. [Modes for carrying out the invention]

[0015]

[0022] Corresponding numbers and symbols in different figures generally refer to the corresponding parts unless otherwise specified. The drawings are drawn to clearly illustrate relevant aspects of various embodiments and are not necessarily drawn to a fixed scale.

[0016]

[0023] The creation and use of the current preferred embodiments are described in detail below. However, it should be understood that this disclosure brings forth many applicable inventive concepts that can be embodied in a wide variety of specific circumstances. The specific embodiments described are merely illustrative of specific methods for creating and using this disclosure and do not limit the scope of this disclosure.

[0017]

[0024] The present disclosure relates to preferred embodiments in a specific situation, namely, a feedback control device and method for reducing power consumption in an isolated power conversion system. However, the present disclosure can be applied to various power conversion systems. Various embodiments will be described in detail below with reference to the accompanying drawings.

[0018]

[0025] FIG. 1 is a block diagram of a power conversion system according to various embodiments of the present disclosure. The power conversion system includes an isolated power converter 100 configured to be coupled between a power supply VIN and a load 130. The isolated power converter 100 is utilized to convert a DC voltage from an arbitrary level (e.g., VIN) to another level (e.g., Vo) suitable for the load 130. In some embodiments, the isolated power converter 100 is a flyback converter. In alternative embodiments, the isolated power converter 100 may be other suitable power converters such as a full-bridge power converter, a half-bridge power converter, an LLC resonant converter, a forward converter, etc.

[0019]

[0026] As shown in FIG. 1, the power conversion system further includes a primary controller 110, a secondary controller 120, a primary feedback circuit 115, a secondary feedback circuit 125, and an isolation interface 140. In some embodiments, the primary controller 110 is a PWM controller configured to receive a feedback signal Vcomp from a feedback node COMP and generate a PWM signal applied to the primary switch of the isolated power converter 100. The secondary controller 120 is a universal serial bus (USB) power supply (PD) controller configured to provide a flexible power supply along with data via a single cable. Both the PWM controller and the USB PD controller are well-known and thus will not be described in further detail herein.

[0020]

[0027] Note that the block diagram shown in FIG. 1 is merely an example and should not unduly limit the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, the power conversion system may include a synchronous rectifier controller. In some embodiments, the synchronous rectifier controller is a stand-alone integrated chip. In an alternative embodiment, the synchronous rectifier controller is part of the secondary controller 120.

[0021]

[0028] As shown in FIG. 1, the secondary controller 120 is coupled to the secondary feedback circuit 125 and the output of the isolated power converter 100. The primary controller 110 is coupled to the primary feedback circuit 115. The primary controller 110 is coupled to the secondary controller 120 through the primary feedback circuit 115, the isolation interface 140, and the secondary feedback circuit 125.

[0022]

[0029] In some embodiments, the isolation interface 140 is implemented as an optocoupler. In an alternative embodiment, the isolation interface 140 may be other suitable semiconductor devices such as a digital isolator.

[0023]

[0030] The secondary feedback circuit 125 includes a resistive voltage divider, a compensation network, and a feedback control integrated circuit (e.g., an operational amplifier or a shunt voltage regulator). The primary feedback circuit 115 includes a pull-up resistor and a capacitor. The detailed structures of the secondary feedback circuit 125 and the primary feedback circuit 115 will be described in detail below with respect to FIGS. 3-4. Throughout the description, the secondary feedback circuit 125 may alternatively be referred to as the secondary circuit. The primary feedback circuit 115 may alternatively be referred to as the primary circuit.

[0024]

[0031] During operation, the secondary controller 120 is configured to detect whether the load 130 is coupled to the isolated power converter 100. In response to the load 130 being disconnected from the isolated power converter 100, the secondary controller 120 is configured to notify the primary controller 110 by controlling the voltage on the feedback node COMP (shown in Figures 3-4) and to reduce the power consumption of the primary and secondary feedback circuits 115, 125 by configuring the secondary feedback node (e.g., OCDRV shown in Figures 3-4) as a high-impedance node. When the load 130 is disconnected from the isolated power converter 100, the primary controller 110 is configured to disable the feedback control loop of the isolated power converter 100. This causes the isolated power converter to enter sleep mode. In sleep mode, the secondary controller 120 turns off the functions of the feedback circuits (e.g., reference voltage, error amplifier) ​​and cuts off the current flowing through the isolated interface 140 (e.g., optical coupler). Correspondingly, the primary controller 110 interrupts the feedback loop and turns off most functions to reduce power consumption. The detailed operating principles of the primary controller 110 and the secondary controller 120 will be explained below with reference to Figures 3 to 7.

[0025]

[0032] One advantage of having the aforementioned sleep mode is that the standby power consumption of the power conversion system is reduced from approximately 25 milliwatts to approximately 3 milliwatts.

[0026]

[0033] It should be noted that Figure 1 shows only the relevant elements of a power conversion system, which may include many other elements. The elements of the power conversion system shown herein are limited only for the purpose of clearly illustrating aspects of the invention in various embodiments. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, depending on the needs of various applications and designs, a switch may be coupled between the output of the isolated power converter and the load. The on and off of the switch is controlled by the secondary controller 120.

[0027]

[0034] Figure 2 is a schematic diagram of the isolated power converter shown in Figure 1 according to various embodiments of the present disclosure. The isolated power converter is implemented as a flyback converter as shown in Figure 2. The flyback converter comprises an input capacitor CIN, a primary switch Q1, a transformer, a secondary rectifier, and an output capacitor Co. The secondary rectifier is formed by a synchronous switch Q2.

[0028]

[0035] The voltage of power supply VIN is coupled to primary switch Q1 through the primary winding NP of the transformer. Primary switch Q1 is connected to ground. In some embodiments, a current-sensing resistor (not shown) may be connected between primary switch Q1 and ground. A reset device (not shown) may also be connected in parallel with primary winding NP. The reset device is used to reset the magnetization current of the flyback converter. The reset device is formed by a diode, a resistor, and a clamp capacitor. The reset device is also known as an RCD reset device.

[0029]

[0036] Referring back to Figure 1, the primary controller 110 can receive multiple signals, including a feedback signal Vcomp, a current sensing signal detected from a current sensing resistor, and an input voltage signal. Based on the received signals, the primary controller 110 generates a gate drive signal PWM to drive the primary switch Q1. According to the operating principle of the flyback converter, the amount of time the primary switch Q1 conducts current during the switching period T is determined by the duty cycle D. The duty cycle D can have a value between 0 and 1.

[0030]

[0037] As shown in Figure 2, the secondary rectifier is implemented as a synchronous switch. The synchronous switch may be an n-type MOSFET device. While Figure 2 shows a single switching element for a synchronous switch, it should be further noted that those skilled in the art will recognize many variations, alternatives, and modifications. For example, the synchronous switch may comprise multiple MOSFET devices connected in parallel. Furthermore, the synchronous switch may be replaced with a diode depending on the needs of various applications and designs.

[0031]

[0038] According to the operating principle of the flyback converter, when the input voltage source VIN is applied to the primary winding NP of the transformer through the turning on of the primary switch Q1, the polarity of the secondary winding NS of the transformer is configured such that the synchronous switch (Q2) is turned off and the load (not shown) connected to the flyback converter is supplied by the energy stored in the output capacitor Co. On the other hand, when the primary switch Q1 is turned off and the synchronous switch (Q2) is turned on, the energy stored in the transformer is transmitted to the load through the turned-on synchronous switch. The detailed operation of the secondary side of the flyback converter is well known in the art and is therefore not described in further detail herein.

[0032]

[0039] According to one embodiment, the switching elements in Figure 2 (for example, switches Q1 and Q2) may be metal oxide semiconductor field-effect transistor (MOSFET) devices. Alternatively, the switching elements can be any controllable switch such as an insulated gate bipolar transistor (IGBT) device, an integrated gate commutation thyristor (IGCT) device, a gate turn-off thyristor (GTO) device, a silicon-controlled rectifier (SCR) device, a junction gate field-effect transistor (JFET) device, a MOS-controlled thyristor (MCT) device, a gallium nitride (GaN)-based power device, or a silicon carbide (SiC)-based power device.

[0033]

[0040] Figure 2 shows that switches Q1 and Q2 are implemented as a single n-type transistor, but it should be noted that those skilled in the art will recognize that many variations, modifications, and alternative configurations are possible. For example, depending on the needs of various applications and designs, the switches may be implemented as p-type transistors. Furthermore, each switch shown in Figure 2 may be implemented as multiple switches connected in parallel. In addition, a capacitor may be connected in parallel with one of the switches to achieve zero-voltage switching (ZVS) / zero-current switching (ZCS).

[0034]

[0041] Figure 3 is a schematic diagram of a first implementation of the primary feedback circuit, isolation interface, and secondary feedback circuit shown in Figure 1, according to various embodiments of the present disclosure. The isolation interface 140 is implemented as an optical coupler U1 comprising a light-emitting diode and a phototransistor. The secondary circuit 125 comprises a resistive voltage divider, a compensation network, a three-terminal adjustable precision shunt voltage regulator integrated circuit TL431, a current limiting resistor Ra, and a bias resistor Rb.

[0035]

[0042] The resistive voltage divider comprises a first resistor R1 and a second resistor R2 connected in series between Vo and ground. The compensation network is formed from R3, C1, and C2. As shown in Figure 3, R3 and C2 are connected in series between the common node of the bias resistor Rb and the three-terminal adjustable precision shunt voltage regulator integrated circuit TL431 and the common node of R1 and R2. C1 is connected in parallel with the series-connected R3 and C2. This is a type 2 compensator that provides a phase boost to achieve a stable feedback loop.

[0036]

[0043] As shown in Figure 3, the cathode of the three-terminal adjustable precision shunt voltage regulator integrated circuit TL431 is connected to the cathode of the light-emitting diode. The reference terminal of the three-terminal adjustable precision shunt voltage regulator integrated circuit TL431 is connected to the compensation network and the resistor divider. The anode of the three-terminal adjustable precision shunt voltage regulator integrated circuit TL431 is connected to ground. The cathode of the light-emitting diode is the secondary feedback node in the secondary circuit. As shown in Figure 3, the secondary feedback node is indicated as OCDRV.

[0037]

[0044] The primary circuit 115 includes a pull-up resistor RP and a capacitor Ccomp connected in series between the bias voltage VCC and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor RP and capacitor Ccomp. The second terminal of the phototransistor is connected to ground. The common node of the pull-up resistor RP and capacitor Ccomp is the primary feedback node. The primary feedback node is denoted as COMP.

[0038]

[0045] In normal operation, when the load 130 is connected to the isolated power converter 100, the secondary circuit 125 detects the output voltage and transmits a feedback signal to the primary circuit 115 through the optical coupler. Based on the feedback signal, the primary controller 110 generates a PWM signal to control the on / off state of the primary switch Q1 so that the output voltage of the flyback converter is adjusted to achieve the set output voltage. In normal operation, the secondary bias current is approximately 5 milliamperes. The primary bias current is approximately 5 milliamperes.

[0039]

[0046] During operation, when the load 130 is disconnected from the isolated power converter 100, the secondary controller 120 configures the secondary feedback node OCDRV as a high-impedance node to reduce the secondary bias current, and the primary controller 110 disables the feedback loop of the isolated power converter 100 to reduce the primary bias current. When the secondary feedback node OCDRV is configured as a high-impedance node, the secondary circuit enters secondary sleep mode. The secondary bias current is reduced from approximately 5 milliamperes to approximately 30 microamperes. Similarly, when the feedback loop of the isolated power converter 100 is disabled, the primary bias current is reduced from approximately 5 milliamperes to approximately 70 microamperes.

[0040]

[0047] During operation, the secondary controller 120 is configured to detect whether the load 130 is coupled to the power conversion system. In response to the load 130 being disconnected from the power conversion system, the secondary controller 120 communicates with the primary controller 110 by pulling down the secondary feedback node OCDRV in the secondary circuit and the primary feedback node COMP in the primary circuit for a first predetermined time (e.g., 240 milliseconds). The secondary controller 120 then configures the secondary feedback node OCDRV as a high-impedance node to reduce power consumption in the secondary circuit. Furthermore, in response to the load 130 being reconnected to the power conversion system, the secondary controller 120 communicates with the primary controller 110 by pulling down the secondary feedback node in the secondary circuit for a second predetermined time (e.g., 1 millisecond). When the secondary controller 120 wakes up the primary controller 110, the primary controller 110 exits sleep mode and restarts the flyback converter.

[0041]

[0048] During operation, the primary controller 110 is configured to detect whether the voltage on the primary feedback node COMP in the primary circuit is lower than a predetermined voltage (e.g., 600 millivolts) for a third predetermined time (e.g., 200 milliseconds). In response to the voltage on the primary feedback node COMP being lower than the predetermined voltage for the third predetermined time, the primary controller 110 enters a first sleep mode by disabling the feedback loop of the power conversion system. Then, when the voltage on the primary feedback node COMP rises to a level higher than the predetermined voltage (e.g., 600 millivolts), the primary controller 110 enters a second sleep mode. Furthermore, in response to the voltage on the primary feedback node COMP being lower than the predetermined voltage again, the primary controller 110 exits the sleep mode and restarts the power conversion system by enabling the feedback loop.

[0042]

[0049] Figure 4 is a schematic diagram of a second implementation of the primary feedback circuit, isolation interface, and secondary feedback circuit shown in Figure 1, according to various embodiments of the present disclosure. The second implementation shown in Figure 4 is similar to the first implementation shown in Figure 3, except that the three-terminal adjustable precision shunt voltage regulator integrated circuit TL431 is replaced by the operational amplifier A1.

[0043]

[0050] As shown in Figure 4, the secondary circuit 125 comprises a resistor divider, a compensation network, and an operational amplifier A1. The compensation network is connected between the output of operational amplifier A1 and the inverting input of operational amplifier A1. The inverting input of operational amplifier A1 is connected to the common node of R1 and R2. The non-inverting input of operational amplifier A1 is connected to a predetermined reference Vref. The operating principle of the second implementation is the same as that of the first implementation and is therefore not described herein to avoid unnecessary repetition.

[0044]

[0051] Figure 5 shows various waveforms related to the circuits shown in Figures 3 and 4 according to various embodiments of the present disclosure. The horizontal axis of Figure 5 represents a time interval. Figure 5 has eight rows. The first row represents the load plug signal indicating the state of the load 130. When the load 130 is connected to the isolated power converter 100, the load plug signal is in a logic high state. On the other hand, when the load 130 is disconnected from the isolated power converter, the load plug signal is in a logic low state. The second row represents the secondary bias current Icc_s. The third row represents the secondary bias voltage Vcc_s. The fourth row represents the voltage on the secondary feedback node OCDRV. The fifth row represents the voltage on the primary feedback node COMP. The sixth row represents the primary bias current Icc_p. The seventh row represents the primary bias voltage Vcc_p. The eighth row represents the PWM signal generated by the primary controller 110.

[0045]

[0052] Prior to t1, the load 130 is connected to the isolated power converter 100. The load plug signal is logic high. The secondary bias current Icc_s is approximately 5 milliamperes. The secondary bias voltage Vcc_s is approximately 5 volts. The voltage on the secondary feedback node OCDRV is approximately 3 volts. The voltage on the primary feedback node COMP is greater than 600 millivolts. The primary bias current Icc_p is approximately 5 milliamperes. The primary bias voltage Vcc_p is approximately 16 volts. The primary controller 110 operates in PWM mode as shown by the PWM signal in Figure 5.

[0046]

[0053] At t1, the secondary controller 120 detects that the load 130 has been disconnected from the isolated power converter 100. In response to this change, the load plug signal changes from a logic high state to a logic low state, as shown in Figure 5. From t1 to t2, both the voltage on the secondary feedback node OCDRV and the voltage on the primary feedback node COMP decrease in response to the load change.

[0047]

[0054] Note that under normal operation, the voltage on the primary feedback node COMP is related to the load. The voltage on the primary feedback node COMP is kept high to supply high power under heavy loads. As the load decreases, the voltage on the primary feedback node COMP decreases along with the load.

[0048]

[0055] From t2 to t3, the primary controller 110 enters burst mode, adjusting the output voltage and reducing switching losses. The primary and secondary bias currents remain the same.

[0049]

[0056] From t3 to t6, the voltage on the secondary feedback node OCDRV is pulled low by the secondary controller 120. In particular, both the shunt voltage regulator integrated circuit TL431 shown in Figure 3 and the operational amplifier A1 shown in Figure 4 have an open-drain structure. That is, a transistor (e.g., an n-type MOS transistor) is connected between the secondary feedback node OCDRV and ground. The gate of this transistor is connected to the output of the error amplifier. The secondary controller 120 can pull the secondary feedback node OCDRV low by fully turning on this transistor.

[0050]

[0057] In some embodiments, the duration from t3 to t6 is shown as T1, as in Figure 5. In some embodiments, T1 is approximately 240 milliseconds. At t3, the secondary bias current changes from approximately 5 milliamperes to approximately 0.6 milliamperes. From t3 to t6, in response to the low voltage on the secondary feedback node OCDRV, the voltage on the primary feedback node COMP drops to a voltage level lower than a predetermined voltage (e.g., 600 millivolts).

[0051]

[0058] The duration from t3 to t5 is shown as T2, as in Figure 5. In some embodiments, T2 is approximately 200 milliseconds. At t5, the primary controller 110 detects that the voltage on the primary feedback node COMP remains below a predetermined voltage (e.g., 600 millivolts) beyond T2 (e.g., 200 milliseconds). This indicates that the load 130 has been disconnected from the isolated power converter 100. At t5, the primary controller 110 enters a first sleep mode in which the primary controller 110 disables the feedback control loop of the isolated power converter 100. After the feedback control loop of the isolated power converter is disabled, the primary controller 110 stops adjusting the output voltage, and its bias current is reduced from approximately 5 milliamperes to approximately 70 microamperes.

[0052]

[0059] At t6, in order to reduce the power consumption of the feedback circuit, including the primary feedback circuit 115, the secondary feedback circuit 125, and the isolation interface 140, the secondary controller 120 configures the secondary feedback node OCDRV as a high-impedance node. As a result, the voltage on the secondary feedback node OCDRV rises to a level approximately equal to Vo. The secondary controller 120 enters a sleep mode in which the secondary feedback circuit (e.g., secondary feedback circuit 125) is disabled. The secondary bias current is reduced from approximately 600 microamperes to approximately 30 microamperes. In response to the voltage change on the secondary feedback node OCDRV, the voltage on the primary feedback node COMP rises from a low voltage (e.g., less than 600 millivolts) to a high voltage (e.g., 5V) approximately equal to VCC.

[0053]

[0060] From t6 to t7, the secondary controller 120 remains in sleep mode. The primary controller 110 operates in a second sleep mode, with the primary bias current remaining the same. From t6 to t7, the primary controller 110 intermittently turns on the primary switch Q1 to maintain the primary and secondary bias voltages as shown in Figure 5.

[0054]

[0061] At t7, the load plug signal changes from a logic low state to a logic high state. The secondary controller 120 detects that the load 130 has been reconnected to the isolated power converter 100. From t7 to t8, the secondary controller 120 pulls down the secondary feedback node OCDRV to a low voltage level for approximately a predetermined time (e.g., 1 millisecond). In response to the voltage change on the secondary feedback node OCDRV, the voltage on the primary feedback node COMP falls below a predetermined voltage threshold (e.g., a low voltage of less than 600 millivolts). The voltage change on node COMP activates the primary controller 110. From t8 to t9, the isolated power converter 100 returns to normal operation. The feedback loop is enabled to regulate the output voltage of the isolated power converter 100.

[0055]

[0062] Note that the waveforms of Vocdrv and Vcomp differ from those of the conventional sleep mode between t6 and t7. In the conventional sleep mode, Vocdrv and Vcomp are pulled down to a low voltage to prevent switching of the primary switch Q1. However, such a low voltage causes a bias current to flow through the optical coupler, increasing power consumption. In Figure 5, Vocdrv and Vcomp are pulled up to a high voltage between t6 and t7. As a result, the current flowing through the optical coupler is interrupted, thereby reducing power consumption.

[0056]

[0063] Figure 6 shows a state machine for controlling mode transitions of a secondary controller according to various embodiments of the present disclosure. The state machine includes four states: a normal state S0, a start state S1, a sleep state S2, and an exit state S3. Referring again to Figure 5, the normal state S0 of the secondary controller 120 corresponds to a time before t3. The start state S1 of the secondary controller 120 corresponds to a time between t3 and t6. The sleep state S2 of the secondary controller 120 corresponds to a time between t6 and t7. The exit state S3 of the secondary controller 120 corresponds to a time between t7 and t8.

[0057]

[0064] As used herein, a specified state machine applies to a machine that can be in one of several states (e.g., states S0, S1, S2, and S3), and the machine is in one state at a time and has the ability to change (e.g., transition) from one state to another upon triggering a conditional event. Thus, such a state machine can be defined by its states and by the triggering conditions for transitions between two states.

[0058]

[0065] In the state machine shown in Figure 6, events that do not lead to a transition are represented by lines that loop through the old state, as exemplified by lines 602 and 604. Events that lead to a transition from one state to another are indicated by arrows that point from the old state to a new state, as exemplified in Figure 6.

[0059]

[0066] The state machine allows state transitions between the normal state S0 and the start state S1, from the start state S1 to the sleep state S2, from the sleep state S2 to the end state S3, and from the end state S3 to the normal state S0.

[0060]

[0067] Depending on whether the load 130 is connected to the isolated power converter 100, the secondary controller 120 can determine various states. As shown in Figure 6, in the mode transition from the normal state S0 to the start state S1, the transition from state S0 to state S1 is triggered when the condition that the load plug signal is in a logic low state can be met. In particular, when the load plug signal changes from a logic high state to a logic low state, the transition from state S0 to state S1 occurs. As shown in Figure 6, in the mode transition from the start state S1 to the normal state S0, the transition from state S1 to state S0 is triggered when the condition that the load plug signal is in a logic high state can be met. In particular, when the load plug signal changes from a logic low state to a logic high state, the transition from state S1 to state S0 occurs. In the normal state S0, the secondary bias current is approximately 5 milliamperes. The voltage on the secondary feedback node OCDRV is at its normal value, which adjusts the output voltage of the isolated power converter. In the start state S1, the secondary bias current is approximately 0.6 milliamperes. The voltage on the secondary feedback node OCDRV is pulled down to a low voltage (e.g., approximately equal to 0 volts). Let T be the duration that the voltage on the secondary feedback node OCDRV remains at a low voltage.

[0061]

[0068] As shown in Figure 6, in the mode transition from the start state S1 to the sleep state S2, the transition from state S1 to state S2 is triggered when the load plug signal is in a logic low state and T is greater than T1. T1 is a predetermined time threshold. In some embodiments, T1 is equal to 240 milliseconds. In the sleep state S2, the secondary bias current is approximately 30 microamperes. The secondary controller 120 configures the secondary feedback node OCDRV as a high-impedance node.

[0062]

[0069] As shown in Figure 6, in the mode transition from sleep state S2 to termination state S3, the transition from state S2 to state S3 is triggered when the condition that the load plug signal is in a logic high state can be met. In termination state S3, the secondary bias current is approximately 0.6 milliamperes. The voltage on the secondary feedback node OCDRV is pulled down to a low voltage (e.g., a voltage approximately equal to 0 volts).

[0063]

[0070] As shown in Figure 6, in the mode transition from the termination state S3 to the normal state S0, the transition from state S3 to state S0 is triggered if the condition that the voltage on the secondary feedback node OCDRV remains at a low voltage for a time greater than a predetermined time T2 can be met. In some embodiments, T2 is equal to 1 millisecond.

[0064]

[0071] Figure 7 shows a state machine for controlling mode transitions of a primary controller according to various embodiments of the present disclosure. The state machine includes five states: a normal state S0, a start state S1, a first sleep state S2, a second sleep state S3, and an end state S4. Referring again to Figure 5, the normal state S0 of the primary controller 110 corresponds to a time before t3. The start state S1 of the primary controller 110 corresponds to a time between t3 and t5. The first sleep state S2 of the primary controller 110 corresponds to a time between t5 and t6. The second sleep state S3 of the primary controller 110 corresponds to a time between t6 and t7. The end state S4 of the primary controller 110 corresponds to a time between t7 and t8.

[0065]

[0072] As used herein, a specified state machine applies to a machine that can be in one of several states (e.g., states S0, S1, S2, S3, and S4), and the machine is in one state at a time with the ability to change (e.g., transition) from one state to another upon triggering a condition. Thus, such a state machine can be defined by its states and by the triggering conditions for transitions between two states.

[0066]

[0073] In the state machine shown in Figure 7, events that do not lead to a transition are represented by lines that loop through the old state, as illustrated by lines 702 and 704. Events that lead to a transition from one state to another are indicated by arrows that point from the old state to a new state, as illustrated in Figure 7.

[0067]

[0074] The state machine allows state transitions between the normal state S0 and the start state S1, from the start state S1 to the first sleep state S2, from the first sleep state S2 to the second sleep state S3, from the second sleep state S3 to the end state S4, and from the end state S4 to the normal state S0.

[0068]

[0075] Depending on whether the load 130 is connected to the isolated power converter 100, the primary controller 110 can determine various states of the primary controller. As shown in Figure 7, in the mode transition from normal state S0 to start state S1, the transition from state S0 to state S1 is triggered when the condition that the voltage on the primary feedback node COMP falls below the low voltage V1 can be met. In some embodiments, V1 is equal to 600 millivolts.

[0069]

[0076] As shown in Figure 7, in the mode transition from the starting state S1 to the normal state S0, the transition from state S1 to state S0 is triggered when the condition that the voltage on the primary feedback node COMP rises to a level higher than V1 can be met.

[0070]

[0077] In the normal state S0, the primary bias current is approximately 5 milliamperes. The voltage across the primary feedback node COMP is at its normal value, which regulates the output voltage of the isolated power converter 100. In the starting state S1, the primary bias current remains the same. The voltage across the primary feedback node COMP remains low. Let T be the duration for which the voltage across the primary feedback node COMP remains low.

[0071]

[0078] As shown in Figure 7, in the mode transition from the start state S1 to the first sleep state S2, the transition from state S1 to state S2 is triggered when the conditions can be met that the voltage on the primary feedback node COMP is less than V1 and T is greater than T1, where T1 is a predetermined voltage threshold. In some embodiments, T1 is equal to 200 milliseconds. In the first sleep state S2, the primary bias current is approximately 70 microamperes. The primary controller 110 disables the feedback control loop (e.g., by disabling the oscillator of an isolated power converter).

[0072]

[0079] As shown in Figure 7, in the mode transition from the first sleep state S2 to the second sleep state S3, the transition from state S2 to state S3 is triggered if the condition that the voltage on the primary feedback node COMP is greater than V1 can be met. In the second sleep state S3, the primary bias current remains the same.

[0073]

[0080] As shown in Figure 7, in the second mode transition from sleep state S3 to termination state S4, the transition from state S3 to state S4 is triggered if the condition that the voltage on the primary feedback node COMP is less than V1 can be met. In termination state S4, the primary bias current is approximately 5 milliamperes. The isolated power converter 100 starts a soft start process in which the output voltage is established. The voltage on the primary feedback node COMP returns to its normal value in which the output voltage is adjusted.

[0074]

[0081] As shown in Figure 7, in the mode transition from the terminated state S4 to the normal state S0, the transition from state S4 to state S0 is triggered when the soft start process is completed.

[0075]

[0082] Figure 8 shows a flowchart illustrating the control of the power conversion system shown in Figure 1 according to various embodiments of the present disclosure. The flowchart shown in Figure 8 is merely an example and should not unduly limit the scope of the claims. Those skilled in the art will recognize many variations, alternatives, and modifications. For example, the various steps shown in Figure 8 may be added, deleted, replaced, rearranged, and repeated.

[0076]

[0083] Referring back to Figure 1, the power conversion system comprises an isolated power converter 100 coupled between the power supply VIN and the load 130. A primary controller 110 is configured to control the operation of the primary switch of the isolated power converter 100. A secondary controller 120 is configured to detect whether the load 130 is connected to the isolated power converter 100. A secondary feedback circuit 125 is configured to detect the output voltage of the isolated power converter 100 and generate a feedback signal that is supplied to the primary feedback circuit 115 through the isolated interface 140. Based on the received feedback signal, the primary feedback circuit 115 generates a primary-side feedback signal Vcomp that is supplied to the primary controller 110. Based on Vcomp, the primary controller 110 generates a PWM signal to adjust the output voltage of the isolated power converter 100.

[0077]

[0084] During operation, the load 130 can be disconnected from the isolated power converter 100. To further reduce power consumption, the secondary controller 120 and the primary controller 110 perform the following steps.

[0078]

[0085] In step 802, the secondary controller detects whether the load is coupled to a power conversion system comprising a primary circuit and a secondary circuit.

[0079]

[0086] In step 804, in response to the load being disconnected from the power conversion system, the secondary controller communicates with the primary controller by pulling down the secondary feedback node in the secondary circuit and the primary feedback node in the primary circuit for a first predetermined period of time.

[0080]

[0087] In step 806, the secondary controller configures the secondary feedback node to function as a high-impedance node to reduce power consumption.

[0081]

[0088] In step 808, in response to the load being reconnected to the power conversion system, the secondary controller communicates with the primary controller by pulling down a secondary feedback node in the secondary circuit for a second predetermined time.

[0082]

[0089] The method further includes: using a primary controller to detect whether the voltage on a primary feedback node in the primary circuit is lower than a predetermined voltage for a third predetermined time; in response to the voltage on the primary feedback node being lower than a predetermined voltage for a third predetermined time, initiating a first sleep mode by disabling the feedback loop of the power conversion system; initiating a second sleep mode when the voltage on the primary feedback node rises to a level higher than a predetermined voltage; and enabling the feedback loop to restart the power conversion system in response to the voltage on the primary feedback node being lower than a predetermined voltage again.

[0083]

[0090] The method further includes configuring the primary controller to operate in primary start mode when the voltage on the primary feedback node falls below a predetermined voltage, and starting a first sleep mode when the primary controller remains in primary start mode for a third predetermined time.

[0084]

[0091] The method further includes configuring the primary controller to operate in a second sleep mode when the voltage on the primary feedback node rises to a level higher than a predetermined voltage, and configuring the primary controller to start a primary termination mode when the voltage on the primary feedback node falls below the predetermined voltage again.

[0085]

[0092] The method further includes configuring the secondary controller to operate in secondary start mode when the secondary controller detects that the load has been disconnected from the power conversion system, and pulling down the secondary feedback node in the secondary circuit for a first predetermined time unless the load is reconnected to the power conversion system.

[0086]

[0093] This method further includes configuring the secondary controller to initiate a sleep mode if it remains in the secondary start mode for a predetermined time, and configuring the secondary feedback node to function as a high-impedance node in the sleep mode.

[0087]

[0094] The method further includes configuring the secondary controller to initiate a secondary termination mode when the secondary controller detects that the load has been reconnected to the power conversion system, and in the secondary termination mode, pulling down a secondary feedback node in the secondary circuit for a second predetermined time.

[0088]

[0095] The primary controller is coupled to the secondary controller through an optical coupler comprising a light-emitting diode and a phototransistor. The secondary circuit comprises a resistor divider, a compensation network, and a three-terminal adjustable precision shunt voltage regulator integrated circuit, the cathode of which is connected to the cathode of the light-emitting diode, the reference terminal of which is connected to the compensation network and the resistor divider, the anode of which is connected to ground, and the secondary feedback node in the secondary circuit is the cathode of the light-emitting diode. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground, the first terminal of the phototransistor is connected to the common node of the pull-up resistor and capacitor, the second terminal of the phototransistor is connected to ground, and the primary feedback node in the primary circuit is the common node of the pull-up resistor and capacitor.

[0089]

[0096] The primary controller is coupled to the secondary controller through an optical coupler comprising a light-emitting diode and a phototransistor. The secondary circuit comprises a resistor divider, a compensation network, and an operational amplifier, the compensation network being connected between the output of the operational amplifier and the inverting input of the operational amplifier, the inverting input of the operational amplifier being connected to the midpoint of the resistor divider, and the non-inverting input of the operational amplifier being connected to a predetermined reference. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground, the first terminal of the phototransistor being connected to the common node of the pull-up resistor and capacitor, and the second terminal of the phototransistor being connected to ground.

[0090]

[0097] While embodiments and their advantages have been described in detail, it should be understood that various changes, substitutions, and modifications may be made herein without departing from the spirit and scope of the disclosure as defined by the attached claims.

[0091]

[0098] Furthermore, the scope of this application is not intended to be limited to specific embodiments of the processes, machines, manufactures, material compositions, means, methods, and steps described herein. As will be readily apparent to those skilled in the art from the disclosure, existing or future-developed processes, machines, manufactures, material compositions, means, methods, or steps that perform substantially the same functions as or achieve substantially the same results as the corresponding embodiments described herein may be utilized in accordance with this disclosure. Accordingly, the appended claims are intended to include such processes, machines, manufactures, material compositions, means, methods, or steps within their scope.

Claims

1. A secondary controller coupled to the secondary circuit of a power conversion system, The power conversion system comprises a primary controller coupled to the primary circuit, wherein the primary controller is coupled to the secondary controller through an isolated interface, and the secondary controller To detect whether or not a load is coupled to the power conversion system, In response to the load being disconnected from the power conversion system, the primary controller is instructed to initiate a sleep mode by pulling down the secondary feedback node in the secondary circuit and the primary feedback node in the primary circuit for a predetermined period of time, wherein in the sleep mode, both the primary and secondary feedback circuits are disabled to reduce power consumption. In order to reduce power consumption, a high impedance is supplied to the secondary feedback node, In response to the reconnection of the load to the power conversion system, the primary controller is communicated to terminate the sleep mode by pulling down the secondary feedback node in the secondary circuit for a second predetermined period of time, wherein after the sleep mode is terminated, the primary and secondary feedback circuits are enabled to restore feedback loop control to adjust the output voltage of the power conversion system. A device configured to perform the following.

2. The primary controller is configured to detect whether the voltage on the primary feedback node in the primary circuit is lower than a predetermined voltage for a third predetermined time, to initiate the sleep mode by disabling the feedback loop of the power conversion system in response to the voltage on the primary feedback node being lower than the predetermined voltage for the third predetermined time, and to enable the feedback loop to restart the power conversion system in response to the voltage on the primary feedback node being lower than the predetermined voltage again. The apparatus according to claim 1.

3. The aforementioned insulating interface is an optical coupler equipped with a light-emitting diode and a phototransistor. The secondary circuit comprises a resistive voltage divider, a compensation network, and a voltage adjustment circuit, and the output of the voltage adjustment circuit is coupled to the cathode of the light-emitting diode. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor and the capacitor. The second terminal of the phototransistor is connected to ground. The apparatus according to claim 1 or 2.

4. The voltage adjustment circuit is a three-terminal adjustable precision shunt voltage regulator integrated circuit, The cathode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is coupled to the cathode of the light-emitting diode. The reference terminal of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to the compensation network and the resistor voltage divider. The anode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to ground. The apparatus according to claim 3.

5. The secondary feedback node in the secondary circuit is the cathode of the light-emitting diode, The primary feedback node in the primary circuit is the common node of the pull-up resistor and the capacitor. The apparatus according to claim 3.

6. The voltage adjustment circuit is an operational amplifier, The compensation network is connected between the output of the operational amplifier and the inverting input of the operational amplifier. The inverting input of the operational amplifier is connected to the midpoint of the resistor voltage divider. The non-inverting input of the operational amplifier is connected to a predetermined reference. The apparatus according to claim 3.

7. The power conversion system includes a flyback power converter. The apparatus according to any one of claims 1 to 6.

8. The secondary controller detects whether the load is coupled to a power conversion system comprising a primary circuit and a secondary circuit, In response to the load being disconnected from the power conversion system, the system communicates with the primary controller by pulling down the secondary feedback node in the secondary circuit and the primary feedback node in the primary circuit for a predetermined period of time. To reduce power consumption, configure the secondary feedback node to function as a high-impedance node, In response to the load being reconnected to the power conversion system, the primary controller is communicated by pulling down the secondary feedback node in the secondary circuit for a second predetermined period of time. Methods that include...

9. The primary controller detects whether the voltage on the primary feedback node in the primary circuit is lower than a predetermined voltage for a third predetermined time, In response to the voltage on the primary feedback node being lower than the predetermined voltage for a third predetermined time, the first sleep mode is initiated by disabling the feedback loop of the power conversion system. When the voltage on the primary feedback node rises to a level higher than the predetermined voltage, a second sleep mode is initiated. To enable the feedback loop to restart the power conversion system in response to the voltage on the primary feedback node being lower than the predetermined voltage again, The method according to claim 8, further comprising:

10. The primary controller is configured to operate in primary start mode when the voltage on the primary feedback node falls below the predetermined voltage, If the primary controller remains in the primary start mode for longer than the third predetermined time, the first sleep mode is initiated. The method according to claim 9, further comprising:

11. The primary controller is configured to operate in the second sleep mode when the voltage on the primary feedback node rises to a level higher than the predetermined voltage, The primary controller is configured such that when the voltage on the primary feedback node falls below the predetermined voltage again, the primary termination mode is started. The method according to claim 9 or 10, further comprising:

12. When the secondary controller detects that the load has been disconnected from the power conversion system, the secondary controller is configured to operate in secondary start mode. Unless the load is reconnected to the power conversion system, the secondary feedback node in the secondary circuit is pulled down for the first predetermined time, The method according to claim 8, further comprising:

13. The secondary controller is configured to start a sleep mode if it remains in the secondary start mode for longer than the first predetermined time, In the sleep mode, the secondary feedback node is configured to function as a high-impedance node, The method according to claim 12, further comprising:

14. The secondary controller is configured to start the secondary termination mode when it detects that the load has been reconnected to the power conversion system. In the secondary termination mode, the secondary feedback node in the secondary circuit is pulled down for a second predetermined time, The method according to claim 8, 12, or 13, further comprising:

15. The primary controller is coupled to the secondary controller through an optical coupler equipped with a light-emitting diode and a phototransistor. The secondary circuit comprises a resistive voltage divider, a compensation network, and a three-terminal adjustable precision shunt voltage regulator integrated circuit. The cathode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to the cathode of the light-emitting diode. The reference terminal of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to the compensation network and the resistor voltage divider. The anode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to ground, and the secondary feedback node in the secondary circuit is the cathode of the light-emitting diode. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor and the capacitor. The second terminal of the phototransistor is connected to ground, and the primary feedback node in the primary circuit is the common node of the pull-up resistor and the capacitor. The method according to any one of claims 8 to 14.

16. The primary controller is coupled to the secondary controller through an optical coupler equipped with a light-emitting diode and a phototransistor. The secondary circuit comprises a resistive voltage divider, a compensation network, and an operational amplifier. The compensation network is connected between the output of the operational amplifier and the inverting input of the operational amplifier. The inverting input of the operational amplifier is connected to the midpoint of the resistor voltage divider. The non-inverting input of the operational amplifier is connected to a predetermined reference. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor and the capacitor. The second terminal of the phototransistor is connected to ground. The method according to any one of claims 8 to 14.

17. It is a system, An isolated power converter configured to be coupled between a power source and a load, A secondary controller coupled to the secondary circuit of the aforementioned system, The system comprises a primary controller coupled to the primary circuit, wherein the primary controller is coupled to the secondary controller through an isolated interface. The secondary controller is configured to detect whether the load is coupled to the isolated power converter, notify the primary controller when the load is disconnected from the isolated power converter, and reduce the power consumption of the secondary circuit by configuring a secondary feedback node as a high-impedance node. The primary controller is configured to disable the feedback control loop of the isolated power converter when the load is disconnected from the isolated power converter. system.

18. The secondary controller is configured to detect whether the load is coupled to the isolated power converter, and in response to the load being disconnected from the isolated power converter, to communicate with the primary controller by pulling down the secondary feedback node in the secondary circuit and the primary feedback node in the primary circuit for a first predetermined time, thereby supplying high impedance to the secondary feedback node to reduce power consumption, and in response to the load being reconnected to the isolated power converter, to communicate with the primary controller by pulling down the secondary feedback node in the secondary circuit for a second predetermined time, The primary controller is configured to detect whether the voltage on the primary feedback node in the primary circuit is lower than a predetermined voltage for a third predetermined time, and in response to the voltage on the primary feedback node being lower than the predetermined voltage for the third predetermined time, to initiate a first sleep mode by disabling the feedback loop of the isolated power converter, and when the voltage on the primary feedback node rises to a level higher than the predetermined voltage, to initiate a second sleep mode, and in response to the voltage on the primary feedback node being lower than the predetermined voltage again, to enable the feedback loop to restart the isolated power converter. The system according to claim 17.

19. The primary controller is coupled to the secondary controller through an optical coupler equipped with a light-emitting diode and a phototransistor. The secondary circuit comprises a resistive voltage divider, a compensation network, and a three-terminal adjustable precision shunt voltage regulator integrated circuit. The cathode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to the cathode of the light-emitting diode. The reference terminal of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to the compensation network and the resistor voltage divider. The anode of the three-terminal adjustable precision shunt voltage regulator integrated circuit is connected to ground, and the secondary feedback node in the secondary circuit is the cathode of the light-emitting diode. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor and the capacitor. The second terminal of the phototransistor is connected to ground, and the primary feedback node in the primary circuit is the common node of the pull-up resistor and the capacitor. The system according to claim 17 or 18, further comprising the following:

20. The primary controller is coupled to the secondary controller through an optical coupler equipped with a light-emitting diode and a phototransistor. The secondary circuit comprises a resistive voltage divider, a compensation network, and an operational amplifier. The compensation network is connected between the output of the operational amplifier and the inverting input of the operational amplifier. The inverting input of the operational amplifier is connected to the midpoint of the resistor voltage divider. The non-inverting input of the operational amplifier is connected to a predetermined reference. The primary circuit comprises a pull-up resistor and a capacitor connected in series between the bias voltage and ground. The first terminal of the phototransistor is connected to the common node of the pull-up resistor and the capacitor. The second terminal of the phototransistor is connected to ground. The system according to claim 17 or 18, further comprising the following:

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