Variable edge sheath using nanosecond RF pulses

Abstract

The system includes a plasma chamber configured to generate plasma, the plasma chamber including a lower electrode located within an electrostatic chuck. The system includes an upper electrode positioned above the lower electrode and an edge ring surrounding the lower electrode. The system includes a first nanosecond DC pulse generator electrically coupled to the lower electrode and configured to supply a first low-frequency pulsed direct current (DC) power signal to the lower electrode, the first low-frequency pulsed DC power signal being non-sinusoidal. The system includes a second nanosecond DC pulse generator electrically coupled to the edge ring and configured to supply a second low-frequency pulsed DC power signal to the edge ring, the second low-frequency pulsed DC power signal being non-sinusoidal and substantially matched in frequency, phase, and pulse shape to the first low-frequency pulsed DC power signal.

Description

Technical Field

[0005] , ,

[0001] This embodiment relates to plasma generation, and more specifically, to a system and method for implementing a variable edge sheath using substantially matched nanosecond DC pulses without requiring a corresponding matching network.

Background Art

[0002] Many up-to-date semiconductor chip fabrication processes, such as plasma etching processes, are carried out in a plasma processing chamber where a substrate (e.g., a wafer) is supported on an electrostatic chuck (ESC). In a plasma etching process, the wafer is exposed to plasma generated within a plasma processing volume. The plasma contains various types of radicals, electrons, as well as positive and negative ions. The chemical reactions of the various radicals, electrons, positive ions, and negative ions are used to etch the features, surfaces, and materials of the wafer.

[0003] For example, when a process gas is supplied to the plasma processing chamber, a radio frequency (RF) signal provides power and is applied to at least one of the electrodes of the plasma processing chamber to form an electric field between the electrodes. The process gas is plasmaized by the RF signal, thereby performing plasma etching on a predetermined layer disposed on the wafer. Unfortunately, during wafer processing, there may be an angular spread of ions (e.g., ion tilt angle) along the outermost edge of the wafer due to the plasma, which may result in non-uniformity of features along the outermost edge of the wafer.

[0004] Embodiments of the present disclosure arise in such scenarios.

Summary of the Invention

[0005] This embodiment relates to a system and method for implementing a variable edge sheath using substantially matched nanosecond direct current (DC) pulses without requiring a corresponding matching network. Several embodiments of the invention of this disclosure are described below.

[0006] Embodiments of the present disclosure provide a system for generating plasma. The system includes a plasma chamber configured to generate plasma, the plasma chamber including a lower electrode located within an electrostatic chuck (ESC). The system includes an upper electrode positioned above the lower electrode. The system includes an edge ring surrounding the lower electrode. The system includes a first nanosecond DC pulse generator electrically coupled to the lower electrode and configured to supply a first low-frequency pulsed direct current (DC) power signal to the lower electrode, the first low-frequency pulsed DC power signal being non-sinusoidal. The system includes a second nanosecond DC pulse generator electrically coupled to the edge ring and configured to supply a second low-frequency pulsed DC power signal to the edge ring. The second low-frequency pulsed DC power signal is non-sinusoidal and substantially matched in frequency, phase, and pulse shape with the first low-frequency pulsed DC power signal.

[0007] Other embodiments of the present disclosure provide a method for generating plasma. The method includes providing a plasma chamber for generating plasma, the plasma chamber including a lower electrode located within an electrostatic chuck (ESC). The method includes supplying a first low-frequency pulsed direct current (DC) power signal to the lower electrode, the first low-frequency pulsed DC power signal being non-sinusoidal. The method includes supplying a second low-frequency pulsed DC power signal to an edge ring surrounding the lower electrode, the second low-frequency pulsed DC power signal being non-sinusoidal. The method includes substantially matching the low-frequency pulsed DC power signal to the frequency, phase, and pulse shape of the low-frequency pulsed DC power signal.

[0008] These and other advantages will be understood by those skilled in the art by reading the entire specification and claims. [Brief explanation of the drawing]

[0009] The embodiments can be best understood by referring to the following description in conjunction with the attached drawings.

[0010] [Figure 1] Figure 1 shows one embodiment of a capacitively coupled plasma (CCP) processing system used for etching operations, configured to adjust an edge sheath using substantially matched nanosecond direct current (DC) pulses without requiring a corresponding matching network, according to one embodiment of the present disclosure.

[0011] [Figure 2] Figure 2 shows the signal measurement location within the CCP processing system of Figure 1 for tuning the edge sheath using substantially matched nanosecond direct current (DC) pulses, without requiring a corresponding matching network, according to one embodiment of the present disclosure.

[0012] [Figure 3] Figure 3 is a flowchart illustrating a method for tuning an edge sheath using nanosecond DC pulses to an ESC and edge ring, according to one embodiment of the present disclosure.

[0013] [Figure 4] Figure 4 shows the matching of nanosecond DC pulses of input signals to the ESC and edge ring when adjusting the edge sheath, according to one embodiment of the present disclosure.

[0014] [Figure 5A] Figure 5A shows different slopes of voltage signals obtained from potential measurements in the substrate and edge ring when nanosecond DC pulses are not applied to the edge ring when adjusting the edge sheath, according to one embodiment of the present disclosure.

[0015] [Figure 5B] Figure 5B shows the matching of the slopes of voltage signals obtained from potential measurements in the substrate and edge ring when a nanosecond DC pulse is applied to the edge ring when adjusting the edge sheath, according to one embodiment of the present disclosure.

[0016] [Figure 6A] Figure 6A shows the adjustability of an edge sheath using nanosecond DC pulses to an ESC and edge ring, which includes adjusting the voltage of nanosecond DC pulses to adjust the positioning of the edge sheath on the edge ring, according to one embodiment of the present disclosure. [Figure 6B] Figure 6B shows the adjustability of an edge sheath using nanosecond DC pulses to an ESC and edge ring, which includes adjusting the voltage of nanosecond DC pulses to adjust the positioning of the edge sheath on the edge ring, according to one embodiment of the present disclosure. [Figure 6C] Figure 6C shows the adjustability of an edge sheath using nanosecond DC pulses to an ESC and edge ring, which includes adjusting the voltage of nanosecond DC pulses to adjust the positioning of the edge sheath on the edge ring, according to one embodiment of the present disclosure. [Modes for carrying out the invention]

[0017] The following detailed description includes many specific details for illustrative purposes, but those skilled in the art will understand that many variations and modifications of the following details are within the scope of this disclosure. Accordingly, the aspects of this disclosure described below are described without prejudice to the generality of the claims that follow this description, and without imposing limitations on the claims.

[0018] Generally speaking, various embodiments of this disclosure describe methods and apparatus for tuning an edge sheath using nanosecond DC pulses to an ESC and edge ring (e.g., via a coupling ring) without requiring a corresponding matching network, wherein the nanosecond DC pulses are substantially matched in phase and frequency. In particular, electrodes for receiving capacitively coupled nanosecond DC pulses to the edge ring are mounted inside the coupling ring. In addition, a synchronization mechanism (e.g., a slave / synchronous controller) may be configured to control separate nanosecond DC pulse sources providing nanosecond DC pulses to the ESC and edge ring. Advantages of the various embodiments include a control mechanism for tuning the edge sheath by adjusting the voltage and / or power of the nanosecond DC pulse signal to the edge ring, wherein the nanosecond DC pulses to the ESC and edge ring are substantially matched in phase and frequency. Additional adjustments are made to control the gap between the edge sheath and edge ring to control the ion gradient at the substrate edge and the substrate-edge ring interface. In this way, the desired ion gradient at the substrate edge and the substrate / edge ring interface is achieved.

[0019] Building upon the above general understanding of various embodiments, illustrative details of embodiments will now be described with reference to various drawings. In one or more drawings, elements and / or components numbered similarly are intended to have generally the same configuration and / or function. Furthermore, drawings may not be drawn to actual scale, but are intended to illustrate and highlight novel concepts. It is clear that these embodiments can be practiced without some or all of these specific details. In other examples, well-known process operations are not described in detail so as not to unnecessarily obscure these embodiments.

[0020] FIG. 1 shows an embodiment of a capacitively coupled plasma (CCP) processing system 100 configured to adjust an edge sheath using substantially matched nanosecond direct current (DC) pulses without requiring a corresponding matching network, which is utilized in an etching operation. Generally, an exemplary CCP processing system 100 can be utilized in operations including etching and / or film deposition, such as operations used to perform plasma processing of a substrate 120.

[0021] In particular, FIG. 1 shows an exemplary embodiment of a plasma processing system 100 utilized in an etching operation, which is configured as a CCP processing system and includes a CCP plasma process chamber 102 configured to generate a plasma. The plasma process chamber 102 includes a substrate support or pedestal, such as an electrostatic chuck (ESC) 118. In an embodiment, the ESC may have several circular rings of different material types to achieve a constant capacitive coupling between the ESC and a powered edge ring. A lower electrode 122 may be embedded within the ESC 118. A substrate 120 may be placed on the pedestal for processing, and the substrate or wafer 120 is processed to fabricate one or more semiconductor chips. An upper electrode 124 is provided facing the pedestal, and thus the upper electrode is disposed above the lower electrode. The upper electrode 124 can be configured to have an extension 123 formed as a ring. There is a gap between the upper electrode 124 and the lower electrode 122 that forms a processing volume in which a plasma 130 can be formed.

[0022] In particular, the plasma processing system 100 includes a radio frequency (RF) power source 160 and nanosecond pulsed direct current (DC) power generators or power supplies 150A and 150B, as will be more fully described below. As shown, the upper electrode 124 is coupled to an RF power generator or power supply 160 (such as one that supplies high-frequency RF power). Additionally, the pulsed DC power supplies 150A and 150B generally provide power to the ESC 118 or the edge ring 126 via nanosecond pulsed DC signals.

[0023] The plasma process chamber 102 also includes an edge ring 126, such as a tunable edge sheath (TES) ring, surrounding the ESC 118 and / or the lower electrode 122. As an example, the edge ring 126 is fabricated from a conductive material such as silicon, boron-doped single-crystalline silicon, silicon carbide, silicon alloy, or a combination thereof. Note that the edge ring 126 has an annular body such as a circular body, or a ring-shaped body, or a dish-shaped body. As an example, the edge ring 126 has an inner radius and an outer radius, and the inner radius is larger than the radius of the ESC 118. The edge ring 126 performs many functions, such as positioning the substrate 120 on the ESC 118, confining the plasma to an area above the substrate 120, protecting the ESC 118 from erosion by the ions of the plasma, and shielding components in the lower layer of the plasma chamber 102 from damage by the ions of the plasma. Further, the edge ring is configured to improve the performance at the edge of the substrate. For example, by varying the amount of power coupled to the edge ring, the plasma density of the plasma in the edge region, the sheath uniformity of the plasma in the edge region, the etching rate uniformity of the plasma in the edge region, and the ion tilt at the location where the substrate is etched in the edge region can be controlled.

[0024] As shown, the plasma processing chamber 102 of FIG. 1 includes a C-shroud 155 extending from the upper electrode 124 to the ESC 118 including the bottom electrode, which can further enhance the confinement of the plasma. The C-shroud may have a plurality of openings that allow gases and by-products to flow out of the C-shroud. The C-shroud may be grounded. In other embodiments, the plasma processing chamber may be configured differently to include a confinement ring (not shown) for confining the plasma 130 during the etching operation.

[0025] In another embodiment, the gas source 114 is connected to the plasma process chamber 102 and configured to inject the desired process gas into the plasma process chamber 102. As an example of plasma formation, one or more RF signals are supplied to the upper electrode 124 and / or ESC 118, and after the process gas is injected into the plasma process chamber 102, plasma 130 is formed between the upper electrode 124 and the ESC 118. The plasma 130 can be used to etch the surface of the substrate 120.

[0026] As described above, the plasma processing system 100 includes a high-frequency RF power generator or power supply 160, as well as a plurality of power supplies including nanosecond DC pulse generators or power supplies 150A and nanosecond DC pulse generators or power supplies 150B.

[0027] As shown, the upper electrode 124 is coupled to an RF power supply 160 (e.g., one that supplies high-frequency RF power). The high-frequency RF power signal is supplied to the upper electrode 124 through an impedance matching network 165. The matching network 165 allows for dynamic adjustment of the power supplied to the upper electrode 124 by matching the impedance between the load (e.g., the plasma chamber and any connecting cables) and the source (e.g., an HFRF generator or source 160 and any connecting cables). Generally, the RF power supply 160 provides power via a sinusoidal signal (i.e., a sinusoidal changing voltage signal), and the sinusoidal signal may be pulsed or non-pulsed. For example, the RF power supply 160 may be a high-frequency (HF) RF generator (HFRF) that can be configured to generate high frequencies in the range of 13 megahertz (MHz) to 120 MHz. For example, the high frequencies can be configured as baseline frequencies of 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz.

[0028] In addition, pulsed DC power supplies 150A and 150B generally supply power to the ESC 118 or edge ring 126 via a nanosecond pulsed DC signal. For example, a constant voltage DC signal can be pulsed to provide a pulsed DC signal. Pulsed DC power can offer certain advantages over RF power, such as using less power and not requiring an impedance matching network (i.e., one implemented through high-voltage cables and / or filters and / or snubber circuits, etc.).

[0029] In particular, the nanosecond DC pulse source 150A is electrically coupled to the lower electrode 122 and configured to supply a low-frequency pulsed DC power signal to the lower electrode to generate plasma, while the upper electrode 124 is coupled to the high-frequency RF power supply 160. The low-frequency pulsed DC power signal is, as mentioned above, matchless. Also, the low-frequency pulsed DC power signal is non-sinusoidal. Generally, the nanosecond DC pulse source 150A is configured to provide a pulsed DC signal pulsed at a low frequency in the range of 10 to 800 kHz and with a duty cycle of less than 50%. For example, the operating frequency of the nanosecond DC pulse source 150A is 200 kHz or 400 kHz. The pulse width of the pulsed DC signal may also be in the range of 200 to 1000 nanoseconds. For example, the pulse width of the pulsed DC signal can be 300 nanoseconds. In one embodiment, the pulse shape of the pulsed DC signal is a square wave. In another embodiment, the nanosecond DC pulse source 150A is configured as a master power supply device when used in a master / slave relationship with another DC power supply.

[0030] Since the power supplied to the lower electrode 122 is isolated from the power supplied to the upper electrode 124, a filter circuit (e.g., between the lower electrode 122 and the nanosecond DC pulse source 150A) is not required to reduce and / or remove high-frequency harmonics, such as those generated from a high-frequency power supply. That is, since the DC pulse source 150A (e.g., to the lower electrode 122) is isolated from the high-frequency RF power supply 160 (e.g., to the upper electrode 124), a filter circuit is not required. Furthermore, the DC current and DC power generated by the nanosecond DC pulse source 150A are isolated from the DC current and DC power generated by 150B. That is, the potential or voltage signal measured at the TES edge ring 126 is isolated from the nanosecond DC pulse source 150A that provides power to the lower electrode 122 of the ESC 118. In addition, the coupling between the nanosecond DC pulse source 150A and the lower electrode 122 is matchless in one embodiment.

[0031] In addition, the nanosecond DC pulse source 150B is electrically coupled to the TES edge ring 126 via a coupling ring 127 adjacent to the edge ring. Specifically, the nanosecond DC pulse source 150B is configured to supply a low-frequency pulsed DC power signal to the TES edge ring 126. The low-frequency pulsed DC power signal is matchless, as described above. Also, the low-frequency pulsed DC power signal is non-sinusoidal. Specifically, the low-frequency pulsed DC power signal is supplied to an electrode 250 embedded in the coupling ring 127, for example, via a power supply pin 128. That is, the coupling ring is configured to receive the low-frequency pulsed DC power signal, for example, via the electrode 250. Furthermore, the low-frequency pulsed DC power signal is supplied to the TES edge ring 126 via capacitive coupling between the coupling ring and the edge ring.

[0032] The nanosecond DC pulse source 150B is configured as a slave power supply device when used in a master / slave relationship with another DC power supply, such as the nanosecond DC pulse source 150A. Generally, like the DC pulse source 150A, the nanosecond DC pulse source 150B is configured to provide a pulsed DC signal pulsed at a low frequency, for example, in the range of 10 to 800 kHz, with a duty cycle of less than 50%. For example, the operating frequency of the nanosecond DC pulse source 150B is 200 kHz or 400 kHz. The pulse width of the pulsed DC signal may also be in the range of 200 to 1000 nanoseconds. For example, the pulse width of the pulsed DC signal can be 300 nanoseconds. In one embodiment, the pulse shape of the pulsed DC signal is a square wave.

[0033] Since the power supplied to the edge ring 126 (e.g., via the coupling ring 127) is isolated from the power supplied to the upper electrode 124, a filter circuit (e.g., between the edge ring 126 and / or coupling ring 127 and the nanosecond DC pulse source 150B) is not required to reduce and / or remove high-frequency harmonics, such as those generated from a high-frequency power supply. That is, since the DC pulse source 150B (e.g., to the edge ring 126 and / or coupling ring 127) is isolated from the high-frequency RF power supply 160 (e.g., to the upper electrode 124), a filter circuit is not required. Furthermore, the DC current and DC power generated by the nanosecond DC pulse source 150B are isolated from the DC current and DC power generated by 150A. That is, the potential or voltage signal measured on the substrate 120 is isolated from the nanosecond DC pulse source 150B that supplies power to the TES edge ring 126 (i.e., via the coupling ring 127). In addition, the coupling between the nanosecond DC pulse source 150B and the edge ring 126 and / or coupling ring 127 is matchless in one embodiment.

[0034] In one embodiment, the low-frequency pulsed DC power signal supplied to the TES edge ring 126 (e.g., via coupling ring 127) is substantially matched with the low-frequency pulsed DC power signal supplied to the ESC 118. In particular, the frequencies, phases, and pulse shapes of the two low-frequency pulsed DC power signals supplied to the ESC and the TES edge ring are substantially matched. Furthermore, due to the master / slave relationship between nanosecond DC pulse sources 150A and 150B, the frequency, phase, and pulse shape of the low-frequency pulsed DC power signal supplied to the TES edge ring are substantially matched with the frequency, phase, and pulse shape of the low-frequency pulsed DC power signal supplied to the ESC. The matching between the two low-frequency pulsed DC power signals supplied to the ESC and the TES edge ring does not need to be perfectly matched, because the plasma 130 is configured, in one embodiment, to equalize the power signals when supplied to the ESC 118 (i.e., also corresponding to the substrate through capacitive coupling) and the TES edge ring. In other words, the frequency, phase, and pulse shape of the measurement signals (e.g., voltage signals) at the substrate 120 and edge ring 126 are equalized even if the low-frequency pulsed DC power signals to the ESC and TES edge rings are not perfectly synchronized and / or matched.

[0035] In one embodiment, when the low-frequency DC power signals to the ESC and TES edge rings are substantially matched, the plasma sheath at the substrate edge can be controlled by controlling the power supplied to the edge ring 126, and accordingly the ion gradient at the substrate edge (e.g., an angle substantially orthogonal to or perpendicular to the substrate, or other angles relative to the substrate) can also be controlled. For example, the power supplied to the edge ring 126 can be controlled by controlling the voltage of the low-frequency DC power signal generated by the nanosecond DC pulse source 150B.

[0036] In one embodiment, the plasma processing system 100 includes a slave and / or synchronous controller 117 that provides a pulse synchronization output used to control one or more parameters of a low-frequency DC power signal generated by a nanosecond DC pulse source 150B. That is, the slave and / or synchronous controller 117 is configured to substantially match the low-frequency pulsed DC power signal fed to the TES edge ring 126 (e.g., via a coupling ring 127) to the low-frequency pulsed DC power signal fed to the ESC 118, including matching of frequency, phase, and / or pulse shape. In some embodiments, the slave and / or synchronous controller 117 works in conjunction with a controller 116 to substantially match the two low-frequency pulsed DC power signals. In particular, in one embodiment, the slave and / or synchronous controller 117 is configured to adjust the voltage of the low-frequency pulsed DC power signal generated from the nanosecond DC pulse source 150B until the slope of the measured voltage signal obtained from the TES edge ring 126 matches the slope of the measured voltage signal obtained from the substrate 120. In another embodiment, the slave and / or synchronous controller 117 is configured to adjust the voltage of the low-frequency pulsed DC power signal generated from the nanosecond DC pulse source 150B until one or more voltages of the measured voltage signals acquired from the substrate 120 match one or more voltages of the measured voltage signals acquired from the edge ring 126.

[0037] In some embodiments, the nanosecond DC pulse source 150B is used to substantially match the low-frequency pulsed DC power signal fed to the TES edge ring 126 (e.g., via the coupling ring 127) to the low-frequency pulsed DC power signal fed to the ESC 118, including matching of frequency, phase, and / or pulse shape. That is, a slave and / or synchronous controller 117 is not required. For example, the DC pulse source 150B may communicate with the controller 116 to obtain parameters of the low-frequency pulsed DC power signal fed to the ESC 118 and generated by the nanosecond DC pulse source 150A, or these parameters may be obtained directly from the nanosecond DC pulse source 150A for the purpose of controlling the low-frequency pulsed DC power signal fed to the TES edge ring 126.

[0038] In one embodiment, the plasma processing system 100 has pulsed DC signals that drive the ESC 118 and the TES edge ring 126 (e.g., via a coupling ring 127), and these pulsed DC signals can be generated from a single DC pulse source (i.e., a shared DC pulse source). That is, the low-frequency DC power signals to the ESC 118 and the TES edge ring 126 can be substantially matched and / or synchronized (e.g., frequency, phase, and / or pulse shape) using a single DC pulse source. For example, there is no time delay between the pulsed DC signals that drive the ESC and the TES edge ring. In particular, the shared DC pulse source can provide multiple pulsed DC signals. For example, the shared DC pulse source can provide one nanosecond pulsed DC signal to drive the lower electrode 122 in the ESC 118, and another nanosecond pulsed DC signal to the TES edge ring 126 (e.g., via the coupling ring 127). That is, the shared DC pulse source provides separate pulsed DC signals to drive the edge ring 126 and the ESC 118. In one embodiment, the use of a single and / or shared DC pulse source is eliminated by using a single and / or shared DC pulse source to drive the ESC118 and TES edge ring 126 (e.g., via a coupling ring 127), thereby eliminating the need for a synchronous controller (e.g., a slave and / or synchronous controller 117).

[0039] In some embodiments, the system may include a controller 116 used to control various components of the plasma processing system 100A. For example, the controller 116 may be connected to a plasma generator (e.g., a high-frequency RF source 160, a nanosecond DC pulse source 150A, and a nanosecond DC pulse source 150B), a gas source 114 coupled to the plasma process chamber 102, and other components. The controller 116 includes a processor, memory, software logic, hardware logic, and input / output subsystems for communicating with, monitoring, and controlling the plasma processing system 100. In some embodiments, the controller 116 includes one or more recipes that include multiple setpoints and various operating parameters (e.g., voltage, current, frequency, pressure, flow rate, power level, temperature, timing parameters, process gas, mechanical movement of the substrate 120, etc.) for operating the plasma processing system 100A. For example, depending on the process to be performed, the controller 116 controls the supply of process gas from the gas source 114 to achieve designed processing conditions, such as etching features on the substrate 120 and / or depositing or forming a film. Next, the selected gas is distributed into the spatial volume defined between the upper electrode 124 and the substrate 120 placed on the ESC 118.

[0040] Figure 2 shows a control system 200 used to achieve control of the plasma sheath at the edge of the substrate and, accordingly, control of the ion gradient at the edge of the substrate (e.g., an angle substantially orthogonal to or perpendicular to the substrate, or other angles relative to the substrate) by measuring power signals (e.g., voltage) at the substrate and edge ring and controlling the power supplied to the edge ring. For example, control of the power supplied to the edge ring 126 can be achieved by controlling the voltage of a low-frequency DC power signal generated by the nanosecond DC pulse source 150B shown in Figure 1. In particular, the control system 200 shows the signal measurement location in the CCP plasma processing system 100 of Figure 1, and by controlling the power supplied to the edge ring 126, it modulates the edge sheath using substantially matched nanosecond DC pulses without requiring a corresponding matching network. For illustrative purposes, the control system 200 may be adapted to be implemented within the exemplary plasma processing system 100 of Figure 1. For example, for brevity and clarity, the control system 200 includes the plasma processing system shown in Figure 1 (i.e., the CCP plasma processing system 100 which includes a nanosecond DC power supply coupled to the TES edge ring 126 and ESC 118 (e.g., via the coupling ring 127)).

[0041] In particular, the control system 200 implements a control scheme for controlling a variable edge ring plasma sheath or TES plasma sheath. As shown, DC power is applied independently to the substrate 120 and the capacitively coupled edge ring 126 (e.g., via the ESC 118) by multiple nanosecond DC pulse sources 150A and 150B that provide pulsed DC signals. For example, nanosecond DC pulse source 150A (e.g., supplying power to the ESC) can be configured as a master power source, and nanosecond DC pulse source 150B (e.g., supplying power to the edge ring) can be configured as a slave power source.

[0042] In one embodiment, the frequency and / or phase and / or pulse shape of the nanosecond DC pulse source 150B (e.g., acting as a slave power supply) is substantially matched with the frequency, phase and pulse shape of the nanosecond DC pulse source 150A (e.g., acting as a master power supply). Thus, when the two pulsed DC power supplies are substantially matched, the power and / or voltage at the substrate 120 and the TES edge ring 126 are balanced. Proper balance results in the matching of the slopes of the measured power or voltage signals at the substrate 120 and the TES edge ring 126. In other words, the slope of the measured power or voltage signal at the substrate 120 is matched, equal to, or substantially equal to the slope of the measured power or voltage signal at the edge ring 126. That is, in a master / slave relationship between the two pulsed DC power supplies, the nanosecond DC pulse source 150B is adjusted to achieve equalization or matching of the slopes of the measured power or voltage signals at the substrate 120 and the TES edge ring 126. With proper balance, the plasma sheath on the substrate 120 and the TES edge ring 126 can be coplanar, particularly over the interface between the substrate and the TES edge ring. For example, the ion gradient may be perpendicular to the substrate (e.g., 0 degrees) at the interface. In one embodiment, one or more parameters for the frequency and / or phase and / or pulse shape of the nanosecond DC pulse source 150B are adjusted until the slope of the measured power signal or voltage signal on the substrate 120 matches the slope of the measured power signal on the edge ring 126, thereby achieving substantial matching of the two pulsed DC power sources and / or proper balance between the measured power signals or voltage signals on the substrate 120 and the TES edge ring 126.

[0043] Not constrained by theory or mechanism of action, and for clarity, in one embodiment, the master and slave power supplies do not need to be perfectly matched, as the plasma sheath 130 is considered to equalize the power signals received at the substrate 120 and edge ring 126 (e.g., received through capacitive coupling). For example, the matching, equality, or coincidence of power signals at the substrate and TES edge ring may indicate that the power and / or voltage provided by a nanosecond DC pulse source that delivers pulsed DC power to the lower electrode and TES edge ring (i.e., via the coupling ring) is balanced at the interface between the substrate and the edge ring. For illustrative purposes, if the power and / or voltage are balanced at the interface, the plasma sheath along and / or over the edge ring may be coplanar with the plasma sheath along and / or over the substrate. This may result in substantially equal ion gradients or incidence angles across the entire interface, particularly at the edges of the substrate. For example, the ion gradient may be 0 degrees or perpendicular to the substrate. In this way, the angular spread of ions at the outermost edge of the substrate (e.g., ion tilt angle) can be reduced and / or eliminated. That is, the ion tilt at the edge of the substrate may be similar to the ion tilt at the center of the substrate.

[0044] In particular, the high-voltage probe or measuring sensor 210A can be configured to measure parameters (e.g., voltage, frequency, phase, pulse shape, pulse width, etc.) of a low-frequency pulsed DC power signal at the output of a nanosecond DC pulse source 150A (e.g., a master power supply). Similarly, the high-voltage probe or measuring sensor 210B can be configured to measure parameters (e.g., voltage, frequency, phase, pulse shape, pulse width, etc.) of a low-frequency pulsed DC power signal at the output of a nanosecond DC pulse source 150B (e.g., a slave power supply). In some configurations, the corresponding high-voltage probes or measuring sensors 210A and / or 210B may be contained within the corresponding power supplies (e.g., voltage sensors located within the nanosecond DC pulse sources 150A and / or 150B) to tune the same power supply.

[0045] Measurements from each of the high-voltage probes or measuring sensors 210A and / or 210B may, in an embodiment, be fed to a controller 116, and / or a slave / synchronous controller 117, and / or a power generator, configured as a controller for the purpose of substantially matching the power signals. Specifically, after measurements by the high-voltage probes or measuring sensors 210A and / or 210B, the frequency, phase, and / or pulse shape of the low-frequency pulsed DC power signal from the nanosecond DC pulse source 150B may, in one embodiment, be substantially matched according to the aforementioned master / slave relationship, so as to be controlled by the controller 116 and / or the slave / synchronous controller 117.

[0046] As described above, once the low-frequency DC power signals to the ESC118 and TES edge ring 126 are substantially matched, further control of the plasma sheath at the substrate edge becomes possible by further controlling the power supplied to the edge ring 126, and accordingly the ion gradient at the substrate edge (e.g., an angle substantially orthogonal to or perpendicular to the substrate, or other angles relative to the substrate) is also controlled. That is, the height of the plasma sheath at the substrate edge and / or on the edge ring can be controlled. Accordingly, by controlling the height of the plasma sheath, it is possible to achieve a desired ion gradient from the contributions of the plasma sheath on the substrate and on the edge ring, particularly the contribution at the interface between the substrate and the edge ring. For example, the power supplied to the edge ring 126 can be controlled by controlling the voltage of the low-frequency DC power signal generated by the nanosecond DC pulse source 150B.

[0047] In particular, control of the power supplied to the edge ring, such as the height of the plasma sheath, can be achieved by measuring one or more parameters of the power signal at the substrate 120 and the TES edge ring 126. For example, the voltage of the power signal at the substrate 120 and the TES edge ring 126 can be monitored by a voltage pickup (e.g., a high-voltage probe and / or sensor). As shown, the control scheme of the control system 200 controls the parameters of the plasma sheath (e.g., the sheath on the substrate and edge ring) to achieve a desired ion gradient at the edge of the substrate by measuring the voltage at the substrate and the edge ring. In this way, it is possible to adjust the power of the low-frequency DC power signal to the TES edge ring 126 and control the plasma sheath.

[0048] As shown, the high-voltage probe or measuring sensor 210C is placed in a location suitable for measuring one or more parameters (e.g., potential, voltage, etc.) of the low-frequency pulsed DC power signal received on the substrate 120. For example, the measuring sensor 210C may be configured to determine a voltage signal (i.e., indicating potential or voltage) on the substrate 120. In addition, the high-voltage probe or measuring sensor 210D is placed in a location suitable for measuring one or more parameters (e.g., potential, voltage, etc.) of the low-frequency pulsed DC power signal received on the edge ring 126. For example, the measuring sensor 210D may be configured to determine a voltage signal (i.e., indicating potential or voltage) on the edge ring 126. Measurements from each of the high-voltage probes or measuring sensors 210C and / or 210D may be fed to a controller 116, and / or a slave / synchronous controller 117, and / or a power generator, configured as a controller for controlling one or more parameters or characteristics of the plasma sheath (e.g., the sheath on the substrate and edge ring), such as controlling the height of the plasma sheath on the substrate and / or edge ring.

[0049] Based on the measured potentials at the substrate and edge ring, the plasma sheath can be controlled by intentionally adjusting and / or controlling the power of the low-frequency DC power signal to the TES edge ring 126 to achieve desired performance at the substrate edge, for example, a 0-degree ion gradient perpendicular to the substrate on the edge ring at the substrate edge, or a predetermined ion gradient at the substrate edge (e.g., the interface between the substrate and the edge ring). The adjustment of the low-frequency DC power signal to the TES edge ring 126 can be controlled by the slave / synchronous controller 116, as described above. For example, the slave / synchronous controller 116 may be configured to adjust the potential and / or voltage of the low-frequency DC power signal to the TES edge ring 126 until the slope of the measured power signal or voltage signal at the substrate 120 matches the slope of the measured power signal at the edge ring 126. The slave / synchronous controller 116 may be configured to verify that the slopes are matched in response to a substantial match between the two low-frequency DC power signals to the ESC 118 and the TES edge ring 126 (i.e., via the coupling ring 127). In one embodiment, the slave / synchronous controller 116 may be configured to adjust the potential and / or voltage of the low-frequency DC power signal to the TES edge ring 126 until the potential or voltage of the power signal or voltage signal measured on the substrate 120 matches the potential or voltage of the power signal measured on the edge ring 126.

[0050] Figure 3 is a flow diagram 300 illustrating a method for adjusting an edge sheath using nanosecond DC pulses to an ESC and edge ring, according to one embodiment of the present disclosure. The method of flow diagram 300 can be implemented to control a process in the plasma processing system 100 of Figure 1. For example, the method of flow diagram 300 can be stored in a computer-readable format in a memory accessible by a controller 116, and / or a slave / synchronous controller 117, and / or a power generator, configured as the controllers of Figures 1 and 2, and the operation of flow diagram 300 can be implemented. For example, flow diagram 300 can be implemented for the purpose of controlling one or more parameters or characteristics of a plasma sheath (e.g., sheath over a substrate and edge ring), and may include controlling the height of the plasma sheath over the substrate and / or edge ring, as described above.

[0051] In 310, the method comprises providing a plasma chamber for generating plasma, the plasma chamber including a lower electrode located within an electrostatic chuck. For example, the plasma chamber may be configured as a CCP chamber and may in part include an ESC (e.g., a substrate support), a lower electrode embedded within the ESC, an upper electrode positioned above the lower electrode, and an edge ring (e.g., a TES edge ring) surrounding the ESC and / or the lower electrode.

[0052] Multiple power supplies or generators are configured to generate plasma in the plasma chamber. For example, a high-frequency RF power supply is configured to provide a sinusoidal or alternating high-frequency RF power signal to the upper electrode, as described above. In addition, one or more nanosecond pulsed DC power supplies provide power to the plasma chamber.

[0053] In 320, the method includes supplying a low-frequency pulsed direct current (DC) power signal to the ESC and / or lower electrode. The low-frequency pulsed DC power signal is non-sinusoidal and provides power to the ESC and / or lower electrode via a nanosecond pulsed DC signal (e.g., a low-frequency pulsed signal). For example, the pulsed DC signal includes a nanosecond pulse waveform with a duty cycle of less than 50%. The pulse shape of the pulsed DC signal can be configured as a square wave. In one embodiment, the pulsed DC power signal to the lower electrode is generated by a nanosecond DC pulse source configured as the master power source when used in a master / slave relationship with another DC power source. For example, the low-frequency pulsed DC power signal to the ESC and / or lower electrode generates a voltage on the ESC sufficient to drive positive ions into the substrate due to the negative self-biasing effect of the substrate.

[0054] In addition, the low-frequency pulsed DC power signal to the lower electrode is, in one embodiment, matchless and / or does not require a filter (e.g., a high-frequency filter). For example, a nanosecond DC pulse source and / or generator may be electrically coupled to the lower electrode. The coupling between the nanosecond DC pulse source and the lower electrode may be matchless and / or filterless (i.e., filterless) because the power supplied to the lower electrode is isolated from the high-frequency RF power supplied to the upper electrode. That is, the DC pulse source to the lower electrode is isolated from the high-frequency RF power supply to the upper electrode.

[0055] In 330, the method includes supplying another low-frequency pulsed DC power signal to a TES edge ring surrounding the lower electrode. The pulsed DC power signal is generated by a nanosecond DC pulse source electrically coupled to the TES edge ring via a coupling ring adjacent to the edge ring. The low-frequency pulsed DC power signal is non-sinusoidal and provides power to the TES edge ring via a nanosecond pulsed DC signal (e.g., a signal pulsed at a low frequency). For example, the pulsed DC signal includes a nanosecond pulse waveform with a duty cycle of less than 50%. The pulse shape of the pulsed DC signal can be configured as a square wave.

[0056] In addition, the low-frequency pulsed DC power signal to the TES edge ring is, in one embodiment, matchless and / or does not require a filter (e.g., a high-frequency filter). For example, a nanosecond DC pulse source and / or generator may be electrically coupled to the TES edge ring via a coupling ring adjacent to the edge ring, and the pulsed DC power signal is supplied to the TES edge ring via capacitive coupling between the coupling ring and the TES edge ring. The coupling between the nanosecond DC pulse source and the TES edge ring and / or coupling ring may be matchless and / or filterless (i.e., filterless) because the power supplied to the edge ring is isolated from the high-frequency RF power supplied to the upper electrode. That is, the DC pulse source to the TES edge ring is isolated from the high-frequency RF power supply to the upper electrode.

[0057] In one embodiment, a nanosecond DC power supply that provides a pulsed DC power signal to the TES edge ring via a coupling ring is configured as a slave power supply when used in the master / slave relationship described above. In particular, a nanosecond DC pulse source that provides a low-frequency pulsed DC power signal to the ESC and / or lower electrode is configured as a master power supply, and a nanosecond DC pulse source that provides a low-frequency pulsed DC power signal to the TES edge ring via a coupling ring is configured as a slave power supply.

[0058] In 340, the method includes substantially matching a low-frequency pulsed DC power signal supplied to the TES edge ring (e.g., via a coupling ring) with a low-frequency pulsed DC power signal supplied to the lower electrode. In particular, the frequency and / or phase and / or pulse shape of the low-frequency pulsed DC power signal supplied to the TES edge ring is substantially matched with the frequency and / or phase and / or pulse shape of the low-frequency pulsed DC power signal supplied to the lower electrode.

[0059] For example, the low-frequency pulsed DC power signal supplied to the lower electrode is measured at the output of the corresponding nanosecond DC pulse source. In addition, the low-frequency pulsed DC power signal supplied to the TES edge ring (i.e., via the coupling ring) is measured at the output of the corresponding nanosecond DC pulse source. One or more high-voltage probes or measuring sensors can be used to determine measurements of one or more parameters. Measured parameters may include frequency, and / or phase, and / or pulse shape, etc. In this way, one or more relationships can be determined between the low-frequency pulsed DC power signal supplied to the TES edge ring (i.e., via the coupling ring) and the low-frequency pulsed DC power signal supplied to the lower electrode. In particular, frequency relationships can be determined, and / or phase relationships can be determined, and / or pulse shape relationships can be determined. Based on these relationships, a substantial match can be achieved between the two pulsed DC power sources supplying power to the TES edge ring (i.e., via the coupling ring) and the lower electrode.

[0060] In this way, when the two pulsed DC power supplies are substantially matched, the power and / or voltage at the substrate and TES edge ring (supported by the ESC) are balanced. As previously mentioned, this matches, coincides with, or equalizes, the slopes of the measured power or voltage signals at the substrate and TES edge ring. That is, the slopes of the measured power or voltage signals at the substrate and TES edge ring are equal or substantially equal in value. With proper balance, the plasma sheath over the substrate and TES edge ring can be coplanar, particularly over the interface between the substrate and the TES edge ring. The substantial matching between the two pulsed DC power supplies is shown in Figure 4 and will be further explained below.

[0061] In general, meeting process specifications at the substrate edge is challenging due to the trade-off between the profile angle or ion gradient at which the substrate is etched and the etching rate. The ion gradient and / or etching rate can be influenced by the interaction between the wafer plasma sheath (i.e., plasma on the ESC or substrate) and the edge ring plasma sheath (plasma on the edge ring beyond the substrate edge). Controlling the thickness or plasma density between the wafer plasma sheath and the edge ring plasma sheath can be beneficial, particularly at the interface between the ESC and the edge ring.

[0062] In embodiments of this disclosure, control can be achieved by partially balancing two pulsed DC power supplies that supply power to the TES edge ring and lower electrode (i.e., via a coupling ring) in order to match, match, or equalize the slopes of the measured power or voltage signals at the substrate and the TES edge ring. In one embodiment, balancing the two pulsed DC power supplies can be achieved by substantially matching one or more parameters (e.g., frequency and / or phase and / or pulse shape) between the low-frequency pulsed DC power signals supplied to the TES edge ring and lower electrode. Alternatively, balancing the two pulsed DC power supplies can be achieved by matching, matching, or equalizing the slopes of the measured power or voltage signals at the substrate and the TES edge ring.

[0063] To generate a desired controlled thickness of the edge ring plasma sheath at the substrate edge, further control of the thickness or plasma density between the wafer plasma sheath and the edge ring plasma sheath can be implemented by adjusting the power and / or potential of the power signal measured at the TES edge ring. In particular, the measured edge ring voltage can be adjusted by manipulating a low-frequency pulsed DC power signal generated by a nanosecond DC pulse source supplying power to the TES edge ring, for example, by increasing or decreasing the power or voltage of the pulsed DC power signal. In this way, a desired ion gradient can be achieved from the contributions of the wafer plasma sheath and the edge ring plasma sheath (e.g., adjusted) at the interface, and the desired ion gradient is partially achieved by measuring the power signal (e.g., voltage signal) at the substrate and the TES edge ring, as well as adjusting the voltage and / or power of the low-frequency pulsed DC power signal supplied to the edge ring (i.e., via the coupling ring). That is, the ion gradient at the interface between the substrate and the edge ring can be controlled by adjusting the relative power or voltage between the power signals supplied to the ESC and the edge ring.

[0064] For example, a power signal supplied to a substrate is measured, and the potential at the substrate is measured to determine a first voltage signal. In addition, a power signal supplied to a TES edge ring is measured, and the potential at the edge ring is measured to determine a second voltage signal. Measurements of one or more parameters of the power signal at the substrate or TES edge ring can be determined using one or more high-voltage probes or measuring sensors. The potential measured at the TES edge ring can be controlled by adjusting the power signal generated by the power source supplying power to the edge ring. In one embodiment, the power or voltage of a low-frequency pulsed DC power signal generated by a nanosecond DC pulse source supplying power to the TES edge ring (e.g., via a coupling ring) is adjusted until the slope of the first voltage signal measured at the substrate matches, is equal to, substantially matches, or substantially equal to the slope of the second voltage signal measured at the TES edge ring. In another embodiment, the power or voltage of a low-frequency pulsed DC power signal generated by a nanosecond DC pulse source supplying power to the TES edge ring (e.g., via a coupling ring) is adjusted until the voltage of the low-frequency pulsed DC power signal to the TES edge ring matches a predetermined voltage setpoint, or, in another embodiment, until one or more voltages of a first voltage signal match one or more voltages of a second voltage signal. In this way, a desired controlled thickness of the edge ring plasma sheath at the edge of the substrate is achieved, and a desired ion gradient at the interface between the substrate and the TES edge ring can be obtained. As a result, angular spread of ions at the outermost edge of the substrate (e.g., ion gradient angle) is reduced or eliminated. For example, the TES edge ring may wear down with continuous use, and therefore a decrease in the thickness of the edge ring may affect the thickness of the edge ring plasma sheath above the edge ring, which may affect the ion gradient at the interface.By adjusting the power or voltage of the low-frequency pulsed DC power signal generated by supplying power to the TES edge ring from a nanosecond DC pulse source (e.g., via a coupling ring), the effects of wear on the TES edge ring can be reduced, and the thickness of the edge ring plasma sheath at the substrate edge, and accordingly the ion gradient at the interface, can be controlled.

[0065] Figure 4 shows the matching of nanosecond DC pulses of input signals to the ESC and TES edge rings when adjusting the edge sheath according to one embodiment of the present disclosure. For illustrative purposes only, the voltage 410 of the input signal (e.g., y-axis) is measured over time 415 (e.g., x-axis). As shown, a voltage signal 420 (e.g., main power signal) acquired at the output of a nanosecond DC pulse source supplying power to the lower electrode and / or ESC is compared with a voltage signal 430 acquired at the output of a nanosecond DC pulse source supplying power to the TES edge ring (e.g., via the coupling ring).

[0066] In particular, the voltage signal 420 (e.g., the main power signal supplied to the lower electrode) is a non-sinusoidal, low-frequency pulsed DC power signal, shown by a solid line. For example, the pulsed DC signal is pulsed at a low frequency in the range of 10 to 800 kHz and / or accordingly for a period of 1.25 to 10 microseconds 460. The pulsed DC signal has a duty cycle of less than 50%, and the pulse width 450 may be in the range of 200 to 1000 nanoseconds. As shown, the pulse shape of the voltage signal 420 is a square wave. In addition, in one embodiment, the pulse is a positive pulse, as shown in Figure 4.

[0067] As described above, the voltage signal 430 (e.g., supplying power to the TES edge ring via the coupling ring) is substantially matched with the voltage signal 420 (the main power signal supplied to the lower electrode), as indicated by the dotted line. That is, the voltage signal 430 is also a non-sinusoidal, low-frequency pulsed DC power signal. As shown, the pulse width 450, and / or the pulse shape of the pulse, and / or the frequency or duration 460 are matched, substantially matched, or synchronized between the voltage signals 420 and 430. In one embodiment, the two voltage signals 420 and 430 have the same nanosecond pulse shape. Thus, by controlling the pulse width 450, and / or the pulse shape of the pulse, and / or the frequency or duration 460 of the voltage signals 420 and 430, for example, as described above, the voltage signal 430 (supplied to the TES edge ring) can be substantially matched to the voltage signal 420 (supplied to the lower electrode) in a master / slave relationship. As mentioned above, in one embodiment, the two pulsed DC power supplies do not need to be perfectly matched, because the plasma sheath is thought to equalize the power signals received by the substrate and the TES edge ring, thereby balancing the power signals at the interface between the substrate and the edge ring.

[0068] In one embodiment, the phases of voltage signals 420 and 430 are matched, substantially matched, or synchronized. In particular, the timing of the falling edge of voltage signal 430 is substantially matched with the timing of the falling edge of voltage signal 420, as shown by the highlighted area 440 in one embodiment. That is, the phase of the low-frequency pulsed DC power signal supplied to the lower electrode of the ESC is matched with the phase of the low-frequency pulsed DC power signal supplied to the TES edge ring (e.g., via the coupling ring).

[0069] Figures 5A and 5B show power signals at various locations within a CCP processing chamber, such as the CCP chamber in Figure 1. For each power signal, the voltage is shown along the y-axis 510 and the time is shown along the x-axis 515. The plasma chamber may be configured as a CCP plasma processing system and may include, in part, an ESC, a lower electrode embedded within the ESC, an upper electrode positioned above the lower electrode, and a TES edge ring surrounding the ESC and / or the lower electrode. Multiple power supplies may be configured to generate plasma in the CCP plasma processing system and may include, as described above, a high-frequency RF power supply that provides a sinusoidal high-frequency RF signal to the upper electrode and a nanosecond pulsed DC power supply that provides power to the lower electrode and / or the TES edge ring.

[0070] Figure 5A shows different slopes or droops of voltage signals obtained from potential measurements at the wafer and edge ring when nanosecond DC pulses are not applied to the edge ring when adjusting the edge sheath, according to one embodiment of the present disclosure. In particular, three power signals are shown in Figure 5A, where voltage (e.g., y-axis 510) is measured against time (e.g., x-axis 515), and the horizontal line 505 represents zero (0) volts. The main input voltage 510 is shown (e.g., widely spaced dotted line) and provides a low-frequency pulsed DC power signal supplied to the lower electrode to generate plasma. The TES power signal is not supplied to the TES edge ring. The vertical line 517 shows the peak-to-peak voltage of the DC pulse from the main input voltage 510. For illustrative purposes, the peak-to-peak voltage may be 3.3 kilovolts and is shown above and below the 0-volt line 505.

[0071] Additionally, a power signal 530a (shown, for example, as a solid line) is measured on the substrate or wafer, and power is supplied to the substrate via capacitive coupling from the main input voltage 510. The vertical line 537 shows the peak-to-peak voltage of the pulse waveform for the measured power signal 530a, which is close to the peak-to-peak voltage value from the main input voltage 510. Ideally, all of the peak-to-peak voltage from the main input voltage 510 would appear through capacitive coupling in the negative region below the horizontal 0-volt line 505. However, partly due to voltage division between the capacitances of the plasma sheath and the ESC, about 60-80% of all of the peak-to-peak voltage of the main signal 530a appears on the substrate as a negative voltage (i.e., providing a negative bias to the substrate), which is shown by the vertical line 539.

[0072] In addition, a power signal 520a (shown, for example, as closely spaced dotted lines) is measured at the TES edge ring, and power from the main input voltage 510 is supplied to the TES edge ring via capacitive coupling with the ESC and / or substrate.

[0073] As shown, the slope 535a of the power signal 530a measured on the substrate is different from the slope 525a of the power signal 520a measured on the TES edge ring. Because there is no power signal to the TES edge ring, the power and / or voltage measured on the substrate and the TES edge ring are not matched, synchronized, or equalized, which is indicated by the difference in slopes for power signals 520a and 530a, as well as the change in the difference between power signals 520a and 530a over time between pulses. Therefore, the plasma sheath on the substrate and the TES edge ring may be unbalanced. That is, due to the different slopes 525a and 535a, the plasma sheath on the substrate and the TES edge ring will be unbalanced or not flat, particularly at the interface between the substrate and the TES edge ring.

[0074] Figure 5B shows the slope or droop matching of voltage signals obtained from potential measurements at the substrate and TES edge ring when nanosecond DC pulses are applied to the edge ring when adjusting the edge sheath, according to one embodiment of the present disclosure. The CCP plasma chamber is powered by at least two power sources, including a low-frequency pulsed DC power signal (not shown in Figure 5B) provided as the main input voltage to the lower electrode in the ESC. A low-frequency pulsed DC power signal (not shown in Figure 5B) is also supplied to the edge ring (e.g., via a coupling ring) to adjust the power received at the TES edge ring. In one embodiment, the power signal received at the TES edge ring can be adjusted by manipulating the low-frequency pulsed DC power signal (not shown) supplied to the edge ring (e.g., via a coupling ring).

[0075] In particular, two power signals are shown in Figure 5B, where voltage (e.g., y-axis 510) is measured against time (e.g., x-axis 515). For example, power signal 530b (e.g., shown as a solid line) is measured on a substrate or wafer, and the power is supplied to the substrate via capacitive coupling from the main input voltage 510. Also, power signal 520a (e.g., shown as closely spaced dotted lines) is measured on a TES edge ring, and the main contributing power measured on the edge ring may be supplied via capacitive coupling with a coupling ring, and a low-frequency pulsed DC power signal supplies the power signal to the coupling ring. As shown, the potential measured on the TES edge ring (e.g., measured voltage) is less negative than the potential measured on the substrate (e.g., measured voltage).

[0076] In particular, the low-frequency pulsed DC power signal supplied to the TES edge ring (e.g., via capacitive coupling) is substantially matched with the low-frequency pulsed DC power signal supplied to the lower electrode, as described above, so that the power and / or potential or voltage measured at the substrate and the TES edge ring are matched, / or synchronized, and / or equalized. That is, the plasma sheath on the substrate and the TES edge ring can be balanced, which may indicate that the plasma sheath is coplanar, particularly at the interface between the substrate and the TES edge ring. For example, this balance between the plasma sheaths may be indicated by the slope 535b of the power signal 530b measured at the substrate being similar to, equal to, matched, or substantially equal to the slope 525b of the power signal 520b measured at the TES edge ring. Also, because the slopes 525b and 535b are matched, the delta change in the voltage difference between the power signals 520b and 530b remains relatively constant.

[0077] Furthermore, the voltage measured at the TES edge ring can be adjusted by manipulating the power and / or voltage of a low-frequency pulsed DC power signal (not shown) supplied to the edge ring (e.g., via a coupling ring). It can be adjusted at low power, and the power of the low-frequency pulsed DC power signal supplied to the TES edge ring (e.g., via a coupling ring) can be 5-20% of the power of the low-frequency pulsed DC power signal supplied to the lower electrode. For example, by adjusting the power and / or voltage, the power signal 525b measured at the TES edge ring can be moved vertically up and down. In one embodiment, the power and / or voltage of the low-frequency pulsed DC power signal (not shown) supplied to the edge ring (e.g., via a coupling ring) is adjusted so that power signals 520b (measured at the TES edge ring) and 530b (measured at the substrate) overlap each other, for example, to achieve a desired ion gradient (e.g., a 0-degree gradient, or other values) at the interface between the substrate and the TES edge ring. That is, the lines measuring slopes 525b and 535b may overlap and be indistinguishable from each other. In another embodiment, the power and / or voltage of a low-frequency pulsed DC power signal (not shown) supplied to the edge ring (e.g., via a coupling ring) can be adjusted so that the power signal 520b (measured at the TES edge ring) is located at a predetermined location (e.g., above or below) relative to the power signal 530b (measured at the substrate). In this way, a desired ion slope (e.g., a 0-degree slope, or other values) can be achieved at the interface between the substrate and the TES edge ring. This adjustability may be useful when the TES edge ring wears down with use, and the wear affects the ion slope and / or ion spread at the interface between the substrate and the TES edge ring. Typically, as the TES edge ring wears down, the plasma sheath above the edge ring becomes lower relative to the plasma sheath above the substrate, as shown in Figure 6B.The height of the plasma sheath above the edge ring can be adjusted by adjusting the power and / or voltage of a low-frequency pulsed DC power signal (not shown) supplied to the edge ring (for example, via a coupling ring), for example, by pushing the sheath above the edge ring upward relative to the sheath above the substrate so that the two plasma sheaths are coplanar.

[0078] Figures 6A–6C illustrate the adjustability of an edge sheath using nanosecond DC pulses to an ESC and edge ring, including adjusting the positioning of the edge sheath on the edge ring by adjusting the voltage of the nanosecond DC pulses, according to one embodiment of the present disclosure. For example, the plasma processing may be carried out by a CCP plasma chamber powered by at least two power sources, which include a low-frequency pulsed DC power signal provided as a main input voltage to the lower electrode 122 in an ESC 118 configured to support a substrate 120, and a low-frequency pulsed DC power signal provided to a TES edge ring 126 (e.g., through capacitive coupling with a coupling ring), the power being supplied to an electrode 250 in a coupling ring 127. A high-frequency RF power signal may be supplied to an upper electrode located on the opposite side of the ESC. During processing, a wafer plasma sheath is formed on the substrate or wafer, and an edge ring plasma sheath is formed on the TES edge ring. The CCP plasma chamber may be the chamber 100 shown in Figure 1.

[0079] Figure 6A shows a plasma sheath imbalance at the interface between the substrate and the TES edge ring. For example, the wafer plasma sheath 610A is shown on the substrate 120, and the edge ring plasma sheath 610B is shown on the TES edge ring 126. As shown, the wafer plasma sheath 610A is not coplanar with the edge ring plasma sheath 610B. That is, the plasma sheaths are imbalanced, and therefore the lower surface of the wafer plasma sheath 610A is at a different height or not coplanar with the lower surface of the edge ring plasma sheath 610B. This may be due to a mismatch between the low-frequency pulsed DC power signals supplied to the substrate 120 and the TES edge ring (via the coupling ring), and therefore the power signals measured on the substrate 120 and the TES edge ring 126 are mismatched. As a result, the ion gradient 620B at the interface between the substrate 120 and the TES edge ring 126 may be angled and / or different from the ion gradient 620A on the substrate 120, which may result in increased ion spreading at the substrate edge. For illustrative purposes only, the ion gradient 620B at the interface between the substrate 120 and the TES edge ring 126 can guide ions away from the center of the substrate 120.

[0080] Figure 6B shows an imbalance in the plasma sheath at the interface between the substrate and the TES edge ring, which may be due to wear on the TES edge ring 126. This may be due to wear on the edge ring even when the low-frequency pulsed DC power signals to the lower electrode and the TES edge ring are substantially matched, or it may be due to an imbalance between the low-frequency pulsed DC power signals to the lower electrode and the TES edge ring.

[0081] A wafer plasma sheath 610A is shown on the substrate 120, and an edge ring plasma sheath 610C is shown on the TES edge ring 126. For example, due to wear on the TES edge ring, the edge ring plasma sheath 610C above the TES edge ring 126 will be lower than the wafer plasma sheath 610A above the substrate 120. That is, even if the low-frequency pulsed DC power signal to the TES edge ring and the low-frequency pulsed DC power signal to the lower electrode are substantially matched, the plasma sheath may be unbalanced or not coplanar. Typically, as the TES edge ring 126 wears down, the edge ring plasma sheath 610C above the edge ring will be lower than the plasma sheath 610A above the substrate. As a result, the ion gradient 620C at the interface between the substrate 120 and the TES edge ring 126 may be angled and / or different from the ion gradient 620A above the substrate 120 (nearly perpendicular), which may result in increased ion spreading at the substrate edge. For illustrative purposes only, the ion gradient 620C at the interface between the substrate 120 and the TES edge ring 126 can guide ions toward the center of the substrate 120.

[0082] In one embodiment, the power signal measured and / or received by the TES edge ring 126 can be adjusted by manipulating a low-frequency pulsed DC power signal (not shown) supplied to the TES edge ring 126 (for example, via a coupling ring). In this way, the height of the edge ring plasma sheath above the TES edge ring 126 can be raised or lowered perpendicular to the surface of the edge ring, as indicated by the directional arrow 630 and as shown in Figure 6C, which will be further described below.

[0083] Figure 6C shows the equilibrium of the plasma sheath at the interface between the substrate and the TES edge ring 126. In particular, the low-frequency pulsed DC power signal to the TES edge ring and the low-frequency pulsed DC power signal to the lower electrode are substantially matched. In this way, the plasma sheath on the substrate and the TES edge ring is balanced or coplanar. Further adjustment of the edge ring plasma sheath 610D on the TES edge ring 126 can be performed by manipulating the low-frequency pulsed DC power signal (not shown) supplied to the edge ring (e.g., via a coupling ring) to adjust the power and / or potential (e.g., voltage signal) measured at the TES edge ring 126, as indicated by the vertical line 630. In particular, by performing adjustment of the low-frequency pulsed DC power signal (not shown) supplied to the TES edge ring 126, the height of the edge ring plasma sheath 610D is matched with the height of the wafer plasma sheath 610A. That is, the plasma sheath on the substrate 120 and the TES edge ring 126 are coplanar. For example, a wafer plasma sheath 610A is shown on a substrate 120, and an edge ring plasma sheath 610D is shown on a TES edge ring 126. The ion gradient 620A on the substrate 120 is nearly vertical. In addition, the ion gradient 620D at the interface between the substrate 120 and the TES edge ring 126, as well as on the edge ring, is also nearly vertical. More specifically, the ion gradient at the interface between the substrate 120 and the TES edge ring 126 is aligned with the ion gradient 620A on the substrate.

[0084] Embodiments of this disclosure describe an apparatus. The apparatus includes an electrostatic chuck (ESC). The apparatus includes a lower electrode located within the ESC, to which a first low-frequency pulsed direct current (DC) power signal is applied. The apparatus includes an edge ring surrounding the ESC and the lower electrode. The apparatus includes a coupling ring located below the edge ring, which includes a variable edge sheath (TES) electrode, to which a second low-frequency pulsed DC power signal is applied and capacitively coupled to the edge ring. In the apparatus, the second low-frequency pulsed DC power signal is substantially matched to the frequency, phase, and pulse shape of the first low-frequency pulsed DC power signal.

[0085] According to embodiments of the present disclosure, in the apparatus, the first low-frequency pulsed DC power signal is non-sinusoidal, and the second low-frequency pulsed DC power signal is non-sinusoidal.

[0086] According to one embodiment of the present disclosure, the apparatus includes a second nanosecond DC pulse generator configured to be electrically coupled to a TES electrode and to supply a second low-frequency pulsed DC power signal. The second coupling between the second nanosecond pulse generator and the TES electrode is matchless.

[0087] According to one embodiment of the present disclosure, an apparatus including a second nanosecond DC pulse generator further includes a first nanosecond DC pulse generator configured to be electrically coupled to a lower electrode and to supply a first low-frequency pulsed DC power signal. The first coupling between the first nanosecond pulse generator and the lower electrode is matchless.

[0088] In an apparatus including a first nanosecond DC pulse generator and a second nanosecond DC pulse generator, the first nanosecond DC pulse generator is configured as a master, and the second nanosecond DC pulse generator is configured as a slave.

[0089] According to one embodiment of the present disclosure, the apparatus includes a first measuring sensor for measuring a potential in a substrate supported by an ESC, the first measuring sensor being configured to determine a first voltage signal. The apparatus includes a second measuring sensor for measuring a potential in an edge ring, the second measuring sensor being configured to determine a second voltage signal. The apparatus includes a slave controller configured to adjust the voltage of a second low-frequency pulsed DC power signal until a second slope of the second voltage signal substantially matches a first slope of the first voltage signal.

[0090] According to one embodiment of the present disclosure, the apparatus includes a first measuring sensor for measuring a potential in a substrate supported by an ESC, the first measuring sensor being configured to determine a first voltage signal. The apparatus includes a second measuring sensor for measuring a potential in an edge ring, the second measuring sensor being configured to determine a second voltage signal. The apparatus includes a slave controller configured to adjust the voltage of a second low-frequency pulsed DC power signal until one or more voltages of the first voltage signal match one or more voltages of the second voltage signal, or until the voltage of a second low-frequency pulsed DC power signal matches a predetermined voltage setpoint.

[0091] According to one embodiment of the present disclosure, in the apparatus, the first low-frequency pulsed DC power signal is configured as a square pulse with a duty cycle of less than 50%.

[0092] According to one embodiment of the present disclosure, in the apparatus, the first low-frequency pulsed DC power signal is configured to have a frequency of 100 to 800 kilohertz.

[0093] Embodiments of this disclosure describe a method. The method includes applying a first low-frequency pulsed direct current (DC) power signal to a lower electrode located within an electrostatic chuck (ESC). The method includes applying a second low-frequency pulsed DC power signal to a variable edge sheath (TES) electrode located within a coupling ring. The method includes substantially matching the second low-frequency pulsed DC power signal to the frequency, phase, and pulse shape of the first low-frequency pulsed DC power signal. In the method, the coupling ring is located below an edge ring surrounding the ESC and the lower electrode. In the method, the second low-frequency pulsed DC power signal is capacitively coupled to the edge ring.

[0094] According to embodiments of the present disclosure, in the method, the first low-frequency pulsed DC power signal is non-sinusoidal, and the second low-frequency pulsed DC power signal is non-sinusoidal.

[0095] According to one embodiment of the present disclosure, the method further includes measuring a first potential in a substrate supported by an ESC and determining a first voltage signal. The method further includes measuring a second potential in an edge ring and determining a second voltage signal. The method further includes adjusting the voltage of a second low-frequency pulsed DC power signal until a second slope of the second voltage signal substantially matches the first slope of the first voltage signal.

[0096] According to one embodiment of the present disclosure, the method further includes measuring a first potential in a substrate supported by an ESC and determining a first voltage signal. The method further includes measuring a second potential in an edge ring and determining a second voltage signal. The method further includes adjusting the voltage of a second low-frequency pulsed DC power signal to match a predetermined voltage setpoint.

[0097] According to one embodiment of the present disclosure, the method further comprises electrically coupling a first nanosecond DC pulse generator to a lower electrode, the first nanosecond DC pulse generator configured to supply a first low-frequency pulsed DC power signal. The method comprises electrically coupling a second nanosecond DC pulse generator to a TES electrode, the second nanosecond DC pulse generator configured to supply a second low-frequency pulsed DC power signal. In the method, the coupling between the first nanosecond pulse generator and the lower electrode is matchless. In the method, the coupling between the second nanosecond pulse generator and the TES electrode is matchless.

[0098] According to one embodiment of the present disclosure, a method comprising electrically coupling a first nanosecond DC pulse generator to a lower electrode and electrically coupling a second nanosecond TES pulse generator to a TES electrode, wherein the first nanosecond DC pulse generator is configured as a master and the second nanosecond DC pulse generator is configured as a slave.

[0099] According to one embodiment of the present disclosure, in the method, the first low-frequency pulsed DC power signal is configured as a square pulse with a duty cycle of less than 50%.

[0100] In this method, the first low-frequency pulsed DC power signal is configured to have a frequency of 100 to 800 kilohertz.

[0101] In embodiments, the substrate positioning program may include program code for controlling chamber components used to load the substrate onto a pedestal or chuck or ESC and to control the spacing between the substrate and other parts of the chamber, such as the gas inlet and / or target, which can be implemented by a control system 116 or controller in Figures 1 and 2. In some embodiments, the controller is part of a system, which may be part of the examples described above. Such a system may comprise semiconductor processing equipment including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a substrate pedestal, gas flow system, etc.). These systems may be integrated with electronic equipment for controlling pre-processing, in-processing, and post-processing operations of semiconductor wafers or substrates. Depending on the processing requirements and / or the type of system, the controller may be programmed to control any of the processes disclosed herein and processes implemented to operate the plasma chamber. Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files) that define operating parameters for executing a particular process on or for a semiconductor substrate or on the system. In some embodiments, the operating parameters may be part of a recipe defined by a process engineer to realize one or more processing steps in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0102] In some embodiments, the controller may be part of a computer integrated with or connected to the system, or otherwise networked to the system, or connected to such a computer, or a combination thereof. For example, the controller may reside in a “cloud” of all or part of the fab host computer system, thereby enabling remote access to the board processing. The computer may enable remote access to the system to monitor the current progress of fabrication operations, review the history of past fabrication operations, examine trends or performance criteria from multiple fabrication operations, modify parameters of the current process, set processing steps following the current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network. Such a network may include a local network or the internet.

[0103] Exemplary systems may include, but are not limited to, plasma etching chambers or modules, deposition chambers or modules, spin rinse chambers or modules, metal plating chambers or modules, cleaning chambers or modules, bevel edge etching chambers or modules, physical vapor deposition (PVD) chambers or modules, chemical vapor deposition (CVD) chambers or modules, plasma-enhanced chemical vapor deposition (PECVD) chambers or modules, atomic layer deposition (ALD) chambers or modules, atomic layer etching (ALE) chambers or modules, ion implantation chambers or modules, tracking chambers or modules, and any other semiconductor processing systems that may be used in connection with or for the fabrication and / or manufacture of semiconductor wafers.

[0104] As described above, depending on one or more process steps performed by the tool, the controller may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used for material handling to load and unload wafer containers to and from tool locations and / or load ports within the semiconductor manufacturing plant.

[0105] The foregoing description relating to embodiments is provided for illustrative and illustrative purposes only. It is not intended to be exhaustive or to limit the disclosure. Individual elements or features of a particular embodiment are generally not limited to that particular embodiment and, where applicable, are interchangeable and can be used in selected embodiments even if not specifically illustrated or described. The same may be modified in many ways. Such modifications should not be considered departures from the disclosure, and all such modifications are intended to be within the scope of the disclosure.

[0106] While the embodiments described above have been explained in some detail for clearer understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Therefore, these embodiments should be considered illustrative rather than restrictive, and the embodiments should not be limited to the details described herein, but may be modified within the scope of the claims and equivalents.

Claims

1. A plasma chamber configured to generate plasma, wherein the plasma chamber includes a lower electrode located within an electrostatic chuck (ESC), An upper electrode positioned on the lower electrode, The edge ring surrounding the lower electrode, A first nanosecond DC pulse generator is electrically coupled to the lower electrode and configured to supply a first low-frequency pulsed direct current (DC) power signal to the lower electrode, wherein the first low-frequency pulsed DC power signal is a non-sinusoidal wave. A second nanosecond DC pulse generator is electrically coupled to the edge ring and configured to supply a second low-frequency pulsed DC power signal to the edge ring. Equipped with, The second low-frequency pulsed DC power signal is non-sinusoidal and substantially matches the frequency, phase, and pulse shape of the first low-frequency pulsed DC power signal. system.

2. The system according to claim 1, A first measuring sensor for measuring the potential on the substrate and determining a first voltage signal, A second measuring sensor for measuring the potential at the edge ring and determining a second voltage signal, A slave controller configured to adjust the voltage of the second low-frequency pulsed DC power signal until the second slope of the second voltage signal substantially matches the first slope of the first voltage signal, and A system that further enhances this feature.

3. The system according to claim 1, A first measuring sensor for measuring the potential on the substrate and determining a first voltage signal, A second measuring sensor for measuring the potential at the edge ring and determining a second voltage signal, A slave controller configured to adjust the voltage of the second low-frequency pulsed DC power signal until one or more voltages of the first voltage signal match one or more voltages of the second voltage signal, system.

4. The system according to claim 1, The first nanosecond DC pulse generator is configured as a master, The second nanosecond DC pulse generator is configured as a slave. A system that further enhances this feature.

5. The system according to claim 1, An RF generator configured to be electrically coupled to the upper electrode and to supply a high-frequency radio frequency (RF) power signal to the upper electrode, wherein the high-frequency RF power signal is a sine wave. A system that further enhances this feature.

6. The system according to claim 1, The first coupling between the second nanosecond DC pulse generator and the edge ring is matchless. The second coupling between the first nanosecond DC pulse generator and the lower electrode is matchless. system.

7. The system according to claim 1, The first low-frequency pulsed DC power signal is configured as a square pulse with a duty cycle of less than 50%. system.

8. The system according to claim 7, The rectangular pulse has a width of 200 to 1000 nanoseconds. The rectangular pulse has the pulse shape described above. system.

9. The system according to claim 1, The first low-frequency pulsed DC power signal is configured to have a frequency of 100 to 800 kHz. system.

10. The system according to claim 1, coupling ring adjacent to the edge ring Furthermore, The coupling ring is configured to receive the second low-frequency pulsed DC power signal, The second low-frequency pulsed DC power signal is supplied to the edge ring via capacitive coupling between the coupling ring and the edge ring. system.

11. The system according to claim 1, The plasma chamber is configured as a capacitively coupled plasma chamber. system.

12. A plasma chamber for generating plasma is provided, the plasma chamber including a lower electrode located within an electrostatic chuck (ESC), The first low-frequency pulsed DC power signal is supplied to the lower electrode, wherein the first low-frequency pulsed DC power signal is non-sinusoidal. The method involves supplying a second low-frequency pulsed DC power signal to the edge ring surrounding the lower electrode, wherein the second low-frequency pulsed DC power signal is non-sinusoidal. The second low-frequency pulsed DC power signal is substantially matched to the frequency, phase, and pulse shape of the first low-frequency pulsed DC power signal. Methods that include...

13. The method according to claim 12, The substantially matching of the second low-frequency pulsed DC power signal is The potential on the substrate is measured, and the first voltage signal is determined. The potential at the edge ring is measured, and a second voltage signal is determined. The voltage of the second low-frequency pulsed DC power signal is adjusted until the second slope of the second voltage signal substantially matches the first slope of the first voltage signal. Methods that include...

14. The method according to claim 12, The substantially matching of the second low-frequency pulsed DC power signal is The potential on the substrate is measured, and the first voltage signal is determined. The potential at the edge ring is measured, and a second voltage signal is determined. Adjusting the voltage of the second low-frequency pulsed DC power signal to match a predetermined voltage set value. Methods that include...

15. The method according to claim 12, The first nanosecond DC pulse generator is electrically coupled to the lower electrode, wherein the coupling between the first nanosecond DC pulse generator and the lower electrode is matchless. The second nanosecond DC pulse generator is electrically coupled to a coupling ring adjacent to the edge ring, wherein the coupling between the second nanosecond DC pulse generator and the coupling ring is matchless. Methods that further include the above.

16. The method according to claim 15, The second low-frequency pulsed DC power signal is supplied to the edge ring via capacitive coupling between the coupling ring and the edge ring. method.

17. The method according to claim 15, The first nanosecond DC pulse generator is configured as a master, The second nanosecond DC pulse generator is configured as a slave. method.

18. The method according to claim 12, To supply a high-frequency radio (RF) power signal to an upper electrode positioned on the lower electrode. It further includes, The aforementioned high-frequency RF power signal is a sine wave. method.

19. The method according to claim 12, The first low-frequency pulsed DC power signal is configured as a square pulse with a duty cycle of less than 50%. method.

20. The method according to claim 19, The rectangular pulse has a width of 200 to 1000 nanoseconds. The rectangular pulse has the pulse shape described above. method.

21. The method according to claim 12, The first low-frequency pulsed DC power signal is configured to have a frequency of 100 to 800 kHz. method.

22. The method according to claim 12, The plasma chamber is configured as a capacitively coupled plasma chamber. method.

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