Solid State Relay
The vertical arrangement of power and control modules with via-in-pad structure and conductive pillars in the solid state relay addresses space utilization and parasitic inductance issues, enhancing assembly efficiency and service life through reduced area occupation and improved current transmission.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Utility models
- Current Assignee / Owner
- TOWARD TECHNOLOGIES INC
- Filing Date
- 2026-01-19
- Publication Date
- 2026-06-05
AI Technical Summary
Conventional solid state relays face challenges in optimizing their shape and reducing parasitic inductance while ensuring efficient space utilization and assembly convenience.
The solid state relay features a vertical arrangement of power and control modules on separate circuit boards, utilizing a via-in-pad structure and conductive pillars to reduce area occupation and parasitic inductance, with a conductive layer or filled via for conductivity, and a housing or glue material for insulation and heat dissipation.
This design reduces the occupied area, enhances assembly efficiency, and extends service life by facilitating easier stacking, assembly, and maintenance, while significantly minimizing parasitic inductance and improving current transmission efficiency.
Smart Images

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