Video decoding and encoding method, apparatus and computer program

Abstract

Aspects of the present disclosure provide a video encoding / coding method and apparatus. In some examples, a video decoding apparatus includes a processing circuit capable of decoding coding information of a transform block (TB) from a coded video bitstream. The coding information may indicate a region of the TB to which a secondary transform is applied. The region may include a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region. The processing circuit may determine, for a transform coefficient in the TB, whether a neighboring transform coefficient used to determine the transform coefficient is located in the second sub-region. If it is determined that the neighboring transform coefficient is located in the second sub-region, the processing circuit may determine the transform coefficient according to a default value of the neighboring transform coefficient, and, for samples in the TB, reconstruct samples based on the transform coefficient.

Description

[Technical field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims the benefit of priority to U.S. Patent Application No. 16 / 787,628, entitled "Method and apparatus for video coding," filed February 11, 2020, which claims the benefit of priority to U.S. Provisional Application No. 62 / 804,666, entitled "Transform Coefficient Zero-Out," filed February 12, 2019. The entire disclosures of these prior applications are hereby incorporated by reference in their entirety.

[0002] [Technical field] This disclosure describes embodiments generally related to video encoding. [Background technology]

[0003] The background discussion provided herein is intended to generally present the background of the present disclosure. The work of the inventors of the present application is not admitted explicitly or implicitly as prior art to the present disclosure to the extent that such work is described in this background section, nor are any aspects of the description that do not specifically qualify as prior art at the time of filing.

[0004] Video encoding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a sequence of pictures, each with spatial dimensions of, for example, 1920x1080 luma samples and associated chroma samples. The sequence of pictures can have a fixed or variable picture rate (also informally known as frame rate), for example, 60 pictures per second or 60 Hz. Uncompressed video has significant bitrate requirements. For example, 1080p60 4:2:0 video (1920x1080 luma sample resolution with a frame rate of 60 Hz) with 8 bits per sample requires a bandwidth approaching 1.5 Gbit / s. One hour of such video requires more than 600 Gbytes of storage space.

[0005] One goal of video encoding and decoding is to be able to reduce redundancy in the input video signal through compression. Compression can help reduce the bandwidth or storage space requirements, in some cases by more than one order of magnitude. Both lossless and lossy compression, as well as combinations of these, can be used. Lossless compression refers to techniques where an exact copy of the original signal can be restored from the compressed original signal. When lossy compression is used, the restored signal may not be identical to the original signal, but the distortion between the original and restored signals is small enough to make the restored signal useful for the intended application. For video, lossy compression is widely used. The amount of acceptable distortion depends on the application. For example, users of a particular consumer streaming application may tolerate higher distortion than users of a television distribution application. The achievable compression ratio can reflect higher acceptable distortion / acceptable distortion can result in higher compression ratios.

[0006] Video encoders and decoders may utilize techniques from a number of broad categories, including, for example, motion compensation, transformation, quantization, and entropy coding.

[0007] Video codec techniques can include a technique known as intra-coding. In intra-coding, sample values ​​are represented without reference to samples or other data from previously reconstructed reference pictures. In some video codecs, a picture is spatially subdivided into blocks of samples. If all blocks of samples are coded in intra mode, the picture can be an intra picture. Intra pictures and their derivatives, such as independent decoder refresh pictures, can be used to reset the decoder state and therefore can be used as the first picture in a coded video bitstream and video session or as a still image. Samples of an intra block can be subjected to a transform, and the transform coefficients can be quantized before entropy coding. Intra prediction can be a technique that minimizes sample values ​​in the pre-transform domain. In some cases, the smaller the DC value and the smaller the AC coefficients after the transform, the fewer bits are needed at a given quantization step size to represent the block after entropy coding.

[0008] Conventional intra-coding, for example as known from MPEG-2 generation encoding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to predict intra-prediction from surrounding sample data and / or metadata, for example obtained during encoding / decoding of a previous block of data that is spatially adjacent and in decoding order. Such techniques are referred to below as "intra prediction" techniques. It should be noted that at least in some cases, intra-prediction uses only reference data from the current picture being reconstructed, and does not use reference data from a reference picture.

[0009] There may be many forms of intra prediction. If one or more of such techniques are available in a given video coding technique, the technique used may be coded in intra prediction mode. In some cases, the mode may have sub-modes and / or parameters, which may be coded separately or may be included in the mode codeword. The codeword used for a given mode / sub-mode / parameter combination may affect the coding efficiency gain through intra prediction, which may in turn affect the entropy coding technique used to convert the codeword into a bitstream.

[0010] Certain intra prediction modes were introduced in H.264, improved in H.265, and further improved in newer coding techniques such as joint exploration model (JEM), versatile video coding (VVC) and benchmark set (BMS). A prediction block can be formed using neighboring sample values ​​belonging to already available samples. The sample values ​​of the neighboring samples are copied to the prediction block according to a direction. The reference to the direction in use can be coded in the bitstream or it may be predicted itself.

[0011] Referring to FIG. 1A, shown at the bottom right is a subset of 9 known predictor directions from the 33 possible predictor directions (corresponding to the 33 angle modes of the 35 intra modes) of H.265. The point (101) where the arrows converge represents the sample to be predicted. The arrows represent the direction in which the sample is predicted. For example, arrow (102) indicates that sample (101) is predicted from one or more samples to the upper right at an angle of 45 degrees from the horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more samples to the lower left of sample (101) at an angle of 22.5 degrees from the horizontal.

[0012] Still referring to FIG. 1A, at the top left is shown a square block (104) of 4×4 samples (indicated by a dashed bold line). The square block (104) contains 16 samples, each labeled with "S" and its position in the Y dimension (e.g., row index) and its position in the X dimension (e.g., column index). For example, sample S21 is the second sample in the Y dimension (from the top) and the first sample in the X dimension (from the left). Similarly, sample S44 is the fourth sample in the block (104) in both the Y and X dimensions. Since the size of the block is 4×4 samples, S44 is at the bottom right. Additionally, reference samples are shown following a similar numbering scheme. The reference samples are labeled with R and their Y position (e.g., row index) and X position (column index) relative to the block (104). In both H.264 and H.265, the prediction samples are adjacent to the block being reconstructed, so there is no need for negative values ​​to be used.

[0013] Intra-picture prediction can work by copying reference sample values ​​from neighboring samples according to the signaled prediction direction. For example, assume that the coded video bitstream includes signaling for this block indicating a prediction direction consistent with the arrow (102). That is, assume that the samples are predicted from one or more prediction samples to the upper right at an angle of 45 degrees from the horizontal. In this case, samples S41, S32, S23 and S14 are predicted from the same reference sample R05. Then sample S44 is predicted from reference sample R08.

[0014] In some cases, particularly when the orientation is not evenly divisible by 45 degrees, the values ​​of multiple reference samples may be combined, for example by interpolation, to calculate the reference sample.

[0015] As video coding techniques develop, the number of possible directions increases. In H.264 (2003), nine different directions could be represented. This increased to 33 in H.265 (2013), and at the time of disclosure, JEM / VVC / BMS can support up to 65 directions. Experiments have been carried out to identify the most likely directions, and certain techniques in entropy coding have been used to represent these more likely directions with a small number of bits, accepting a certain penalty for the less likely directions. Furthermore, in some cases, the direction itself can be predicted from the neighboring directions used in adjacent already decoded blocks.

[0016] FIG. 1B shows a schematic diagram (180) illustrating 65 intra prediction directions according to JEM, showing the increasing number of prediction directions over time.

[0017] The mapping of intra-prediction direction bits in a coded video bitstream to represent directions can vary across video coding techniques, ranging from simple direct mapping of prediction directions to complex adaptive schemes involving intra-prediction modes, codewords, most probable modes, and similar techniques. In all cases, however, there may be certain directions that are statistically less likely to occur in the video content than certain other directions. Since a goal of video compression is to reduce redundancy, in well-performing video coding techniques, these less likely directions are represented by a greater number of bits than the more likely directions.

[0018] Video encoding and decoding can be performed using inter-picture prediction with motion compensation. Motion compensation is a lossy compression technique and can be related to a technique in which blocks of sample data from a previously reconstructed picture or part thereof (reference picture) are used to predict a newly reconstructed picture or part thereof after being spatially shifted in a direction indicated by a motion vector (hereinafter referred to as MV). In some cases, the reference picture can be the same as the picture currently being reconstructed. The MV can have two dimensions, X and Y, or it can have three dimensions, with the third dimension indicating the reference picture being used (the latter can indirectly be the temporal dimension).

[0019] In some video compression techniques, the MV applicable to a particular region of sample data can be predicted from other MVs, e.g., from MVs associated with other regions of sample data that are spatially adjacent to the region being restored and that precede that MV in decoding order. This can significantly reduce the amount of data required to encode the MV, thereby removing redundancy and increasing compression. For example, when encoding an input video signal derived from a camera (known as natural video), MV prediction can work effectively because there is a statistical possibility that regions larger than the region to which a single MV is applicable move in a similar direction and therefore can be predicted using similar motion vectors, possibly derived from MVs of neighboring regions. As a result, the detected MV for a given region will be similar or identical to the MV predicted from the surrounding MVs, which, after entropy coding, can be represented with fewer bits than those used when encoding the MV directly. In some cases, MV prediction can be an example of lossless compression of a signal (i.e., MV) derived from the original signal (i.e., sample stream). In other cases, MV prediction itself can be lossy, e.g., due to rounding errors when calculating a predictor from several surrounding MVs.

[0020] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, “High Efficiency Video Coding”, December 2016). Among the many MV prediction mechanisms provided by H.265, there is a technique called “spatial merge” in this specification.

[0021] Referring to Figure 2, the current block (201) contains samples that the encoder detects during the motion search process to be predictable from a previous block of the same size but spatially shifted. Instead of directly encoding the MV, the MV can be derived from metadata associated with one or more reference pictures, e.g., from the most recent reference picture (in decoding order) using the MV associated with any one of the five surrounding samples denoted A0, A1 and B0, B1, B2 (202-206, respectively). In H.265, the MV prediction can use predictors from the same reference picture as the neighboring blocks use. Summary of the Invention

[0022] Aspects of the present disclosure provide a method and apparatus for video encoding / decoding. In some examples, the apparatus for video decoding includes a processing circuit. The processing circuit can decode coding information of a transform block (TB) from a coded video bitstream. The coding information can indicate an area of ​​the TB to which a secondary transform is applied. The area can include a first sub-area having transform coefficients calculated by the secondary transform and a second sub-area. The processing circuit can determine, for a transform coefficient in the TB, whether a neighboring transform coefficient used to determine the transform coefficient is located in the second sub-area. If it is determined that the neighboring transform coefficient is located in the second sub-area, the processing circuit can determine the transform coefficient according to a default value of the neighboring transform coefficient. The processing circuit can restore, for a sample in the TB, based on the transform coefficient.

[0023] In one embodiment, the transform coefficient in the TB is one of a plurality of transform coefficients in a first coefficient group (CG). A first CG flag for the first CG may indicate whether at least one of the transform coefficients is a non-zero transform coefficient. The second CG including the transform coefficient is previously entropy decoded and is a neighboring CG of the first CG. The processing circuit may determine a position of the second CG. If it is determined that the second CG is located in the second sub-region, the processing circuit may determine the first CG flag based on a default value of the second CG flag for the second CG.

[0024] In one embodiment, the transform coefficient in the TB is one of a plurality of transform coefficients in the first CG. The first CG flag for the first CG may indicate whether at least one of the transform coefficients is a non-zero transform coefficient. The second CG includes the first transform coefficient and the second transform coefficient. The second CG has been previously entropy decoded and is an adjacent CG of the first CG. The processing circuit may determine a position of the second CG. If a portion of the second CG including the second transform coefficient is located in a second sub-region and the first transform coefficient is a non-zero transform coefficient, the processing circuit may determine the first CG flag based on the second CG flag for the second CG.

[0025] In one embodiment, the processing circuit can determine whether the transform coefficient is located in the second sub-region. If it is determined that the transform coefficient is located in the second sub-region, the processing circuit can determine that the transform coefficient is not transmitted and is zero. If it is determined that the transform coefficient is not located in the second sub-region, the processing circuit can perform a determination of whether the adjacent transform coefficient is located in the second sub-region.

[0026] In one embodiment, the processing circuit can determine a syntax element for the transform coefficient. The syntax element can indicate one of whether the transform coefficient is a non-zero transform coefficient, the parity of the transform coefficient, whether the transform coefficient is greater than 2, and whether the transform coefficient is greater than 4.

[0027] Aspects of the present disclosure provide a method and apparatus for video decoding. In some examples, the apparatus for video decoding includes a processing circuit. The processing circuit can decode coding information of a transform block (TB) from an encoded video bitstream. The processing circuit can determine, based on the coding information, whether a secondary transform is performed on a first region of the TB. The first region can include a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region. If it is determined that a secondary transform is performed, the processing circuit can determine that transform coefficients in a second region in the TB are zero, and the second region is outside the first region.

[0028] In one example, the size and location of a coefficient unit including multiple transform coefficients in the TB is determined based on the first region, and the transform coefficients outside the coefficient unit are zero.

[0029] In one example, the first region is the top-left 8×8 region in the TB, the coefficient unit is the first region, and the second region is adjacent to the top-left 8×8 region.

[0030] In one example, the first subregion is the top left 4x4 region in the TB, the coefficient unit is the first subregion within the first region, and the transform coefficients in the combined region including the second region and the second subregion are zero.

[0031] In one example, the first region is the top-left 4×4 region in the TB, the coefficient unit is the first region, and the second region is adjacent to the top-left 4×4 region.

[0032] Aspects of the present disclosure also provide a non-transitory computer-readable medium having stored thereon instructions that, when executed by a computer for video decoding, cause the computer to perform a method of video decoding. [Brief description of the drawings]

[0033] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Figure 1A] FIG. 2 is a schematic diagram of an example subset of intra-prediction modes. [Figure 1B] FIG. 2 is a diagram of an example intra-prediction direction. [Diagram 2] FIG. 2 is a schematic diagram of a current block and its surrounding spatial merge candidates in one example. [Diagram 3] FIG. 3 is a schematic diagram of a simplified block diagram of a communication system (300) according to one embodiment. [Figure 4] FIG. 4 is a schematic diagram of a simplified block diagram of a communication system (400) according to one embodiment. [Diagram 5] FIG. 2 is a schematic diagram of a simplified block diagram of a decoder according to one embodiment. [Figure 6] FIG. 2 is a schematic diagram of a simplified block diagram of an encoder according to one embodiment. [Figure 7] 4 shows a block diagram of an encoder according to another embodiment; [Figure 8] 4 shows a block diagram of a decoder according to another embodiment; [Figure 9] An example of the syntax of a transformation unit is shown below. [Figure 10A] 13 shows an example of the syntax for residual coding. [Figure 10B] 13 shows an example of the syntax for residual coding. [Figure 11] An example of the sub-block scanning process (1100) is shown. [Figure 12] An example of a local template (1230) used for context selection for the current coefficient (1220) is shown. [Figure 13] 13 shows an example of the syntax for residual coding. [Figure 14A] Here is an example of the sub-block transform (SBT). [Figure 14B] Here is an example of the sub-block transform (SBT). [Figure 14C] Here is an example of the sub-block transform (SBT). [Figure 14D] Here is an example of the sub-block transform (SBT). [Figure 15A] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 15B] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 15C] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 15D] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 15E] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 15F] Indicates the changes to the specification text of the video coding standard when SBT is used. [Figure 16A] 4 illustrates an example of a coefficient unit according to an embodiment of the present disclosure. [Figure 16B] 4 illustrates an example of a coefficient unit according to an embodiment of the present disclosure. [Figure 16C] 4 illustrates an example of a coefficient unit according to an embodiment of the present disclosure. [Figure 16D] 4 illustrates an example of a coefficient unit according to an embodiment of the present disclosure. [Figure 17] An exemplary coefficient block (1710) is shown. [Figure 18] 1 illustrates an example quadratic transformation including a zero-out method. [Figure 19] 1 illustrates an example quadratic transformation including a zero-out method. [Figure 20] 1 shows a flow chart outlining a process (2000) according to one embodiment of the present disclosure. [Figure 21] 2 shows a flow chart outlining a process (2100) according to one embodiment of the present disclosure. [Figure 22] FIG. 1 is a schematic diagram of a computer system according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] FIG. 3 illustrates a simplified block diagram of a communication system (300) according to an embodiment of the present disclosure. The communication system (300) includes, for example, a plurality of terminal devices that can communicate with each other via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of FIG. 3, the first pair of terminal devices (310) and (320) perform a one-way transmission of data. For example, the terminal device (310) may encode video data (e.g., a stream of video pictures captured by the terminal device (310)) for transmission to another terminal device (320) via the network (350). The encoded video data may be transmitted in the form of one or more encoded video bitstreams. The terminal device (320) may receive the encoded video data from the network (350), decode the encoded video data, reconstruct the video pictures, and display the video pictures according to the reconstructed video data. One-way data transmission may be common, such as in media presentation applications.

[0035] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) performing bidirectional transmission of encoded video data, such as may occur during a video conference. For the bidirectional transmission of data, in one example, each of the terminal devices (330) and (340) may encode video data (e.g., a stream of video pictures captured by the terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may also receive the encoded video data transmitted by the other of the terminal devices (330) and (340), decode the encoded video data to recover the video pictures, and display the video pictures on an accessible display device according to the recovered video data.

[0036] In the example of FIG. 3, the terminal devices (310), (320), (330), and (340) may be depicted as a server, a personal computer, and a smartphone, although the principles of the present disclosure are not limited thereto. The embodiments of the present disclosure may be applied to laptop computers, tablet computers, media players, and / or dedicated videoconferencing equipment. The network (350) represents any number of networks that convey encoded video data between the terminal devices (310), (320), (330), and (340), including, for example, wired (hardwired) and / or wireless communication networks. The communication network (350) may exchange data in circuit-switched and / or packet-switched channels. Exemplary networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this description, the architecture and topology of the network (350) is not important to the operation of the present disclosure, unless otherwise described herein below.

[0037] 4 shows an arrangement of a video encoder and a video decoder in a streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter is similarly applicable to other video-enabled applications including, for example, videoconferencing, digital TV, storage of compressed video on digital media (including CDs, DVDs, memory sticks, etc.), etc.

[0038] The streaming system may include a capture subsystem (413), which may include, for example, a video source (401) (e.g., a digital camera) that generates a stream of uncompressed video pictures (402). In one example, the stream of video pictures (402) includes samples taken by a digital camera. The stream of video pictures (402), depicted as a thick line to highlight its higher amount of data compared to the encoded video data (404) (or encoded video bitstream), may be processed by an electronic device (420) that includes a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), depicted as a thin line to highlight its lower amount of data compared to the stream of video pictures (402), may be stored in a streaming server (405) for future use. One or more streaming client subsystems, such as client subsystems (406) and (408) in FIG. 4, may access the streaming server (405) to obtain copies (407) and (409) of the encoded video data (404). The client subsystem (406) may include a video decoder (410), for example, within an electronic device (430). The video decoder (410) decodes an input copy (407) of the encoded video data and generates an output stream (411) of video pictures that can be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). In some streaming systems, the encoded video data (404), (407), and (409) (e.g., a video bitstream) may be encoded according to a particular video encoding / compression standard. Examples of these standards include ITU-T Recommendation H.265.In one example, a developing video coding standard is informally known as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of VVC.

[0039] It should be noted that electronic devices 420 and 430 may include other components (not shown). For example, electronic device 420 may include a video decoder (not shown) and electronic device 430 may include a video encoder (not shown).

[0040] 5 shows a block diagram of a video decoder (510) according to one embodiment of the present disclosure. The video decoder (510) may be included in an electronic device (530). The electronic device (530) may include a receiver (531) (e.g., a receiving circuit). The video decoder (510) may be used in place of the video decoder (410) in the example of FIG. 4.

[0041] The receiver (531) may receive one or more coded video sequences to be decoded by the video decoder (510), and in the same or other embodiments, may receive one coded video sequence at a time, with the decoding of each coded video sequence being independent of the other coded video sequences. The coded video sequences may be received from a channel (501), which may be a hardware / software link to a storage device that stores the coded video data. The receiver (531) may receive the coded video data together with other data (e.g., coded audio data and / or auxiliary data streams), which may be forwarded to respective usage entities (not shown). The receiver (531) may separate the coded video sequences from the other data. To prevent network jitter, a buffer memory (515) may be coupled between the receiver (531) and the entropy decoder / parser (520), hereinafter referred to as the parser (520). In certain applications, the buffer memory (515) is part of the video decoder (510). In other cases, it may be external to the video decoder (510) (not shown). In still other cases, there may be a buffer memory (not shown) external to the video decoder (510), e.g., to prevent network jitter, plus another buffer memory (515) internal to the video decoder (510), e.g., to handle playback timing. If the receiver (531) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability, or from an isochronous network, the buffer memory (515) may not be needed or may be small. For use with best-effort packet networks such as the Internet, the buffer memory (515) may be needed and may be relatively large, advantageously adaptively sized, and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (510).

[0042] The video decoder (510) may include a parser (520) for recovering symbols (521) from the coded video sequence. These categories of symbols include information used to manage the operation of the video decoder (510), potentially including information for controlling a rendering device such as a rendering device (512) (e.g., a display screen), which may not be an integral part of the electronic device (530) as shown in FIG. 5, but may be coupled to the electronic device (530). The rendering device control information may be in the form of Supplemental Enhancement Information (SEI) (SEI message) or Video Usability Information (VUI) parameter set fragments (not shown). The parser (520) may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow various principles including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. The parser (520) may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups may include a group of pictures (GOP), a picture, a tile, a slice, a macroblock, a coding unit (CU), a block, a transformation unit (TU), a prediction unit (PU), etc. The parser (520) may also extract information from the coded video sequence such as transform coefficients, quantization parameter values, motion vectors, etc.

[0043] The parser (520) may perform an entropy decoding / parsing operation on the video sequence received from the buffer memory (515) to generate symbols (521).

[0044] The recovery of the symbols (521) may involve several different units, depending on the type of coded video picture or portion thereof (e.g., inter-picture and intra-picture, inter-block and intra-block) and other factors. Which units are involved and how may be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following units is not shown for clarity.

[0045] In addition to the functional blocks described above, the video decoder (510) may be conceptually subdivided into a number of functional units, as described below. In a practical implementation operating under commercial constraints, many of these units may interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, a conceptual subdivision into the following functional units is appropriate:

[0046] The first unit is a scalar / inverse transform unit (551), which receives the quantized transform coefficients as symbols (521) from the parser (520), along with control information (including which transform to use, block size, quantization factor, quantization scaling matrix, etc.). The scalar / inverse transform unit (551) may output a block containing sample values ​​that can be input to an aggregator (555).

[0047] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but can use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (552). In some cases, the intra-picture prediction unit (552) generates a block of the same size and shape of the block being reconstructed using surrounding already reconstructed information retrieved from the current picture buffer (558). The current picture buffer (558) buffers, for example, a partially reconstructed and / or a fully reconstructed current picture. In some cases, the aggregator (555) adds, on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551).

[0048] In other cases, the output samples of the scaler / inverse transform unit (551) may relate to an inter-coded and potentially motion-compensated block. In such cases, the motion compensated prediction unit (553) may access the reference picture memory (557) to retrieve samples used for prediction. After motion compensating the retrieved samples according to the symbols (521) associated with the block, these samples may be added by the aggregator (555) to the output of the scaler / inverse transform unit (551) (in this case referred to as residual samples or residual signals) to generate output sample information. The addresses in the reference picture memory (557) available to the motion compensated prediction unit (553) from which the motion compensated prediction unit (553) retrieves prediction samples may be controlled by a motion vector, e.g., in the form of a symbol (521) that may have X, Y, and reference picture components. Motion compensation may also include interpolation of sample values ​​retrieved from the reference picture memory (557) when sub-sample accurate motion vectors are used, motion vector prediction mechanisms, etc.

[0049] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in a loop filter unit (556). The video compression techniques may include in-loop filter techniques, controlled by parameters contained in the coded video sequence (also called coded video bitstream) and made available to the loop filter unit (556) as symbols (521) from the parser (520), which may be responsive to meta-information obtained during decoding of previous portions of the coded picture or coded video sequence (in decoding order), as well as to previously reconstructed loop filtered sample values.

[0050] The output of the loop filter unit (556) may be a sample stream that may be output to a rendering device (512) and also stored in a reference picture memory (557) for use in future inter-picture prediction.

[0051] Once a particular coded picture is fully reconstructed, it may be used as a reference picture for future prediction. For example, once a coded picture corresponding to the current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (520)), the current picture buffer (558) may become part of the reference picture memory (557), and a new current picture buffer may be reallocated before beginning reconstruction of the subsequent coded picture.

[0052] The video decoder (510) may perform decoding operations according to a given video compression technique in a standard such as ITU-T Rec. H.265. The coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence conforms to both the syntax of the video compression technique or standard and the profile documented in the video compression technique or standard. In particular, the profile may select certain tools from all tools available in the video compression technique or standard as the only tools available for use in that profile. Also, what is required for compliance is that the complexity of the coded video sequence is within a range defined by the level of the video compression technique or standard. In some cases, the level limits the maximum picture size, maximum frame rate, maximum reconstructed sample rate (e.g., measured in megasamples per second), maximum reference picture size, etc. In some cases, the limits set by the level may be further limited through a Hypothetical Reference Decoder (HRD) specification and metadata about HRD buffer management conveyed in the coded video sequence.

[0053] In one embodiment, the receiver (531) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the encoded video sequence. The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately recover the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0054] 6 shows a block diagram of a video encoder (603) according to one embodiment of the present disclosure. The video encoder (603) is included in an electronic device (620). The electronic device (620) includes a transmitter (640) (e.g., a transmission circuit). The video encoder (603) may be used in place of the video encoder (403) in the example of FIG. 4.

[0055] The video encoder (603) may receive video samples from a video source (601) (not part of the electronic device (620) in the example of FIG. 6), which may capture video images to be encoded by the video encoder (603). In other examples, the video source (601) is part of the electronic device (620).

[0056] The video source (601) may provide a source video sequence to be encoded by the video encoder (603) in the form of a digital video sample stream, which may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, etc.), any color space (e.g., BT.601 Y CrCB, RGB, etc.), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media presentation system, the video source (601) may be a storage device that stores pre-prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as a number of individual pictures that convey motion when viewed in sequence. The pictures themselves may be organized as a spatial array of pixels, each of which may contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0057] According to one embodiment, the video encoder (603) may encode and compress pictures of a source video sequence into an encoded video sequence (643) in real-time or under any other time constraint required by an application. Achieving an appropriate encoding rate is one function of the controller (650). In some embodiments, the controller (650) controls and is operatively coupled to other functional units, as described below. Coupling is not shown for clarity. Parameters set by the controller (650) may include rate control related parameters (picture skip, quantization, lambda values ​​for rate distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. The controller (650) may be configured with other appropriate functions associated with the video encoder (603) optimized for a particular system design.

[0058] In some embodiments, the video encoder (603) is configured to operate in an encoding loop. As a very simplified description, in one example, the encoding loop may include a source coder (630) (e.g., responsible for generating symbols, such as a symbol stream, based on an input picture to be encoded and reference pictures) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to generate sample data as the (remote) decoder would generate them (so that any compression between the symbols and the encoded video bitstream is lossless in the video compression techniques considered in the disclosed subject matter). The reconstructed sample stream (sample data) is input to a reference picture memory (634). Since the decoding of the symbol stream produces bit-wise accurate results independent of the location of the decoder (local or remote), the contents in the reference picture memory (634) are also bit-wise accurate between the local and remote encoders. In other words, the prediction part of the encoder "sees" exactly the same sample values ​​as the reference picture samples that the decoder "sees" when using the prediction during decoding. This basic principle of reference picture synchronization (including the resulting drift when synchronization cannot be maintained, for example, due to channel errors) is used in some related technologies as well.

[0059] The operation of the "local" decoder (633) may be the same as a "remote" decoder, such as the video decoder (410), which has already been described in detail above in connection with Figure 5. However, with brief reference to Figure 5, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) may be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515) and parser (520), may not be fully implemented in the local decoder (633).

[0060] An observation that can be made at this point is that any decoder technique, other than analysis / entropy decoding, present in the decoder must necessarily be present in the corresponding encoder in substantially the same functional form. For this reason, the subject matter of the disclosure focuses on the decoder operation. A description of the encoder techniques can be omitted, as they are the inverse of the decoder techniques, which are described generically. Only in certain areas are more detailed descriptions necessary, and are provided below.

[0061] In some examples, during operation, the source coder (630) may perform motion-compensated predictive encoding, which predictively encodes an input picture with reference to one or more previously encoded pictures from a video sequence designated as “reference pictures.” In this manner, the encoding engine (632) encodes differences between pixel blocks of the input picture and pixel blocks of reference pictures that may be selected as predictive references for the input picture.

[0062] The local video decoder (633) may decode the encoded video data of pictures that may be designated as reference pictures based on the symbols generated by the source coder (630). The operation of the encoding engine (632) may advantageously be a lossy process. If the encoded video data can be decoded in a video decoder (not shown in FIG. 6), the reconstructed video sequence may be a replica of the source video sequence, typically with some errors. The local video decoder (633) may replicate the decoding process that may be performed by the video decoder on the reference pictures and store the reconstructed reference pictures in a reference picture cache (634). In this way, the video encoder (603) may locally store copies of reconstructed reference pictures that have common content as reconstructed reference pictures (without transmission errors) obtained by the far-end video decoder.

[0063] The predictor (635) may perform a prediction search for the coding engine (632). That is, for a new picture to be coded, the predictor (635) may search the reference picture memory (634) for sample data (as candidate reference pixel blocks) or specific metadata (reference picture motion vectors, block shapes, etc.), which may serve as suitable prediction references for the new picture. The predictor (635) may operate on a sample block-by-pixel block basis to find suitable prediction references. In some cases, the input picture determined by the search results obtained by the predictor (635) may have prediction references drawn from multiple reference pictures stored in the reference picture memory (634).

[0064] The controller (650) may manage the encoding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0065] The output of all the above functional units may undergo entropy coding in an entropy coder (645), which converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0066] The transmitter (640) may buffer the encoded video sequence produced by the entropy coder (645) and prepare it for transmission over a communication channel (660), which may be a hardware / software link to a storage device that stores the encoded video data. The transmitter (640) may merge the encoded video data from the video coder (603) with other data to be transmitted, such as encoded audio data and / or an auxiliary data stream (not shown).

[0067] A controller (650) may manage the operation of the video encoder (603). During encoding, the controller (650) may assign each coded picture a particular coded picture type, which may affect the coding technique that may be applied to each picture. For example, pictures may often be assigned as one of the following picture types:

[0068] An Intra picture (I-picture) may be one that can be coded and decoded without using other pictures in a sequence as a source of prediction. Some video codecs allow different types of Intra pictures, including, for example, Independent Decoder Refresh (IDR) pictures. Those skilled in the art will recognize these variations of I-pictures and their respective uses and characteristics.

[0069] A predictive picture (P-picture) may be encoded and decoded using intra- or inter-prediction, using at most one motion vector and reference index to predict the sample values ​​of each block.

[0070] Bidirectionally predicted pictures (B-pictures) may be encoded and decoded using intra- or inter-prediction, using up to two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, multiple predicted pictures may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0071] In general, a source picture may be spatially subdivided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8 or 16x16 samples, respectively) and coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks as determined by the coding assignment applied to the respective picture of the block. For example, blocks of an I-picture may be non-predictively coded or may be predictively coded with reference to already coded blocks of the same picture (spatial or intra prediction). Pixel blocks of a P-picture may be predictively coded via spatial or temporal prediction with reference to the reference picture coded one step before. Blocks of a B-picture may be predictively coded via spatial or temporal prediction with reference to the reference picture coded one or two steps before.

[0072] The video encoder (603) may perform encoding operations according to a given video encoding technique or standard, such as ITU-T Rec. H.265. In its operations, the video encoder (603) may perform various compression operations, including predictive encoding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the encoded video data may conform to a syntax specified by the video encoding technique or standard being used.

[0073] In one embodiment, the transmitter (640) may transmit additional data along with the coded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include other types of redundant data, such as temporal / spatial / SNR enhancement layers, redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.

[0074] A video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits correlation (temporal or other) between pictures. In one example, a particular picture being coded / decoded, called the current picture, is divided into blocks. If a block in the current picture is similar to a reference block in a previously coded and still buffered reference picture in the video, the block in the current picture may be coded by a vector called a motion vector. The motion vector points to a reference block in the reference picture, and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0075] In some embodiments, bidirectional prediction techniques may be used in inter-picture prediction. According to bidirectional prediction techniques, two reference pictures are used, such as a first reference picture and a second reference picture, both preceding in decoding order to the current picture in the video (but may be past and future, respectively, in display order). A block in the current picture may be coded by a first motion vector that points to a first reference block in the first reference picture and a second motion vector that points to a second reference block in the second reference picture. A block may be predicted by a combination of the first reference block and the second reference block.

[0076] Furthermore, to improve coding efficiency, merge mode techniques can be used in inter-picture prediction.

[0077] According to some embodiments of the present disclosure, predictions such as inter-picture prediction and intra-picture prediction are performed on a block-by-block basis. For example, according to the HEVC standard, pictures in a sequence of video pictures are divided into coding tree units (CTUs) for compression, and the CTUs in a picture have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. Generally, a CTU includes three coding tree blocks (CTBs), one luma CTB and two chroma CTBs. Each CTU may be recursively quadtree partitioned into one or more coding units (CUs). For example, a CTU of 64×64 pixels can be partitioned into one CU of 64×64 pixels, four CUs of 32×32 pixels, or 16 CUs of 16×16 pixels. In one example, each CU is analyzed to determine a prediction type of the CU, such as an inter prediction type or an intra prediction type. A CU is divided into one or more prediction units (PU, prediction unit) depending on temporal and / or spatial predictability. Generally, each PU includes a luma prediction block (PB, prediction block) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed in units of prediction blocks. Taking a luma prediction block as an example of a prediction block, a prediction block includes a matrix of pixel values ​​(e.g., luma values), such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, etc.

[0078] 7 shows a diagram of a video encoder (703) according to another embodiment of the present disclosure. The video encoder (703) is configured to receive a processed block of sample values ​​(e.g., a predictive block) in a current video picture in a sequence of video pictures and to encode the processed block into a coded picture that is part of a coded video sequence. In one example, the video encoder (703) is used in place of the video encoder (403) of the example of FIG. 4.

[0079] In an HEVC example, the video encoder (703) receives a matrix of sample values ​​for a processing block, such as a predictive block of 8x8 samples. The video encoder (703) determines whether the processing block is best coded using an intra mode, an inter mode, or a bidirectional predictive mode, e.g., using rate-distortion optimization. If the processing block is coded in an intra mode, the video encoder (703) may use intra prediction techniques to code the processing block into a coded picture. If the processing block is coded in an inter mode or a bidirectional predictive mode, the video encoder (703) may use inter prediction techniques or bidirectional prediction techniques, respectively, to code the processing block into a coded picture. In certain video coding techniques, the merge mode may be an inter picture prediction sub-mode in which a motion vector is derived from one or more motion vector predictors without the benefit of any coded motion vector components other than the motion vector predictor. In certain other video coding techniques, there may be motion vector components applicable to the block of interest. In one example, the video encoder (703) includes other components, such as a mode decision module (not shown) for determining the mode of the processing blocks.

[0080] In the example of FIG. 7, the video encoder (703) includes an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), an overall controller (721), and an entropy encoder (725) coupled together as shown in FIG.

[0081] The inter-encoder (730) is configured to receive samples of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in a previous picture and a subsequent picture), generate inter-prediction information (e.g., a description of redundant information due to an inter-coding technique, motion vectors, merge mode information), and calculate an inter-prediction result (e.g., a prediction block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture that is decoded based on the coded video information.

[0082] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), possibly compare the block with previously encoded blocks in the same picture, generate quantized coefficients after transformation, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). In one example, the intra encoder (722) also calculates an intra prediction result (e.g., a prediction block) based on the intra prediction information and a reference block in the same picture.

[0083] The global controller (721) is configured to determine global control data and control other components of the video encoder (703) based on the global control data. In one example, the global controller (721) determines the mode of the block and provides a control signal to the switch (726) based on the mode. For example, if the mode is an intra mode, the global controller (721) controls the switch (726) to select an intra mode result to be used by the residual calculator (723) and controls the entropy encoder (725) to select intra prediction information and include the intra prediction information in the bitstream. If the mode is an inter mode, the global controller (721) controls the switch (726) to select an inter prediction result to be used by the residual calculator (723) and controls the entropy encoder (725) to select inter prediction information and include the inter prediction information in the bitstream.

[0084] The residual calculator (723) is configured to calculate a difference (residual data) between the received block and a prediction result selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) operates on the residual data and is configured to encode the residual data to generate transform coefficients. In one example, the residual encoder (724) is configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data may be used by the intra-encoder (722) and the inter-encoder (730) as appropriate. For example, the inter-encoder (730) may generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (722) may generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks are suitably processed to generate a decoded picture, which may be buffered in a memory circuit (not shown) and used as a reference picture in some examples.

[0085] The entropy encoder (725) is configured to format the bitstream to include the coded block. The entropy encoder (725) is configured to include various information according to an appropriate standard, such as the HEVC standard. In one example, the entropy encoder (725) is configured to include global control data, selected prediction information (e.g., intra prediction information or inter prediction information), residual information, and other appropriate information in the bitstream. It should be noted that, according to the disclosed subject matter, when encoding a block in a merged sub-mode of either the inter mode or the bi-prediction mode, the residual information is not present.

[0086] 8 shows a diagram of a video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (810) is used in place of the video decoder (410) of the example of FIG. 4.

[0087] In the example of FIG. 8, the video decoder (810) includes an entropy decoder (871), an inter decoder (880), a residual decoder (873), a reconstruction module (874), and an intra decoder (872) coupled together as shown in FIG. 8.

[0088] The entropy decoder (871) may be configured to recover from the coded picture certain symbols that represent the syntax elements of which the coded picture is composed. Such symbols may include, for example, prediction information (e.g., intra-mode, inter-mode, bi-predictive mode, the latter two in merged submode or other submodes, etc.) that can identify the mode in which the block is coded (e.g., intra-mode, inter-mode, bi-directional predictive mode, merged submode or the latter two in other submodes, etc.), certain samples or metadata used for prediction by the intra decoder (872) or the inter decoder (880), respectively, residual information, for example in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter mode or bi-directional predictive mode, the inter prediction information is provided to the inter decoder (880), and if the prediction type is an intra prediction type, the intra prediction information is provided to the intra decoder (872). The residual information may undergo inverse quantization and is provided to the residual decoder (873).

[0089] The inter decoder (880) is configured to receive the inter prediction information and to generate inter prediction results based on the inter prediction information.

[0090] The intra decoder (872) is configured to receive the intra prediction information and to generate a prediction result based on the intra prediction information.

[0091] The residual decoder (873) is configured to perform inverse quantization to extract inverse quantized transform coefficients, and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (873) may also require certain control information, including a quantizer parameter (QP), which may be provided by the entropy decoder (871) (data path not shown, as this may be only low volume control information).

[0092] The reconstruction module (874) is configured to combine, in the spatial domain, the residual output by the residual decoder (873) and the prediction result (possibly output by an inter-prediction module or an intra-prediction module) to form a reconstruction block, which may be part of a reconstructed picture or part of a reconstructed video. It should be noted that other suitable operations may be performed to improve the visual quality, such as a debooking operation.

[0093] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using any suitable technology. In one embodiment, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more integrated circuits. In other embodiments, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) may be implemented using one or more processors executing software instructions.

[0094] In some embodiments, such as HEVC, the primary transform may include 4-point, 8-point, 16-point, and 32-point discrete cosine transform (DCT) type 2 (DCT-2), and the transform core matrix may be represented using 8-bit integers (i.e., 8-bit transform cores). As shown in Appendix I, the transform core matrix of the smaller DCT-2 is a subset of the transform core matrix of the larger DCT-2.

[0095] The DCT-2 core matrix exhibits symmetric / antisymmetric properties, therefore a "partial butterfly" implementation may be supported to reduce the operation count (e.g., multiplications, additions, subtractions, shifts, etc.) and the same result of a matrix multiplication can be obtained using a partial butterfly.

[0096] In some embodiments, such as VVC, in addition to the 4-point, 8-point, 16-point and 32-point DCT-2 transforms mentioned above, additional 2-point and 64-point DCT-2 transforms may also be included. An example of a 64-point DCT-2 core as used in VVC is shown in Appendix II as a 64x64 matrix.

[0097] In addition to DCT-2 and 4x4 DST-7 as used in HEVC, the Adaptive Multiple Transform (AMT) (also known as Enhanced Multiple Transform (EMT) or Multiple Transform Selection (MTS)) scheme as used in VVC can be used for residual coding of both inter- and intra-coded blocks. The AMT scheme may use multiple selected transforms from the DCT / DST family other than the current transforms in HEVC. Newly introduced transform matrices are DST-7, DCT-8. Table 1 shows examples of selected DST / DCT basis functions for an input of N points. [Table 1]

[0098] A linear transform matrix, such as that used in VVC, may be used in 8-bit representation. AMT applies a transform matrix to transform blocks whose width and height are both 32 or less. Whether AMT is applied may be controlled by a flag (e.g., mts_flag). When mts_flag is equal to 0, in some examples, only DCT-2 is applied to encode the residual data. When mts_flag is equal to 1, an index (e.g., mts_idx) may be further signaled, for example, using two bins to identify the horizontal and vertical transforms to be used according to Table 2. A type value of 1 means that DST-7 is used, and a type value of 2 means that DCT-8 is used. In Table 2, the specification of trTypeHor and trTypeVer depends on mts_idx[x][y][cIdx]. [Table 2]

[0099] In some embodiments, implicit MTS may be applied when the above signaling-based MTS (i.e., explicit MTS) is not used. In implicit MTS, transform selection is made according to block width and height instead of signaling. For example, in implicit MTS, DST-7 is selected for the short side of an M×N block (i.e., the smallest of M and N), and DCT-2 is selected for the long side of the block (i.e., the largest of M and N).

[0100] Exemplary transform cores, matrices constructed by the basis vectors of DST-7 and DCT-8, respectively, are shown in Appendix III.

[0101] In some examples, such as VVC, the TB size is the same as the coding block size if both the height and width of the coding block are less than or equal to 64. If either the height or width of the coding block is greater than 64, when performing a transform (such as an inverse transform, an inverse linear transform, etc.) or intra prediction, the coding block is further divided into multiple sub-blocks, each of which has a width and height less than or equal to 64. One transform can be performed on each sub-block.

[0102] The relevant syntax and semantics of MTS in some examples in VVC may be described below in FIG. 9 and FIG. 10A-10B (for example, the relevant syntax is highlighted using frames 901 and 1001). FIG. 9 shows an example of the syntax of a transform unit. FIG. 10A-10B shows an example of the syntax of residual coding. Examples of the semantics of a transform unit are as follows: cu_mts_flag[x0][y0] equal to 1 specifies that multiple transform selections are applied to the residual samples of the associated luma transform block. cu_mts_flag[x0][y0] equal to 0 specifies that multiple transform selections are not applied to the residual samples of the associated luma transform block. The array indexes x0, y0 specify the position (x0, y0) of the top-left luma sample of the considered transform block relative to the top-left luma sample of the picture. If cu_mts_flag[x0][y0] is not present, it is inferred to be equal to 0.

[0103] An example of the semantics of residual coding is as follows: mts_idx[x0][y0] specifies which transform kernel is applied to the luma residual samples along the horizontal and vertical directions of the current transform block. The array indexes x0, y0 specify the position (x0, y0) of the top-left luma sample of the considered transform block relative to the top-left luma sample of the picture. If mts_idx[x0][y0] is not present, it is inferred to be equal to -1.

[0104] In some embodiments, a coding block may be divided into sub-blocks having a size of, for example, 4×4. The sub-blocks in the coding block and the transform coefficients in each sub-block may be coded according to a predefined scan order. For a sub-block having at least one non-zero transform coefficient, coding of the transform coefficients may be separated into multiple scan passes, such as four scan passes. Within each pass, the transform coefficients (also called coefficients) in each sub-block may be scanned, for example, in a reverse diagonal scan order.

[0105] FIG. 11 shows an example of a sub-block scanning process (1100) in which different types of syntax elements for transform coefficients can be generated. The sub-block may be a 4×4 sub-block having 16 coefficients (1110). The 16 coefficients (1110) may be scanned based on a scan order such as 0 to 15 as shown in FIG. 11. In a first pass, the coefficients (1110) are scanned and three types of syntax elements (1101)-(1103) may be generated for each of the coefficients (1110). (i) A first type syntax element (1101) may be a significance flag (e.g., sig_coeff_flag) indicating whether the absolute transform coefficient level or value (e.g., absLevel) of each transform coefficient is greater than zero. The first type syntax element may be a binary syntax element. (ii) The second type syntax element (1102) may be a parity flag (e.g., par_level_flag) indicating the parity of the absolute transform coefficient level of the respective transform coefficient. In one example, the parity flag is generated only if the absolute transform coefficient level of the respective transform coefficient is non-zero. The second type syntax element may be a binary syntax element. (iii) A third type syntax element (1103) may be a flag greater than 1 (e.g., rem_abs_gt1_flag) indicating whether (absLevel-1)>>1 is greater than 0 for the respective transform coefficient. In one example, the flag greater than 1 is generated only if the absolute transform coefficient level of the respective transform coefficient is not zero. The third type syntax element may be a binary syntax element.

[0106] During the second pass, a fourth type syntax element (1104) may be generated. The fourth type syntax element (1104) may be a flag greater than 2 (e.g., rem_abs_gt2_flag). The fourth type syntax element (1104) indicates whether the absolute transform coefficient level of the respective transform coefficient is greater than 4. In one example, the greater than 2 flag is generated only if (absLevel-1)>>1 is greater than 0 for the respective transform coefficient. The fourth type syntax element may be a binary syntax element.

[0107] During the third pass, a fifth type syntax element (1105) may be generated. The fifth type syntax element (1105) is denoted abs_remainder and indicates that the remaining value of the absolute transform coefficient level of the respective transform coefficient is greater than 4. In one example, the fifth type syntax element (1105) is generated only if the absolute transform coefficient level of the respective transform coefficient is greater than 4. The fifth type syntax element may be a non-binary syntax element.

[0108] Within the fourth pass, a sixth type of syntax element (1106) may be generated for the coefficients (1110), with non-zero coefficient levels indicating the sign of each transform coefficient (1110).

[0109] The above various types of syntax elements (1101-1106) may be provided to an entropy encoder according to the order of the passes and the scan order in each pass. Different entropy coding schemes may be used to code different types of syntax elements. For example, in one embodiment, the significance flag, the parity flag, the greater than 1 flag, and the greater than 2 flag may be coded with a CABAC-based entropy encoder. In contrast, the syntax elements generated in the third and fourth passes may be coded with a CABAC-bypass type entropy encoder (e.g., a binary arithmetic encoder with fixed probability estimates for the input bins).

[0110] Context modeling may be performed to determine a context model for a bin of some types of transform coefficient syntax elements. In one embodiment, the context model may be determined according to a local template and a diagonal position of the current coefficient, possibly in combination with other factors.

[0111] FIG. 12 shows an example of a local template (1230) used for context selection of a current coefficient (1220). To exploit correlations between transform coefficients, previously coded coefficients covered by the local template (1230) may be used in context selection of the current context. The local template (1230) may cover adjacent positions or sets of coefficients of the current coefficient (1220) in the coefficient block (1210). The coefficient block (1210) may have a size of 8×8 coefficients. The coefficient block (1210) is divided into four sub-blocks, each having a size of 4×4 positions. In the example of FIG. 12, the local template (1230) is defined to be a 5-position template that covers the bottom-right five coefficient levels of the current coefficient (1220). If a reverse diagonal scan order is used for multiple passes over the coefficients in the coefficient block (1210), the adjacent coefficients in the local template (1230) are processed before the current coefficient (1220).

[0112] During context modeling, information about the coefficient levels in the local template (1230) may be used to determine a context model. To this end, in some embodiments, a measure called the template magnitude is defined to measure or indicate the magnitude of the transform coefficients or transform coefficient levels in the local template (1230). The template magnitude may then be used as a basis for selecting a context model.

[0113] In one example, the template magnitude is defined to be the sum (e.g., sumAbs1) of the partially reconstructed absolute transform coefficient levels in the local template (1230). The partially reconstructed absolute transform coefficient level absLevel1[x][y] may be determined according to the bins of the syntax elements (sig_coeff_flag, par_level_flag, and rem_abs_gt1_flag) of the respective transform coefficient. These three types of syntax elements are obtained after a first pass on the transform coefficients of the sub-block performed in the entropy encoder or entropy decoder. In one embodiment, the partially reconstructed absolute transform coefficient level absLevel1[x][y] at position (x, y) after the first pass is absLevel1[x][y]=sig_coeff_flag[x][y]+par_level_flag[x][y]+2*rem_abs_gt1_flag[x][y] where x and y are coordinates relative to the upper-left corner of the coefficient block (1210) and absLevel1[x][y] represents the partially restored absolute transform coefficient level at position (x, y).

[0114] d represents the diagonal position of the current coefficient, d is the sum of x and y, and numSig represents the number of non-zero coefficients in the local template (1230). For example, sumAbs1 represents the sum of the partially recovered absolute levels absLevel1[x][y] for the coefficients covered by the local template (1230).

[0115] When coding the sig_coeff_flag of the current coefficient (1220), the context model index is selected depending on sumAbs1 and the diagonal position d of the current coefficient (1220), where d is the sum of x and y. sumAbs1 represents the sum of the partially restored absolute levels absLevel1[x][y] for the coefficients covered by the local template (1230). In one embodiment, for the luma component, the context model index is ctxSig=18*max(0,state-1)+min(sumAbs1,5)+(d<2?12:(d<5?6:0)) Formula 1 where ctxSig represents the context index of the significance flag syntax element, and "state" specifies the state of scalar quantization of the dependent quantization scheme. In one example, "state" is derived using a state transition process. Equation (1) is ctxIdBase=18*max(0,state-1)+(d<2?12:(d<5?6:0)) Formula 2 ctxSig=ctxIdSigTable[min(sumAbs1,5)]+ctxIdBase Formula 3 where ctxIdBase represents a context index base. The context index base may be determined based on state and diagonal position d. For example, state may have values ​​of 0, 1, 2, or 3, and thus max(0,state-1) may have one of three possible values ​​(0, 1, or 2). For example, (d<2?12:(d<5?6:0)) may take values ​​of 12, 6, or 0, corresponding to different ranges of d (d<2, 2<=d<5, 5<=d). ctxIdSigTable[] may represent an array data structure, storing the context index offsets of significance flags with respect to ctxIdBase. For example, for different sumAbs1 values, min(sumAbs1,5) clips sumAbs1 values ​​to be less than or equal to 5. The clipped values ​​are then mapped to context index offsets. For example, with the definition of ctxIdSigTable[0~5]={0,1,2,3,4,5}, the clipped values ​​0, 1, 2, 3, 4 or 5 are mapped to 0, 1, 2, 3, 4 or 5, respectively.

[0116] In one embodiment, for the chrominance components, the context index is ctxSig=12*max(0,state-1)+min(sumAbs1,5)+(d<2?6:0) Formula 4 The formula (4) is equivalent to the following formulas (5) and (6). ctxIdBase=12*max(0,state-1)+(d<2?6:0) Formula 5 ctxSig=ctxIdSigTable[min(sumAbs1,5)]+ctxIdBase Formula 6 where state specifies the scalar quantization used if dependent quantization is enabled, and satate is derived using a state transition process. The table ctxIdSigTable stores context model index offsets ctxIdSigTable[0~5]={0,1,2,3,4,5}.

[0117] When coding the par_level_flag of the current coefficient (1220), a context index is selected depending on sumAbs1, numSig and the diagonal position d, where numSig represents the number of non-zero coefficients in the local template (1230). For example, for the luma component, the context index is ctxPar=1+min(sumAbs1-numSig,4)+(d==0?15:(d<3?10:(d<10?5:0))) Equation 7 The equation (7) may be determined according to ctxIdBase=(d==0?15:(d<3?10:(d<10?5:0))) Formula 8 ctxPar=1+ctxIdTable[min(sumAbs1-numSig,4)]+ctxIdBase Formula 9 where ctxPar represents the context index of the parity flag, and ctxIdTable[] represents an array data structure that stores the context index offset for each ctxIdBase. For example, ctxIdTable[0~4]={0,1,2,3,4}.

[0118] For color difference, the context index is ctxPar=1+min(sumAbs1-numSig,4)+(d==0?5:0) Equation 10 The equation (10) may be determined according to ctxIdBase=(d==0?5:0) Equation 11 ctxPar=1+ctxIdTable[min(sumAbs1-numSig,4)]+ctxIdBase Formula 12 where the table ctxIdTable stores the context model index offsets, and in one example, ctxIdTable[0~4]={0,1,2,3,4}.

[0119] When encoding rem_abs_gt1_flag and rem_abs_gt2_flag of the current coefficient (1120), the context model index may be determined in the same manner as par_level_flag. ctxGt1=ctxPar ctxGt2=ctxPar Here, ctxGt1 and ctxGt2 represent the context indexes of flags greater than 1 and greater than 2, respectively.

[0120] It should be noted that different sets of context models may be used for different types of syntax elements such as rem_abs_gt1_flag and rem_abs_gt2_flag. Thus, the context model used for rem_abs_gt1_flag is different from the context model for rem_abs_gt2_flag even if the value of ctxGt1 is equal to the value of ctxGt2.

[0121] A linear transform, such as a forward linear transform or an inverse linear transform, may utilize a zero-out method or scheme described below. In some examples, such as VVC, for a 64-point (or 64-length) DCT-2, only the first 32 coefficients are calculated, and the remaining coefficients are set to 0. Thus, for an M×N block to be coded using a DCT-2 transform, the top-left min(M,32)×min(N,32) low frequency coefficients are retained or calculated. The remaining coefficients may be set as 0 and not transmitted. In one example, the remaining coefficients are not calculated. Entropy coding of the coefficient block may be performed by setting the coefficient block size as min(M,32)×min(N,32), such that the coefficient coding of an M×N block is considered as a min(M,32)×(N,32) coefficient block.

[0122] In some examples where MTS is used, for a 32-point DST-7 or DCT-8, only the first 16 coefficients are calculated, and the remaining coefficients are set as zero. Thus, for an M×N block to be coded using a DST-7 or DCT-8 transform, the upper left min(M,16)×min(N,16) low frequency coefficients are kept. The remaining coefficients are set as zero and may not be transmitted. However, unlike the coefficient coding scheme used when a 64-point zero-out DCT-2 is applied, in a 32-point MTS, coefficient coding is still performed on the entire M×N block, even if M or N is greater than 16. However, if a coefficient group (CG) is outside the upper left 16×16 low frequency region (i.e., if the coefficient group is in the zero-out region), a flag (e.g., coded_sub_block_flag) indicating whether the coefficient group has a non-zero coefficient is not transmitted. The zero-out region indicates a region in the coefficient block where the coefficients are zero, and therefore the coefficients in the zero-out region are zero. An example of the residual coding syntax is described below and illustrated by the highlighted text using frame 1301 in FIG.

[0123] In one embodiment, a mode-dependent non-separable secondary transform (NSST) may be used between the forward core transform and quantization (e.g., quantization of coefficients) at the encoder side, and between the inverse quantization (e.g., inverse quantization of quantized coefficients) and the inverse core transform at the decoder side. For example, to keep the complexity low, NSST is applied to low frequency coefficients after the primary transform (or core transform). If both the width (W) and height (H) of the transform coefficient block are equal to or greater than 8, then an 8×8 NSST is applied to the top-left 8×8 region of the transform coefficient block. Otherwise, if either the width W or the height H of the transform coefficient block is 4, then a 4×4 NSST is applied, and a 4×4 NSST is performed on the top-left min(8,W)×min(8,H) region of the transform coefficient block. The above transform selection method is applied to both luma and chroma components.

[0124] Using a 4×4 input block as an example, the implementation of matrix multiplication in NSST is described below. The 4×4 input block X is written as Equation (13).

number

[0125] The input block X is expressed as the vector

number

number

number

number

number

[0126] The transform core of the secondary transform may be selected by the intra-prediction mode. For each intra-prediction mode, a set of secondary transform cores may be defined, and the selection may be indicated by an index signaled in the bitstream and / or by other syntax elements (e.g., MTS index).

[0127] In order to reduce the storage and computational complexity of coefficients in the secondary transform, a zero-out scheme based secondary transform may be applied. When the secondary transform includes a zero-out scheme, the secondary transform only computes the first K coefficients of an M×N block, where K is less than M×N. The remaining (M×NK) coefficients may be set as 0. For example, the remaining (M×NK) coefficients are not computed.

[0128] In some embodiments, a sub-block transform (SBT), also called a spatially varying transform (SVT), is used. The SBT may be applied to the inter-prediction residual. In some examples, the residual block is contained in and smaller than the coding block. Thus, the transform size in the SBT is smaller than the coding block size. For areas not covered by the residual block, a zero residual may be assumed and no transform process is performed.

[0129] 14A-14D show the sub-block types (SVT-H, SVT-V) (e.g., horizontal or vertical split), sizes and positions (e.g., left half, left quarter, right half, right quarter, top half, top quarter, bottom half, bottom quarter) supported in SBT. The shaded areas marked with letter "A" are residual blocks due to transformation, and other areas are assumed to be zero residual without transformation.

[0130] As an example, Figures 15A-15F show modifications to the specification text of a video coding standard (e.g., VVC) when SBT is used. The modifications, including the added text, are shown in frames (2101)-(2108). As shown, additional syntax elements (e.g., additional overhead bits cu_sbt_flag, cu_sbt_quad_flag, cu_sbt_horizontal_flag, and cu_sbt_pos_flag) may be conveyed to indicate the sub-block type (horizontal or vertical), size (half or quarter), and position (left, right, top or bottom), respectively.

[0131] An example of the semantics of the sequence parameter set RBSP is shown below: sps_sbt_enabled_flag equal to 0 specifies that sub-block transforms for inter predicted CUs are disabled. sps_sbt_enabled_flag equal to 1 specifies that sub-block transforms for inter predicted CUs are enabled.

[0132] An example of a typical slice header semantics is shown below: slice_sbt_max_size_64_flag equal to 0 specifies that the maximum CU width and height allowed for sub-block transforms is 32. slice_sbt_max_size_64_flag equal to 1 specifies that the maximum CU width and height allowed for sub-block transforms is 64. maxSbtSize may be determined as maxSbtSize=slice_sbt_max_size_64_flag?64:32.

[0133] Examples of coding unit semantics are shown below: cu_sbt_flag[x0][y0] equal to 1 specifies that sub-block transform is used for the current coding unit. cu_sbt_flag[x0][y0] equal to 0 specifies that sub-block transform is not used for the current coding unit. If cu_sbt_flag[x0][y0] is not present, its value is inferred to be equal to 0. If sub-block transform is used, the coding unit is tiled into two transform units, one with residual and the other without residual.

[0134] In some examples, cu_sbt_quad_flag[x0][y0] equal to 1 specifies that, for the current coding unit, the sub-block transform includes transform units that are 1 / 4 the size of the current coding unit. In some examples, cu_sbt_quad_flag[x0][y0] equal to 0 specifies that, for the current coding unit, the sub-block transform includes transform units that are 1 / 2 the size of the current coding unit. If cu_sbt_quad_flag[x0][y0] is not present, its value is inferred to be equal to 0.

[0135] In some examples, cu_sbt_horizontal_flag[x0][y0] equal to 1 specifies that the current coding unit is tiled into two transform units by a horizontal split. cu_sbt_horizontal_flag[x0][y0] equal to 0 specifies that the current coding unit is tiled into two transform units by a vertical split.

[0136] In some examples, if cu_sbt_horizontal_flag[x0][y0] is not present, its value is derived as follows: If cu_sbt_quad_flag[x0][y0] is equal to 1, then cu_sbt_horizontal_flag[x0][y0] is set equal to allowSbtHoriQuad. Otherwise (cu_sbt_quad_flag[x0][y0] is equal to 0), then cu_sbt_horizontal_flag[x0][y0] is set equal to allowSbtHoriHalf.

[0137] In some examples, cu_sbt_pos_flag[x0][y0] equal to 1 specifies that tu_cbf_luma, tu_cbf_cb, and tu_cbf_cr of the first transform unit in the current coding unit are not present in the bitstream, and cu_sbt_pos_flag[x0][y0] equal to 0 specifies that tu_cbf_luma, tu_cbf_cb, and tu_cbf_cr of the second transform unit in the current coding unit are not present in the bitstream.

[0138] An example of the transformation process for the scaled transform coefficients is described below.

[0139] The inputs to the process are the luma position (xTbY, yTbY) specifying the top-left sample of the current luma transform block relative to the top-left luma sample of the current picture, a variable nTbW specifying the width of the current transform block, a variable nTbH specifying the height of the current transform block, a variable cIdx specifying the color components of the current block, and a (nTbW) x (nTbH) array d[x][y] (x=0..nTbW-1, y=0..nTbH-1) of scaled transform coefficients.

[0140] The output of this process is a (nTbW) x (nTbH) array of residual samples r[x][y] (x=0..nTbW-1, y=0..nTbH-1).

[0141] When cu_sbt_flag[xTbY][yTbY] is equal to 1, the variable trTypeHor specifying the horizontal transformation kernel and the variable trTypeVer specifying the vertical transformation kernel are derived depending on cu_sbt_horizontal_flag[xTbY][yTbY] and cu_sbt_pos_flag[xTbY][yTbY] in Table 3 (FIG. 15F).

[0142] Otherwise (cu_sbt_flag[xTbY][yTbY] is equal to 0), the variable trTypeHor specifying the horizontal transformation kernel and the variable trTypeVer specifying the vertical transformation kernel are derived depending on mts_idx[xTbY][yTbY] and CuPredMode[xTbY][yTbY] in Table 4 (shown in FIG. 15F).

[0143] The (nTbW) × (nTbH) array of residual samples, r, is derived as follows:

[0144] Each (vertical) column of scaled transform coefficients d[x][y] (x=0..nTbW-1, y=0..nTbH-1) is transformed to e[x][y] (x=0..nTbW-1, y=0..nTbH-1) by invoking a one-dimensional transform process for each column x=0..nTbW-1 with as input the height nTbH of the transform block, the list d[x][y] (y=0..nTbH-1), and the transform type variable trType set equal to trTypeVer, and the output is the list e[x][y] (y=0..nTbH-1).

[0145] The intermediate sample values ​​g[x][y] (x=0..nTbW-1, y=0..nTbH-1) are derived as follows:

[0146] g[x][y]=Clip3(CoeffMin,CoeffMax,(e[x][y]+256)>>9)

[0147] Each (horizontal) row of the resulting array g[x][y] (x=0..nTbW-1, y=0..nTbH-1) is transformed to r[x][y] (x=0..nTbW-1, y=0..nTbH-1) by invoking a one-dimensional transformation process for each row y=0..nTbH-1 with as input the width nTbW of the transformation block, the list g[x][y] (x=0..nTbW-1), and the transformation type variable trType set equal to trTypeHor, and the output is the list r[x][y] (x=0..nTbW-1).

[0148] In some examples, two different schemes of coefficient coding are applied to 64-point DCT-2 with zero-out and 32-point MTS with zero-out, and therefore the coefficient coding is not a unified design. Coefficient coding may also refer to entropy coding of transform coefficients.

[0149] For coefficient coding applied to 32-point MTS with zero-out, the transform coefficients are assumed to be zero, but the transform coefficients in the zero-out region may be scanned. If the encoder is not perfectly designed, the encoder may calculate non-zero coefficients in the zero-out region. Therefore, the CG at the boundary of the non-zero region on the upper left may still access the zero-out region and derive the context value used for entropy coding of the transform coefficients. The encoder and decoder may obtain different context values ​​(e.g., non-zero values ​​for the encoder and zero values ​​for the decoder), thus generating unpredictable behavior of the decoder, such as crashing or inconsistency.

[0150] In some examples, an SBT is applied that may use a 32-point DST-7 / DCT-8, so the zero-out of the transform when the SBT is applied also needs to be designed appropriately.

[0151] Since the secondary transform may include a zero-out method, the zero-out of the transform needs to be properly designed when the secondary transform is applied.

[0152] The embodiments described herein may be used separately or in combination in any order. Additionally, the embodiments may be implemented by processing circuitry (e.g., one or more processors or one or more integrated circuits) in an encoder, decoder, etc. In one example, the one or more processors may execute a program stored on a non-transitory computer-readable medium.

[0153] In this disclosure, embodiments applicable to the MTS candidate DST-7 are also applicable to the DST-4 and vice versa. Similarly, embodiments applicable to the MTS candidate DCT-8 are also applicable to the DCT-4 and vice versa.

[0154] In this disclosure, a secondary transform may refer to an NSST or a Reduced Secondary Transform (RST), which is an alternative design of an NSST. Embodiments applicable to an NSST are also applicable to an RST.

[0155] At the decoder side, the coefficient block containing the transform coefficients may be decoded into a residual block having residual data, and thus the TU may denote a coefficient block or a residual block. In this disclosure, a coefficient unit (or coefficient set) may be defined as a set of transform coefficients (also called coefficients) that includes all or a portion of the coefficients in a TU or coefficient block. For example, a coefficient unit may denote a sub-block that is the smallest sub-block that includes all non-zero coefficients in a coefficient block. For example, for a 64×64 TU coded using only DCT-2, only the low frequency coefficients in the top-left 32×32 region are kept, and the remaining coefficients in the 64×64 TU are set to 0, and thus the coefficient unit is the top-left 32×32 region in the 64×64 TU. In another example, for a 32x32 TU coded using DST-7 or DCT-8, only the low frequency coefficients in the top-left 16x16 region are retained and the remaining coefficients in the 32x32 TU are set to 0, so that the coefficient unit is the top-left 16x16 region in the 32x32 TU.

[0156] A TU may have multiple coefficient units, where the multiple coefficient units include all non-zero coefficients in the TU (i.e., all non-zero coefficients in the TU are contained in the multiple coefficient units). Thus, coefficients in the TU that are outside the multiple coefficient units are zero.

[0157] 16A-16D show examples of coefficient units according to an embodiment of the present disclosure. Referring to FIG. 16A, a 16×16 coefficient block (1610) includes shaded regions 0, 1A, 2A, and 3A and a white region 5. The shaded regions 0, 1A, 2A, and 3A may include non-zero transform coefficients, and the white region 5 does not include non-zero transform coefficients (i.e., the transform coefficients in the white region 5 are zero). Referring to FIG. 16A, there are four coefficient units (e.g., shaded regions 0, 1A, 2A, and 3A) in the coefficient block (1610).

[0158] With reference to Figure 16B, a coefficient block (1610) may be divided into shaded regions 0 and 2A, shaded region 1B, and white region 5. Shaded regions 0, 1B, and 2A may include non-zero transform coefficients, and white region 5 does not include non-zero transform coefficients. With reference to Figure 16B, there are three coefficient units (e.g., shaded regions 0, 1B, and 2A) in the coefficient block (1610). With reference to Figures 16A and 16B, shaded region 1B includes shaded regions 1A and 3A.

[0159] With reference to Figure 16C, a coefficient block (1610) may be divided into shaded regions 0 and 1A, shaded region 2C, and white region 5. Shaded regions 0, 1A, and 2C may contain non-zero transform coefficients, and white region 5 does not contain non-zero transform coefficients. With reference to Figure 16C, there are three coefficient units (e.g., shaded regions 0, 1A, and 2C) in the coefficient block (1610). With reference to Figures 16A and 16C, shaded region 2C contains shaded regions 2A and 3A.

[0160] With reference to Figure 16D, a coefficient block (1610) may be divided into shaded region 0, shaded region 1D, and white region 5. Shaded regions 0 and 1D may include non-zero transform coefficients, and white region 5 does not include non-zero transform coefficients. With reference to Figure 16D, there are two coefficient units (e.g., shaded regions 0 and 1D) in the coefficient block (1610). With reference to Figures 16A and 16D, shaded region 1D includes shaded regions 1A, 2A, and 3A.

[0161] In general, the coefficient units may have any suitable shape or size. With reference to Figures 16A-16D, the coefficient units may have a square shape (e.g., coefficient units 1A, 2A, 3A), a rectangular shape (e.g., coefficient units 1B, 2C), an irregular shape (e.g., the "L" shape of coefficient unit 1D). Thus, the coefficient coding may be adapted such that coefficients in zero-out regions, such as white region 5, are not conveyed in the bitstream.

[0162] A coefficient block may be divided into a different number of coefficient units. For example, the coefficient block (1610) may be divided into four, three, three, and two coefficient units, as shown in Figures 16A-16D, respectively.

[0163] According to an embodiment of the present disclosure, coefficient coding of a TU may be processed in units of coefficient units, where each coefficient unit is coded independently. Thus, coefficient coding of one coefficient unit in a TU does not need to access coding information of other coefficient units in the TU.

[0164] Various processing orders may be used to process multiple coefficient units in a coefficient block. With reference to FIG. 16D, a processing circuit may begin processing coefficient units 0 and 1D simultaneously. In one example, a processing circuit may begin processing coefficient unit 0 before beginning processing coefficient unit 1D. In one example, a processing circuit may begin processing coefficient unit 1D before beginning processing coefficient unit 0.

[0165] In some examples, flags (i.e., coefficient unit flags) may be used to indicate whether a coefficient unit includes at least a non-zero coefficient. For example, four flags may be used for coefficient units 0 and 1A-3A of FIG. 16A, respectively. Similarly, three flags may be used for coefficient units 0, 1B, and 2A of FIG. 16B, respectively, three flags may be used for coefficient units 0, 1A, and 2C of FIG. 16C, respectively, and two flags may be used for coefficient units 0 and 1D of FIG. 16D, respectively.

[0166] In some examples, a coefficient unit flag may be signaled for each coefficient unit. In one example, if a TU has only one coefficient unit, the coefficient unit flag of the one coefficient unit may be inferred from the coefficient block flag (CBF) of the TU, and thus the coefficient unit flag is not signaled. The CBF of the TU may indicate whether the TU has at least one non-zero coefficient.

[0167] In one example, a TU is divided into multiple coefficient units, and the TU has non-zero coefficients. If only the last coefficient unit in the processing order has non-zero coefficients, the coefficient unit flag of the last coefficient unit indicating that the last coefficient unit has non-zero coefficients is not signaled and is inferred.

[0168] In one embodiment, coefficient coding of a coefficient unit may be processed in units of coefficient groups (CGs). A CG may include 16 coefficients in a coefficient unit. A CG may have any suitable shape, such as a square, a rectangle, etc. For example, a CG may be a 4×4 sub-block, a 2×8 sub-block, or an 8×2 sub-block in a coefficient unit.

[0169] In one example, a coefficient unit includes multiple CGs and has non-zero coefficients. If only the last CG in the processing order has a non-zero coefficient, then a flag (e.g., coded_sub_block_flag) for the last CG indicates whether the last CG has a non-zero coefficient or not, or is not signaled and cannot be inferred, and the flag for the last CG indicates that the last CG has at least one non-zero coefficient.

[0170] In one example, for a TU coded without a secondary transform, the TU has only one coefficient unit.

[0171] In one example, when a linear transform including (or using) the zero-out method, an SBT, or a combination of a linear transform including the zero-out method and an SBT is applied to a TU, the size and position of a coefficient unit may be estimated from the linear transform including the zero-out method and / or the SBT such that after the linear transform including the zero-out method and / or the SBT, the coefficient unit includes a non-zero region. The non-zero region includes at least one non-zero coefficient.

[0172] In one example, if a TU does not have a known zero-out region, such as from a linear transform including a zero-out method, SBT, etc., the size and location of the coefficient unit may be estimated to be the same as the size and location of the TU, as described above. In one example, the coefficient unit is a TU.

[0173] In some embodiments, a primary transform is applied to the M×N coefficient block, using a zero-out method, and the primary transform may be a non-DCT-2 transform or a combination of a DCT-2 transform and a non-DCT-2 transform. The primary transform may include a horizontal M-point transform and a vertical N-point transform. Thus, if X is the number of coefficients to be retained or calculated for the horizontal M-point transform and Y is the number of coefficients to be retained or calculated for the vertical N-point transform, the ratio X / M is less than 1 and / or the ratio Y / N is less than 1. According to aspects of the present disclosure, entropy coding of the M×N coefficient block may be implemented by setting the entropy coding block size as min(M,X)×min(N,Y). Thus, when entropy coding an M×N coefficient block, the M×N coefficient block is viewed as a min(M,X)×min(N,Y) region, e.g., only the transform coefficients within the top-left min(M,X)×min(N,Y) region are entropy coded, and the remaining coefficients are not entropy coded (e.g., the remaining coefficients are set as zero). Furthermore, in one example, the remaining coefficients outside the top-left min(M,X)×min(N,Y) region are not accessed when entropy coding the top-left min(M,X)×min(N,Y) region.

[0174] In some examples, the non-DCT-2 transform is a 32-point DST-7 / DCT-8 used in MTS, a 32-point DST-7 / DCT-8 used in SBT, and / or a 32-point DST-7 / DCT-8 used in implicit MTS. If X and Y are 16, then the entropy coding block size is 16x16 and only the top-left 16x16 region is entropy coded. Furthermore, in one example, the remaining coefficients outside the top-left 16x16 region are not accessed when entropy coding the top-left 16x16 region.

[0175] As described above, a linear transform (e.g., a non-DCT-2 transform, or a combination of a DCT-2 transform and a non-DCT-2 transform) may be applied to the M×N coefficient block, and a zero-out method may be used. The ratio X / M is less than 1, and / or the ratio Y / N is less than 1. Coefficients in a region outside the top-left min(M,X)×min(N,Y) region in the M×N coefficient block may be considered as zero, and the region may be referred to as a zero-out region. According to aspects of the present disclosure, entropy coding of the M×N coefficient block may be implemented for the entire M×N coefficient block. However, default values ​​of the transform coefficients may be used, for example, when accessing a transform coefficient syntax element located in the zero-out region to derive a context value used for entropy coding of a current coefficient. The transform coefficient syntax element may also be referred to as a coefficient-related syntax element.

[0176] In one example, when entropy coding a CG flag (e.g., coded_sub_block_flag) of a current CG, one or more neighboring CG flags for each one or more neighboring CGs may be used to derive a context value for entropy coding the CG flag of the current CG. However, if one of the one or more neighboring CGs is located in a zero-out region, a default value (e.g., 0) may be used for one of the one or more neighboring CGs to derive the context value.

[0177] In one example, when entropy coding syntax elements of a current transform coefficient (e.g., coefficient-related flags such as sig_coeff_flag, par_level_flag, rem_abs_gt1_flag, rem_abs_gt2_flag, etc.), syntax elements of neighboring coefficients may be used to derive a context value for the current transform coefficient. If the neighboring coefficient is located in a zero-out region, a default value (e.g., 0) may be used instead.

[0178] FIG. 17 shows a 32×32 coefficient block (1710) including a first region (1720) and a second region (1730). The first region (1720) is a 16×16 region in the top left corner of the coefficient block (1710), and the second region (1730) is outside the first region (1720). The first region (1720) includes CGs A through C, and the second region (1730) includes CGs AB, AR, BB, and CR. In one example, the entropy coding order is a reverse diagonal order starting from the bottom right corner of the coefficient block (1710) and ending at the top left corner of the coefficient block (1710). Thus, the CGs AB and AR are entropy coded before the CG of A, the CG of BB is entropy coded before the CG of B, and the CG of CR is entropy coded before the CG of C.

[0179] In one example, only the transform coefficients in the first region (1720) are retained, and the remaining coefficients in the second region (1730) are set as 0, and thus the second region (1730) is also referred to as a zero-out region. For entropy coding of a first CG flag (e.g., coded_sub_block_flag) of the CG of A, the CG of AR (right CG) and the CG of AB (lower CG) may be accessed to derive a context value for the first CG flag. Since the CGs of AR and AB are located in the zero-out region (1730), default values ​​(e.g., 0) may be assigned to the CG flags of the CGs of AR and AB, respectively. For entropy coding of a second CG flag (e.g., coded_sub_block_flag) of the CG of B, the CG of BB should be accessed to derive a context value. Since the CG of BB is located in the zero-out region (1730), default values ​​(e.g., 0) may be assigned to the CG flags of the CG of BB. For entropy coding of the third CG flag (e.g., coded_sub_block_flag) of the CG of C, the CG of CR should be accessed to derive a context value. Since the CG of CR is located in the zero-out region (1730), a default value (e.g., 0) may be assigned to the CG flag of the CG of CR.

[0180] In some embodiments, as shown in FIG. 18, a secondary transform including a zero-out method is applied to the top-left M×N region (1820) of an X×Y coefficient block (1810). For example, the first 16 coefficients are kept and the remaining (M×N-16) coefficients in the top-left M×N region (1820) are set to zero. In one example, X and Y are 32 and M and N are 16, so the first 16 coefficients in 4×4 region 0 are kept and the remaining (16×16-16) coefficients in region 2 are set as zero. Thus, region 2 is called a zero-out region or zero region. Referring to FIG. 18, an X×Y coefficient block (1810) includes three regions: region 0, region 1, and region 2. Region 2 is a zero-out region due to the zero-out method in the secondary transform. Region 0 and / or region 1 may have non-zero transform coefficients. The secondary transformation is not applied to region 1, i.e., region 1 is not processed by the secondary transformation.

[0181] Entropy coding of an X×Y coefficient block (1810) may be performed on the entire X×Y coefficient block (1810), but default values ​​may be used for a coefficient when the coefficient accesses a coefficient-related syntax element (i.e., a syntax element for the coefficient) located in zero-out region 2 to derive a context value used for entropy coding.

[0182] In one embodiment, when entropy coding a CG flag (e.g., coded_sub_block_flag) of a current CG, one or more neighboring CG flags of each one or more neighboring CGs may be used to derive a context value for the CG flag. However, if one of the one or more neighboring CGs is completely located in the zero-out region 2 formed by the secondary transformation using the zero-out method, a default value (e.g., 0) may be used instead. With reference to FIG. 18, region 0 includes CGs A, B, and C, and region 2 (e.g., the zero-out region) includes CGs AB, AR, and BB. Since the CGs AB and AR are completely located in the zero-out region 2, a default value (e.g., 0) may be used instead of the CG flags of the AB and AR CGs to derive a context value for the first CG flag. Since the CG of BB is completely located in the zero-out region 2, a default value (e.g., 0) may be used instead of the CG flags of the BB CG to derive a context value for the second CG flag.

[0183] In one embodiment, when entropy coding a CG flag (e.g., coded_sub_block_flag) of a current CG, one or more neighboring CG flags of a respective one or more neighboring CGs may be used to derive a context value for the CG flag. However, if one of the one or more neighboring CGs (e.g., the CG of CR in FIG. 18) is partially located in the zero-out region 2, a non-zero coefficient in one of the one or more neighboring CGs (e.g., the CG of CR in FIG. 18) may be used to derive a context value.

[0184] In one embodiment, when entropy coding syntax elements for the current transform coefficient (e.g., coefficient-related flags such as sig_coeff_flag, par_level_flag, rem_abs_gt1_flag, rem_abs_gt2_flag, etc.), the syntax elements are not signaled. The current coefficient may be estimated as a default value indicating that the current coefficient is 0 if the current coefficient is located in a zero-out region, such as zero-out region 2.

[0185] In one embodiment, when entropy coding a syntax element (e.g., coefficient-related flags such as sig_coeff_flag, par_level_flag, rem_abs_gt1_flag, rem_abs_gt2_flag, etc.) for a current transform coefficient, one or more neighboring coefficients may be used to derive a context value for the syntax element. If one of the one or more neighboring coefficients lies in zero region 2, a default value (e.g., 0) may be used instead.

[0186] Referring to FIG. 19, in one embodiment, the coefficient block (1910) includes a first region (1920) and a second region (1930) outside the first region (1920). When a secondary transform (e.g., NSST or SBT) is applied to the first region (1920) and uses a zero-out method in which only partial coefficients (e.g., region 0 in the upper left) are retained, the second region (1930) to which the secondary transform is not applied may also be considered as a zero-out region. In the example shown in FIG. 19, region 1 between region 0 and the second region (1930) is a zero-out region due to the zero-out method used in the secondary transform. Thus, the combined zero-out region includes region 1 and the second region (1930). In one example, the coefficient block (1910) includes only one coefficient unit (e.g., region 0), and therefore only the coefficient units (e.g., region 0) in the coefficient block (1910) should be entropy coded.

[0187] In one embodiment, the size and location of the coefficient unit within the coefficient block (1910) may be estimated based on a secondary transform including a zero-out method. In one example, if the secondary transform is an 8×8 secondary transform, the coefficient unit is the top-left 8×8 region (1920) of the coefficient block (1910). In one example, if the secondary transform is an 8×8 secondary transform for a first region (1920) including a zero-out method that retains the first 16 coefficients in region 0, the coefficient unit is the top-left 4×4 region 0 of the first region (1920).

[0188] In one example, the secondary transform is an 8x8 secondary transform applied to a first region (1920) (e.g., the top-left 8x8 region within the coefficient block (1910)), and the second region (1930) is outside the top-left 8x8 region (1920). If only 16 coefficients are retained in the secondary transform, then the combined zero-out region is the top-left 4x4 region 0 outside.

[0189] In one example, a coefficient block includes a first region of 4×4 and a second region outside the first region. When a secondary transform is applied to the first region and using a zero-out method in which only partial coefficients are retained, the second region to which the secondary transform is not applied may be considered a zero-out region.

[0190] FIG. 20 shows a flow chart outlining the process (2000) according to one embodiment of the present disclosure. The process (2000) can be used to reconstruct a block coded in intra mode, thereby generating a prediction block for the block being reconstructed. In some examples, the process (2000) can be used to reconstruct a block coded in inter mode. In various embodiments, the process (2000) is performed by processing circuitry, such as processing circuitry in terminal devices (310), (320), (330), and (340), processing circuitry performing the functions of a video encoder (403), processing circuitry performing the functions of a video decoder (410), processing circuitry performing the functions of a video decoder (510), processing circuitry performing the functions of a video encoder (603), etc. In some embodiments, the process (2000) is implemented with software instructions, and thus the processing circuitry performs the process (2000) when the processing circuitry executes the software instructions. The process starts at (S2001) and proceeds to (S2010).

[0191] At (S2010), coding information of the TB, such as a coefficient block, can be decoded from the coded video bitstream. The coding information can indicate a region of the TB to which a secondary transform is applied, the region including a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region. In one example, the secondary transform uses a zero-out method, such that transform coefficients in the second region are not calculated by the secondary transform and are set to zero.

[0192] In (S2020), for the transform coefficients in the TB, it can be determined whether the adjacent transform coefficients used to determine the transform coefficients are located in the second sub-region. If it is determined that the adjacent transform coefficients are located in the second sub-region, the process (2000) proceeds to (S2030). If not, the process (2000) proceeds to (S2040).

[0193] In (S2030), the transform coefficient may be determined according to the default value of the neighboring transform coefficient. In some examples, one or more syntax elements of the transform coefficient may be determined according to the default value (e.g., 0) of the neighboring transform coefficient. The syntax elements may include coefficient-related flags such as sig_coeff_flag, par_level_flag, rem_abs_gt1_flag, and rem_abs_gt2_flag indicating whether the transform coefficient is a non-zero transform coefficient, the parity of the transform coefficient, whether the transform coefficient is greater than 2, and whether the transform coefficient is greater than 4, respectively.

[0194] In (S2040), the transform coefficient can be determined according to the neighboring transform coefficients. In some examples, one or more syntax elements of the transform coefficient can be determined.

[0195] In (S2050), the samples in the TB can be reconstructed based on the transform coefficients for the samples.

[0196] The process (2000) may be adapted as appropriate. For example, one or more steps may be modified, omitted or combined. The order in which the process (2000) is performed may also be changed.

[0197] Further steps may also be added. For example, the transform coefficient in the TB may be one of a plurality of transform coefficients in a first CG, and the first CG flag for the first CG indicates whether at least one of the transform coefficients is a non-zero transform coefficient. The second CG including the transform coefficient has been entropy decoded before and is a neighboring CG of the first CG. The process (2000) may include a step of determining a position of the second CG. If it is determined that the second CG is located in the second sub-region, the process (2000) may include a step of determining the first CG flag based on a default value of the second CG flag. Alternatively, if a part of the second CG is located in the second sub-region and another part of the second CG is at least one non-zero coefficient, the process (2000) may include a step of determining the first CG flag based on at least one non-zero coefficient.

[0198] In some examples, a further step may include determining whether the transform coefficient is located in a second sub-region. If it is determined that the transform coefficient is located in the second sub-region, the transform coefficient may not be transmitted and may be determined to be zero.

[0199] FIG. 21 shows a flow chart outlining the process (2100) according to one embodiment of the present disclosure. The process (2100) can be used to reconstruct a block coded in intra mode, thereby generating a prediction block for the block being reconstructed. In some examples, the process (2100) can be used to reconstruct a block coded in inter mode. In various embodiments, the process (2100) is performed by processing circuitry, such as processing circuitry in the terminal devices (310), (320), (330), and (340), processing circuitry performing the functions of the video encoder (403), processing circuitry performing the functions of the video decoder (410), processing circuitry performing the functions of the video decoder (510), processing circuitry performing the functions of the video encoder (603), etc. In some embodiments, the process (2100) is implemented with software instructions, and thus the processing circuitry performs the process (2100) as the processing circuitry executes the software instructions. The process starts at (S2101) and proceeds to (S2110).

[0200] At (S2110), the coding information of the transform block (TB) can be decoded from the coded video bitstream.

[0201] In (S2120), it can be determined based on the coding information whether a secondary transform is performed on a first region of the TB, the first region including a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region. In one example, the secondary transform uses a zero-out method, so that the transform coefficients in the second region are not calculated by the secondary transform and are set to zero. If it is determined that a secondary transform is performed, the process (2100) proceeds to (S2130). If not, the process (2100) proceeds to (S2199).

[0202] At (S2130), it is determined that the transform coefficients in a second region in the TB are zero, the second region being outside the first region.

[0203] The process (2000) may be adapted as appropriate. For example, one or more steps may be modified, omitted or combined. Further steps may also be added. For example, the size and position of the coefficient unit in the TB is determined based on the first region, and the transform coefficients outside the coefficient unit are zero. The order in which the process (2000) is performed may also be changed.

[0204] The above techniques may be implemented as computer software using computer readable instructions and physically stored on one or more computer readable media. For example, Figure 22 illustrates a computer system (2200) suitable for implementing certain embodiments of the disclosed subject matter.

[0205] Computer software may be encoded using any suitable machine code or computer language, which may be subjected to assembly, compilation, linking, or similar mechanisms to generate code including instructions, which may be executed by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc., either directly or through an interpreter, microcode execution, etc.

[0206] The instructions may be executed on various types of computers or components thereof including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, Internet of Things devices, etc.

[0207] 22 for computer system (2200) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure, nor should the arrangement of components be interpreted as having any dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of computer system (2200).

[0208] The computer system (2200) may include certain human interface input devices. Such human interface input devices may be responsive to input by one or more human users, for example, through tactile input (keystrokes, swipes, data glove movements, etc.), audio input (voice, clapping, etc.), visual input (gestures, etc.), and olfactory input (not shown). Human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (e.g., speech, music, ambient sounds), images (scanned images, photographic images obtained from a still camera, etc.), and video (two-dimensional video, three-dimensional video including stereoscopic pictures, etc.).

[0209] The input human interface devices may include one or more of a keyboard (2201), a mouse (2202), a trackpad (2203), a touch screen (2210), a data glove (not shown), a joystick (2205), a microphone (2206), a scanner (2207), and a camera (2208).

[0210] The computer system (2200) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the senses of a human user, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen (2210), data gloves (not shown), or joystick (2205), although there may be haptic feedback devices that do not function as input devices), audio output devices (speakers (2209), headphones (not shown), etc.), visual output devices (screens (2210), including CRT screens, LCD screens, plasma screens, OLED screens, each of which may or may not have touch screen input capability, each of which may or may not have haptic feedback capability, some of which may be capable of outputting two-dimensional visual output or three or more dimensional output through such means as stereoscopic output, virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown).

[0211] The computer system (2200) may also include human accessible storage devices and associated media, such as optical media, including CD / DVD ROM / RW (2220) with CD / DVD or similar media (2221), thumb drives (2222), removable hard drives or solid state drives (2223), legacy magnetic media, such as tapes and floppy disks (not shown), specialized ROM / ASIC / PLD based devices, such as security dongles (not shown), etc.

[0212] Additionally, those skilled in the art should understand that the term "computer-readable medium" as used in connection with the subject matter disclosed herein does not include transmission media, carrier waves, or other non-transitory signals.

[0213] The computer system (2200) may also include interfaces to one or more communication networks. The networks may be, for example, wireless, wired, optical. The networks may be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include Ethernet, wireless LAN, cellular networks (including GSM, 3G, 4G, 5G, LTE, etc.), TV wired or wireless wide area digital networks (including cable TV, satellite TV, and terrestrial broadcast TV), vehicular and industrial (including CANBus), etc. Certain networks typically require an external network interface adapter (e.g., a USB port on the computer system (2200)) that is attached to a specific general-purpose data port or peripheral bus (2249), while other network interface adapters are typically integrated into the core of the computer system (2200) by being attached to a system bus (e.g., an Ethernet interface to a PC computer system or a cellular network to a smartphone computer system) as described below. Using any of these networks, the computer system (2200) can communicate with other entities. Such communications may be one-way receive only (e.g., broadcast TV), one-way transmit only (e.g., CANbus to a particular CANbus device), or bidirectional, for example, to other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used in each of these networks and network interfaces.

[0214] The above-mentioned human interface devices, human accessible storage devices and network interfaces may be attached to a core (2240) of the computer system (2200).

[0215] The cores (2240) may include one or more central processing units (CPUs) (2241), graphics processing units (GPUs) (2242), specialized programmable processing units in the form of field programmable gate arrays (FPGAs) (2243), hardware accelerators for specific tasks (2244), etc. These devices may be connected through a system bus (2248), along with read only memory (ROM) (2245), random access memory (2246), and internal mass storage (internal non-user accessible hard drive, SSD, etc.) (2247). In some computer systems, the system bus (2248) may be accessible in the form of one or more physical plugs to allow expansion by additional CPUs, GPUs, etc. Peripheral devices may be attached directly to the core's system bus (2248) or through a peripheral bus (2249). Peripheral bus architectures include PCI, USB, etc.

[0216] The CPU (2241), GPU (2242), FPGA (2243), and accelerator (2244) may execute certain instructions, which in combination may constitute the above computer code. The computer code may be stored in a ROM (2245) or a RAM (2246). Also, temporary data may be stored in the RAM (2246), while persistent data may be stored, for example, in an internal mass storage device (2247). Fast storage and retrieval in any of the memory devices may be enabled by the use of a cache memory, which may be closely associated with one or more of the CPU (2241), GPU (2242), mass storage device (2247), ROM (2245), RAM (2246), etc.

[0217] The computer-readable medium may bear computer code for performing various computer-implemented operations. The medium and computer code may be those specially designed and constructed for the purposes of the present disclosure, or they may be of the kind well known and available to those skilled in the computer software arts.

[0218] By way of example and not limitation, the architecture (2200), and in particular a computer system having a core (2240), may provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media may be media associated with a user-accessible mass storage device as described above, as well as specific storage of the core (2240) of a non-transitory nature, such as mass storage device (2247) internal to the core or ROM (2245). Software implementing various embodiments of the present disclosure may be stored in such devices and executed by the core (2240). The computer-readable media may include one or more memory devices or chips according to specific needs. The software may cause the core (2240), and in particular the processor (including a CPU, GPU, FPGA, etc.) therein, to perform certain operations or certain portions of certain operations described herein, including defining data structures stored in RAM (2246) and modifying such data structures according to operations defined by the software. Additionally or alternatively, the computer system may provide functionality as a result of hardwired or otherwise embodied logic in circuitry (e.g., accelerator (2244)), which may operate in place of or in conjunction with software to perform particular operations or portions of particular operations described herein. References to software include logic, and vice versa, where appropriate. References to computer-readable media may include circuitry (such as an integrated circuit (IC)) that stores software for execution, circuitry embodying logic for execution, or both, where appropriate. The present disclosure includes any appropriate combination of hardware and software.

[0219] <Appendix A: Abbreviations> JEM: joint exploration model VVC: versatile video coding BMS: benchmark set MV: Motion Vector HEVC: High Efficiency Video Coding SEI: Supplementary Enhancement Information VUI: Video Usability Information GOP: Group of Picture TU: Transform Unit PU: Prediction Unit CTU: Coding Tree Unit CTB: Coding Tree Block PB: Prediction Block HRD: Hypothetical Reference Decoder SNR: Signal Noise Ratio CPU: Central Processing Unit GPU: Graphics Processing Unit CRT: Cathode Ray Tube LCD: Liquid-Crystal Display OLED: Organic Light-Emitting Diode CD: Compact Disc DVD: Digital Video Disc ROM: Read-Only Memory RAM: Random Access Memory ASIC: Application-Specific Integrated Circuit PLD: Programmable Logic Device LAN: Local Area Network GSM: Global System for Mobile communications LTE: Long-Term Evolution CANBus: Controller Area Network Bus USB: Universal Serial Bus PCI: Peripheral Component Interconnect FPGA: Field Programmable Gate Area SSD: solid-state drive IC: Integrated Circuit CU: Coding Unit

[0220] While this disclosure describes several exemplary embodiments, there are alterations, permutations, and various substitute equivalents that fall within the scope of this disclosure. It will thus be recognized that those skilled in the art will be able to devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within the spirit and scope of the present disclosure.

[0221] <Appendix I> 4×4 Conversion [Table 3]

[0222] 8x8 conversion [Table 4]

[0223] 16x16 conversion [Table 5]

[0224] 32x32 conversion [Table 6]

[0225] <Fulu II> 64ポイントのDCT-2コア

Table 7-1

Table 7-2

Table 7-3

Table 7-4

Table 7-5

Table 7-6

Table 7-7

Table 7-8

Table 7-9

Table 7-10

Table 7-11

Table 7-12

Table 7-13

Table 7-14

[0226] <Appendix III> 4-point DST-7 [Table 8] Here, {a,b,c,d}={29,55,74,84}.

[0227] 8-point DST-7 [Table 9] Here, {a,b,c,d,e,f,g,h}={17,32,46,60,71,78,85,86}.

[0228] 16-point DST-7 [Table 10] Here, {a,b,c,d,e,f,g,h,i,j,k,l,m,n,o,p}={9,17,25,33,41,49,56,62,66,72,77,81,83,87,89,90}.

[0229] 32-point DST-7 [Table 11-1] [Table 11-2] [Table 11-3] Here, {a,b,c,d,e,f,g,h,i,j,k,l,m,n,o,p,q,r,s,t,u,v,w,x,y,z,A,B,C,D,E,F}={4,9,13,17,21,26,30,34,38,42,45,50,53,56,60,63,66,68,72,74,77,78,80,82,84,85,86,88,88,89,90,90}.

[0230] 4-point DCT-8 [Table 12] Here, {a,b,c,d}={84,74,55,29}.

[0231] 8-point DCT-8 [Table 13] Here, {a,b,c,d,e,f,g,h}={86,85,78,71,60,46,32,17}.

[0232] 16 point DCT-8 [Table 14] Here, {a,b,c,d,e,f,g,h,i,j,k,l,m,n,o,p}={90,89,87,83,81,77,72,66,62,56,49,41,33,25,17,9}.

[0233] 32 point DCT-8 [Table 15-1] [Table 15-2] [Table 15-3] Here, {a,b,c,d,e,f,g,h,i,j,k,l,m,n,o,p,q,r,s,t,u,v,w,x,y,z,A,B,C,D,E,F}={90,90,89,88,88,86,85,84,82,80,78,77,74,72,68,66,63,60,56,53,50,45,42,38,34,30,26,21,17,13,9,4}.

Claims

1. 1. A method of video decoding performed by a decoder, comprising: decoding coding information of a transform block (TB) from a coded video bitstream, the coding information indicating a region of a coefficient unit; determining whether a secondary transform is performed on a first region of the TB based on the coding information, the first region including a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region, and the coefficient unit is the first sub-region within the first region; determining that transform coefficients in a second region in the TB are zero if it is determined that the secondary transform is to be performed, the second region being outside the first region; Including, A method in which the size and position of a region of the coefficient unit, which is a sub-block in which all non-zero coefficients can be held within a coefficient block containing multiple transform coefficients in the TB, is determined based on the first region and the secondary transform when the encoded video bitstream is generated, and transform coefficients outside the coefficient unit are zero.

2. The method of claim 1 , wherein the first sub-region is a top-left 4×4 region in the TB, and the transform coefficients in a combined region including the second region and the second sub-region are zero.

3. The method of claim 1 , wherein the first subregion is a top-left 4×4 region in the TB and the second subregion is adjacent to the top-left 4×4 region.

4. 1. An apparatus for video decoding, comprising: Apparatus comprising processing circuitry configured to carry out the method of any one of claims 1 to 3.

5. A computer program product causing a processor to carry out the method of any one of claims 1 to 3.

6. 1. A method of video encoding performed by an encoder, comprising: encoding a video bitstream to generate an encoded video bitstream; decoding coding information of a transform block (TB) from a coded video bitstream, the coding information indicating a region of a coefficient unit; determining whether a secondary transform is performed on a first region of the TB based on the coding information, the first region including a first sub-region having transform coefficients calculated by the secondary transform and a second sub-region, and the coefficient unit is the first sub-region within the first region; determining that transform coefficients in a second region in the TB are zero if it is determined that the secondary transform is to be performed, the second region being outside the first region; Including, A method in which the size and position of a region of the coefficient unit, which is a sub-block in which all non-zero coefficients can be held within a coefficient block containing multiple transform coefficients in the TB, is determined based on the first region and the secondary transform when the encoded video bitstream is generated, and transform coefficients outside the coefficient unit are zero.

Images