METHOD AND APPARATUS FOR VIDEO CODING - Patent application

Abstract

To provide a method and an apparatus including processing circuitry for video decoding including geometric merge mode.SOLUTION: A method includes: decoding, from a coded video bitstream, coding information for a current picture, the coding information indicating that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates satisfies a condition; and determining, on the basis of a picture level parameter signaled for the current picture in the coded video bitstream, a maximum number of geometric merge mode merge candidates based on the picture level parameter and the maximum number of merge candidates. The maximum number of geometric merge mode merge candidates can be (i) 0 or (ii) one of 2 to the maximum number of merge candidates. The picture level parameter indicates the maximum number of geometric merge mode merge candidates.SELECTED DRAWING: Figure 20

Description

[Technical field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This application claims benefit of priority to U.S. Provisional Application No. 62 / 954,473, entitled "SIGNALING OF MAXIMUM NUMBER OF TRIANGLE MERGE CANDIDATES," filed on December 28, 2019, which claims benefit of priority to U.S. Provisional Application No. 17 / 087,224, entitled "METHOD AND APPARATUS FOR VIDEO CODING," filed on November 2, 2020. The entire disclosures of the prior applications are hereby incorporated by reference in their entireties.

[0002] This disclosure generally describes embodiments related to video coding. [Background technology]

[0003] The discussion of the background art provided herein is intended to provide a general context for the present disclosure. The work of the inventors named herein is not admitted, expressly or impliedly, as prior art to the present disclosure to the extent that their work is described in this Background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing.

[0004] Video coding and decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a series of pictures, each with spatial dimensions of, for example, 1920x1080 luma samples and associated chroma samples. The series of pictures can have a fixed or variable (also informally known as frame rate) picture rate of, for example, 60 pictures per second or 60 Hz. Uncompressed video has significant bitrate requirements. For example, 1080p60 4:2:0 video (1920x1080 luma sample resolution at 60 Hz frame rate) at 8 bits per sample requires a bandwidth approaching 1.5 Gbit / s. One hour of such video requires more than 600 Gbytes of storage space.

[0005] One goal of video coding and decoding may be to reduce redundancy in the input video signal through compression. Compression can help reduce the aforementioned bandwidth or storage space requirements, in some cases, by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, may be employed. Lossless compression refers to techniques that can restore an exact copy of the original signal from the compressed original signal. With lossy compression, the restored signal may not be identical to the original signal, but the distortion between the original and restored signals is small enough to make the restored signal useful for the intended application. For video, lossy compression is widely adopted. The amount of acceptable distortion depends on the application, for example, users of a particular consumer streaming application may tolerate higher distortion than users of a television distribution application. The achievable compression ratio may reflect that the greater the acceptable / tolerable distortion, the higher the compression ratio may be.

[0006] Motion compensation may be a lossy compression technique in which blocks of sample data from a previously reconstructed picture or part thereof (reference picture) are used to predict a newly reconstructed picture or part of a picture after being spatially shifted in a direction indicated by a motion vector (hereafter MV). In some cases, the reference picture may be the same as the picture currently being reconstructed. The MV may have two dimensions, X and Y, or three dimensions, with the third dimension being an indication of the reference picture in use (the latter may indirectly be a temporal dimension).

[0007] In some video compression techniques, the MV applicable to a particular region of sample data can be predicted from other MVs, e.g., MVs associated with another region of sample data that is spatially adjacent to the region being restored and precedes that MV in decoding order. Doing so can significantly reduce the amount of data required to code the MV, thereby removing redundancy and improving compression ratios. For example, when coding an input video signal derived from a camera (known as natural video), MV prediction can work effectively because there is a statistical possibility that a region larger than the region to which a single MV is applicable moves in a similar direction, and thus, in some cases, can be predicted using similar motion vectors derived from MVs of neighboring regions. As a result, the detected MV for a given region is similar or the same as the MV predicted from the surrounding MVs, and after entropy coding, can be represented with fewer bits than would be used when coding the MV directly. In some cases, MV prediction can be an example of lossless compression of a signal (i.e., MV) derived from the original signal (i.e., sample stream). In other cases, the MV prediction itself can be lossy, e.g., due to rounding errors when computing a predictor from several surrounding MVs.

[0008] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding", December 2016). Among the many MV prediction mechanisms that H.265 offers, the one described herein is a technique hereafter referred to as "spatial merging".

[0009] Referring to Figure 1, a current block (101) contains samples that are found by the encoder during the motion search process to be predictable from a previous block of the same size but spatially shifted. Instead of coding its MV directly, the MV can be derived from metadata associated with one or more reference pictures, e.g., the most recent reference picture (in decoding order), using MVs associated with any one of five surrounding samples, denoted A0, A1, and B0, B1, B2 (102-106, respectively). In H.265, MV prediction can use predictors from the same reference picture that neighboring blocks use. Summary of the Invention [Means for solving the problem]

[0010] Aspects of the disclosure provide methods and apparatus for video encoding and / or decoding. In some examples, the apparatus for video decoding includes a processing circuit. The processing circuit can decode coding information for a current picture from a coded video bitstream. The coding information can indicate that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates satisfies a condition. The processing circuit can determine a maximum number of geometric merge mode merge candidates based on the picture level parameters and the maximum number of merge candidates based on a picture level parameter signaled for the current picture in the coded video bitstream. The maximum number of geometric merge mode merge candidates can be one of: (i) 0, or (ii) 2 to the maximum number of merge candidates. The picture level parameter can indicate a maximum number of geometric merge mode merge candidates. Based on the maximum number of geometric merge mode merge candidates being 0, the geometric merge mode is disabled for the current picture, and based on the maximum number of geometric merge mode merge candidates not being 0, the geometric merge mode is enabled for the current picture.

[0011] In one embodiment, the geometric merge mode is triangular partition mode (TPM) and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates.

[0012] In one embodiment, the coding level is the sequence level.

[0013] In one embodiment, the condition is that the maximum number of merge candidates is greater than or equal to two.

[0014] In one embodiment, the condition is that the maximum number of merging candidates is greater than or equal to 2. The processing circuitry may determine the maximum number of TPM merging candidates by subtracting a picture level parameter from the maximum number of merging candidates.

[0015] In one embodiment, a Picture Parameter Set (PPS) level parameter indicating the maximum number of TPM merging candidates is signaled within the coded video bitstream for the PPS associated with the current picture, where the PPS level parameter is one of (i) 0 to (maximum number of merging candidates-1), or (ii) (maximum number of merging candidates+1).

[0016] In one embodiment, a picture parameter set (PPS) level parameter indicating the maximum number of TPM merging candidates is not signaled in the coded video bitstream for the PPS associated with the current picture.

[0017] In one embodiment, the coded video bitstream includes a picture header for a current picture, where picture level parameters are signaled in the picture header based on TPM being enabled for the sequence level and the maximum number of merging candidates being greater than or equal to 2, and the signaling of the picture level parameters is independent of the PPS level parameters.

[0018] In one embodiment, the coded video bitstream includes a picture parameter set (PPS) associated with a current picture, and a PPS level parameter indicating a maximum number of TPM merging candidates is signaled within the PPS based at least on a PPS level flag indicating that the PPS level parameter should be signaled.

[0019] In one embodiment, the coded video bitstream includes a picture header for the current picture, and picture level parameters are signaled in the picture header based on the TPM being enabled for the sequence level, the maximum number of merging candidates being greater than or equal to 2, and a PPS level flag indicating that PPS level parameters should not be signaled.

[0020] In one embodiment, the coded video bitstream includes a picture parameter set (PPS) associated with the current picture, and a PPS level parameter indicating a maximum number of TPM merging candidates is signaled within the PPS based at least on TPM being enabled for the sequence level.

[0021] In some examples, an apparatus for video decoding includes a processing circuit. The processing circuit can decode coding information for a current picture from a coded video bitstream. The coding information can indicate that a geometric merge mode is enabled at a sequence level, a PPS level parameter in a picture parameter set (PPS) is 0, and a maximum number of merge candidates. The PPS level parameter can indicate the maximum number of geometric merge mode merge candidates. The processing circuit can decode a picture level parameter signaled for the current picture in the coded video bitstream based on the maximum number of merge candidates that satisfy a condition, the picture level parameter indicating the maximum number of geometric merge mode merge candidates.

[0022] In one embodiment, the geometric merge mode is triangular partition mode (TPM) and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates.

[0023] In one embodiment, the condition is one of: (i) the maximum number of merging candidates is greater than two; and (ii) the maximum number of merging candidates is greater than or equal to three.

[0024] In one embodiment, the maximum number of merging candidates is two, the condition is not met, and no picture level parameters are signaled in the coded video bitstream. The processing circuit may determine that the maximum number of TPM merging candidates is two.

[0025] Aspects of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform a method for video decoding and / or encoding.

[0026] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0027] [Figure 1] FIG. 2 is a schematic diagram of a current block and its surrounding spatial merge candidates in one example. [Diagram 2] 1 is a schematic diagram of a simplified block diagram of a communication system (200), according to one embodiment. [Diagram 3] 1 is a schematic diagram of a simplified block diagram of a communication system (300), according to one embodiment. [Figure 4] FIG. 2 is a schematic diagram of a simplified block diagram of a decoder according to one embodiment. [Diagram 5] FIG. 2 is a schematic diagram of a simplified block diagram of an encoder according to one embodiment. [Figure 6] FIG. 4 is a block diagram of an encoder according to another embodiment. [Figure 7] FIG. 4 is a block diagram of a decoder according to another embodiment. [Figure 8A] FIG. 2 illustrates an example of triangle partition-based inter prediction, according to one embodiment of the present disclosure. [Figure 8B] FIG. 2 illustrates an example of triangle partition-based inter prediction, according to one embodiment of the present disclosure. [Figure 9] FIG. 1 illustrates an exemplary geometric merge mode. [Figure 10] FIG. 2 illustrates an example sequence level control of a TPM. [Figure 11] FIG. 1 illustrates an example picture parameter set (PPS) syntax. [Figure 12]FIG. 2 illustrates an example picture header syntax. [Figure 13] FIG. 2 illustrates an example picture header syntax. [Figure 14] FIG. 2 illustrates an example picture header syntax. [Figure 15] FIG. 1 illustrates an exemplary PPS syntax. [Figure 16A] FIG. 2 illustrates an example picture header syntax. [Figure 16B] A diagram showing an example syntax that is not applicable when the signaling of picture level parameters is independent from the PPS level parameters. [Figure 17] FIG. 1 illustrates an exemplary PPS syntax. [Figure 18] FIG. 2 illustrates an example picture header syntax. [Figure 19] FIG. 1 illustrates an exemplary PPS syntax. [Figure 20] 2 is a flow chart outlining a process (2000) according to one embodiment of the present disclosure. [Figure 21] 2 is a flowchart outlining a process (2100) according to one embodiment of the present disclosure. [Figure 22] 1 is a schematic diagram of a computer system, according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] FIG. 2 shows a simplified block diagram of a communication system (200) according to one embodiment of the present disclosure. The communication system (200) includes, for example, a plurality of terminal devices that can communicate with each other via a network (250). For example, the communication system (200) includes a first pair of terminal devices (210) and (220) interconnected via the network (250). In the example of FIG. 2, the first pair of terminal devices (210) and (220) perform unidirectional transmission of data. For example, the terminal device (210) can code video data (e.g., a stream of video pictures captured by the terminal device (210)) for transmission to another terminal device (220) via the network (250). The encoded video data can be transmitted in the form of one or more coded video bitstreams. The terminal device (220) can receive the coded video data from the network (250), decode the coded video data to reconstruct the video pictures, and display the video pictures according to the reconstructed video data. Unidirectional data transmission may be common, such as in media serving applications.

[0029] In another example, the communication system (200) includes a second pair of terminal devices (230) and (240) performing bidirectional transmission of coded video data, such as may occur during a video conference. In the case of bidirectional transmission of data, in one example, each of the terminal devices (230) and (240) can code video data (e.g., a stream of video pictures captured by the terminal device) for transmission to the other of the terminal devices (230) and (240) over the network (250). Each of the terminal devices (230) and (240) can also receive coded video data transmitted by the other of the terminal devices (230) and (240), can decode the coded video data to recover the video pictures, and can display the video pictures on an accessible display device according to the recovered video data.

[0030] In the example of FIG. 2, the terminal devices (210), (220), (230), and (240) may be depicted as a server, a personal computer, and a smartphone, although the principles of the present disclosure need not be so limited. The embodiments of the present disclosure find application with laptop computers, tablet computers, media players, and / or dedicated video conferencing equipment. The network (250) represents any number of networks that convey coded video data between the terminal devices (210), (220), (230), and (240), including, for example, wired (wired) and / or wireless communication networks. The communication network (250) may exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this description, the architecture and topology of the network (250) may not be important to the operation of the present disclosure unless otherwise described herein below.

[0031] 3 shows an arrangement of a video encoder and a video decoder in a streaming environment as one example for application of the disclosed subject matter. The disclosed subject matter may be equally applicable to other video-enabled applications including, for example, video conferencing, digital television, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0032] The streaming system may include a video source (301), e.g., a capture subsystem (313) that may include a digital camera, for example, that creates a stream of uncompressed video pictures (302). In one example, the stream of video pictures (302) includes samples taken by a digital camera. The stream of video pictures (302), depicted as thick lines to emphasize a larger amount of data when compared to the encoded video data (304) (or coded video bitstream), may be processed by an electronic device (320) that includes a video encoder (303) coupled to the video source (301). The video encoder (303) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (304) (or coded video bitstream (304)), depicted as thin lines to emphasize a smaller amount of data when compared to the stream of video pictures (302), may be stored in a streaming server (305) for future use. One or more streaming client subsystems, such as the client subsystems (306) and (308) of FIG. 3, can access the streaming server (305) to retrieve copies (307) and (309) of the encoded video data (304). The client subsystem (306) can include, for example, a video decoder (310) within an electronic device (330). The video decoder (310) decodes an input copy (307) of the encoded video data and creates an output stream (311) of video pictures that can be rendered on a display (312) (e.g., a display screen) or other rendering device (not depicted). In some streaming systems, the encoded video data (304), (307), and (309) (e.g., a video bitstream) can be encoded according to a particular video coding / compression standard. Examples of such standards include ITU-T Recommendation H.265.In one example, the developing video coding standard is informally known as Versatile Video Coding (VVC), and the disclosed subject matter may be used in the context of VVC.

[0033] It should be noted that the electronic devices (320) and (330) may include other components (not shown). For example, the electronic device (320) may include a video decoder (not shown), and the electronic device (330) may also include a video encoder (not shown).

[0034] 4 shows a block diagram of a video decoder (410) according to one embodiment of the present disclosure. The video decoder (410) may be included in an electronic device (430). The electronic device (430) may include a receiver (431) (e.g., a receiving circuit). The video decoder (410) may be used in place of the video decoder (310) of the example of FIG.

[0035] The receiver (431) can receive one or more coded video sequences, in the same or another embodiment, one coded video sequence at a time, to be decoded by the video decoder (410), with the decoding of each coded video sequence being independent of the other coded video sequences. The coded video sequences may be received from a channel (401), which may be a hardware / software link to a storage device that stores the coded video data. The receiver (431) can receive the coded video data along with other data, e.g., coded audio data and / or auxiliary data streams, that may be forwarded to their respective using entities (not depicted). The receiver (431) can separate the coded video sequences from the other data. To combat network jitter, a buffer memory (415) may be coupled between the receiver (431) and the entropy decoder / parser (420) (hereinafter "parser (420)"). In certain applications, the buffer memory (415) is part of the video decoder (410). In other applications, it may be outside the video decoder (410) (not depicted). In still other applications, there may be a buffer memory (not depicted) outside the video decoder (410), for example, to combat network jitter, plus another buffer memory (415) inside the video decoder (410), for example, to handle playout timing. When the receiver (431) is receiving data from a store / forward device of sufficient bandwidth and controllability, or from an equally synchronous network, the buffer memory (415) may not be needed or may be small. For use with best-effort packet networks such as the Internet, the buffer memory (415) may be needed, may be relatively large, may be advantageously adaptively sized, and may be implemented at least in part in an operating system or similar element (not depicted) outside the video decoder (410).

[0036] The video decoder (410) may include a parser (420) to recover symbols (421) from the coded video sequence. These categories of symbols include information used to manage the operation of the video decoder (410) and potentially information for controlling a rendering device such as a rendering device (412) (e.g., a display screen) that is not an integral part of the electronic device (430) but may be coupled to the electronic device (430) as shown in FIG. 4. The control information for the rendering device may be in the form of a supplemental enhancement information (SEI message) or a video usability information (VUI) parameter set fragment (not depicted). The parser (420) may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may follow a video coding technique or standard and may follow a variety of principles including variable length coding, Huffman coding, arithmetic coding, etc., with or without context sensitivity. The parser (420) can extract, from the coded video sequence, a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the group. The subgroups can include groups of pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (420) can also extract information from the coded video sequence, such as transform coefficients, quantizer parameter values, motion vectors, etc.

[0037] The parser (420) can perform entropy decoding / parsing operations on the video sequence received from the buffer memory (415) to create symbols (421).

[0038] The recovery of the symbols (421) can involve a number of different units, depending on the type of coded video picture or part thereof (such as inter-picture and intra-picture, inter-block and intra-block, etc.), as well as other factors. Which units are involved and how can be controlled by subgroup control information parsed from the coded video sequence by the parser (420). The flow of such subgroup control information between the parser (420) and the following units is not depicted for the sake of clarity.

[0039] Beyond the functional blocks already mentioned, the video decoder (410) can be conceptually subdivided into several functional units, as described below. In an actual implementation operating under commercial constraints, many of these units will interact closely with each other and may be at least partially integrated with each other. However, for purposes of describing the disclosed subject matter, the following conceptual subdivision into functional units is appropriate:

[0040] The first unit is a scalar / inverse transform unit (451), which receives quantized transform coefficients as well as control information from the parser (420) including which transform to use, block size, quantization coefficients, quantization scaling matrices, etc. as symbols (421). The scalar / inverse transform unit (451) can output blocks containing sample values ​​that can be input to an aggregator (455).

[0041] In some cases, the output samples of the scalar / inverse transform (451) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but can use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (452). In some cases, the intra-picture prediction unit (452) generates a block of the same size and shape as the block being reconstructed using surrounding already reconstructed information fetched from a current picture buffer (458). The current picture buffer (458) buffers, for example, a partially reconstructed current picture and / or a fully reconstructed current picture. The aggregator (455) adds, possibly on a sample-by-sample basis, the prediction information generated by the intra-prediction unit (452) to the output sample information provided by the scalar / inverse transform unit (451).

[0042] In other cases, the output samples of the scalar / inverse transform unit (451) may relate to an inter-coded, potentially motion-compensated block. In such cases, the motion compensated prediction unit (453) may access the reference picture memory (457) to fetch samples used for prediction. After motion compensating the fetched samples according to the symbols (421) related to the block, these samples may be added to the output of the scalar / inverse transform unit (451) by the aggregator (455) to generate output sample information (in this case referred to as residual samples or residual signals). The addresses in the reference picture memory (457) from which the motion compensated prediction unit (453) fetches the prediction samples may be controlled by motion vectors available to the motion compensated prediction unit (453) in the form of symbols (421), which may have, for example, X, Y, and reference picture components. Motion compensation may also include interpolation of sample values ​​fetched from the reference picture memory (457) when sub-sample accurate motion vectors are used, motion vector prediction mechanisms, etc.

[0043] The output samples of the aggregator (455) may be subjected to various loop filtering techniques in the loop filter unit (456). Video compression techniques may include in-loop filter techniques that are controlled by parameters contained in the coded video sequence (also called the coded video bitstream) and made available to the loop filter unit (456) as symbols (421) from the parser (420), but may also be responsive to previously reconstructed and loop filtered sample values ​​as well as to meta-information obtained during decoding of previous portions (in decoding order) of the coded picture or coded video sequence.

[0044] The output of the loop filter unit (456) may be a sample stream that can be stored in a reference picture memory (457) for use in future inter-picture prediction as well as being output to a rendering device (412).

[0045] Once a particular coded picture is fully reconstructed, it can be used as a reference picture for future prediction. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified (e.g., by the parser (420)) as a reference picture, the current picture buffer (458) can become part of the reference picture memory (457), and the unused current picture buffer can be reallocated before beginning reconstruction of the next coded picture.

[0046] The video decoder (410) may perform decoding operations according to a given video compression technique in a standard such as ITU-T Rec. H.265. The coded video sequence may conform to the syntax specified by the video compression technique or standard being used, in the sense that the coded video sequence adheres to both the syntax of the video compression technique or standard and the profile documented in the video compression technique. Specifically, the profile may select some tools from all the tools available in the video compression technique or standard as the only tools available for use under that profile. Also, what is required for conformance is that the complexity of the coded video sequence is within a range defined by the level of the video compression technique or standard. In some cases, the level limits the maximum picture size, the maximum frame rate, the maximum reconstructed sample rate (e.g., measured in megasamples per second), the maximum reference picture size, etc. The limits set by the level may in some cases be further limited by the specification of a hypothetical reference decoder (HRD) and metadata for HRD buffer management signaled within the coded video sequence.

[0047] In one embodiment, the receiver (431) can receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence. The additional data may be used by the video decoder (410) to properly decode the data and / or to more accurately recover the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0048] 5 shows a block diagram of a video encoder (503) according to one embodiment of the present disclosure. The video encoder (503) is included in an electronic device (520). The electronic device (520) includes a transmitter (540) (e.g., a transmission circuit). The video encoder (503) can be used in place of the example video encoder (303) of FIG.

[0049] The video encoder (503) can receive video samples from a video source (501) (which is not part of the electronic device (520) in the example of FIG. 5) that can capture video images that are encoded by the video encoder (503). In another example, the video source (501) is part of the electronic device (520).

[0050] The video source (501) may provide a source video sequence that is coded by the video encoder (503) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 Y CrCB, RGB, ...), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media serving system, the video source (501) may be a storage device that stores previously prepared video. In a video conferencing system, the video source (501) may be a camera that captures local image information as a video sequence. The video data may be provided as a number of individual pictures that convey motion when viewed in sequence. The pictures themselves may be organized as a spatial array of pixels, each of which may contain one or more samples, depending on the sampling structure, color space, etc., in use. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0051] According to one embodiment, the video encoder (503) can code and compress pictures of a source video sequence into a coded video sequence (543) in real-time or under any other time constraint required by the application. Enforcing an appropriate coding rate is one function of the controller (550). In some embodiments, the controller (550) controls and is operatively coupled to other functional units described below. For clarity, coupling is not depicted. Parameters set by the controller (550) can include rate control related parameters (picture skip, quantizer, lambda value for rate distortion optimization techniques, ...), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. The controller (550) can be configured to have other appropriate functions associated with the video encoder (503) optimized for a particular system design.

[0052] In some embodiments, the video encoder (503) is configured to operate in a coding loop. As an oversimplified explanation, in one example, the coding loop can include a source coder (530) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be coded and a reference picture), as well as a (local) decoder (533) embedded in the video encoder (503). The decoder (533) reconstructs the symbols to create sample data in a manner similar to that which the (remote) decoder also creates (since any compression between the symbols and the coded video bitstream is lossless in the video compression techniques contemplated in the disclosed subject matter). The reconstructed sample stream (sample data) is input to a reference picture memory (534). Since the decoding of the symbol stream leads to a bit-exact result regardless of the location of the decoder (local or remote), the content in the reference picture memory (534) is also bit-exact between the local and remote encoders. In other words, the prediction part of the encoder "sees" exactly the same sample values ​​as the reference picture samples that the decoder "sees" when using the prediction during decoding. This basic principle of reference picture synchrony (and the resulting drift when synchrony cannot be maintained, e.g., due to channel errors) is also used in several related technologies.

[0053] The operation of the "local" decoder (533) may be the same as the operation of a "remote" decoder, such as the video decoder (410), already described in detail above in conjunction with Figure 4. However, and with brief reference to Figure 4, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (545) and parser (420) may be lossless, the entropy decoding portion of the video decoder (410), including the buffer memory (415), and the parser (420), may not be fully implemented in the local decoder (533).

[0054] An observation that can be made at this point is that any decoder technology other than parsing / entropy decoding present in a decoder must necessarily be present in a corresponding encoder in substantially identical functional form. For this reason, the disclosed subject matter focuses on the operation of the decoder. A description of the encoder technology can be omitted, since it is the inverse of the decoder technology described generically. Only in certain areas is more detailed description necessary, which is provided below.

[0055] During operation, in some examples, the source coder (530) may perform motion-compensated predictive coding, which predictively codes an input picture with reference to one or more previously coded pictures from a video sequence designated as “reference pictures.” In this manner, the coding engine (532) codes differences between pixel blocks of the input picture and pixel blocks of reference pictures that may be selected as predictive references for the input picture.

[0056] The local video decoder (533) can decode the coded video data of pictures that may be designated as reference pictures based on the symbols created by the source coder (530). The operation of the coding engine (532) can advantageously be a lossy process. When the coded video data can be decoded in a video decoder (not shown in FIG. 5), the reconstructed video sequence can be a replica of the source video sequence, usually with some errors. The local video decoder (533) can replicate the decoding process that may be performed by the video decoder on the reference pictures, such that the reconstructed reference pictures are stored in the reference picture cache (534). In this way, the video encoder (503) can locally store copies of reconstructed reference pictures that have common content as reconstructed reference pictures obtained by a far-end video decoder (without transmission errors).

[0057] The predictor (535) may perform a prediction search for the coding engine (532). That is, for a new picture to be coded, the predictor (535) may search the reference picture memory (534) for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc., that may serve as suitable prediction references for the new picture. The predictor (535) may operate on sample blocks on a pixel block by pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (535), the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory (534).

[0058] The controller (550) can manage the coding operations of the source coder (530), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0059] The output of all the aforementioned functional units may undergo entropy coding in an entropy coder (545), which converts the symbols produced by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0060] The transmitter (540) can buffer the coded video sequence created by the entropy coder (545) and prepare it for transmission over a communication channel (560), which may be a hardware / software link to a storage device that stores the coded video data. The transmitter (540) can merge the coded video data from the video coder (503) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0061] The controller (550) can manage the operation of the video encoder (503). During coding, the controller (550) can assign a particular coded picture type to each coded picture, which may affect the coding techniques that may be applied to the respective picture. For example, pictures may often be assigned as one of the following picture types:

[0062] An intra picture (I-picture) may be a picture that can be coded and decoded without using any other picture in a sequence as a source of prediction. Some video codecs allow various types of intra pictures, including, for example, independent decoder refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures, as well as their respective uses and characteristics.

[0063] A predictive picture (P picture) may be a picture that can be coded and decoded using intra- or inter-prediction, which uses at most one motion vector and reference index to predict sample values ​​for each block.

[0064] A bidirectionally predicted picture (B-picture) may be a picture that can be coded and decoded using intra- or inter-prediction that uses at most two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, a multi-prediction picture may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0065] A source picture is usually spatially subdivided into multiple sample blocks (e.g., blocks of 4x4, 8x8, 4x8, or 16x16 samples each) and coded block by block. Blocks may be predictively coded with reference to other (already coded) blocks as determined by the coding assignment applied to the respective picture of the block. For example, blocks of an I-picture may be non-predictively coded or they may be predictively coded with reference to already coded blocks of the same picture (spatial or intra prediction). Pixel blocks of a P-picture may be predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. Blocks of a B-picture may be predictively coded via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures.

[0066] The video encoder (503) may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Rec. H.265. In its operations, the video encoder (503) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancies in the input video sequence. Thus, the coded video data may conform to a syntax specified by the video coding technique or standard being used.

[0067] In one embodiment, the transmitter (540) can transmit additional data along with the encoded video. The source coder (530) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.

[0068] A video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits correlation (temporal or other) between pictures. In one example, a particular picture being encoded / decoded, called the current picture, is divided into blocks. When a block in the current picture is similar to a reference block in a reference picture that was previously coded and is still buffered in the video, the block in the current picture can be coded by a vector called a motion vector. The motion vector points to a reference block in the reference picture and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0069] In some embodiments, a bi-prediction technique may be used in inter-picture prediction. According to the bi-prediction technique, two reference pictures, such as a first reference picture and a second reference picture, both of which are earlier in decoding order than the current picture in the video (but may be past and future in display order, respectively), are used. A block in the current picture may be coded by a first motion vector that points to a first reference block in the first reference picture and a second motion vector that points to a second reference block in the second reference picture. A block may be predicted by a combination of the first reference block and the second reference block.

[0070] Furthermore, merge mode techniques can be used in inter-picture prediction to increase coding efficiency.

[0071] According to some embodiments of the present disclosure, predictions such as inter-picture prediction and intra-picture prediction are performed on a block-by-block basis. For example, according to the HEVC standard, a picture in a sequence of video pictures is divided into coding tree units (CTUs) for compression, and the CTUs in a picture have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU includes three coding tree blocks (CTBs), one luma CTB and two chroma CTBs. Each CTU can be recursively quadtree partitioned into one or more coding units (CUs). For example, a 64×64 pixel CTU can be partitioned into one 64×64 pixel CU, or four 32×32 pixel CUs, or sixteen 16×16 pixel CUs. In one example, each CU is analyzed to determine the prediction type of the CU, such as an inter prediction type or an intra prediction type. The CU is partitioned into one or more prediction units (PUs) depending on the temporal and / or spatial predictability. In general, each PU includes one luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed in units of prediction blocks. Using a luma prediction block as an example of a prediction block, the prediction block includes a matrix of pixel values ​​(e.g., luma values) of 8x8 pixels, 16x16 pixels, 8x16 pixels, 16x8 pixels, etc.

[0072] 6 shows a diagram of a video encoder (603) according to another embodiment of the present disclosure. The video encoder (603) is configured to receive a processed block (e.g., a predictive block) of sample values ​​in a current video picture in a sequence of video pictures and to encode the processed block into a coded picture that is part of a coded video sequence. In one example, the video encoder (603) is used in place of the video encoder (303) of the example of FIG. 3.

[0073] In an HEVC example, the video encoder (603) receives a matrix of sample values ​​for a processing block, such as a predictive block of 8×8 samples. The video encoder (603) determines whether the processing block is optimally coded using intra-mode, inter-mode, or bi-predictive mode, e.g., using rate-distortion optimization. When the processing block is coded in intra-mode, the video encoder (603) can code the processing block into a coded picture using intra-prediction techniques, and when the processing block is coded in inter-mode or bi-predictive mode, the video encoder (603) can code the processing block into a coded picture using inter-prediction or bi-prediction techniques, respectively. In certain video coding techniques, the merge mode may be an inter-picture prediction sub-mode in which motion vectors are derived from one or more motion vector predictors without the benefit of coded motion vector components outside the predictors. In certain other video coding techniques, there may be motion vector components applicable to the current block. In one example, the video encoder (603) includes other components, such as a mode decision module (not shown), to determine the mode of the processing block.

[0074] In the example of FIG. 6, the video encoder (603) includes an inter-encoder (630), an intra-encoder (622), a residual calculator (623), a switch (626), a residual encoder (624), a general controller (621), and an entropy encoder (625) coupled together as shown in FIG. 6.

[0075] The inter-encoder (630) is configured to receive samples of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in a previous picture and a subsequent picture), generate inter-prediction information (e.g., a description of redundancy information, motion vectors, merge mode information due to inter-coding techniques), and calculate an inter-prediction result (e.g., a predictive block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture that is decoded based on the coded video information.

[0076] The intra encoder (622) is configured to receive samples of a current block (e.g., a processing block), possibly compare the block with already coded blocks in the same picture, generate quantized coefficients after transformation, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). In one example, the intra encoder (622) also calculates intra prediction results (e.g., prediction blocks) based on the intra prediction information and reference blocks in the same picture.

[0077] The generic controller (621) is configured to determine generic control data and control other components of the video encoder (603) based on the generic control data. In one example, the generic controller (621) determines the mode of the block and provides a control signal to the switch (626) based on the mode. For example, when the mode is an intra mode, the generic controller (621) controls the switch (626) to select an intra mode result for use by the residual calculator (623) and controls the entropy encoder (625) to select intra prediction information and include the intra prediction information in the bitstream, and when the mode is an inter mode, the generic controller (621) controls the switch (626) to select an inter prediction result for use by the residual calculator (623) and controls the entropy encoder (625) to select inter prediction information and include the inter prediction information in the bitstream.

[0078] The residual calculator (623) is configured to calculate a difference (residual data) between the received block and a prediction result selected from the intra-encoder (622) or the inter-encoder (630). The residual encoder (624) is configured to operate on the residual data to encode the residual data and generate transform coefficients. In one example, the residual encoder (624) is configured to transform the residual data from the spatial domain to the frequency domain and generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various embodiments, the video encoder (603) also includes a residual decoder (628). The residual decoder (628) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data can be used by the intra-encoder (622) and the inter-encoder (630) as appropriate. For example, the inter-encoder (630) can generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (622) can generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks are appropriately processed to generate decoded pictures, which may be buffered in a memory circuit (not shown) and used as reference pictures in some examples.

[0079] The entropy encoder (625) is configured to format the bitstream to include the encoded block. The entropy encoder (625) is configured to include various information according to an appropriate standard, such as the HEVC standard. In one example, the entropy encoder (625) is configured to include general control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other appropriate information in the bitstream. It should be noted that, according to the disclosed subject matter, no residual information is present when coding a block in a merged sub-mode of either the inter-mode or the bi-prediction mode.

[0080] 7 shows a diagram of a video decoder (710) according to another embodiment of the present disclosure. The video decoder (710) is configured to receive coded pictures that are part of a coded video sequence and decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (710) is used in place of the video decoder (310) of the example of FIG. 3.

[0081] In the example of FIG. 7, the video decoder (710) includes an entropy decoder (771), an inter-decoder (780), a residual decoder (773), a reconstruction module (774), and an intra-decoder (772) coupled together as shown in FIG.

[0082] The entropy decoder (771) may be configured to recover from the coded picture certain symbols that represent syntax elements of which the coded picture is composed. Such symbols may include, for example, prediction information (e.g., intra prediction information or inter prediction information) that may identify the mode in which the block is coded (e.g., intra mode, inter mode, bi-prediction mode, merge submode or the latter two of another submode), certain samples or metadata used for prediction by the intra decoder (772) or inter decoder (780), respectively, residual information in the form of quantized transform coefficients, etc. In one example, when the prediction mode is an inter mode or bi-prediction mode, the inter prediction information is provided to the inter decoder (780), and when the prediction type is an intra prediction type, the intra prediction information is provided to the intra decoder (772). The residual information may undergo inverse quantization and is provided to the residual decoder (773).

[0083] The inter decoder (780) is configured to receive the inter prediction information and to generate inter prediction results based on the inter prediction information.

[0084] The intra decoder (772) is configured to receive intra prediction information and to generate a prediction result based on the intra prediction information.

[0085] The residual decoder (773) is configured to perform inverse quantization to extract inverse quantized transform coefficients, and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (773) may also require certain control information (to include quantizer parameters (QP)), which may be provided by the entropy decoder (771) (this may be only a small amount of control information, so the data path is not depicted).

[0086] The restoration module (774) combines, in the spatial domain, the residual output by the residual decoder (773) with the prediction result (possibly output by an inter-prediction module or an intra-prediction module) to form a restored block, which may be part of a restored picture, which in turn may be part of a restored video; it should be noted that other appropriate operations, such as deblocking operations, may be performed to improve appearance.

[0087] It should be noted that the video encoders (303), (503), and (603) and the video decoders (310), (410), and (710) may be implemented using any suitable technique. In one embodiment, the video encoders (303), (503), and (603) and the video decoders (310), (410), and (710) may be implemented using one or more integrated circuits. In another embodiment, the video encoders (303), (503), and (503) and the video decoders (310), (410), and (710) may be implemented using one or more processors executing software instructions.

[0088] Aspects of the present disclosure relate to video coding techniques such as signaling of a maximum number of triangle merge candidates for Triangular Partitioning Mode (TPM) or Geometric Merge Mode (GEO) used in VVC over HEVC, for example.

[0089] Triangular partitioning for inter prediction can be described later. TPM can be supported, for example, in VVC, for inter prediction. In one example, TPM is applied only to CUs of 8×8 or larger. TPM can be signaled using a CU level flag as a type of merge mode, along with other merge modes including normal merge mode, merge mode with motion vector difference (MMVD) mode, combined inter and intra prediction (CIIP) mode, sub-block merge mode, etc.

[0090] 8A-8B are diagrams illustrating an example of triangular partition-based inter prediction according to an embodiment of the present disclosure. When TPM is used, a CU (800) can be evenly divided into two triangular partitions (also called triangular partitions or partitions) (e.g., partition 1 (811) and partition 2 (812) in FIG. 8A and partition 1 (821) and partition 2 (822) in FIG. 8B) using either diagonal or anti-diagonal partitioning. The partitions (811)-(812) are divided by a line (810). The partitions (821)-(822) are divided by a line (820). Each triangular partition in the CU (800) is inter predicted using the motion information of the respective triangular partition. In one example, only uni-prediction is allowed for each triangular partition, and therefore each triangular partition has one MV and one reference index. A uni-prediction motion constraint can be applied to ensure that only two motion compensation predictions are used for each CU, which is the same as the bi-prediction applied to the CU.

[0091] If TPM is used for the current CU, a flag indicating the direction of the triangular partition (e.g., diagonal or anti-diagonal partition) and two merge indices (one per partition) may be further signaled. A parameter indicating the maximum number of TPM merge candidates may be explicitly signaled at the picture parameter set (PPS) level, picture header (PH) level, etc. After predicting samples in each of the triangular partitions (e.g., partitions (811)-(812) in FIG. 8A or partitions (821)-(822) in FIG. 8B), the values ​​of samples along the diagonal or anti-diagonal edges may be adjusted using a blending process with adaptive weights. After deriving a prediction signal for the CU (800), a transform process and a quantization process may be further applied to the CU (800) as in other prediction modes.

[0092] The geometric merge mode (also called the geometric partition mode) can support multiple different partitioning schemes. FIG. 9 illustrates an example geometric merge mode. In the geometric merge mode, a CU (900) can be partitioned into two partitions, partition 1-2, separated by a line or edge (910). Each of the two partitions can have any suitable shape, such as a triangle, a trapezoid, a pentagon, etc.

[0093] When the line (910) is the line (810) or the line (820), the geometry merge mode is TPM. In one example, the TPM is an example of the geometry merge mode, and the geometry merge mode includes the TPM. The description of the TPM in this disclosure (embodiments, examples, etc.) can be appropriately adapted to the geometry merge mode, for example, by replacing the TPM with the geometry merge mode. The description of the geometry merge mode in this disclosure (embodiments, examples, etc.) can be appropriately adapted to the TPM, for example, by replacing the geometry merge mode with the TPM.

[0094] The TPM can be controlled at a high level. The high level can refer to the picture level, PPS level, sequence level, or video level associated with a picture header (PH), PPS, sequence parameter set (SPS), or video parameter set (VPS). In one example, the high level does not refer to the sub-picture level (e.g., slice level).

[0095] TPM can be controlled (e.g., enabled or disabled) at the sequence level using SPS syntax elements. FIG. 10 illustrates an example sequence level control of TPM. A sequence level triangle flag (e.g., sps_triangle_enabled_flag) can specify whether triangle-based motion compensation can be used for inter prediction. A sequence level triangle flag (e.g., sps_triangle_enabled_flag) equal to 0 can specify that triangle-based motion compensation is not used in a coding layer video sequence (CLVS) and the syntax is constrained such that parameters or syntax elements related to TPM (e.g., merge_triangle_split_dir, merge_triangle_idx0, and merge_triangle_idx1) are not present in the coding unit syntax of CLVS. A sequence level triangle flag (e.g., sps_triangle_enabled_flag) equal to 1 can specify that triangle-based motion compensation can be used in CLVS.

[0096] A parameter indicating the maximum number of TPM merge candidates can be explicitly signaled at a higher level (e.g., PPS level in PPS, picture level in PH, or another higher level). FIG. 11 shows an example PPS raw byte sequence payload (RBSP) where the maximum number of TPM merge candidates may be signaled in the PPS. In one example, a PPS level parameter or a PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) is explicitly signaled in the PPS to indicate the maximum number of TPM merge candidates. FIG. 12 shows an example picture header RBSP where the maximum number of TPM merge candidates may be signaled in the picture header. In one example, a picture header level parameter or a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is explicitly signaled in the picture header to indicate the maximum number of TPM merge candidates.

[0097] A PPS level parameter equal to 0 (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may specify that the picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is present (e.g., signaled) in the PH of the slice that references the PPS. A PPS level parameter greater than 0 (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may specify that the picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present (e.g., not signaled) in the PH that references the PPS. The value of the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may be in the range of 0 to MaxNumMergeCand-1, where MaxNumMergeCand is the maximum number of merge candidates in the merge candidate list for normal merge mode. When the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) is not present, the PPS level parameter can be inferred to be 0.

[0098] A picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) may specify the maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) supported within a slice associated with the picture header, subtracted from the maximum number of merge candidates (MaxNumMergeCand).

[0099] In one example, when a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present (e.g., not signaled), a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 1, and MaxNumMergeCand is 2 or greater, the picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is inferred to be equal to (pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1-1).

[0100] The maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) may be determined based on MaxNumMergeCand and a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand). In one example, MaxNumTriangleMergeCand is determined using Equation 1: MaxNumTriangleMergeCand=MaxNumMergeCand-pic_max_num_merge_cand_minus_max_num_triangle_cand (Formula 1)

[0101] In one example, when a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is present, the value of MaxNumTriangleMergeCand is in the range of 2 to MaxNumMergeCand, inclusive. For example, if MaxNumMergeCand is 4, then the range is [2,3,4], and MaxNumTriangleMergeCand is one of 2, 3, and 4.

[0102] When a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present and one of two conditions is true, MaxNumTriangleMergeCand is set equal to 0. The two conditions include: (i) a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 0, and (ii) MaxNumMergeCand is less than 2.

[0103] In one example, when MaxNumTriangleMergeCand is equal to 0, the TPM is not allowed for the slice associated with the PH.

[0104] A PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1), a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand), and MaxNumMergeCand may be used to determine MaxNumTriangleMergeCand. The value of MaxNumTriangleMergeCand may be specified not to exceed the value of MaxNumMergeCand. The value of MaxNumTriangleMergeCand may vary, for example, depending on the particular application. PPS signaling may be effective when the value of MaxNumTriangleMergeCand does not change frequently and therefore does not need to be signaled for every picture. On the other hand, picture header signaling may be effective when MaxNumTriangleMergeCand changes more frequently, for example, from one picture to another.

[0105] A PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1), a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand), the value of MaxNumMergeCand, and a sequence level triangle flag (e.g., sps_triangle_enabled_flag) may be used to determine the value of MaxNumTriangleMergeCand. The value of the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may be in the range of 0 to (the value of MaxNumMergeCand minus 1).

[0106] In one example, the PPS level parameters are parsed or inferred to be 0, the sequence level triangle flag is 0 indicating the TPM is disabled, the picture level parameters are not present, and the value of MaxNumTriangleMergeCand is 0 regardless of the value of MaxNumMergeCand.

[0107] In one example, the PPS level parameter is parsed or inferred to be 0, the sequence level triangle flag is 1 indicating that the TPM is enabled, the picture level parameter is not present, and the value of MaxNumTriangleMergeCand is 0 when the value of MaxNumMergeCand is less than 2.

[0108] In one example, the PPS level parameters are parsed or inferred to be 0, the sequence level triangle flag is 1 indicating TPM is enabled, the picture level parameters are present and parsed, and the value of MaxNumTriangleMergeCand is (MaxNumMergeCand-value of the picture level parameters) (e.g., MaxNumMergeCand-pic_max_num_merge_cand_minus_max_num_triangle_cand) when the value of MaxNumMergeCand is 2 or greater. The value of MaxNumTriangleMergeCand may range from 2 to MaxNumMergeCand, inclusive.

[0109] In one example, the PPS level parameters are parsed and are not 0, the sequence level triangle flags are 0 indicating that the TPM is disabled, the picture level parameters are not present, and the value of MaxNumTriangleMergeCand is 0 regardless of the value of MaxNumMergeCand.

[0110] In one example, the PPS level parameter is parsed and is not 0, the sequence level triangle flag is 1 indicating that the TPM is enabled, the picture level parameter is not present, and the value of MaxNumTriangleMergeCand is 0 when the value of MaxNumMergeCand is less than 2.

[0111] In one example, the PPS level parameters are parsed and are not 0, the sequence level triangle flag is 1 indicating that TPM is enabled, the picture level parameters are not present and are inferred to be (the value of the PPS level parameters-1) (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1-1), and the value of MaxNumTriangleMergeCand is (MaxNumMergeCand-(the value of the PPS level parameters-1)) (e.g., MaxNumMergeCand-(pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1-1)) when the value of MaxNumMergeCand is 2 or greater.

[0112] The design of signaling the maximum number of triangle merge candidates can be difficult. When the value of MaxNumMergeCand is 2, the sequence level triangle flag (e.g., sps_triangle_enabled_flag) is 1, and the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) is 0, the picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) can be signaled in the picture header (see FIG. 12) and then parsed. However, as mentioned above, when pic_max_num_merge_cand_minus_max_num_triangle_cand is present, the value of MaxNumTriangleMergeCand is in the range of 2 to MaxNumMergeCand. Therefore, since the value of MaxNumMergeCand is also 2, it can be inferred that MaxNumTriangleMergeCand is 2. Therefore, parsing pic_max_num_merge_cand_minus_max_num_triangle_cand may be redundant.

[0113] According to an aspect of the present disclosure, as shown in FIG. 13, a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is signaled in the picture header and is decoded only when the sequence level triangle flag (e.g., sps_triangle_enabled_flag) is 1, MaxNumMergeCand is greater than 2, and a PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) is 0. Alternatively, as shown in FIG. 14, a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is signaled in the picture header and is decoded only when the sequence level triangle flag (e.g., sps_triangle_enabled_flag) is 1, MaxNumMergeCand is 3 or greater, and the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) is 0.

[0114] Figure 13 shows an example picture header syntax where the maximum number of TPM merge candidates is signaled in the picture header using a picture header level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand). Box (1310) in Figure 13 shows the difference between the syntax shown in Figure 12 (e.g., MaxNumMergeCand is 2 or more) and the syntax shown in Figure 13 (e.g., MaxNumMergeCand is greater than 2).

[0115] A picture header level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) may specify the maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) supported within a slice associated with the picture header, subtracted from the maximum number of merge candidates (MaxNumMergeCand).

[0116] In one example, when a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present (e.g., not signaled), a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 1, and MaxNumMergeCand is 2 or greater, the picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is inferred to be equal to (pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1-1).

[0117] The maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) may be determined based on MaxNumMergeCand and a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand). In one example, MaxNumTriangleMergeCand is determined using Equation 1:

[0118] In one example, when a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is present, the value of MaxNumTriangleMergeCand is in the range of 2 to MaxNumMergeCand, inclusive. According to aspects of the disclosure, when a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present and MaxNumMergeCand is 2, MaxNumTriangleMergeCand is 2.

[0119] When a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present and one of two conditions is true, MaxNumTriangleMergeCand is set equal to 0. As described above, the two conditions include: (i) a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 0, and (ii) MaxNumMergeCand is less than 2.

[0120] In one example, when MaxNumTriangleMergeCand is equal to 0, TPM is not allowed for the slice associated with the picture header.

[0121] Figure 14 shows an example picture header syntax where the maximum number of TPM merge candidates is signaled in the picture header using, for example, a picture header level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand). Box (1410) in Figure 14 shows the difference between the syntax shown in Figure 12 (e.g., MaxNumMergeCand is 2 or more) and the syntax shown in Figure 14 (e.g., MaxNumMergeCand is 3 or more).

[0122] In general, coding information for a current picture can be decoded from a coded video bitstream. The coding information can indicate that a geometric merge mode is enabled at a sequence level and a PPS level parameter in the PPS indicating a maximum number of geometric merge mode merge candidates is 0. In one example, the geometric merge mode is TPM. Furthermore, the coding information can indicate a maximum number of merge candidates. When the maximum number of merge candidates satisfies a condition, a picture level parameter signaled for the current picture in the coded video bitstream can be decoded. The picture level parameter can indicate a maximum number of geometric merge mode merge candidates. In one example, the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates.

[0123] In one example, when the maximum number of merging candidates does not satisfy the condition, the picture level parameters that are not signaled in the coded video bitstream are not decoded. In one example, since the picture level parameters are not signaled in the coded video bitstream and the maximum number of merging candidates is two, which does not satisfy the condition, it is determined that the maximum number of TPM merging candidates is two.

[0124] In one example, the condition is one of: (i) the maximum number of merging candidates is greater than two; and (ii) the maximum number of merging candidates is greater than or equal to three.

[0125] In some instances, when a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is 1 and MaxNumMergeCand is greater than or equal to 2, the TPM cannot be disabled for some pictures. Thus, for example, picture level TPM control (e.g., disabling the TPM for some pictures) is inflexible.

[0126] In one embodiment, when the TPM is disabled at the sequence level, the PPS level parameters (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) should not be decoded to reduce signaling overhead. In some examples (e.g., FIG. 11), regardless of the sequence level control of the TPM, the PPS level parameters (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) are decoded when a flag (e.g., constant_slice_header_params_enabled_flag) is equal to 1, and thus, for example, the signaling efficiency at the sequence level may be relatively low.

[0127] According to aspects of the disclosure, coding information for a current picture may be decoded from a coded video bitstream. The coding information may indicate that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture, and that a maximum number of merge candidates (e.g., for a normal merge mode) satisfies a condition. The coding level higher than the picture level may be a sequence level. The condition may include that the maximum number of merge candidates is greater than or equal to two.

[0128] When a picture level parameter indicating a maximum number of geometric merge mode merge candidates (e.g., MaxNumTriangleMergeCand) is signaled for a current picture in a coded video bitstream, the maximum number of geometric merge mode merge candidates for the current picture can be determined based on the picture level parameter and the maximum number of merge candidates (MaxNumMergeCand). According to aspects of the disclosure, the maximum number of geometric merge mode merge candidates can be in a range including 0 and a subrange of 2 or more and less than or equal to the maximum number of merge candidates. In one example, if MaxNumMergeCand is 4, the subrange is 2 to 4. The range includes 0 and 2 to 4, i.e., [0, 2, 3, 4]. Alternatively, the maximum number of geometric merge mode merge candidates can be one of: (i) 0, or (ii) 2 to the maximum number of merge candidates. In one example, if MaxNumMergeCand is 4, the maximum number of geometric merge mode merge candidates can be 0, 2, 3, or 4.

[0129] In one example, the geometric merge mode is TPM and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates. The picture level parameter may be pic_max_num_merge_cand_minus_max_num_triangle_cand.

[0130] When the maximum number of geometric merge mode merge candidates (e.g., maximum number of TPM merge candidates) is 0, the geometric merge mode (e.g., TPM) is disabled for the current picture. When the maximum number of geometric merge mode merge candidates (e.g., maximum number of TPM merge candidates) is non-zero (e.g., greater than 0), the geometric merge mode (e.g., TPM) is enabled for the current picture.

[0131] The maximum number of TPM merging candidates may be determined, for example, by subtracting a picture level parameter from the maximum number of merging candidates using equation (1).

[0132] The above description can support the ability to disable TPM for some pictures when TPM is enabled at the sequence level and MaxNumMergeCand is greater than or equal to 2. Thus, picture-level flexibility is supported.

[0133] In one embodiment, when pic_max_num_merge_cand_minus_max_num_triangle_cand is present (eg, signaled), the value of MaxNumTriangleMergeCand may be in the range of 0, 2, or more, up to and including MaxNumMergeCand.

[0134] Thus, when pic_max_num_merge_cand_minus_max_num_triangle_cand is present, the value of pic_max_num_merge_cand_minus_max_num_triangle_cand may be equal to the value of MaxNumMergeCand. Thus, the value of MaxNumTriangleMergeCand may be 0, which is a picture-level control that disables the TPM at the picture level.

[0135] A PPS level parameter indicating the maximum number of TPM merge candidates or a PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may be signaled within the coded video bitstream for the PPS associated with the current picture. The PPS level parameter may be one of (i) 0 to (max number of merge candidates-1), or (ii) (max number of merge candidates+1). For example, when MaxNumMergeCand is 4, the PPS level parameter may be 0, 1, 2, 3, or 5.

[0136] The PPS level parameter may be in a range including a subrange of 0 to (Maximum number of merge candidates-1) and (Maximum number of merge candidates+1). In one example, referring to the syntax elements of FIG. 11, the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) should be in the range of 0 to (MaxNumMergeCand-1) and (MaxNumMergeCand+1). For example, when MaxNumMergeCand is 4, the subrange for the PPS level parameter is 0 to 3, and the range for the PPS level parameter is 0 to 3, and 5. Alternatively, the range for the PPS level parameter includes [0,1,2,3,5].

[0137] In one embodiment, a PPS-level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) indicating the maximum number of TPM merge candidates (e.g., for the PPS associated with the current picture) is not signaled in the coded video bitstream. For example, referring to Figure 15, box (1510) indicates that pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1 is removed from the PPS RBSP of Figure 11 in order to have simple control of the TPM when it should be disabled at the picture level.

[0138] Referring to Figure 16A, a coded video bitstream may include a picture header for a current picture. Picture level parameters may be signaled in the picture header when TPM is enabled for the sequence level (e.g., a sequence level triangle flag such as sps_triangle_enabled_flag is 1) and the maximum number of merge candidates is 2 or greater. Signaling of picture level parameters may be independent of PPS level parameters.

[0139] Box (1610) indicates that the signaling of picture level parameters can be independent of PPS level parameters (eg, pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1). Further, as indicated by box (1620) in FIG. 16B, the following description: "When a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present (e.g., not signaled), a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 1, and MaxNumMergeCand is 2 or greater, a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is inferred to be equal to (pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1-1)" does not apply when the signaling of the picture level parameter is independent of the PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1).

[0140] A picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) may specify the maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) supported within a slice associated with the picture header, subtracted from the maximum number of merge candidates (MaxNumMergeCand).

[0141] The maximum number of triangle merge mode candidates (MaxNumTriangleMergeCand) may be determined based on MaxNumMergeCand and a picture level parameter (eg, pic_max_num_merge_cand_minus_max_num_triangle_cand), for example, using Equation 1.

[0142] In one example, when a picture level parameter (eg, pic_max_num_merge_cand_minus_max_num_triangle_cand) is present, the value of MaxNumTriangleMergeCand is in the range of 2 to MaxNumMergeCand, inclusive.

[0143] When a picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present and one of two conditions is true, MaxNumTriangleMergeCand is set equal to 0. The two conditions include: (i) a sequence level triangle flag (e.g., sps_triangle_enabled_flag) is equal to 0, and (ii) MaxNumMergeCand is less than 2.

[0144] In one example, when MaxNumTriangleMergeCand is equal to 0, the TPM is not allowed for the slice associated with the PH.

[0145] The coded video bitstream may include a PPS associated with the current picture. A PPS level parameter indicating a maximum number of TPM merge candidates (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may be signaled within the PPS (e.g., PPS RBSP in FIG. 17) based on a PPS level flag indicating that at least the PPS level parameter should be signaled (e.g., pps_max_num_triangle_merge_cand_present_flag). Referring to FIG. 17, box (1610) indicates that the PPS level flag (e.g., pps_max_num_triangle_merge_cand_present_flag) is signaled within the PPS RBSP. As indicated by box (1620), when a PPS level flag (e.g., pps_max_num_triangle_merge_cand_present_flag) is true (e.g., has a value of 1), a PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1) may be signaled in the PPS RBSP. With reference to FIG. 17, in one example, the PPS level parameter is signaled when a PPS level flag (e.g., pps_max_num_triangle_merge_cand_present_flag) is true and a flag (e.g., constant_slice_header_params_enabled_flag) is true.

[0146] A PPS level flag (e.g., pps_max_num_triangle_merge_cand_present_flag) may specify the presence of a syntax element (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand) in a bitstream (e.g., a coded video bitstream). When pps_max_num_triangle_merge_cand_present_flag is equal to 1, pps_max_num_merge_cand_minus_max_num_triangle_cand may be present. When pps_max_num_triangle_merge_cand_present_flag is equal to 0, pps_max_num_merge_cand_minus_max_num_triangle_cand is not present. When pps_max_num_triangle_merge_cand_present_flag is not present, pps_max_num_triangle_merge_cand_present_flag may be inferred to be 0. When the value of sps_triangle_enabled_flag is 0, it is a bitstream conformance requirement that the value of pps_max_num_triangle_merge_cand_present_flag be equal to 0.

[0147] pps_max_num_merge_cand_minus_max_num_triangle_cand may specify the maximum number of TPM merge candidates supported in pictures referenced in the PPS. For example, the maximum number of TPM merge candidates is obtained using Equation 1.

[0148] When pps_max_num_merge_cand_minus_max_num_triangle_cand is not present, pps_max_num_merge_cand_minus_max_num_triangle_cand can be inferred to be equal to 0.

[0149] Referring to Figure 18, a coded video bitstream may include a picture header for a current picture. A picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) may be signaled in a picture header (e.g., picture header RBSP of Figure 18) when TPM is enabled for the sequence level (a sequence level triangle flag, e.g., sps_triangle_enabled_flag, is equal to 1), the maximum number of merge candidates is 2 or greater (MaxNumMergeCand >= 2), and a PPS level flag (e.g., pps_max_num_triangle_merge_cand_present_flag) indicates that the PPS level parameter is not signaled (e.g., pps_max_num_triangle_merge_cand_present_flag is 0), as indicated by box (1810).

[0150] A picture level parameter (e.g., pic_max_num_merge_cand_minus_max_num_triangle_cand) may specify the maximum number of TPM merge candidates supported in a slice associated with the PH. In one example, the maximum number of TPM merge candidates is obtained using Equation 1.

[0151] When a picture level parameter (eg, pic_max_num_merge_cand_minus_max_num_triangle_cand) is not present, the picture level parameter may be inferred to be equal to the value of the PPS parameter (eg, pps_max_num_merge_cand_minus_max_num_triangle_cand).

[0152] The maximum number of TPM merge candidates (MaxNumTriangleMergeCand) may be derived as follows: (i) if sps_triangle_enabled_flag is equal to 1 and MaxNumMergeCand is greater than or equal to 2, then MaxNumTriangleMergeCand may be determined using Equation 1; (ii) otherwise, MaxNumTriangleMergeCand may be set to 0.

[0153] When MaxNumTriangleMergeCand is equal to 0, the TPM is not allowed for the slice associated with the PH.

[0154] 19, a coded video bitstream may include a PPS associated with a current picture. A PPS level parameter (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand) indicating a maximum number of TPM merge candidates may be signaled within the PPS (e.g., PPS RBSP in FIG. 19) based at least on TPM being enabled for the sequence level.

[0155] Box 1910 indicates that a sequence-level TPM enabled / disabled flag may be used to determine whether to decode a syntax element (e.g., pps_max_num_merge_cand_minus_max_num_triangle_cand_plus1). The sequence-level TPM enabled / disabled flag may be sps_triangle_enabled_flag.

[0156] FIG. 20 is a flow chart outlining a process (2000) according to one embodiment of the disclosure. The process (2000) may be used in signaling a parameter indicating a maximum number of geometric merge mode merge candidates for a geometric merge mode. In various embodiments, the process (2000) is performed by processing circuitry, such as processing circuitry in terminal devices (210), (220), (230), and (240), processing circuitry performing the functions of a video encoder (303), processing circuitry performing the functions of a video decoder (310), processing circuitry performing the functions of a video decoder (410), processing circuitry performing the functions of a video encoder (503), etc. In some embodiments, the process (2000) is implemented in software instructions, and thus the processing circuitry performs the process (2000) when the processing circuitry executes the software instructions. The process begins at (S2001) and proceeds to (S2010).

[0157] At (S2010), coding information for the current picture may be decoded from the coded video bitstream. The coding information may indicate that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates satisfies a condition.

[0158] At (S2020), when a picture level parameter is signaled for a current picture in the coded video bitstream, a maximum number of geometric merge mode merge candidates may be determined based on the picture level parameter and the maximum number of merge candidates. The maximum number of geometric merge mode merge candidates may be one of (i) 0, or (ii) 2 to the maximum number of merge candidates. In one example, the geometric merge mode is TPM, and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates. The picture level parameter may indicate the maximum number of geometric merge mode merge candidates. The geometric merge mode may be disabled for the current picture based on the maximum number of geometric merge mode merge candidates being 0. The geometric merge mode may be enabled for the current picture based on the maximum number of geometric merge mode merge candidates not being 0.

[0159] In one example, in (S2030), it may be determined whether the maximum number of geometric merge mode merge candidates is 0. If it is determined that the maximum number of geometric merge mode merge candidates is 0, the process (2000) proceeds to (S2040). If not, the process (2000) proceeds to (S2050).

[0160] At (S2040), the geometric merge mode can be disabled for the current picture. The process (2000) proceeds to (S2099) and ends.

[0161] At (S2050), the geometric merge mode can be enabled for the current picture. The process (2000) proceeds to (S2099) and ends.

[0162] The process (2000) may be adapted as appropriate. Steps of the process (2000) may be modified and / or omitted. Additional steps may be added. Any suitable order of performance may be used.

[0163] FIG. 21 is a flow chart outlining a process (2100) according to one embodiment of the disclosure. The process (2100) may be used in signaling a parameter indicating a maximum number of geometric merge mode merge candidates for a geometric merge mode. In various embodiments, the process (2100) is performed by processing circuitry within terminal devices (210), (220), (230), and (240), processing circuitry performing the functions of a video encoder (303), processing circuitry performing the functions of a video decoder (310), processing circuitry performing the functions of a video decoder (410), processing circuitry performing the functions of a video encoder (503), etc. In some embodiments, the process (2100) is implemented within software instructions, and thus the processing circuitry performs the process (2100) as the processing circuitry executes the software instructions. The process begins at (S2101) and proceeds to (S2110).

[0164] At (S2110), coding information for the current picture may be decoded from the coded video bitstream. The coding information may indicate that the geometric merge mode is enabled at the sequence level, that a PPS level parameter in a picture parameter set (PPS) is 0, and a maximum number of merge candidates. The PPS level parameter may indicate the maximum number of geometric merge mode merge candidates. In one example, the geometric merge mode is TPM, and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates.

[0165] At (S2120), the picture level parameters signaled for the current picture in the coded video bitstream may be decoded when the maximum number of merge candidates satisfies a condition. The picture level parameters may indicate a maximum number of geometric merge mode merge candidates. The geometric merge mode may be triangular partition mode (TPM), and the maximum number of geometric merge mode merge candidates is the maximum number of TPM merge candidates. The condition may be one of (i) the maximum number of merge candidates is greater than 2, and (ii) the maximum number of merge candidates is greater than or equal to 3. The process (2100) proceeds to (S2199) and ends.

[0166] The process (2100) may be adapted as appropriate. Steps of the process (2100) may be modified and / or omitted. Further steps may be added. Any suitable order of execution may be used. For example, when the maximum number of merging candidates does not satisfy a condition, the picture level parameters are not decoded.

[0167] The embodiments of the present disclosure may be used separately or combined in any order. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored on a non-transitory computer-readable medium.

[0168] The techniques described above can be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, FIG. 22 illustrates a computer system (2200) suitable for implementing some embodiments of the disclosed subject matter.

[0169] The computer software may be coded using any suitable machine or computer language that can be assembled, compiled, linked, or similar mechanisms to produce code including instructions that can be executed directly, or via interpretation, microcode execution, etc., by one or more computer central processing units (CPUs), graphics processing units (GPUs), etc.

[0170] The instructions may be executed on various types of computers or components thereof including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, Internet of Things devices, and the like.

[0171] 22 for the computer system (2200) are exemplary in nature and are not intended to suggest any limitations as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure. The arrangement of components should not be interpreted as having any dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of the computer system (2200).

[0172] The computer system (2200) may include certain human interface input devices. Such human interface input devices may respond to input by one or more human users, for example, via tactile input (such as keystrokes, swipes, data glove movements), audio input (such as voice, clapping), visual input (such as gestures), or olfactory input (not depicted). Human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (such as voice, music, ambient sounds), images (such as scanned images, photographic images obtained from a still camera), and video (such as two-dimensional video, three-dimensional video including stereoscopic video).

[0173] The input human interface devices may include one or more of a keyboard (2201), a mouse (2202), a trackpad (2203), a touch screen (2210), a data glove (not shown), a joystick (2205), a microphone (2206), a scanner (2207), and a camera (2208) (only one of each is depicted).

[0174] The computer system (2200) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the human user's senses, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen (2210), data gloves (not shown), or joystick (2205), although there may be haptic feedback devices that do not function as input devices), audio output devices (such as speakers (2209), headphones (not depicted)), visual output devices (such as screens (2210), including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capability, each with or without haptic feedback capability, some of which may be capable of outputting two-dimensional visual output or three or more dimensional output via means such as stereographic output, virtual reality glasses (not depicted), holographic displays, and smoke tanks (not depicted)), and printers (not depicted).

[0175] The computer system (2200) may also include human accessible storage devices and their associated media, such as optical media, including CD / DVD ROM / RW (2220) with CD / DVD or similar media (2221), thumb drives (2222), removable hard drives or solid state drives (2223), legacy magnetic media such as tapes and floppy disks (not depicted), and specialized ROM / ASIC / PLD based devices (not depicted) such as security dongles.

[0176] Those skilled in the art should also understand that the term "computer-readable medium" as used in connection with the presently disclosed subject matter does not encompass transmission media, carrier waves, or other transitory signals.

[0177] The computer system (2200) may also include an interface to one or more communication networks. The network may be, for example, wireless, wired, optical. The network may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include local area networks such as Ethernet, wireless LAN, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., TV wired or wireless wide area digital networks including cable TV, satellite TV, and terrestrial broadcast TV, vehicular and industrial including CANBus, etc. Certain networks typically require an external network interface adapter attached to a specific general-purpose data port (e.g., a USB port of the computer system (2200)) or peripheral bus (2249), while other networks are typically integrated into the core of the computer system (2200) by attaching to a system bus described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (2200) can communicate with other entities. Such communications may be one-way receive only (e.g., broadcast TV), one-way transmit only (e.g., CANbus to a specific CANbus device), or bidirectional, for example with other computer systems using local or wide area digital networks. Specific protocols and protocol stacks may be used with each of these networks and network interfaces described above.

[0178] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be attached to the core (2240) of the computer system (2200).

[0179] The cores (2240) may include specialized programmable processing devices in the form of one or more central processing units (CPUs) (2241), graphics processing units (GPUs) (2242), field programmable gate areas (FPGAs) (2243), hardware accelerators for specific tasks (2244), etc. These devices may be connected via a system bus (2248) along with internal mass storage (2247) such as read only memory (ROM) (2245), random access memory (2246), internal non-user accessible hard drives, SSDs, etc. In some computer systems, the system bus (2248) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripherals may be attached directly to the core's system bus (2248) or via a peripheral bus (2249). Architectures for peripheral buses include PCI, USB, etc.

[0180] The CPU (2241), GPU (2242), FPGA (2243), and accelerator (2244) may combine to execute certain instructions that may constitute the aforementioned computer code. That computer code may be stored in ROM (2245) or RAM (2246). Persistent data may be stored, for example, in internal mass storage (2247), while transitory data may also be stored in RAM (2246). Rapid storage and retrieval from any of the memory devices may be enabled using cache memories that may be closely associated with one or more of the CPU (2241), GPU (2242), mass storage (2247), ROM (2245), RAM (2246), etc.

[0181] The computer-readable medium can have computer code thereon for performing various computer-implemented operations. The medium and computer code can be those specially designed and constructed for the purposes of the present disclosure, or they can be of the kind well known and available to those skilled in the computer software arts.

[0182] By way of example, and not by way of limitation, a computer system (2200) having an architecture, and specifically a core (2240), can provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media can be the user-accessible mass storage introduced above, as well as media associated with a particular storage device of the core (2240) that is of a non-transitory nature, such as a core internal mass storage (2247) or a ROM (2245). Software implementing various embodiments of the present disclosure can be stored in such devices and executed by the core (2240). The computer-readable media can include one or more memory devices or chips, depending on the particular needs. The software can cause the core (2240), and specifically the processor therein (including a CPU, GPU, FPGA, etc.) to perform certain processes or certain portions of certain processes described herein, including defining data structures stored in RAM (2246) and modifying such data structures according to the software-defined processes. Additionally, or alternatively, the computer system may provide functionality as a result of logic hardwired or otherwise embodied in circuitry (e.g., accelerator (2244)) that may operate in place of or together with software to perform certain processes or certain portions of certain processes described herein. Where appropriate, references to software may encompass logic, and vice versa. Where appropriate, references to computer-readable media may encompass circuitry (such as integrated circuits (ICs)) that store software for execution, circuitry that embodies logic for execution, or both. The present disclosure encompasses any suitable combination of hardware and software. Appendix A: Acronyms JEM: Joint Exploration Model VVC: Versatile Video Coding BMS: Benchmark Set MV: Motion Vector HEVC: High Efficiency Video Coding SEI: Supplemental Extended Information VUI: Video Usability Information GOP: Group of Pictures TU: conversion unit, PU: Prediction Unit CTU: Coding Tree Unit CTB: coding tree block PB: Predicted block HRD: Hypothetical Reference Decoder SNR: Signal to Noise Ratio CPU: Central Processing Unit GPU: Graphics Processing Unit CRT: cathode ray tube LCD: Liquid crystal display OLED: Organic Light Emitting Diode CD:Compact Disc DVD: Digital Video Disc ROM: Read-only memory RAM: Random Access Memory ASIC: Application Specific Integrated Circuit PLD: Programmable Logic Device LAN: Local Area Network GSM: Global System for Mobile Communications LTE: Long Term Evolution CANBus: Controller Area Network Bus USB: Universal Serial Bus PCI: Peripheral Component Interconnect FPGA: Field Programmable Gate Area SSD: Solid State Drive IC: Integrated Circuit CU: coding unit

[0183] While this disclosure describes several exemplary embodiments, there are alterations, substitutions, and various alternative equivalents that are within the scope of this disclosure. It will thus be appreciated that those skilled in the art will be able to devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within its spirit and scope. [Explanation of symbols]

[0184] 101 Current Block 102 Ambient Samples 103 Ambient Samples 104 Ambient Samples 105 Ambient Samples 106 Ambient Samples 200 Communication Systems 210 Terminal Devices 220 Terminal Devices 230 Terminal Devices 240 Terminal Devices 250 Network 300 Communication Systems 301 Video Source 302 Video Picture Stream 303 Video Encoder 304 Encoded Video Data / Encoded Video Bitstream 305 Streaming Server 306 Client Subsystem 307 Copying video data 308 Client Subsystem 309 Copying video data 310 Video Decoder 311 Video Picture Output Stream 312 Display 313 Capture Subsystem 320 Electronic Devices 330 Electronic Devices 401 Channel 410 Video Decoder 412 Rendering Device 415 Buffer Memory 420 Parser 421 Symbols 430 Electronic Devices 431 Receiver 451 Scaler / Descaler Unit 452 Intra-picture Prediction Unit 453 Motion Compensation Prediction Unit 455 Aggregator 456 Loop Filter Unit 457 Reference Picture Memory 458 Current Picture Buffer 501 Video Sources 503 Video Encoder 520 Electronic Devices 530 Source Coder 532 Coding Engine 533 Local Decoder 534 Reference Picture Memory 535 Predictor 540 Transmitter 543 Video Sequences 545 Entropy Coder 550 Controller 560 Communication Channels 603 Video Encoder 621 General-purpose controller 622 Intra Encoder 623 Residual Calculator 624 Residual Encoder 625 Entropy Encoder 626 Switch 628 Residual Decoder 630 InterEncoder 710 Video Decoder 771 Entropy Decoder 772 Intra Decoder 773 Residual Decoder 774 Recovery Module 780 Inter Decoder 800 CU 810 Line 811 Category 1 812 Category 2 820 Line 821 Category 1 822 Category 2 900 CU 910 Line or Edge 2200 Computer System 2201 Keyboard 2202 Mouse 2203 Trackpad 2205 Joystick 2206 Microphone 2207 Scanner 2208 Camera 2209 Speaker 2210 Touch Screen 2220 CD / DVD ROM / RW 2221 CD / DVD or similar media 2222 Thumb Drive 2223 Removable Hard Drive or Solid State Drive 2240 cores 2241 Central Processing Unit (CPU) 2242 Graphics Processing Unit (GPU) 2243 Field Programmable Gate Area (FPGA) 2244 Hardware Accelerator 2245 Read-only memory (ROM) 2246 Random Access Memory (RAM) 2247 Internal mass storage 2248 System Bus 2249 Surrounding bus

[0185] [Appendix 1] 1. A method for video decoding in a decoder, comprising: decoding coding information for a current picture from a coded video bitstream, the coding information indicating that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates is satisfied; determining, based on picture level parameters signaled for the current picture in the coded video bitstream, a maximum number of geometric merge mode merge candidates based on the picture level parameters and the maximum number of merge candidates, the maximum number of geometric merge mode merge candidates being one of: (i) 0; or (ii) from 2 to the maximum number of merge candidates, and the picture level parameters indicating the maximum number of geometric merge mode merge candidates; Including, the geometric merge mode is disabled for the current picture based on the maximum number of geometric merge mode merge candidates being zero; The method of claim 1, wherein the geometric merge mode is enabled for the current picture based on the maximum number of geometric merge mode merge candidates being non-zero. [Appendix 2] 2. The method of claim 1, wherein the geometric merge mode is a triangular partitioning mode (TPM) and the maximum number of geometric merge mode merge candidates is a maximum number of TPM merge candidates. [Appendix 3] The method according to Appendix 2, wherein the coding level is a sequence level. [Appendix 4] 3. The method of Appendix 2, wherein the condition is that the maximum number of merging candidates is greater than or equal to two. [Appendix 5] the condition being that the maximum number of merging candidates is greater than or equal to two; 4. The method of claim 3, wherein the step of determining the maximum number of geometric merge mode merge candidates comprises determining the maximum number of TPM merge candidates by subtracting the picture level parameter from the maximum number of merge candidates. [Appendix 6] a picture parameter set (PPS) level parameter indicating the maximum number of TPM merging candidates is signaled within the coded video bitstream for a PPS associated with the current picture; 6. The method of claim 5, wherein the PPS level parameter is one of: (i) 0 to (the maximum number of merging candidates - 1); or (ii) (the maximum number of merging candidates + 1). [Appendix 7] 6. The method of claim 5, wherein a picture parameter set (PPS) level parameter indicating the maximum number of TPM merging candidates is not signaled within the coded video bitstream for a PPS associated with the current picture. [Appendix 8] the coded video bitstream includes a picture header for the current picture; 8. The method of claim 7, wherein the picture level parameters are signaled in the picture header based on the TPM being enabled for the sequence level and the maximum number of merging candidates being greater than or equal to two, and the signaling of the picture level parameters is independent of the PPS level parameters. [Appendix 9] the coded video bitstream includes a picture parameter set (PPS) associated with the current picture; 6. The method of claim 5, wherein a PPS level parameter indicating the maximum number of TPM merging candidates is signaled within the PPS based at least on a PPS level flag indicating that the PPS level parameter should be signaled. [Appendix 10] the coded video bitstream includes a picture header for the current picture; 10. The method of claim 9, wherein the picture level parameters are signaled in the picture header based on the PPS level flag indicating that the TPM is enabled for the sequence level, the maximum number of merging candidates is greater than or equal to 2, and that the PPS level parameters should not be signaled. [Appendix 11] the coded video bitstream includes a picture parameter set (PPS) associated with the current picture; 6. The method of claim 5, wherein a PPS level parameter indicating the maximum number of TPM merge candidates is signaled within the PPS based at least on the TPM being enabled for the sequence level. [Appendix 12] 1. A method for video decoding in a decoder, comprising: decoding coding information for a current picture from a coded video bitstream, the coding information indicating that geometric merge mode is enabled at a sequence level, a PPS level parameter in a picture parameter set (PPS) is 0, and a maximum number of merge candidates, the PPS level parameter indicating a maximum number of geometric merge mode merge candidates; decoding a picture level parameter signaled for the current picture in the coded video bitstream based on the maximum number of satisfying merge candidates, the picture level parameter indicating the maximum number of geometric merge mode merge candidates; A method comprising: [Appendix 13] 13. The method of claim 12, wherein the geometric merge mode is triangular partition mode (TPM) and the maximum number of geometric merge mode merge candidates is a maximum number of TPM merge candidates. [Appendix 14] 14. The method of Appendix 13, wherein the condition is one of: (i) the maximum number of merging candidates is greater than two; and (ii) the maximum number of merging candidates is greater than or equal to three. [Appendix 15] the maximum number of merging candidates is two, the condition is not satisfied, and the picture level parameters are not signaled in the coded video bitstream; 15. The method of claim 14, further comprising determining that the maximum number of TPM merge candidates is two. [Appendix 16] 1. An apparatus for video decoding, comprising: a processing circuit configured to decode coding information for a current picture from a coded video bitstream, the coding information indicating that a geometric merge mode is enabled for a coding level higher than a picture level of the current picture and a maximum number of merge candidates satisfies a condition; the processing circuitry is configured to determine, based on picture level parameters signaled for the current picture in the coded video bitstream, a maximum number of geometric merge mode merge candidates based on the picture level parameters and the maximum number of merge candidates, the maximum number of geometric merge mode merge candidates being one of: (i) 0; or (ii) from 2 to the maximum number of merge candidates, and the picture level parameters indicate the maximum number of geometric merge mode merge candidates; the geometric merge mode is disabled for the current picture based on the maximum number of geometric merge mode merge candidates being zero; The apparatus, wherein the geometric merge mode is enabled for the current picture based on the maximum number of geometric merge mode merge candidates being non-zero. [Appendix 17] 17. The apparatus of Appendix 16, wherein the geometric merge mode is triangular partition mode (TPM) and the maximum number of geometric merge mode merge candidates is a maximum number of TPM merge candidates. [Appendix 18] Apparatus according to Appendix 17, wherein the coding level is a sequence level. [Appendix 19] 18. The apparatus of Appendix 17, wherein the condition is that the maximum number of merging candidates is greater than or equal to two. [Appendix 20] the condition being that the maximum number of merging candidates is greater than or equal to two; 20. The apparatus of Appendix 18, wherein the processing circuitry is configured to determine the maximum number of TPM merging candidates by subtracting the picture level parameter from the maximum number of merging candidates.

Claims

1. 1. A method for video encoding in an encoder, comprising: determining a maximum number of geometric merge mode merge candidates; generating a picture level parameter indicative of a difference between the maximum number of geometric merge mode merge candidates and a maximum number of merge candidates; generating a coded video bitstream including a picture header and coding information for a current picture, the picture header including the picture level parameters and the coding information indicating that a geometric merge mode is enabled for a sequence level and that the maximum number of merge candidates satisfies a condition; Including, the coded video bitstream includes a Picture Parameter Set (PPS) associated with the current picture; A method according to claim 1, wherein a PPS level parameter indicating a maximum number of the geometric merge mode merge candidates is signaled in the PPS based at least on the geometric merge mode being enabled for the sequence level.

2. 2. The method of claim 1, wherein the geometric merge mode is a triangular partitioning mode (TPM) and the maximum number of geometric merge mode merge candidates is a maximum number of TPM merge candidates.

3. The method of claim 1 , wherein the condition is that the maximum number of merging candidates is greater than or equal to two.

4. The method of claim 1, wherein the PPS level parameter is (i) a number within a range defined by 0 and (the maximum number of merging candidates - 1), or (ii) (the maximum number of merging candidates + 1).

5. 1. An apparatus for video encoding, comprising:

5. Apparatus comprising processing circuitry configured to carry out the method of any one of claims 1 to 4.

6. A program causing one or more processors to carry out the method according to any one of claims 1 to 4.

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