Wireless Receiver

By integrating a GPIO and crystal oscillator to generate a harmonic clock signal, the wireless ICs achieve precise calibration of image interference wave removal circuits, addressing the challenge of reduced radiation interference.

JP7607533B2Active Publication Date: 2024-12-27NOHMI BOSAI LTD
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
JP2021125956
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-07-30
Publication Date
2024-12-27
Estimated Expiration
2041-07-30

AI Technical Summary

Technical Problem

Existing wireless ICs face challenges in accurately calibrating image interference wave removal circuits due to reduced radiation interference from external crystal oscillators, leading to ineffective image interference cancellation.

Method used

Incorporating a GPIO and a crystal oscillator to output a clock signal with the same harmonic frequency as the image interference wave, using radiation interference to calibrate the image interference wave removal circuit.

Benefits of technology

Improves the accuracy of image interference wave removal circuit calibration by enhancing radiation interference, ensuring effective cancellation of interference waves.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007607533000001
    Figure 0007607533000001
  • Figure 0007607533000002
    Figure 0007607533000002
  • Figure 0007607533000003
    Figure 0007607533000003
Patent Text Reader

Abstract

To improve the accuracy of calibration of an image disturbance wave removing circuit.SOLUTION: A wireless receiver 1 comprises a wireless IC 2 and a crystal oscillator 4. The wireless IC 2 comprises: an image disturbance wave removing circuit 7 for removing an image disturbance wave from a signal received at an antenna 3; and a GPIO (general-purpose input / output) 6. The crystal oscillator 4 outputs to the GPIO 6 a clock signal having the same high harmonic wave frequency as the image disturbance wave and calibrates the image disturbance wave removing circuit 7 by radiation interference of the clock signal.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to radio receivers. [Background technology]

[0002] Conventionally, an image interference wave removal circuit is known as a circuit for removing image interference waves in wireless communication (see, for example, Patent Document 1). In order to calibrate this image interference wave removal circuit, it is necessary to apply a signal with the same harmonic frequency as the image interference wave. Therefore, for example, in a wireless IC equipped with an image interference wave removal circuit and a crystal oscillator, the receiving frequency is adjusted so that the harmonic of the crystal oscillator becomes the same as the image interference wave, and the interference due to radiation interference from the crystal oscillator is applied as a signal. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2010-154501 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, when the crystal oscillator within the radio IC is not used and the clock signal is supplied to the radio IC from a crystal oscillator in a separate IC, or depending on the board pattern used, the radiation interference from the crystal oscillator may be small and the image interference cancellation circuit may not be able to be properly calibrated.

[0005] The present invention has been made in view of the above circumstances, and has an object to improve the accuracy of calibration of an image interference wave removal circuit. [Means for solving the problem]

[0006] In order to solve the above problems, the wireless receiver of the present invention comprises an image interference wave removal circuit for removing image interference waves from a signal received by an antenna, a wireless IC equipped with a GPIO (general-purpose input / output), and a crystal oscillator for outputting a clock signal of the same harmonic frequency as the image interference wave to the GPIO and calibrating the image interference wave removal circuit by radiation interference of the clock signal. Effect of the Invention

[0007] According to the present invention, it is possible to improve the accuracy of calibration of an image interference wave removal circuit. [Brief description of the drawings]

[0008] [Figure 1] A diagram showing the configuration of a wireless receiver 1. [Diagram 2] FIG. 1 shows a path through which clock harmonics enter the image interference wave removal circuit 7. [Diagram 3] A diagram showing an example of the pin arrangement of a typical wireless IC2 [Figure 4] A diagram showing the configuration of a wireless receiver 1A. [Diagram 5] FIG. 1 shows the configuration of a wireless receiver 1B. [Figure 6] A diagram showing the configuration of a wireless receiver 1C. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] 1. Embodiment A wireless receiver 1 according to an embodiment of the present invention will be described. The wireless receiver 1 described here is, for example, a wireless fire detector, a wireless flashlight (an alarm device for notifying the hearing impaired of the occurrence of a fire), or a wireless repeater.

[0010] 1 is a diagram showing the configuration of a wireless receiver 1. As shown in the diagram, the wireless receiver 1 includes a wireless IC 2, and an antenna 3 and a crystal oscillator 4 connected to the wireless IC 2.

[0011] Of these components, the wireless IC 2 is equipped with a wireless receiving circuit 5 and a general-purpose input / output (GPIO) 6. The wireless receiving circuit 5 is a circuit for extracting desired information from a signal received by the antenna 3. This wireless receiving circuit 5 is equipped with an image interference wave elimination circuit 7 in order to eliminate image interference waves from the received signal. This image interference wave elimination circuit 7 adjusts the gain and phase to generate an image dummy signal, and cancels it from the received signal, thereby eliminating image interference waves.

[0012] Calibration is required for the image interference wave cancellation circuit 7 to operate normally. When performing calibration, a signal with the same harmonic frequency as the image interference wave is applied to the image interference wave cancellation circuit 7. This type of calibration is performed before the wireless receiver 1 performs a receiving operation. Specifically, it is performed before performing carrier sense, when the power is turned on, or when the device is shipped from the factory.

[0013] Next, the GPIO6 will be described. The GPIO6 is a general-purpose terminal for outputting signals to an external device and inputting signals from an external device. Each terminal of the GPIO6 is not previously differentiated as an output or input terminal, and its use can be set using software. The GPIO6 includes a selection circuit 8, an output buffer 9, a parasitic capacitance 10, and a GPIO output terminal 11. In the description of this embodiment, the description of the input circuit of the GPIO6 will be omitted.

[0014] Among the components of the GPIO 6, the selection circuit 8 is a circuit for selecting a signal to be output to the output buffer 9. The selection in this selection circuit 8 is controlled by software.

[0015] A clock signal is input from the crystal oscillator 4 to this selection circuit 8 as one of the input signals. This clock signal is a signal with the same harmonic frequency as the image interference wave. This clock signal is output to the output buffer 9 when calibrating the image interference wave removal circuit 7 due to radiation interference. The crystal oscillator 4 that inputs the clock signal to this selection circuit 8 is mounted on an IC different from the wireless IC 2. Specifically, it is mounted on, for example, a crystal oscillator IC.

[0016] Next, a description will be given of the output buffer 9. The output buffer 9 is a component for outputting the signal input from the selection circuit 8 to the GPIO output terminal 11. Specifically, it is a CMOS inverter circuit.

[0017] When a clock signal is input to this output buffer 9, a current flows in and out of the output buffer 9 to the GPIO output terminal 11. In other words, the output of the output buffer 9 fluctuates. At that time, because the parasitic capacitance 10 of the output buffer 9 and GPIO 6 is connected to the power supply voltage line and ground as shown in Figure 1, the potential of the power supply voltage line and ground fluctuates.

[0018] As shown in Fig. 1, the power supply voltage line and ground are also connected to the image interference wave cancellation circuit 7. Therefore, fluctuations in the potential of the power supply voltage line and ground also affect the image interference wave cancellation circuit 7. Specifically, a signal is applied to the image interference wave cancellation circuit 7 through the fluctuations in the potential of the power supply voltage line and ground. By making the signal applied at this time a signal with the same harmonic frequency as the image interference wave, the image interference wave cancellation circuit 7 can be calibrated.

[0019] 2 is a diagram showing the path that clock harmonics take in the image interference wave cancellation circuit 7. In the figure, the path that the clock harmonics take in is indicated by dashed arrows. As shown in the figure, in wireless receiver 1, harmonics of the clock signal of crystal oscillator 4 take in the image interference wave cancellation circuit 7 via the power supply voltage line and ground. The above is a description of the configuration of the wireless receiver 1.

[0020] In the wireless receiver 1 described above, a clock signal is input to the GPIO 6 in order to calibrate the image interference wave cancellation circuit 7. Here, the terminal of the GPIO 6 to which the clock signal is input is often arranged near the receiving terminal (in other words, the differential input terminal) in the wireless IC 2. FIG. 3 is a diagram showing an example of a pin arrangement of a general wireless IC 2. In the wireless IC 2 shown in the figure, the terminal T1 and the receiving terminal T2 of the GPIO 6 are arranged in close proximity. Therefore, by inputting a clock signal to the GPIO 6, it is possible to increase the radiation interference from the crystal oscillator 4 to the image interference wave cancellation circuit 7. As a result, it is possible to improve the accuracy of calibration of the image interference wave cancellation circuit 7 compared to the case where a clock signal is not input to the GPIO 6.

[0021] 2. Variations The above embodiment may be modified as follows. The following modifications may be combined with each other.

[0022] 2-1. Variation 1 In order to further increase the radiation interference from the crystal oscillator 4 to the image interference removal circuit 7, the GPIO output terminal 11 may be connected to the power supply voltage line. Fig. 4 is a diagram showing the configuration of a wireless receiver 1A with this modification added. As shown in the figure, in the wireless receiver 1A, the GPIO output terminal 11 is connected to the power supply voltage line via a passive element 12. Note that the passive element 12 referred to here is a resistor, a coil, a capacitor, or a combination of two or more of these.

[0023] A clock signal is input from the output buffer 9 to the GPIO output terminal 11 of the wireless receiver 1A. When the clock signal is input to the GPIO output terminal 11, the output of the GPIO output terminal 11 fluctuates. At that time, because the GPIO output terminal 11 is connected to the power supply voltage line, the potential of the power supply voltage line fluctuates. As a result, harmonics of the clock signal jump into the image interference wave removal circuit 7 through the fluctuation in the potential of the power supply voltage line (see the dashed-dotted arrow in FIG. 4).

[0024] In this way, in the wireless receiver 1A, the potential of the power supply voltage line connected to the GPIO output terminal 11 can be fluctuated by outputting a clock signal from the GPIO output terminal 11. Therefore, compared to the above embodiment, the radiation interference from the crystal oscillator 4 to the image interference wave removal circuit 7 can be further increased.

[0025] 2-2. Variation 2 In the first modification, the GPIO output terminal 11 is connected to the power supply voltage line, but instead, the GPIO output terminal 11 may be connected to ground. Fig. 5 is a diagram showing the configuration of a wireless receiver 1B to which this modification has been applied. As shown in the figure, in the wireless receiver 1B, the GPIO output terminal 11 is connected to ground via a passive element 12.

[0026] A clock signal is input from the output buffer 9 to the GPIO output terminal 11 of this wireless receiver 1B. When a clock signal is input to the GPIO output terminal 11, the output of the GPIO output terminal 11 fluctuates. At that time, because this GPIO output terminal 11 is connected to ground, the ground potential fluctuates. As a result, harmonics of the clock signal jump into the image interference wave removal circuit 7 through this fluctuation in the ground potential (see the dashed-dotted arrow in FIG. 5).

[0027] In this way, in the wireless receiver 1B, the potential of the ground connected to the GPIO output terminal 11 can be fluctuated by outputting a clock signal from the GPIO output terminal 11. Therefore, compared to the above embodiment, the radiation interference from the crystal oscillator 4 to the image interference wave removal circuit 7 can be further increased.

[0028] 2-3. Variation 3 In the second modification, the GPIO output terminal 11 is connected to ground, but instead, the GPIO output terminal 11 may be connected to the antenna 3. Fig. 6 is a diagram showing the configuration of a wireless receiver 1C to which this modification has been applied. As shown in the figure, in the wireless receiver 1C, the GPIO output terminal 11 is connected to the input of the antenna 3 via a passive element 12.

[0029] A clock signal is input from the output buffer 9 to the GPIO output terminal 11 of this wireless receiver 1C. When the clock signal is input to the GPIO output terminal 11, the input clock signal is input to the image interference wave cancellation circuit 7 via the antenna 3. That is, harmonics of the clock signal jump into the image interference wave cancellation circuit 7 (see the dashed-dotted arrow in FIG. 6).

[0030] In this way, in the wireless receiver 1C, a clock signal is directly input to the image interference wave cancellation circuit 7 from the GPIO output terminal 11. Therefore, compared to the above embodiment, it is possible to further increase the radiation interference from the crystal oscillator 4 to the image interference wave cancellation circuit 7.

[0031] 2-4. Variation 4 The crystal oscillator 4 of the wireless receiver 1 is mounted on an IC different from the wireless IC 2. However, instead of this, the crystal oscillator 4 may be mounted on the wireless IC 2. [Explanation of symbols]

[0032] 1...wireless receiver 1, 1A, 1B, 1C, 2...wireless IC, 3...antenna, 4...crystal oscillator, 5...wireless receiving circuit, 6...GPIO, 7...image interference wave elimination circuit, 8...selection circuit, 9...output buffer, 10...parasitic capacitance, 11...GPIO output terminal, 12...passive element

Claims

1. an image interference wave rejection circuit for rejecting an image interference wave from a signal received by an antenna; GPIO (general-purpose input / output) A wireless IC equipped with a crystal oscillator for outputting a clock signal having the same harmonic frequency as the image interference wave to the GPIO and calibrating the image interference wave elimination circuit by radiation interference of the clock signal; A radio receiver comprising:

2. 2. The wireless receiver according to claim 1, further comprising an IC, different from the wireless IC, on which the crystal oscillator is mounted.

3. 3. The wireless receiver according to claim 1, wherein an output terminal of the GPIO is connected to an input terminal of the antenna by a wire.

4. 3. The wireless receiver according to claim 1, wherein the GPIO and the image interference wave rejection circuit are both connected to a power supply voltage line or a ground.

5. 5. The radio receiver according to claim 1, wherein the calibration is performed before a receiving operation is performed by the radio receiver.

Citation Information

Patent Citations

  • receiver

    JP2007104522A

  • Tuner module

    JP2010154501A

  • FM-am demodulator, radio receiver, electronic device, and image correction adjustment method

    JP2010183347A

  • Receiver

    JP2014171058A

  • Receiver

    US20070080835A1