3-level inverter control device, program, and 3-level inverter control method

Abstract

To provide a control device of a 3-level inverter capable of enhancing the controllability of voltage of a neutral point.SOLUTION: A control device 40 is applied to a system including a first capacitor 21 and a second capacitor 22, a 3 phase rotating electric machine 10, and an inverter 30. The control device 40 includes an acquisition part for acquiring neutral point information and a command voltage vector, a setting part for setting an output pattern on the basis of the command voltage vector, and a control part for turning on / off respective switches SUH to SWL, QU to QW on the basis of an output voltage vector included in the output pattern. The control part selects either one between two drive states on the basis of the neutral point information in the case of outputting a first output voltage vector in which the two drive states exist to the same output voltage vector. The setting part restricts a second output voltage vector to be a drive state in which a neutral point O and one phase of a rotary electric machine 10 are connected to be included in the output pattern.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a control device for a three-level inverter. 、 program , and a control method for a three-level inverter Regarding. [Background technology]

[0002] Conventionally, there is known a control device that turns on and off a switch of a three-level inverter, as described in Patent Document 1. This control device turns on and off the switch by space vector modulation control.

[0003] A first power storage unit and a second power storage unit that are connected in series are connected to the DC side of the three-level inverter. The control device controls the voltage of the neutral point between the negative electrode side of the first power storage unit and the positive electrode side of the second power storage unit, thereby suppressing application of an overvoltage to the switch. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 9-37592 Summary of the Invention [Problem to be solved by the invention]

[0005] Depending on the driving conditions of the three-level inverter, there is a concern that the controllability of the neutral point voltage may decrease. Therefore, there is still room for improvement in the technology for controlling the neutral point voltage.

[0006] The present invention has been made in consideration of the above circumstances, and provides a control device for a three-level inverter capable of improving controllability of a neutral point voltage. , program, and method for controlling three-level inverter - Patents.com The purpose is to provide. [Means for solving the problem]

[0007] The present invention relates to a storage battery comprising a first power storage unit and a second power storage unit connected in series, A drive target that is driven by application of a three-phase AC voltage; a three-level inverter having three-phase switches connecting each phase of the driven object to any of a positive electrode side of the first power storage unit, a neutral point between the negative electrode side of the first power storage unit and the positive electrode side of the second power storage unit, and a negative electrode side of the second power storage unit, a neutral point information acquiring unit that acquires neutral point information, which is information on at least one of the voltages of the first and second power storage units and the currents flowing through each phase of the drive target; a command voltage acquisition unit that acquires a command voltage vector for controlling a control amount of the driven object to a command value; A setting unit that sets an output pattern, which is a combination of output voltage vectors that can be output by the three-level inverter, based on the command voltage vector; a control unit that turns on and off the switch based on the output voltage vector included in the output pattern, a drive state of the switch is a drive state that connects any one or two of the phases to be driven and the neutral point, and the output voltage vector for which there are two different drive states of the switch for the same output voltage vector is defined as a first output voltage vector; a drive state of the switch is a drive state in which any one of the phases to be driven and the neutral point are connected, and the output voltage vector having a magnitude larger than that of the first output voltage vector is set as a second output voltage vector; the control unit, when the first output voltage vector is output, selects one of the drive states of the two switches based on the neutral point information; The setting unit restricts the second output voltage vector from being included in the output pattern.

[0008] In a drive state of the switch in which at least one of the phases of the driven object is connected to the neutral point, the voltage of the neutral point may change due to current flowing into or out of the neutral point. During a period in which the first output voltage vector is output, any one or two of the phases of the driven object are connected to the neutral point. Therefore, during a period in which the first output voltage vector is output, the voltage of the neutral point may change.

[0009] In this regard, the first output voltage vector has two drive states for each switch in which the same voltage is applied to each phase to be driven. Since the direction of change in the neutral point voltage is opposite depending on which of the two switch drive states is selected, it is possible to select one of the two drive states based on neutral point information, which is the neutral point voltage or the current flowing through the neutral point. In this case, the drive states of the switches are appropriately selected based on the neutral point information so that the change in the neutral point voltage is suppressed during the output period of the first output voltage vector, thereby controlling the neutral point voltage.

[0010] However, when the magnitude of the command voltage vector is large, the period during which the first output voltage vector is output may be shorter than when the magnitude of the command voltage vector is small, and the period during which the second output voltage vector, which is larger than the magnitude of the first output voltage vector, may be longer. During the output period of the second output voltage vector, the switch is driven so that any one phase of the drive target is connected to the neutral point. In this case, there is a concern that the controllability of the voltage at the neutral point may be reduced.

[0011] Therefore, in the present invention, when an output pattern, which is a combination of output voltage vectors, is set based on a command voltage vector, the second output voltage vector is restricted from being included in the output pattern. This suppresses the occurrence of a period in which the second output voltage vector is output. Also, in a period in which the first output voltage vector is output, one of two driving states is selected based on neutral point information. This allows the voltage of the neutral point to be controlled in a period in which the first output voltage vector is output. Therefore, it is possible to suppress a change in the voltage of the neutral point in a period in which the first output voltage vector and the second output voltage vector are output. In other words, according to the present invention, measures can be taken to suppress a change in the voltage of the neutral point for an output period in which the first output voltage vector and the second output voltage vector are output, in which there is a concern that the voltage of the neutral point may change. As a result, it is possible to improve the controllability of the voltage of the neutral point. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a configuration diagram of a motor control system. [Diagram 2] FIG. 4 is a diagram used to explain a command voltage vector. [Diagram 3] FIG. 4 is a diagram used to explain a command voltage vector. [Figure 4] FIG. 2 is a diagram showing a current path during a period in which an output voltage vector HMM is output. [Diagram 5] FIG. 2 is a diagram showing a current path during a period in which an output voltage vector MLL is output. [Figure 6] FIG. 13 is a diagram showing divided regions of limit control. [Figure 7] FIG. 4 is a diagram showing a method for setting an output pattern. [Figure 8] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 9] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 10] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 11] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 12] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 13] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 14] 4 is a flowchart showing a control procedure performed by the control device. [Figure 15] 10 is a flowchart showing a control procedure performed by a control device according to a second embodiment. [Figure 16] 5 is a time chart showing an example of a transition of each phase voltage during limit control. [Figure 17] 5 is a time chart showing an example of a transition of each phase voltage during limit control. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] First Embodiment DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a control device according to the present invention will now be described with reference to the drawings. In this embodiment, the control device is mounted on an electric vehicle.

[0014] As shown in FIG. 1, the motor control system includes a rotating electric machine 10, a battery 20, an inverter 30, and a control device 40. The rotating electric machine 10 is an in-vehicle main engine and is capable of transmitting power to driving wheels (not shown). In this embodiment, the rotating electric machine 10 is a three-phase synchronous machine and includes a U-phase winding 11U, a V-phase winding 11V, and a W-phase winding 11W that are star-connected as stator windings. The phase windings 11U, 11V, and 11W are arranged with an electrical angle of 120° each. The rotating electric machine 10 is, for example, a permanent magnet synchronous machine. In this embodiment, the rotating electric machine 10 corresponds to a "drive target."

[0015] The battery 20 is electrically connected to the rotating electric machine 10 via the inverter 30. In this embodiment, the battery 20 is, for example, a battery pack configured as a series connection of battery cells serving as single cells. As the battery cells, for example, secondary batteries such as lithium ion batteries can be used. The inter-terminal voltage VH of the battery 20 is, for example, 100 V or more.

[0016] The inverter 30 is a power conversion circuit that converts DC power supplied from the battery 20 into three-phase AC power by switching operation and supplies the converted AC power to the rotating electric machine 10. A first capacitor 21 and a second capacitor 22 are provided on the battery 20 side of the inverter 30 as a power storage unit. The first capacitor 21 and the second capacitor 22 are connected in series. The battery 20 is connected in parallel to the series connection of the first and second capacitors 21 and 22. In this embodiment, the capacitance of the first capacitor 21 and the capacitance of the second capacitor are set to the same value. The first capacitor 21 and the second capacitor 22 may be provided outside the inverter 30 or may be built into the inverter 30.

[0017] In this embodiment, the inverter 30 is a T-type three-level inverter. The inverter 30 includes three phases of series-connected upper arm switches SUH, SVH, SWH and lower arm switches SUL, SVL, SWL. A voltage-controlled semiconductor switching element is used as each of the switches SUH to SWL, and more specifically, an N-channel MOSFET is used. Therefore, the high potential side terminal of each of the switches SUH to SWL is a drain, and the low potential side terminal is a source. Each of the switches SUH, SVH, SWH, SUL, SVL, SWL has a corresponding body diode DUH, DVH, DWH, DUL, DVL, DWL.

[0018] The source of the U-phase upper arm switch SUH is connected to the drain of the U-phase lower arm switch SUL. The connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL is connected to the U-phase input terminal of the rotating electric machine 10. The source of the V-phase upper arm switch SVH is connected to the drain of the V-phase lower arm switch SVL. The connection point between the V-phase upper arm switch SVH and the V-phase lower arm switch SVL is connected to the V-phase input terminal of the rotating electric machine 10. The source of the W-phase upper arm switch SWH is connected to the drain of the W-phase lower arm switch SWL. The connection point between the W-phase upper arm switch SWH and the W-phase lower arm switch SWL is connected to the W-phase input terminal of the rotating electric machine 10.

[0019] The drains of the upper arm switches SUH to SWH are connected by a positive bus 31 such as a bus bar. The positive bus 31 is connected to the positive terminal of the battery 20 and a first end of the first capacitor. A second end of the first capacitor 21 is connected to a first end of the second capacitor 22 via a neutral point O. The sources of the lower arm switches SUL to SWL are connected by a negative bus 32 such as a bus bar. The negative bus 32 is connected to the negative terminal of the battery 20 and a second end of the second capacitor.

[0020] The inverter 30 includes clamp switches QU, QV, and QW that conduct and cut off current in both directions. In this embodiment, voltage-controlled semiconductor switching elements, specifically N-channel MOSFETs, are used as the switches that make up the clamp switches QU to QW. Each switch that makes up the clamp switches QU to QW has a corresponding body diode DU, DV, or DW.

[0021] Specifically, the sources of the switches constituting the U-phase clamp switch QU are connected to each other. One drain of each switch constituting the U-phase clamp switch QU is connected to a connection point between the U-phase upper arm switch SUH and the U-phase lower arm switch SUL, and the other drain is connected to a neutral point O. The sources of the switches constituting the V-phase clamp switch QV are connected to each other. One drain of each switch constituting the V-phase clamp switch QV is connected to a connection point between the V-phase upper arm switch SVH and the V-phase lower arm switch SVL, and the other drain is connected to a neutral point. The sources of the switches constituting the W-phase clamp switch QW are connected to each other. One drain of each switch constituting the W-phase clamp switch QW is connected to a connection point between the W-phase upper arm switch SWH and the W-phase lower arm switch SWL, and the other drain is connected to a neutral point.

[0022] The motor control system includes a first voltage sensor 41, a second voltage sensor 42, a phase current sensor 43, and a rotation angle sensor 44. The first voltage sensor 41 detects the terminal voltage of the first capacitor 21. The second voltage sensor 42 detects the terminal voltage of the second capacitor 22. The phase current sensor 43 detects U, V, and W phase currents flowing through the rotating electric machine 10. It is sufficient that the phase current sensor 43 is capable of detecting at least two of the three phase currents. The rotation angle sensor 44 is, for example, a resolver, and detects the rotation angle of the rotating electric machine 10. The detection values ​​of the sensors 41 to 44 are input to the control device 40.

[0023] The control device 40 is mainly composed of a microcomputer 40a (corresponding to a "computer"), and the microcomputer 40a has a CPU. The functions provided by the microcomputer 40a can be provided by software recorded in a substantial memory device and a computer that executes the software, by software alone, by hardware alone, or by a combination of these. For example, when the microcomputer 40a is provided by an electronic circuit that is hardware, it can be provided by a digital circuit including a large number of logic circuits, or an analog circuit. For example, the microcomputer 40a executes a program stored in a non-transitory tangible storage medium as a storage unit provided in the microcomputer 40a. The program includes, for example, a program for the process shown in Figs. 14 and 15. By executing the program, a method corresponding to the program is executed. The storage unit is, for example, a non-volatile memory. The program stored in the storage unit can be updated, for example, via a network such as the Internet.

[0024] The control device 40 generates drive commands by space vector modulation control to turn on and off each of the switches SUH-SWL, QU-QW of the inverter 30. The control device 40 turns on and off each of the corresponding switches SUH-SWL, QU-QW based on the generated drive commands. The process of generating drive commands for each of the switches SUH-SWL, QU-QW by the control device 40 will be described below.

[0025] The control device 40 acquires a command voltage vector for controlling the control amount of the driven object to a command value. In this embodiment, the control device 40 acquires a command voltage vector Vm for controlling the torque of the rotating electric machine 10 to a command torque. The control device 40 calculates a command torque as an operation amount for feedback control of the rotation speed of the rotor of the rotating electric machine 10 to the calculated command rotation speed. The rotation speed of the rotor of the rotating electric machine 10 is calculated based on a detection value of a rotation angle sensor 44.

[0026] Next, the command voltage vector Vm will be described with reference to Fig. 2 and Fig. 3. As shown in Fig. 2, the command voltage vector Vm is expressed as a spatial voltage vector having as its components the U-, V-, and W-phase voltages applied to the rotating electric machine 10. The axes of the U-, V-, and W-phases are arranged to be shifted from each other by 120° in electrical angle.

[0027] In FIG. 2, the output voltage vector that can be output by the inverter 30 among the space voltage vectors is represented by components of a set of each phase voltage. Each phase voltage of the output voltage vector is represented by three levels H, M, and L. The phase voltage of level H is the phase voltage that is output when the input terminal of each phase is connected to the corresponding upper arm switch SUH to SWH. The phase voltage of level M is the phase voltage that is output when the input terminal of each phase is connected to the corresponding clamp switch QU to QW. The phase voltage of level L is the phase voltage that is output when the input terminal of each phase is connected to the corresponding lower arm switch SUL to SWL. For example, the output voltage vector HML indicates that the U phase voltage is level H, the V phase voltage is level M, and the W phase voltage is level L.

[0028] When there is no change in the voltage of the neutral point O, the phase voltage of level H is VH, the phase voltage of level M is VH / 2, and the phase voltage of level L is 0. Each phase voltage is the potential of the input terminal of each phase when the potential of the negative terminal of the battery 20 is set as the reference potential (0 V).

[0029] The control device 40 specifies the region in which the command voltage vector Vm exists. In this embodiment, the control device 40 specifies the sectors and divided regions in which the command voltage vector Vm exists. The sectors and divided regions are used to set an output pattern, which will be described later.

[0030] The control device 40 identifies the sector in which the command voltage vector Vm exists based on the electrical angle θe of the command voltage vector Vm. Here, the electrical angle θe is the angle between the command voltage vector Vm and the U-phase axis, and takes a value between 0° and 360°. The sign of the electrical angle θe is positive in the leftward (counterclockwise) direction. The vector space in which the command voltage vector Vm can exist is divided into six sectors with respect to the electrical angle θe. If 0°≦θe<60°, the control device 40 identifies the command voltage vector Vm as existing in the first sector, and if 60°≦θe<120°, the control device 40 identifies the command voltage vector Vm as existing in the second sector. If 120°≦θe<180°, the control device 40 identifies the command voltage vector Vm as existing in the third sector, and if 180°≦θe<240°, the control device 40 identifies the command voltage vector Vm as existing in the fourth sector. When 240°≦θe<300°, the control device 40 determines that the command voltage vector Vm is in the fifth sector, and when 300°≦θe<360°, the control device 40 determines that the command voltage vector Vm is in the sixth sector. Note that in FIG. 2, the range indicating the first sector is shown hatched.

[0031] The first to sixth sectors are shaped like equilateral triangles, and control points A, B, M, N, P, and Q are provided in each sector. Control point P is the origin in FIG. 2 and is the starting point of the command voltage vector Vm. Control points A and B are provided at the vertices of each sector. Control point M is provided at the midpoint between control point A and control point P. Control point N is provided at the midpoint between control point B and control point P. Control point Q is provided at the midpoint between control point A and control point B.

[0032] FIG. 3 shows the relationship between each of the control points A, B, M, N, P, and Q provided for the first sector and each output voltage vector. The output voltage vectors having the control point P as the start point and end point are output voltage vectors HHH, MMM, and LLL, and correspond to reactive voltage vectors. The output voltage vector having the control point P as the start point and the control point Q as the end point is output voltage vector HML. The output voltage vector having the control point P as the start point and the control point A as the end point is output voltage vector HHL. The output voltage vector having the control point P as the start point and the control point B as the end point is output voltage vector HLL. The output voltage vector having the control point P as the start point and the control point M as the end point is output voltage vectors HHM and MML. The output voltage vector having the control point P as the start point and the control point N as the end point is output voltage vector HMM and MLL.

[0033] Similarly to the first sector, the relationship between each of the control points A, B, M, N, P, and Q provided for the second to sixth sectors and each of the output voltage vectors is determined. Specifically, in the second sector, the output voltage vector having the control point P as a start point and the control point Q as an end point is the output voltage vector MHL. The output voltage vector having the control point P as a start point and the control point A as an end point is the output voltage vector LHL. The output voltage vector having the control point P as a start point and the control point B as an end point is the output voltage vector HHL. The output voltage vector having the control point P as a start point and the control point M as an end point is the output voltage vectors MHM and LML. The output voltage vector having the control point P as a start point and the control point N as an end point is the output voltage vectors HHM and MML.

[0034] In the third sector, the output voltage vector starting from control point P and ending at control point Q is the output voltage vector LHM. The output voltage vector starting from control point P and ending at control point A is the output voltage vector LHH. The output voltage vector starting from control point P and ending at control point B is the output voltage vector LHL. The output voltage vector starting from control point P and ending at control point M is the output voltage vectors MHH,LMM. The output voltage vector starting from control point P and ending at control point N is the output voltage vectors MHM,LML.

[0035] In the fourth sector, the output voltage vector starting from control point P and ending at control point Q is output voltage vector LMH. The output voltage vector starting from control point P and ending at control point A is output voltage vector LLH. The output voltage vector starting from control point P and ending at control point B is output voltage vector LHH. The output voltage vector starting from control point P and ending at control point M is output voltage vector MMH,LLM. The output voltage vector starting from control point P and ending at control point N is output voltage vector MHH,LMM.

[0036] In the fifth sector, the output voltage vector starting from control point P and ending at control point Q is output voltage vector MLH. The output voltage vector starting from control point P and ending at control point A is output voltage vector HLH. The output voltage vector starting from control point P and ending at control point B is output voltage vector LLH. The output voltage vector starting from control point P and ending at control point M is output voltage vector HMH,MLM. The output voltage vector starting from control point P and ending at control point N is output voltage vector MMH,LLM.

[0037] In the sixth sector, the output voltage vector starting from control point P and ending at control point Q is the output voltage vector HLM. The output voltage vector starting from control point P and ending at control point A is the output voltage vector HLL. The output voltage vector starting from control point P and ending at control point B is the output voltage vector HLH. The output voltage vector starting from control point P and ending at control point M is the output voltage vectors HMM,MLL. The output voltage vector starting from control point P and ending at control point N is the output voltage vectors HMH,MLM.

[0038] The control device 40 identifies a divisional region in the sector in which the command voltage vector Vm exists based on the magnitude and electrical angle θe of the command voltage vector Vm. The divisional region is an area that is determined based on each of the control points A, B, M, N, P, and Q provided for the first to sixth sectors.

[0039] The first divided region R1 of the first to sixth sectors is an area surrounded by equilateral triangles with vertices at the control points P, M, and N, and the second divided region R2 of the first to sixth sectors is an area surrounded by equilateral triangles with vertices at the control points M, N, and Q. The third divided region R3 of the first to sixth sectors is an area surrounded by equilateral triangles with vertices at the control points A, M, and Q, and the fourth divided region R4 of the first to sixth sectors is an area surrounded by equilateral triangles with vertices at the control points B, N, and Q.

[0040] For example, the control device 40 may identify the divided region in which the command voltage vector Vm exists by using information (specifically, map information or formula information) in which the magnitude and electrical angle θe of the command voltage vector Vm correspond to each of the divided regions R1 to R4 for the first to sixth sectors.

[0041] The control device 40 sets an output pattern, which is a combination of output voltage vectors, based on the divided region in which the command voltage vector Vm exists. Here, the control device 40 includes, in the output pattern, the output voltage vectors corresponding to the control points at the vertices of the divided region in which the command voltage vector Vm exists. For example, as shown in FIG. 3, when the control device 40 determines that the command voltage vector Vm exists in the first divided region R1, it includes, in the output pattern, the output voltage vectors corresponding to the control points P, M, and N.

[0042] The control device 40 decomposes the command voltage vector Vm into output voltage vectors included in the output pattern. Based on the magnitude of the decomposed output voltage vector, the control device 40 calculates the output period of the corresponding output voltage vector in one modulation period. Based on the calculated output period, the control device 40 generates drive commands to turn on and off each of the switches SUH-SWL, QU-QW of the inverter 30.

[0043] For example, as shown in FIG. 3, when it is determined that the command voltage vector Vm exists in the first division region R1, the command voltage vector Vm is decomposed into output voltage vectors corresponding to the control points M and N. In FIG. 3, Vm1 is a vector obtained by multiplying the output voltage vector corresponding to the control point M by α (0<α<1), and Vm2 is a vector obtained by multiplying the output voltage vector corresponding to the control point N by β (0<β<1). The larger the coefficient α, the longer the output period of the output voltage vector corresponding to the control point M in one modulation cycle. The larger the coefficient β, the longer the output period of the output voltage vector corresponding to the control point N in one modulation cycle. The period of one modulation cycle other than the period corresponding to the coefficient α and the period corresponding to the coefficient β is set as the output period of the reactive voltage vector.

[0044] Incidentally, when the neutral point O is connected to at least one of the phase input terminals of the rotating electric machine 10, the voltage of the neutral point O may change due to a current flowing into or out of the neutral point O. Therefore, during the output period of the output voltage vectors corresponding to each of the control points M, N, and Q, the voltage of the neutral point O may change.

[0045] The output voltage vector corresponding to each control point M, N has two drive states for each switch SUH-SWL, QU-QW. More specifically, the output voltage vector corresponding to each control point M, N has a Hi-Mid drive state and a Mid-Lo drive state. The Hi-Mid drive state is a drive state in which one of the upper arm switches SUH-SWH and the clamp switches QU-QW is turned on and the lower arm switches SUL-SWL are turned off. The Mid-Lo drive state is a drive state in which one of the lower arm switches SUL-SWL and the clamp switches QU-QW is turned on and the upper arm switches SUH-SWH are turned off.

[0046] 3, the output voltage vector corresponding to the control point N of the first sector is the output voltage vector HMM,MLL. During the period when the output voltage vector HMM is output, the U-phase upper arm switch SUH and the V- and W-phase clamp switches QV and QW are turned on as the Hi-Mid driving state, and the V- and W-phase upper arm switches SVH and SWH, the lower arm switches SUL to SWL of each phase, and the U-phase clamp switch QU are turned off.

[0047] On the other hand, during the period when the output voltage vector MLL is output, the Mid-Lo driving state is set such that the U-phase clamp switch QU and the V- and W-phase lower arm switches SVL and SWL are turned on, while the upper arm switches SUH to SWH, the U-phase lower arm switch SUL, and the V- and W-phase clamp switches QV and QW are turned off. Note that in this embodiment, the output voltage vector corresponding to each control point M or N corresponds to the "first output voltage vector."

[0048] The direction in which the voltage at the neutral point O changes is opposite between the Hi-Mid drive state and the Mid-Lo drive state. For example, the direction in which the voltage at the neutral point O changes is opposite between the output period of the output voltage vector HMM in the Hi-Mid drive state and the output period of the output voltage vector MLL in the Mid-Lo drive state.

[0049] 4, the current path during the period when the output voltage vector HMM is output is the first capacitor 21 → positive bus 31 → U-phase upper arm switch SUH → U-phase winding 11U → V- and W-phase windings 11V and 11W → V- and W-phase clamp switches QV and QW → neutral point O. As a result, current flows into neutral point O, and the voltage at neutral point O increases.

[0050] 5, the current path during the period when the output voltage vector MLL is output is neutral point O → U-phase clamp switch QU → U-phase winding 11U → V-, W-phase windings 11V, 11W → V-, W-phase lower arm switches SVL, SWL → negative bus 32 → second capacitor 22. As a result, current flows out from neutral point O, and the voltage at neutral point O drops.

[0051] During the period when the output voltage vectors corresponding to the control points M and N are output, it is possible to control the voltage of the neutral point by appropriately selecting either the Hi-Mid driving state or the Mid-Lo driving state. Therefore, the control device 40 acquires neutral point information, which is information on at least one of the detection values ​​of the first and second voltage sensors 41 and 42 and the detection value of the phase current sensor 43. In this embodiment, the neutral point information is the detection values ​​of the first and second voltage sensors 41 and 42 and the detection value of the phase current sensor 43.

[0052] When an output voltage vector corresponding to each control point M, N is output, the control device 40 selects either the Hi-Mid driving state or the Mid-Lo driving state based on the neutral point information. For example, when the terminal voltage of the first capacitor 21 detected by the first voltage sensor 41 is lower than the terminal voltage of the second capacitor 22 detected by the second voltage sensor 42, the control device 40 determines that the voltage of the neutral point O is rising. In this case, when an output voltage vector corresponding to each control point M, N is output, the control device 40 selects the driving state that lowers the voltage of the neutral point O from the Hi-Mid driving state or the Mid-Lo driving state. On the other hand, when the terminal voltage of the first capacitor 21 detected by the first voltage sensor 41 is higher than the terminal voltage of the second capacitor 22 detected by the second voltage sensor 42, the control device 40 determines that the voltage of the neutral point O is lowering. In this case, when an output voltage vector corresponding to each control point M, N is output, the control device 40 selects the driving state that increases the voltage at the neutral point O from the Hi-Mid driving state and the Mid-Lo driving state.

[0053] Also, for example, the control device 40 calculates the voltage of the neutral point O based on the detection values ​​of the phase current sensors 43. The control device 40 determines whether the voltage of the neutral point O is rising or falling based on the calculated voltage of the neutral point O, and selects either the Hi-Mid driving state or the Mid-Lo driving state according to the determination result. The control device 40 calculates the amount of charge flowing into or flowing out of the neutral point O by integrating the detection values ​​of the phase current sensors 43. The control device 40 calculates the voltage of the neutral point O based on the calculated charge flowing into or flowing out of the neutral point O and the capacitance of the first and second capacitors 21, 22.

[0054] However, when the magnitude of the command voltage vector Vm is large, the output period of the output voltage vector corresponding to each control point M, N may be shorter and the output period of the output voltage vector corresponding to the control point Q may be longer than when the magnitude of the command voltage vector Vm is small. Here, the output voltage vector corresponding to the control point Q is an output voltage vector larger in magnitude than the output voltage vector corresponding to each control point M, N. During the period in which the output voltage vector corresponding to the control point Q is output, the neutral point O is connected to one of the phase input terminals of the rotating electric machine 10. In this case, there is a concern that the controllability of the voltage of the neutral point O may decrease. In this embodiment, the output voltage vector corresponding to the control point Q corresponds to the "second output voltage vector."

[0055] Therefore, in this embodiment, the control device 40 selects and executes either normal control or limited control. As described above, the normal control is a control in which the output voltage vectors corresponding to the control points at the vertices of the first to fourth divided regions R1 to R4 are set as the output pattern. The limited control is a control in which the output voltage vector corresponding to the control point Q is restricted from being set as the output pattern. The limited control will be described in detail below.

[0056] In the limit control, the division method of the area corresponding to the second to fourth divided areas R2 to R4 in the normal control is changed. The divided areas in the limit control are shown in FIG. 6. In the limit control, the first, fifth to ninth divided areas R1, R5 to R9 are defined for the first to sixth sectors. In FIG. 6, for convenience, the center of gravity of an equilateral triangle surrounded by the control points P, A, and B is shown as point G. In other words, point G is a point that divides the line segment PQ internally at a ratio of 2:1. In FIG. 6, the configuration shown in FIG. 3 above is given the same reference numerals for convenience.

[0057] The fifth divided region R5 of the first to sixth sectors is an area surrounded by a triangle with the control points M, N and point G as vertices. The sixth divided region R6 of the first to sixth sectors is an area surrounded by a triangle with the control points B, N and point G as vertices, and the seventh divided region R7 of the first to sixth sectors is an area surrounded by a triangle with the control points A, M and point G as vertices. The eighth divided region R8 of the first to sixth sectors is an area surrounded by a triangle with the control points B, Q and point G as vertices, and the ninth divided region R9 of the first to sixth sectors is an area surrounded by a triangle with the control points A, Q and point G as vertices.

[0058] When performing the limit control, the control device 40 restricts the output voltage vector corresponding to the control point Q from being included in the output pattern. More specifically, output patterns are set for the first, fifth to ninth divided regions R1, and R5 to R9 as shown in FIG. 7. When the command voltage vector Vm is identified as being present in the first divided region R1, the output pattern includes the output voltage vectors corresponding to the control points P, M, and N. When the command voltage vector Vm is identified as being present in the fifth divided region R5, the output pattern includes the output voltage vectors corresponding to the control points M, N, and Q.

[0059] The sixth to ninth divisional regions R6 to R9 are regions that contact either one of the control points A and B. Here, the output voltage vectors corresponding to the control points A and B are greater than the output voltage vectors corresponding to the control points M and N. In addition, during the output period of the output voltage vectors corresponding to the control points A and B, the driving states of the switches SUH to SWL, QU to QW are set to driving states in which the neutral point O and the input terminals of each phase of the rotating electric machine 10 are not connected. When it is determined that the command voltage vector Vm exists in any one of the sixth to ninth divisional regions R6 to R9, the output pattern includes output voltage vectors corresponding to any three of the control points A, B, M, and N. This restricts the output voltage vector corresponding to the control point Q from being included in the output pattern. In this embodiment, the output voltage vectors corresponding to the control points A and B correspond to the "third output voltage vector."

[0060] Incidentally, when the output of the output voltage vector corresponding to the control point Q is limited, in order to suppress a decrease in the controllability of the inverter 30 when the magnitude of the command voltage vector Vm increases, it is desirable to lengthen the output period of the output voltage vector corresponding to each of the control points A and B. On the other hand, in order to suppress a change in the voltage of the neutral point O, it is desirable to lengthen the output period of the output voltage vector corresponding to each of the control points M and N.

[0061] Therefore, in this embodiment, the method of setting the output pattern including any three output voltage vectors among the output voltage vectors corresponding to each of the control points A, B, M, and N is changed depending on which of the sixth to ninth divided regions R6 to R9 the command voltage vector Vm exists in. In detail, when it is determined that the command voltage vector Vm exists in the sixth and seventh divided regions R6 and R7, the output of the rotating electric machine 10 may be lower than when it is determined that the command voltage vector Vm exists in the eighth and ninth divided regions R8 and R9. In this case, an output pattern is set that is a combination of the output voltage vector corresponding to one of the control points A and B, the output voltage vector corresponding to the control point M, and the output voltage vector corresponding to the control point N. Also, when it is determined that the command voltage vector Vm exists in the eighth and ninth divided regions R8 and R9, the output of the rotating electric machine 10 may be higher than when it is determined that the command voltage vector Vm exists in the sixth and seventh divided regions R6 and R7. In this case, an output pattern is set which is a combination of the output voltage vector corresponding to either one of the control points M and N, the output voltage vector corresponding to the control point A, and the output voltage vector corresponding to the control point B.

[0062] Specifically, when the command voltage vector Vm is identified to be present in the sixth divided region R6, an output pattern is set that is a combination of output voltage vectors corresponding to the respective control points B, M, and N. When the command voltage vector Vm is identified to be present in the seventh divided region R7, an output pattern is set that is a combination of output voltage vectors corresponding to the respective control points A, M, and N. When the command voltage vector Vm is identified to be present in the eighth divided region R8, an output pattern is set that is a combination of output voltage vectors corresponding to the respective control points A, B, and N. When the command voltage vector Vm is identified to be present in the ninth divided region R9, an output pattern is set that is a combination of output voltage vectors corresponding to the respective control points A, B, and M. In this embodiment, the sixth and seventh divided regions R6 and R7 correspond to the "low output region", and the eighth and ninth divided regions R8 and R9 correspond to the "high output region".

[0063] Figures 8 to 13 show an example of the transition of each phase voltage in limit control. In Figures 8 to 13, (a) shows the transition of the U-phase voltage level, (b) shows the transition of the V-phase voltage level, and (c) shows the transition of the W-phase voltage level. Note that Figures 8 to 13 show the transition of each phase voltage level in one modulation cycle Tc. In the transition of each phase voltage level shown in Figures 8 to 13, the transition of each phase voltage level in the second half of one modulation cycle Tc is the inverse of the transition of each phase voltage level in the first half of one modulation cycle Tc.

[0064] When the command voltage vector Vm exists in the first division region R1 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of MMM → HMM → HHM → HHH. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of MMM → MHM → HHM → HHH. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 8. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of MMM → MML → → MLL → LLL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of MMM → MML → LML → LLL. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 8.

[0065] When the command voltage vector Vm exists in the fifth division region R5 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HML → HMM → HHM. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of MHL → MHM → HHM. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 9. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of HML → MML → MLL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of MHL → MML → LML. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 9.

[0066] When the command voltage vector Vm is present in the sixth division region R6 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HLL → HMM → HHM. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of HHL → HHM → MHM. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 10. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of HLL → MLL → MML. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of HHL → MML → LML. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 10.

[0067] When the command voltage vector Vm is present in the seventh division region R7 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HHL → HHM → HMM. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of LHL → MHM → HHM. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 11. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of HHL → MML → MLL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of LHL → LML → MML. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 11.

[0068] When the command voltage vector Vm is present in the eighth divided region R8 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HMM → HLL → HHL. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of HHM → HHL → LHL. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 12. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of MLL → HLL → HHL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of MML → HHL → LHL. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 12.

[0069] When the command voltage vector Vm is present in the ninth divided region R9 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HHM → HHL → HLL. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of MHM → LHL → HHL. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 13. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of MML → HHL → HLL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of LML → LHL → HHL. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 13.

[0070] 14 shows a procedure of control performed by the control device 40. This control is executed repeatedly at a predetermined control period, for example.

[0071] In step S10, a command voltage vector Vm is acquired. In step S11, neutral point information is acquired. In this embodiment, as the neutral point information, the detection value of the first voltage sensor 41, the detection value of the second voltage sensor 42, and the detection value of the phase current sensor 43 are acquired. Note that step S10 corresponds to a "command voltage acquisition unit", and step S11 corresponds to a "neutral point information acquisition unit".

[0072] In step S12, it is determined whether or not to perform limit control based on the neutral point information. In this embodiment, if it is determined that the voltage of the neutral point O exceeds the allowable range, it is determined that the limit control is performed, whereas if it is not determined that the voltage of the neutral point O exceeds the allowable range, it is not determined that the limit control is performed. For example, the voltage of the neutral point O is calculated based on the detection value of the phase current sensor 43 and the capacitance of the first and second capacitors 21 and 22. Also, for example, if either one of the terminal voltages of the first and second capacitors 21 and 22 exceeds the allowable voltage value, it is determined that the voltage of the neutral point O exceeds the allowable range. The detection value of the first voltage sensor 41 is used for the terminal voltage of the first capacitor 21. The detection value of the second voltage sensor 42 is used for the terminal voltage of the second capacitor 22. The allowable range and the allowable voltage value are set based on, for example, the withstand voltage of the switch. In this embodiment, step S12 corresponds to a "determination unit".

[0073] If the determination in step S12 is negative, the process proceeds to step S13. In step S13, normal control is performed. In the normal control, it is determined in which of the first to sixth sectors the command voltage vector Vm exists, and it is also determined in which of the first to fourth divided regions R1 to R4 provided for the determined sector the command voltage vector Vm exists in. In step S14, a set of output voltage vectors corresponding to the control points at the vertices of the divided region in which the command voltage vector Vm exists is set as an output pattern.

[0074] In step S15, the output period of each output voltage vector included in the output pattern is calculated. More specifically, the command voltage vector Vm is decomposed into output voltage vectors included in the output pattern. In this case, if the output voltage vectors corresponding to each control point M, N are included, one of the Hi-Mid driving state and the Mid-Lo driving state is selected based on the neutral point information, and the command voltage vector is decomposed using the output voltage vector corresponding to the selected driving state. Based on the magnitude of the decomposed output voltage vector, the output period of the corresponding output voltage vector in one modulation cycle is calculated. In step S16, based on the calculated output period of each output voltage vector, a drive command is generated to turn on and off each switch SUH to SWL, QU to QW. In this embodiment, steps S15 and S16 correspond to a "control unit".

[0075] On the other hand, if the determination in step S12 is positive, the process proceeds to step S17. In step S17, the sector in which the command voltage vector Vm exists is identified based on the electrical angle θe of the command voltage vector Vm. In the processes in the following steps S18 to S35, the angle θs of the command voltage vector Vm in the sector identified in step S17 is used. The angle θs in the sector is the angle between the command voltage vector Vm and the line segment PB in FIG. 6, and takes a value of 0° to 60°. The angle θs in the sector is calculated from the electrical angle θe of the command voltage vector Vm and information on the sector number in which the command voltage vector Vm exists.

[0076] In step S18, it is determined whether or not the command voltage vector Vm exists in the first divided region R1. Whether or not the command voltage vector Vm exists in the first divided region R1 can be determined by using information (specifically, map information or formula information) in which the magnitude of the command voltage vector Vm and the angle θs in the sector correspond to the first divided region R1. If the determination in step S18 is affirmative, the process proceeds to step S13. On the other hand, if the determination in step S18 is negative, the process proceeds to step S19.

[0077] In step S19, it is determined whether the angle θs within the sector is less than 30°. The process of step S19 is a process of determining whether the end point of the command voltage vector Vm exists in the regions on the B and N sides with respect to the line segment PQ in the previous FIG. 6. If an affirmative determination is made in step S19, the process proceeds to step S20.

[0078] In step S20, it is determined whether |Vm|×cos(60° - θs)>VH / 3 holds. Here, |Vm| is the magnitude of the command voltage vector Vm. VH / 3 is half of the voltage value that can be output as each phase voltage. The process of step S20 is a process of determining whether the end point of the command voltage vector Vm exists in the regions on the A and Q sides with respect to the line segment BM in the previous FIG. 6. If an affirmative determination is made in step S20, the process proceeds to step S21. In step S21, it is specified that the command voltage vector Vm exists in the eighth divided region R8. On the other hand, if a negative determination is made in step S20, the process proceeds to step S22.

[0079] In step S22, it is determined whether |Vm|×cos(θs)<VH / 3 holds. The process of step S22 is a process of determining whether the end point of the command voltage vector Vm exists in the regions on the M and P sides with respect to the line segment AN in the previous FIG. 6. If an affirmative determination is made in step S22, the process proceeds to step S23. In step S23, it is specified that the command voltage vector Vm exists in the fifth divided region R5. On the other hand, if a negative determination is made in step S22, the process proceeds to step S24. In step S24, it is specified that the command voltage vector Vm exists in the sixth divided region R6.

[0080] If a negative determination is made in step S19, the process proceeds to step S25. In step S25, it is determined whether |Vm| × cos(θs) > VH / 3 holds. The process of step S25 is a process of determining whether the end point of the command voltage vector Vm exists in the region on the control point B, Q side with respect to the line segment AN in the previous FIG. 6. If an affirmative determination is made in step S25, the process proceeds to step S26. In step S26, it is specified that the command voltage vector Vm exists in the ninth divided region R9. On the other hand, if a negative determination is made in step S25, the process proceeds to step S27.

[0081] In step S27, it is determined whether |Vm| × cos(60° - θs) < VH / 3 holds. The process of step S27 is a process of determining whether the end point of the command voltage vector Vm exists in the region on the control point N, P side with respect to the line segment BM in the previous FIG. 6. If an affirmative determination is made in step S27, the process proceeds to step S28. In step S28, it is specified that the command voltage vector Vm exists in the fifth divided region R5. On the other hand, if a negative determination is made in step S27, the process proceeds to step S29. In step S29, it is specified that the command voltage vector Vm exists in the seventh divided region R7. In this embodiment, the processes of steps S17 to S29 correspond to the "region specifying section".

[0082] If it is specified in step S21 that the command voltage vector Vm exists in the eighth divided region R8, the process proceeds to step S30. In step S30, a set of output voltage vectors corresponding to the eighth divided region R8 is set as an output pattern. Specifically, a set of output voltage vectors corresponding to each of the control points A, B, and N is set as an output pattern. In this case, it is restricted that the output voltage vector corresponding to the control point Q is included in the output pattern.

[0083] If it is determined in step S23 that the command voltage vector Vm exists in the fifth divided region R5, the process proceeds to step S31. In step S31, a set of output voltage vectors corresponding to the fifth divided region R5 is set as an output pattern. Specifically, a set of output voltage vectors corresponding to each of the control points M, N, and Q is set as the output pattern.

[0084] If it is determined in step S24 that the command voltage vector Vm exists in the sixth divided region R6, the process proceeds to step S32. In step S32, a set of output voltage vectors corresponding to the sixth divided region R6 is set as an output pattern. Specifically, a set of output voltage vectors corresponding to each of the control points B, M, and N is set as an output pattern. In this case, the output voltage vector corresponding to the control point Q is restricted from being included in the output pattern.

[0085] If it is determined in step S26 that the command voltage vector Vm is in the ninth divided region R9, the process proceeds to step S33. In step S33, a set of output voltage vectors corresponding to the ninth divided region R9 is set as an output pattern. Specifically, a set of output voltage vectors corresponding to each of the control points A, B, and M is set as an output pattern. In this case, the output voltage vector corresponding to the control point Q is restricted from being included in the output pattern.

[0086] If it is determined in step S28 that the command voltage vector Vm exists in the fifth divided region R5, the process proceeds to step S34. The process of step S34 is similar to the process of step S31.

[0087] If it is determined in step S29 that the command voltage vector Vm exists in the seventh divided region R7, the process proceeds to step S35. In step S35, a set of output voltage vectors corresponding to the seventh divided region R7 is set as an output pattern. Specifically, a set of output voltage vectors corresponding to each of the control points A, M, and N is set as an output pattern. In this case, the output pattern is restricted to include the output voltage vector corresponding to the control point Q. After steps S30 to S35, the process proceeds to step S15. In this embodiment, the processes in steps S30 to S35 correspond to a "setting unit."

[0088] According to the present embodiment described above in detail, the following effects can be obtained.

[0089] When the neutral point O is connected to at least one of the phase input terminals of the rotating electric machine 10, the voltage of the neutral point O may change due to current flowing into or out of the neutral point O. Therefore, during the period when the output voltage vector corresponding to the control points M and N is output, the neutral point O is connected to any one or two of the phase input terminals of the rotating electric machine 10, so that the voltage of the neutral point O may change.

[0090] In this regard, among the output voltage vectors corresponding to the control points M and N, there are output voltage vectors corresponding to a Hi-Mid driving state and a Mid-Lo driving state in which the same voltage is applied to each phase input terminal of the rotating electric machine 10 and the direction of change in the voltage of the neutral point O is opposite. Therefore, it is conceivable to control the voltage of the neutral point O by appropriately selecting either the Hi-Mid driving state or the Mid-Lo driving state based on the neutral point information.

[0091] However, when the magnitude of the command voltage vector Vm is large, the period during which the output voltage vector corresponding to the control points M and N is output may be shorter and the period during which the output voltage vector corresponding to the control point Q is output may be longer than when the magnitude of the command voltage vector Vm is small. Here, the output voltage vector corresponding to the control point Q is greater in magnitude than the output voltage vector corresponding to the control points M and N. During the output period of the output voltage vector corresponding to the control point Q, the neutral point O is connected to any one of the phase input terminals of the rotating electric machine 10, and this may cause a concern that the controllability of the voltage of the neutral point O may be reduced.

[0092] Therefore, in this embodiment, when an output pattern, which is a combination of each output voltage vector, is set based on the command voltage vector Vm, the output voltage vector corresponding to the control point Q is restricted from being included in the output pattern. This suppresses the occurrence of a period in which the output voltage vector corresponding to the control point Q is output. In addition, in a period in which the output voltage vector corresponding to the control points M and N is output, either one of the Hi-Mid driving state and the Mid-Lo driving state is selected based on the neutral point information, so that the voltage of the neutral point O can be controlled. Therefore, in a period in which the output voltage vector corresponding to each control point M, N, and Q is output, the voltage of the neutral point O can be suppressed from changing. In other words, according to this embodiment, measures can be taken to suppress the change in the voltage of the neutral point O in the output period of the output voltage vector corresponding to each control point M, N, and Q, where there is a concern that the voltage of the neutral point O may change. As a result, the controllability of the voltage of the neutral point O can be improved.

[0093] In the case where the output voltage vector corresponding to control point Q is restricted from being included in the output pattern, an output pattern is set that is a combination of output voltage vectors corresponding to control points A, B, M, and N. In this case, in order to improve the controllability of the voltage of neutral point O, it is desirable to lengthen the output period of the output voltage vector corresponding to control points M and N. However, if the magnitude of the command voltage vector Vm increases, there is a concern that the controllability of the inverter 30 may decrease.

[0094] Therefore, according to the present embodiment, the existence region of the command voltage vector Vm is specified based on the magnitude and electrical angle θe of the command voltage vector Vm. The existence region includes the seventh and ninth divided regions R7 and R9 that are in contact with the control point A, and the sixth and eighth divided regions R6 and R8 that are in contact with the control point B. Then, depending on which of the sixth to ninth divided regions R6 to R9 the existence region of the command voltage vector Vm is, the method of setting the output pattern including the output voltage vector corresponding to each control point A, B, M, and N is changed.

[0095] In detail, when it is determined that the command voltage vector Vm exists in the sixth and seventh divided regions R6 and R7, an output pattern is set which is a combination of the output voltage vector corresponding to the control point M, the output voltage vector corresponding to the control point N, and the output voltage vector corresponding to either one of the control points A and B. In this case, the period during which the Hi-Mid driving state and the Mid-Lo driving state can be selected in one modulation cycle is made longer than when an output pattern including the output voltage vector corresponding to either one of the control points M and N, the output voltage vector corresponding to the control point A, and the output voltage vector corresponding to the control point B is set. This makes it possible to improve the controllability of the voltage at the neutral point O.

[0096] On the other hand, when it is determined that the command voltage vector Vm exists in the eighth and ninth divided regions R8 and R9, an output pattern is set that is a combination of the output voltage vector corresponding to one of the control points M and N, the output voltage vector corresponding to the control point A, and the output voltage vector corresponding to the control point B. In this case, the magnitude of the average output voltage vector in one modulation period can be increased compared to the case where an output pattern including the output voltage vector corresponding to one of the control points A and B, the output voltage vector corresponding to the control point M, and the output voltage vector corresponding to the control point N is set. This makes it possible to deal with an increase in the magnitude of the command voltage vector Vm. Therefore, it is possible to suppress the deterioration of the controllability of the inverter 30. As described above, according to the present embodiment, it is possible to enhance the controllability of the voltage of the neutral point O while suppressing the deterioration of the controllability of the inverter 30.

[0097] There is a concern that the controllability of the inverter 30 may be reduced due to excessive limit control, such as limit control being performed when there is no problem with the voltage of the neutral point O. In this regard, in this embodiment, whether or not to perform limit control is determined based on neutral point information. Specifically, when it is determined that the voltage of the neutral point O exceeds the allowable range, limit control is performed. On the other hand, when it is not determined that the voltage of the neutral point O exceeds the allowable range, normal control is performed. As a result, limit control is performed in a situation where it is necessary to suppress a change in the voltage of the neutral point O. Therefore, it is possible to improve the controllability of the neutral point voltage while suppressing a decrease in the controllability of the inverter 30.

[0098] <Second embodiment> The second embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment.

[0099] When it is determined that the command voltage vector Vm exists in the 8th and 9th divided regions R8 and R9, an output pattern is set which is a combination of one output voltage vector corresponding to one of the control points M and N, the output voltage vector corresponding to control point A, and the output voltage vector corresponding to control point B.

[0100] In a period in which the output voltage vector corresponding to the control point A and the output voltage vector corresponding to the control point B are output, a phase voltage of level H or level L is applied to each phase input terminal of the rotating electric machine 10. In other words, in a period in which the output voltage vector corresponding to the control point A and the output voltage vector corresponding to the control point B are output, a phase voltage of level M is not applied to each phase input terminal of the rotating electric machine 10. Therefore, when switching from a drive state corresponding to either one of the output voltage vector corresponding to the control point A and the output voltage vector corresponding to the control point B to a drive state corresponding to the other, each of the upper and lower arm switches SUH to SWL is turned on and off without going through a period in which the phase voltage of level M is applied. In this case, there is a concern that a surge voltage generated when switching on and off each of the upper and lower arm switches SUH to SWL is increased.

[0101] Therefore, in this embodiment, the control when it is determined that the command voltage vector Vm is in the eighth or ninth divided region R8 or R9 is changed. Fig. 15 shows a procedure of the control performed by the control device 40. This control is executed repeatedly at a predetermined control period, for example.

[0102] After the processing of steps S30 and S33, the process proceeds to step S40. In step S40, an output voltage vector corresponding to control point Q is added to the output pattern. In step S41, switch information relating to the time required for each of the clamp switches QU to QW to be turned on and off is acquired. The switch information is information indicating the electrical characteristics of each of the clamp switches QU to QW, and specifically, the gate threshold voltage, the turn-on delay time, the turn-off delay time, and the like. For example, in step S41, the switch information stored in a memory unit of the control device 40 may be acquired. In this embodiment, steps S30 to S35 and step S40 correspond to a "setting unit", and step S41 corresponds to a "switch information acquisition unit".

[0103] In step S42, the output period of each output voltage vector included in the output pattern is calculated. Here, a method for calculating the output period of the output voltage vector corresponding to control point Q will be described. From the viewpoint of suppressing changes in the voltage of the neutral point O, it is desirable to shorten the output period of the output voltage vector corresponding to control point Q. However, if the output period of the output voltage vector corresponding to control point Q is shorter than the time required to turn on and off each of the clamp switches QU to QW, the output period of the output voltage vector corresponding to control point Q ends before each of the clamp switches QU, QW is actually turned on and off. In this case, there is a concern that the effect of suppressing the surge voltage generated when turning on and off each of the upper and lower arm switches SUH to SWL is reduced.

[0104] Therefore, in this embodiment, based on the acquired switch information, the output period of the output voltage vector corresponding to control point Q is calculated so that it is longer than the time required to turn on and off each of the clamp switches QU to QW. The upper limit of the output period of the output voltage vector corresponding to control point Q may be within half of one modulation period Tc. For example, the upper limit of the output period of the output voltage vector corresponding to control point Q may be 1 / 6, 1 / 12, or 1 / 24 of one modulation period Tc. In this embodiment, step S42 corresponds to the "calculation unit".

[0105] In step S43, a drive command is generated to turn on and off each of the switches SUH-SWL, QU-QW so as to sandwich the output period of the output voltage vector corresponding to control point Q during switching from an output period corresponding to one of the output voltage vector corresponding to control point A and the output voltage vector corresponding to control point B to an output period corresponding to the other. In this embodiment, step S43 corresponds to the "control unit."

[0106] Fig. 16 shows an example of the transition of the voltage level of each phase when it is determined that the command voltage vector Vm is in the eighth divided region R8, and Fig. 17 shows an example of the transition of the voltage level of each phase when it is determined that the command voltage vector Vm is in the ninth divided region R9. Figs. 16(a)-(c) correspond to Figs. 12(a)-(c), and Figs. 17(a)-(c) correspond to Figs. 13(a)-(c).

[0107] When the command voltage vector Vm is present in the eighth divided region R8 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HMM → HLL → HML → HHL. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of HHM → HHL → MHL → LHL. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 16. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of MLL → HLL → HML → HHL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of MML → HHL → MHL → LHL. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 16.

[0108] When the command voltage vector Vm is present in the ninth divided region R9 of the first and second sectors, the output voltage vector is output in the following order in the first half of one modulation period Tc depending on whether the Hi-Mid driving state or the Mid-Lo driving state is selected. When the Hi-Mid driving state is selected in the first sector, the output voltage vector is output in the order of HHM → HHL → HML → HLL. When the Hi-Mid driving state is selected in the second sector, the output voltage vector is output in the order of MHM → LHL → MHL → HHL. In these cases, the transition of each phase voltage is as shown by the solid line in FIG. 17. Also, when the Mid-Lo driving state is selected in the first sector, the output voltage vector is output in the order of MML → HHL → HML → HLL. When the Mid-Lo driving state is selected in the second sector, the output voltage vector is output in the order of LML → LHL → MHL → HHL. In these cases, the transition of each phase voltage is as shown by the dashed line in FIG. 17.

[0109] According to the present embodiment described above in detail, the following effects can be obtained.

[0110] When it is determined that the command voltage vector Vm exists in the eighth and ninth divided regions R8 and R9, the output voltage vector corresponding to the control point Q is added to the output pattern. That is, the output pattern includes the output voltage vector corresponding to either one of the control points M and N, the output voltage vector corresponding to the control point A, the output voltage vector corresponding to the control point B, and the output voltage vector corresponding to the control point Q.

[0111] In the above-described output pattern, it is possible to sandwich an output period of the output voltage vector corresponding to control point Q between the output period corresponding to either one of the output voltage vector corresponding to control point A and the output voltage vector corresponding to control point B and the output period corresponding to the other. In this case, when switching from the output period corresponding to either one of the output voltage vector corresponding to control point A and the output voltage vector corresponding to control point B to the output period corresponding to the other, a period during which a phase voltage of level M is applied can be provided. Therefore, it is possible to suppress an increase in a surge voltage generated when turning on and off each of the upper and lower arm switches SUH to SWL.

[0112] Switch information regarding the time required to turn each of the clamp switches QU to QW on and off is acquired. Based on the switch information, the output period of the output voltage vector corresponding to control point Q is calculated so that the output period of the output voltage vector corresponding to control point Q is longer than the time required to turn each of the clamp switches QU to QW on and off. This makes it possible to accurately secure the period from when the output voltage vector corresponding to control point Q is output until each of the switches SUH to SWL, QU to QW is actually turned on and off. Therefore, it is possible to accurately reduce the surge voltage generated when each of the upper and lower arm switches SUH to SWL is turned on and off.

[0113] <Other embodiments> The above embodiment may be modified as follows.

[0114] The control device 40 may acquire only one of the detection values ​​of the first and second voltage sensors 41, 42 and the detection value of the phase current sensor 43 as the neutral point information, instead of acquiring both of them. For example, the control device 40 may acquire only the detection values ​​of the first and second voltage sensors 41, 42 among the detection values ​​of the first and second voltage sensors 41, 42 and the detection values ​​of the phase current sensor 43. In this case, the control device 40 may calculate each phase current based on the detection values ​​of the first and second voltage sensors 41, 42. The control device 40 may calculate the voltage of the neutral point O based on each phase current calculated using the detection values ​​of the first and second voltage sensors 41, 42 and the capacitance of the first and second capacitors 21, 22. This allows the processing of steps S10 and S15 to be performed without using the detection value of the phase current sensor 43.

[0115] The division regions of the limit control are not limited to the first, fifth to ninth division regions R1, R5 to R9 shown in FIG. 6 above. For example, the division regions may be changed by changing the ratio of dividing the line segment PQ by the point G. Specifically, instead of dividing the line segment PQ by 2:1, the point G may be changed to a point dividing the line segment PQ by 3:1. In this case, the eighth and ninth division regions R8 and R9 are reduced in size compared to the first embodiment, and the sixth and seventh division regions R6 and R7 are enlarged compared to the first embodiment. As a result, the division regions in which the output patterns are set, which are combinations of the output voltage vector corresponding to the control point M, the output voltage vector corresponding to the control point N, and the output voltage vector corresponding to either one of the control points A and B, are widened. Therefore, even if the magnitude of the command voltage vector Vm is large, the period in which the Hi-Mid driving state and the Mid-Lo driving state can be selected can be made longer compared to the first embodiment.

[0116] In this case, the processes of steps S19, S20, S22, S25, and S27 may be changed. For example, a process may be performed to identify the divided region in which the command voltage vector Vm exists, using information (e.g., map information) in which the magnitude and electrical angle θe of the command voltage vector Vm correspond to each of the divided regions R1, R5 to R9 for the first to sixth sectors.

[0117] The object to be driven by the inverter 30 is not limited to the rotating electric machine 10 in which the phase windings 11U, 11V, 11W are star-connected, but may be a rotating electric machine in which the phase windings 11U, 11V, 11W are delta-connected. Also, the object to be driven is not limited to a rotating electric machine, but may be another load having a three-phase winding.

[0118] The inverter 30 may be a neutral-point clamped three-level inverter instead of a T-type three-level inverter.

[0119] The semiconductor switches that make up the inverter are not limited to N-channel MOSFETs, but may be IGBTs, for example. In this case, the high-potential terminal of the switch is the collector, and the low-potential terminal is the emitter. Also, each switch needs to have a freewheel diode connected in inverse parallel.

[0120] The control unit and the method described in the present disclosure may be realized by a special-purpose computer provided by configuring a processor and a memory programmed to execute one or more functions embodied in a computer program. Alternatively, the control unit and the method described in the present disclosure may be realized by a special-purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control unit and the method described in the present disclosure may be realized by one or more special-purpose computers configured by a combination of a processor and a memory programmed to execute one or more functions and a processor configured with one or more hardware logic circuits. In addition, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executed by the computer. [Explanation of symbols]

[0121] 10... rotating machine, 21, 22... first and second capacitors, 30... inverter, 40... control device, SUH to SWL... U-, V-, W-phase upper and lower arm switches, QU, QV, QW... U-, V-, W-phase clamp switches.

Claims

1. A first storage unit (21) and a second storage unit (22) connected in series; a rotating electric machine (10) having three-phase windings (11U, 11V, 11W) and driven by application of a three-phase AC voltage; a three-level inverter (30) having three-phase switches (SUH to SWL, QU to QW) connecting each phase of the rotating electric machine to any of a positive electrode side of the first power storage unit, a neutral point between the negative electrode side of the first power storage unit and the positive electrode side of the second power storage unit, and a negative electrode side of the second power storage unit, a neutral point information acquiring unit that acquires neutral point information, which is information on at least one of the voltages of the first and second power storage units and each phase current flowing through the rotating electric machine; a command voltage acquisition unit that acquires a command voltage vector for controlling a control amount of the rotating electric machine to a command value; A setting unit that sets an output pattern, which is a combination of output voltage vectors that can be output by the three-level inverter, based on the command voltage vector; a control unit that turns on and off the switch based on the output voltage vector included in the output pattern, a drive state of the switch is a drive state that connects any one or two phases of the rotating electric machine to the neutral point, and the output voltage vector for which there are two different drive states of the switch for the same output voltage vector is defined as a first output voltage vector; a drive state of the switch is a drive state in which any one of the phases of the rotating electric machine and the neutral point are connected, and the output voltage vector having a magnitude larger than that of the first output voltage vector is set as a second output voltage vector; a drive state of the switch is a drive state in which each phase of the rotating electric machine is not connected to the neutral point, and the output voltage vector having a magnitude greater than that of the first output voltage vector is set as a third output voltage vector; the control unit, when the first output voltage vector is output, selects one of the drive states of the two switches based on the neutral point information; the setting unit restricts inclusion of the second output voltage vector in the output pattern; a region specifying unit that specifies an existence region of the command voltage vector based on a magnitude and an electrical angle of the command voltage vector, the existence region includes a high output region and a low output region that are in contact with an end point of the third output voltage vector, The setting unit is when it is determined that the command voltage vector is in the high output region, the output pattern is set to be a combination of one of the first output voltage vectors and two of the third output voltage vectors; when it is determined that the command voltage vector is in the low output region, the output pattern is set to be a combination of two of the first output voltage vectors and one of the third output voltage vectors; adding the second output voltage vector to the output pattern when the command voltage vector is identified to be in the high output region; The control unit is during a period in which the third output voltage vector is output, a drive state of the switch is set to a drive state in which each phase of the rotating electric machine is connected to a positive electrode side of the first power storage unit or a negative electrode side of the second power storage unit; a control device for a three-level inverter, when the second output voltage vector is added to the output pattern, turning on and off the switch so as to sandwich the drive state of the switch corresponding to the second output voltage vector between turning on and off the switch from a drive state of the switch corresponding to one of the two third output voltage vectors to a drive state of the switch corresponding to the other of the two third output voltage vectors.

2. a switch information acquiring unit that acquires switch information, which is at least one of a gate threshold voltage, a turn-on delay time, and a turn-off delay time of the switch; 2. The control device for a three-level inverter according to claim 1, further comprising: a calculation unit that calculates an output period of the second output voltage vector based on the switch information so that the output period of the second output voltage vector is longer than a time required to turn on and off the switch.

3. a determination unit that determines whether or not a voltage at the neutral point exceeds a tolerable range based on the neutral point information; 3. The control device for a three-level inverter according to claim 1, wherein the setting unit restricts the second output voltage vector from being included in the output pattern when it is determined that the voltage of the neutral point exceeds the allowable range, and does not restrict the second output voltage vector from being included in the output pattern when it is not determined that the voltage of the neutral point exceeds the allowable range.

4. A first storage unit (21) and a second storage unit (22) connected in series; a rotating electric machine (10) having three-phase windings (11U, 11V, 11W) and driven by application of a three-phase AC voltage; a three-level inverter (30) having three-phase switches (SUH to SWL, QU to QW) connecting each phase of the rotating electric machine to any one of a positive electrode side of the first storage unit, a neutral point between the negative electrode side of the first storage unit and the positive electrode side of the second storage unit, and a negative electrode side of the second storage unit; A program applied to a system including a computer (40a), a neutral point information acquiring step of acquiring neutral point information which is information on at least one of the voltages of the first and second power storage units and each phase current flowing through the rotating electric machine; a command voltage acquisition step of acquiring a command voltage vector for controlling a control amount of the rotating electric machine to a command value; A setting step of setting an output pattern which is a combination of output voltage vectors which can be output by the three-level inverter based on the command voltage vector; a control step of turning on and off the switch based on the output voltage vector included in the output pattern; a drive state of the switch is a drive state that connects any one or two phases of the rotating electric machine to the neutral point, and the output voltage vector for which there are two different drive states of the switch for the same output voltage vector is defined as a first output voltage vector; a drive state of the switch is a drive state in which any one of the phases of the rotating electric machine and the neutral point are connected, and the output voltage vector having a magnitude larger than that of the first output voltage vector is set as a second output voltage vector; a drive state of the switch is a drive state in which each phase of the rotating electric machine is not connected to the neutral point, and the output voltage vector having a magnitude greater than that of the first output voltage vector is set as a third output voltage vector; the control step includes a process of selecting one of the drive states of the two switches based on the neutral point information when the first output voltage vector is output, the setting step includes a process of restricting inclusion of the second output voltage vector in the output pattern, a region specifying step of specifying an existing region of the command voltage vector based on a magnitude and an electrical angle of the command voltage vector, the existence region includes a high output region and a low output region that are in contact with an end point of the third output voltage vector, The setting step includes: a process of setting the output pattern which is a combination of one of the first output voltage vectors and two of the third output voltage vectors when the command voltage vector is identified to be in the high output region; a process of setting the output pattern which is a combination of two of the first output voltage vectors and one of the third output voltage vectors when the command voltage vector is identified to be in the low output region; adding the second output voltage vector to the output pattern when the command voltage vector is identified to be in the high output region; Including, The control step includes: during a period in which the third output voltage vector is output, a drive state of the switch is set to a drive state in which each phase of the rotating electric machine is connected to a positive electrode side of the first power storage unit or a negative electrode side of the second power storage unit; a program including a process of turning on and off the switch, when the second output voltage vector is added to the output pattern, between turning on and off the switch from a drive state of the switch corresponding to one of the two third output voltage vectors to a drive state of the switch corresponding to the other, sandwiching the drive state of the switch corresponding to the second output voltage vector.

5. A first storage unit (21) and a second storage unit (22) connected in series, a rotating electric machine (10) having three-phase windings (11U, 11V, 11W) and driven by application of a three-phase AC voltage; a three-level inverter (30) having three-phase switches (SUH to SWL, QU to QW) connecting each phase of the rotating electric machine to any of a positive electrode side of the first power storage unit, a neutral point between the negative electrode side of the first power storage unit and the positive electrode side of the second power storage unit, and a negative electrode side of the second power storage unit, a neutral point information acquiring step of acquiring neutral point information which is information on at least one of the voltages of the first and second power storage units and each phase current flowing through the rotating electric machine; a command voltage acquisition step of acquiring a command voltage vector for controlling a control amount of the rotating electric machine to a command value; A setting step of setting an output pattern which is a combination of output voltage vectors which can be output by the three-level inverter based on the command voltage vector; a control step of turning on and off the switch based on the output voltage vector included in the output pattern, a drive state of the switch is a drive state that connects any one or two phases of the rotating electric machine to the neutral point, and the output voltage vector for which there are two different drive states of the switch for the same output voltage vector is defined as a first output voltage vector; a drive state of the switch is a drive state in which any one of the phases of the rotating electric machine and the neutral point are connected, and the output voltage vector having a magnitude larger than that of the first output voltage vector is set as a second output voltage vector; a drive state of the switch is a drive state in which each phase of the rotating electric machine is not connected to the neutral point, and the output voltage vector having a magnitude greater than that of the first output voltage vector is set as a third output voltage vector; the control step includes a process of selecting one of the drive states of the two switches based on the neutral point information when the first output voltage vector is output, the setting step includes a process of restricting inclusion of the second output voltage vector in the output pattern, a region specifying step of specifying an existence region of the command voltage vector based on a magnitude and an electrical angle of the command voltage vector; the existence region includes a high output region and a low output region that are in contact with an end point of the third output voltage vector, The setting step includes: a process of setting the output pattern which is a combination of one of the first output voltage vectors and two of the third output voltage vectors when the command voltage vector is identified to be in the high output region; a process of setting the output pattern which is a combination of two of the first output voltage vectors and one of the third output voltage vectors when the command voltage vector is identified to be in the low output region; adding the second output voltage vector to the output pattern when the command voltage vector is identified to be in the high output region; Including, The control step includes: during a period in which the third output voltage vector is output, a drive state of the switch is set to a drive state in which each phase of the rotating electric machine is connected to a positive electrode side of the first power storage unit or a negative electrode side of the second power storage unit; a control method for a three-level inverter, the control method including, when the second output voltage vector is added to the output pattern, a process of turning on and off the switch between a drive state of the switch corresponding to one of the two third output voltage vectors and a drive state of the switch corresponding to the other of the two third output voltage vectors, sandwiching a drive state of the switch corresponding to the second output voltage vector.

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