Information processing device

The converter in information processing devices automatically resumes power supply after protective actions by using an enable signal and fan rotation monitoring, addressing the issue of manual recovery and simplifying hardware design.

JP7610173B1Active Publication Date: 2025-01-08FUJITSU CLIENT COMPUTING LTD
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
JP2024178889
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-10-11
Publication Date
2025-01-08
Estimated Expiration
2044-10-11

AI Technical Summary

Technical Problem

DC/DC converters in information processing devices may stop outputting power due to protective actions, such as overcurrent detection, especially when the device is first turned on after manufacturing, and require manual intervention for recovery.

Method used

A converter that stops and resumes outputting power based on an enable signal, with a processor monitoring fan rotation to detect errors and send the enable signal to restore power supply without additional control signal lines.

Benefits of technology

Automatically restores power supply after protective operations, eliminating the need for manual intervention and simplifying hardware design by reducing the need for direct monitoring ports.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007610173000001_ABST
    Figure 0007610173000001_ABST
Patent Text Reader

Abstract

Restores power supply that has been cut off due to protective action. [Solution] An information processing device 10 has a converter 11, a fan 12, and a processor 13. The converter 11 converts a first DC having a first voltage into a second DC having a second voltage different from the first voltage. The converter 11 stops outputting the second DC in response to detection of an abnormal current, and resumes output in response to receiving an enable signal 15. The fan 12 rotates using the second DC. The processor 13 acquires data 14 on the number of rotations per unit time of the fan 12, and controls the enable signal 15 to be sent to the converter 11 in response to detection of a fan error indicating that the number of rotations is below a threshold.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to an information processing device. [Background technology]

[0002] Information processing devices receive direct current (DC) converted from alternating current (AC) and use the DC to operate various hardware components. For example, a laptop PC (Personal Computer) charges its battery using the DC output from an AC adapter and uses power supplied from the AC adapter or battery.

[0003] An information processing device may contain a mixture of hardware components that operate on different DC voltages. For example, a central processing unit (CPU) and a universal serial bus (USB) interface may operate on different DC voltages. Therefore, the information processing device may include a DC-DC converter (DDC) that converts DC of one voltage to DC of another voltage. For example, a DDC may convert DC of about 18V (Volt) from 12V output by an AC adapter to DC of 5V.

[0004] There is a technology in which a charging device that charges a battery detects an overcurrent caused by a short circuit between the positive and negative poles and automatically stops the current flowing from the power supply to the positive pole. There is also a technology in which a tablet PC connected to another electronic device monitors the voltage of the connection terminal and starts supplying power to the other electronic device when it detects a certain voltage change. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-33593 [Patent Document 2] Japanese Patent Application Publication No. 2019-40239 Summary of the Invention [Problem to be solved by the invention]

[0006] If the DDC detects an abnormal current such as an overcurrent, it may perform a protective action to stop the DC output for safety reasons. The DDC protective action may occur when the information processing device is turned on, and there is a low probability that it may occur the first time the information processing device is turned on after manufacture. However, DDC is sometimes designed to operate continuously, and once a protective action is triggered, it may remain stopped until explicit recovery work is performed.

[0007] One possible method is for a processor to monitor the status of the DDC and restore the DDC if it is abnormal. However, adding a control signal line or control port that allows the processor to directly monitor the status of the DDC can be difficult due to hardware design constraints. Therefore, in one aspect, the present invention aims to restore the power supply that has been stopped by a protection operation. [Means for solving the problem]

[0008] In one aspect, there is provided an information processing device having: a converter that converts a first DC having a first voltage into a second DC having a second voltage different from the first voltage, the converter stopping output of the second DC in response to detection of an abnormal current and resuming output in response to receiving an enable signal; a fan that rotates using the second DC; and a processor that acquires data on the fan's rotation speed per unit time and controls the converter to send an enable signal in response to detection of a fan error indicating that the rotation speed is below a threshold. [Effects of the Invention]

[0009] In one aspect, the protective action restores power supply that has been interrupted. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating an information processing apparatus according to a first embodiment. [Figure 2] FIG. 10 illustrates an example of hardware of an information processing apparatus according to a second embodiment. [Figure 3] FIG. 1 is a diagram illustrating an example of connections between hardware components related to DDC. [Figure 4] FIG. 10 is a diagram illustrating an example of recovery from a protection operation of a DDC. [Figure 5] FIG. 10 is a diagram illustrating an example of determining a fan failure. [Figure 6] 10 is a flowchart illustrating an example of a procedure for DDC control. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, this embodiment will be described with reference to the drawings. (a) First embodiment 1 is a diagram illustrating an information processing device according to a first embodiment. The information processing device 10 according to the first embodiment is a computer capable of operating on battery power, such as a notebook PC or a tablet PC. The information processing device 10 includes a converter 11, a fan 12, and a processor 13.

[0012] Converter 11 converts a first DC having a first voltage into a second DC having a second voltage different from the first voltage. Converter 11 may be called a DC / DC converter or DDC. The second voltage, which is an output voltage, may be lower than the first voltage, which is an input voltage. For example, the first voltage is about 12 V to 18 V, and the second voltage is 5 V. Converter 11 may be called a step-down converter. Converter 11 may also be a linear regulator or a switching regulator.

[0013] The converter 11 may receive direct current from an AC / DC converter. The AC / DC converter may be an AC adapter connected to the information processing device 10. The converter 11 may also receive direct current from a battery included in the information processing device 10. The converter 11 supplies power to some of the hardware components included in the information processing device 10. If there is power remaining in the battery, the converter 11 may constantly supply power to some of the hardware components even while the processor 13 is not operating. For this reason, the converter 11 is sometimes called a continuous power supply.

[0014] Converter 11 has a protection circuit that protects other hardware components from abnormal current. Converter 11 detects abnormal current, such as an overcurrent. An abnormal current may be detected when information processing device 10 is powered on, or when DC is input to converter 11 for the first time after manufacture. When power is turned on for the first time after manufacture, a temporary overcurrent may occur due to the design and manufacturing of various electronic circuits. Converter 11 automatically stops outputting the second DC current in response to the detection of an abnormal current.

[0015] The converter 11 is also connected to an enable signal line that transmits an enable signal 15. The enable signal 15 may be a pulse signal. The converter 11 resumes outputting the second DC in response to receiving the enable signal. The converter 11 may perform a toggle process that switches the output between ON and OFF every time it receives the enable signal 15.

[0016] The fan 12 is an air-cooling component that cools the processor 13. The fan 12 rotates using the second direct current output by the converter 11 while the processor 13 is operating. Since the processor 13 generates high heat, it is normally abnormal for the fan 12 not to rotate even though the processor 13 is operating. In addition to the fan 12, the converter 11 may also supply power to hardware components other than the fan 12. For example, the converter 11 supplies power to a USB PD (Power Delivery) circuit.

[0017] The processor 13 executes program instructions. The processor 13 may also be called a CPU or an MPU (Micro Processing Unit). When the information processing device 10 is turned on, the processor 13 reads a BIOS (Basic Input Output System) program stored in a nonvolatile memory into a volatile memory such as a RAM (Random Access Memory) and executes the BIOS program. The processor 13 may control the converter 11, which will be described below, in accordance with the BIOS program.

[0018] The processor 13 normally operates at a voltage different from the output of the converter 11. Therefore, power is supplied to the processor 13 via a path different from that of the fan 12. If the converter 11 automatically stops due to a protective operation, the fan 12 may not be operating, but the processor 13 may be operating normally.

[0019] The information processing device 10 may have another processor different from the processor 13 to efficiently control power supply related hardware components. The other processor may be called an EC (Embedded Controller). The other processor may be connected to the processor 13 via a control signal line, or may be connected to the fan 12 via a control signal line. The other processor may also be connected to the converter 11 via an enable signal line.

[0020] The processor 13 detects that the converter 11 has stopped due to a protective operation and restores the converter 11 as follows. The processor 13 acquires data 14. The data 14 indicates the number of rotations per unit time of the fan 12. The processor 13 may measure the number of rotations. Alternatively, another processor such as an EC may measure the number of rotations, and the processor 13 may read the data 14 from the other processor via a control signal line.

[0021] The processor 13 detects a fan error indicating that the rotation speed is below a threshold value based on the data 14. The threshold value may be 0, and the fan error may indicate that the fan 12 is not rotating. When the fan 12 is not rotating, the data 14 may indicate that the rotation speed is 0. When the fan 12 is not rotating, the data 14 may also indicate that a fan error has occurred.

[0022] In response to the detection of a fan error, the processor 13 controls the converter 11 to transmit an enable signal 15. The processor 13 may transmit the enable signal 15 to the converter 11 via an enable signal line. Alternatively, the processor 13 may request another processor to restore the converter 11 via a control signal line, or the other processor may transmit the enable signal 15 to the converter 11 via the enable signal line.

[0023] As described above, the information processing device 10 of the first embodiment includes the converter 11, the fan 12, and the processor 13. The converter 11 converts a first DC current having a first voltage into a second DC current having a second voltage different from the first voltage. The converter 11 stops outputting the second DC current in response to detection of an abnormal current and resumes output in response to reception of the enable signal 15. The fan 12 rotates using the second DC current.

[0024] The processor 13 acquires data 14 on the number of revolutions per unit time of the fan 12, and controls the converter 11 to send an enable signal 15 in response to detection of a fan error indicating that the number of revolutions is below a threshold.

[0025] This automatically restores the power supply that was interrupted by the protective operation of converter 11, eliminating the problem of hardware components that use the output of converter 11 not working. In particular, when information processing device 10 is turned on for the first time after manufacture, a temporary overcurrent may occur due to design or manufacturing reasons, causing the protection circuit of converter 11 to activate. Even in this case, information processing device 10 can recover from the failure without an engineer having to take any action to resolve the problem, such as inserting or removing a battery or manually inputting enable signal 15.

[0026] Furthermore, the information processing device 10 does not need to have a control signal line or control port for directly monitoring the state of the converter 11. This allows for saving on the number of ports used and the circuit area, facilitating the hardware design of the information processing device 10. Furthermore, the information processing device 10 estimates the state of the converter 11 using data 14 related to the fan 12, which is one of the typical hardware components that receives power from the converter 11. This allows the processor 13 to detect the stop of the converter 11 in a versatile and efficient manner.

[0027] (b) Second embodiment 2 is a diagram illustrating an example of hardware of an information processing device according to a second embodiment. The information processing device 100 according to the second embodiment is a notebook PC. The information processing device 100 includes a CPU 101, a RAM 103, a display 104, a chipset 105, a solid-state drive (SSD) 106, a BIOS memory 107, an input device 108, a communication interface 109, and a USB interface 110. The information processing device 100 also includes an EC 111, a PD circuit 114, a fan 115, a DDC 116, and a charging circuit 117.

[0028] The information processing device 100 corresponds to the information processing device 10 of the first embodiment. The DDC 116 corresponds to the converter 11 in FIG. 1. The fan 115 corresponds to the fan 12 in FIG. 1. The CPU 101 corresponds to the processor 13 in FIG.

[0029] The CPU 101 is a processor that executes instructions included in a program. When the power button is pressed while the CPU 101 is in the OFF state, the CPU 101 reads and executes a BIOS program from the BIOS memory 107. The CPU 101 reads and executes an OS (Operating System) program from the SSD 106 in accordance with the BIOS program. Furthermore, the CPU 101 reads and executes an application program from the SSD 106 in accordance with the OS program. The information processing device 100 may have multiple processors.

[0030] The CPU 101 includes a GPU (Graphics Processing Unit) 102. The GPU 102 performs image processing and outputs an image to a display 104. The GPU 102 may be connected to the GPU 101 as an external hardware component of the CPU 101.

[0031] The RAM 103 is a volatile semiconductor memory that temporarily stores programs and other data used by the CPU 101. The information processing device 100 may have a type of volatile memory other than RAM. The RAM 103 may also be used as a GPU memory, or the information processing device 100 may have a separate GPU memory in addition to the RAM 103.

[0032] The display 104 is a display device that displays images such as an operation screen. The display 104 is, for example, a liquid crystal display or an organic EL (Electro Luminescence) display. An external display may be connected to the information processing device 100.

[0033] The chipset 105 is an integrated circuit that connects the CPU 101 and peripheral devices. The chipset 105 may be called a hub or a bridge. The chipset 105 may also be included in the CPU 101. The chipset 105 is connected to the CPU 101, the SSD 106, the BIOS memory 107, the input device 108, the communication interface 109, the USB interface 110, and the EC 111.

[0034] The SSD 106 is a nonvolatile storage that stores software programs such as an OS program and application programs, as well as other data. However, the SSD 106 is one of the peripheral devices recognized by the CPU 101 through the BIOS program, and becomes accessible after the BIOS program is executed. The information processing device 100 may also have other types of nonvolatile storage, such as an HDD (Hard Disk Drive).

[0035] The BIOS memory 107 is a non-volatile memory that stores a BIOS program. The BIOS memory 107 may be a non-rewritable read-only memory (ROM) in the strict sense, or a rewritable memory such as a flash memory.

[0036] When the CPU 101 is reset, the CPU 101 first reads a BIOS program from a predetermined memory address in the BIOS memory 107. The BIOS program includes instructions for recognizing peripheral devices included in the information processing device 100 and instructions for reading an OS program from the recognized non-volatile storage. As will be described later, the BIOS program of the second embodiment also includes instructions for controlling the DDC 116. The BIOS memory 107 also stores firmware executed by the EC 111.

[0037] The input device 108 generates an input signal indicating a user operation and notifies the CPU 101 of the input signal. The input device 108 is, for example, a keyboard, a touchpad, or a touch panel. The information processing device 100 may have multiple input devices. An external input device such as a mouse may also be connected to the information processing device 100.

[0038] The communication interface 109 communicates with other information processing devices via a network. The communication interface 109 may be a wired communication interface having a LAN (Local Area Network) port. Alternatively, the communication interface 109 may be a wireless communication interface that wirelessly communicates with wireless communication devices such as base stations and access points.

[0039] The USB interface 110 has a USB port to which an external USB device is connected. The USB interface 110 transmits and receives data signals and control signals to and from the connected USB device. The USB port has a charging signal line (VBUS) that can supply power. The USB interface 110 may have multiple USB ports with different power supply methods and terminal shapes, such as so-called Type A and Type C.

[0040] For example, in a Type A USB port, power is supplied from the information processing device 100 to a USB device. In a Type C USB port, power is supplied in either direction depending on the type of USB device connected. Power may be supplied from the information processing device 100 to the USB device, or power may be supplied from the USB device to the information processing device 100. The USB interface 110 of the second embodiment has a PD function that enables the supply of large power to the Type C USB port.

[0041] The USB device may be a storage device such as an HDD, an SSD, or a flash memory. Alternatively, the USB device may be a read drive into which an optical disc such as a CD (Compact Disc) or a DVD (Digital Versatile Disc) is inserted. Therefore, the USB interface 110 may read a program or other data recorded on a recording medium, and may store the program or other data in a volatile memory or nonvolatile storage provided in the information processing device 100.

[0042] The program read from the recording medium may be executed by the CPU 101. As mentioned above, the recording medium may be a portable recording medium such as a flash memory or an optical disk, and may be used to distribute programs and other data. Such a recording medium may be called a "computer-readable recording medium."

[0043] The EC 111 is a control unit mainly used to control power supply-related hardware components. To efficiently control the power supply-related hardware components, the information processing apparatus 100 includes an EC 111 that operates in parallel with the CPU 101, separate from the CPU 101. The EC 111 is connected to a PD circuit 114, a fan 115, and a DDC 116. The EC 111 includes a processor 112 and a memory 113.

[0044] The processor 112 is a microprocessor with a more limited computing capability than the CPU 101. When the power button is pressed while the processor 112 is off, the processor 112 reads firmware from the BIOS memory 107 and starts up. The firmware is executed continuously while the information processing device 100 is on. To read the firmware, the EC 111 may be directly connected to the BIOS memory 107. The memory 113 is a volatile semiconductor memory that temporarily stores the read firmware.

[0045] The PD circuit 114 controls the power supply by the PD function. The PD circuit 114 may be included in the USB interface 110. When the information processing device 100 is on the power supply side of the PD, the current output from the DDC 116 is supplied to the charging signal line of the Type C USB port via the PD circuit 114. When the information processing device 100 is on the power consumption side of the PD, the current flowing through the charging signal line of the Type C USB port is supplied to the charging circuit 117 via the PD circuit 114, and the battery is charged.

[0046] The fan 115 is a cooling component that cools the CPU 101. The fan 115 is an air-cooling device that creates airflow by rotating, and is sometimes called a cooler. When the CPU 101 is operating, it is normal for the fan 115 to rotate. The DDC 116 converts 12V to 18V DC into 5V DC.

[0047] The charging circuit 117 controls the supply of base power (system power) within the information processing device 100 and the charging of a battery included in the information processing device 100. An AC adapter 118 that converts AC from a household power source into DC of 12V to 18V may be connected to the information processing device 100. The charging circuit 117 charges the battery included in the information processing device 100 using the DC output from the AC adapter 118. However, the charging circuit 117 may also charge the battery using the DC output from the PD circuit 114. The charging circuit 117 supplies the DC output from the AC adapter 118 or the battery to various hardware components.

[0048] Here, the information processing device 100 contains a mixture of hardware components with different operating voltages. Therefore, the DC / DC converter converts the direct current output by the charging circuit 117 into a direct current with a voltage at which the hardware components can operate. The DDC 116 supplies power to the hardware components that operate on 5V direct current.

[0049] As long as power is supplied to the DDC 116 via the charging circuit 117, the DDC 116 can output 5V DC even when the CPU 101 is not operating. Therefore, the DDC 116 is sometimes called a constant 5V power supply. In the second embodiment, the USB interface 110, the PD circuit 114, and the fan 115 receive power from the DDC 116. On the other hand, power is supplied to the CPU 101 and the EC 111 via a path different from that of the DDC 116.

[0050] The DDC 116 includes a protection circuit. The protection circuit detects abnormal currents that occur temporarily, such as overcurrents from the AC adapter 118. The electric circuit described in the aforementioned Patent Document 1 may be used to detect the overcurrent. When the protection circuit detects an abnormal current, it transitions to a state in which it stops outputting 5V DC.

[0051] The 5V DC output by the DDC 116 is supplied to a Type A USB port. The 5V DC output by the DDC 116 is also supplied to the PD circuit 114 and then to a Type C USB port via the PD circuit 114. Therefore, when the output of the DDC 116 stops, power is no longer supplied to the PD circuit 114, and power is no longer supplied to the USB devices connected to the various USB ports included in the USB interface 110.

[0052] Once the DDC 116 is turned OFF, it may not automatically return to ON as long as power is being supplied to the DDC 116 via the charging circuit 117. The operator can reset the DDC 116 and return it to ON by temporarily disconnecting the input to the DDC 116 by inserting or removing the battery. The DDC 116 is also connected to the EC 111 by an ENABLE signal line. If the DDC 116 receives an ENABLE signal from the EC 111 while it is OFF, it will also return to ON.

[0053] 3 is a diagram showing an example of connections between hardware components related to the DDC. The DDC 116 accepts DC with a voltage within the range of 12V to 18V. The DDC 116 supplies 5V DC to the fan 115 and the PD circuit 114. The EC 111 is connected to the CPU 101 via a control signal line. The EC 111 is also connected to the fan 115 and the PD 114 via control signal lines. The EC 111 is also connected to the DDC 116 via an ENABLE signal line.

[0054] When the CPU 101 starts operating, it first executes a BIOS program. In accordance with the BIOS program, the CPU 101 recognizes the SSD 106 in which the OS program is stored and executes the OS program. Normally, when the OS program starts to run, the BIOS program has already finished running. The EC 111 starts operating at the same timing as the CPU 101, and while the CPU 101 is running, it constantly executes firmware in parallel with the CPU 101. The CPU 101 can read data from the memory 113 of the EC 111.

[0055] The fan 115 rotates using 5V DC supplied from the DDC 116 while the CPU 101 is operating. The fan 115 transmits a pulse signal to the EC 111 via a control signal line for each rotation. The EC 111 counts the pulse signals using PWM (Pulse Width Modulation) to measure the number of rotations per unit time of the fan 115. The number of rotations per unit time is, for example, the number of rotations per minute (rpm). The measured number of rotations is stored in the memory 113 of the EC 111.

[0056] The PD circuit 114 controls the PD function of the USB port using 5V DC supplied from the DDC 116. The EC 111 can monitor the state of the PD circuit 114 via a control signal line between the EC 111 and the PD circuit 114.

[0057] The DDC 116 receives the ENABLE signal, which is a pulse signal, from the ENABLE signal line. The DDC 116 performs a toggle operation in response to the ENABLE signal. When the DDC 116 receives the ENABLE signal while it is in the OFF state (stopping the output of 5V DC), it switches from OFF to ON. On the other hand, when the DDC 116 receives the ENABLE signal while it is in the ON state (outputting 5V DC), it switches from ON to OFF.

[0058] The EC 111 can send an ENABLE signal to the DDC 116 according to the firmware. However, unlike the fan 115 and the PD circuit 114, the EC 111 does not have a control signal line for receiving a control signal from the DDC 116. For this reason, the EC 111 does not directly detect the ON / OFF state of the DDC 116. The EC 111 has a finite number of general-purpose input / output (GPIO) ports. By not having the EC 111 directly monitor the state of the DDC 116, the number of ports used by the EC 111 can be reduced.

[0059] The EC 111 may detect an overcurrent from the USB port via a control signal line between the EC 111 and the PD circuit 114. In this case, the EC 111 may intentionally switch the DDC 116 to OFF by sending an ENABLE signal to the DDC 116.

[0060] 4 is a diagram showing an example of recovery from the DDC protection operation. After the information processing device 100 is manufactured, an operator connects the AC adapter 118 to the information processing device 100 and turns on the information processing device 100 for the first time. This operation may be performed at the factory where the information processing device 100 is manufactured, or at the destination where the information processing device 100 is shipped.

[0061] In this case, the protection circuit of the DDC 116 may be activated, causing a failure in which the DDC 116 is initially turned off. This protection operation at the initial power-on is caused by a low probability of a temporary overcurrent occurring due to the hardware design or manufacturing process. Therefore, as described below, the BIOS program of the second embodiment implements processing to automatically restore the constant 5V power supply of the DDC 116.

[0062] When the CPU 101 starts the BIOS program, it reads data on the fan rotation speed from the EC 111 in accordance with the BIOS program. The fan rotation speed is measured periodically by the EC 111 using a control signal flowing through a control signal line between the EC 111 and the fan 115. The data read by the CPU 101 includes the measured fan rotation speed itself. However, if the fan rotation speed is 0 rpm, the read result received by the CPU 101 includes a fan error indicating that an error has occurred in the fan rotation speed.

[0063] The CPU 101 detects a fan error. The CPU 101 may detect a fan error by comparing the read fan rotation speed with a threshold value. For example, the CPU 101 determines that a fan error has occurred when the fan rotation speed is 0 rpm, and determines that a fan error has not occurred when the fan rotation speed is greater than 0 rpm. The CPU 101 may also determine whether the read result includes a fan error. Note that, in the above description, the EC 111 responds to the CPU 101 with both the fan rotation speed and the fan error, but the EC 111 may also respond to the CPU 101 with only either the fan rotation speed or the fan error.

[0064] The fan 115 is a typical hardware component that constantly uses the 5V power supply of the DDC 116, and is expected to rotate while the CPU 101 is operating. Therefore, if the fan 115 does not rotate immediately after power-on, the information processing device 100 estimates that there is a high possibility that a fault has occurred in the DDC 116. In that case, it is likely that other hardware components that constantly use the 5V power supply, such as the PD circuit 114, will not operate normally.

[0065] When a fan error is detected, the CPU 101 executing the BIOS program instructs the EC 111 to restore the DDC 116 via the control signal line. The EC 111 then sends an ENABLE signal to the DDC 116 via the ENABLE signal line. This is expected to release the protection operation of the DDC 116, causing the DDC 116 to start outputting 5V DC. On the other hand, if no fan error is detected, the CPU 101 does not instruct the EC 111 to restore the DDC 116, and the EC 111 does not send the ENABLE signal.

[0066] The CPU 101 may repeatedly execute the above process while the BIOS program is running. If a fan error is detected, the CPU 101 may reset the CPU 101 after instructing the EC 111 to restore the DDC 116, and then restart the BIOS program. On the other hand, the second embodiment assumes a failure in which a protection circuit for the DDC 116 is activated due to a temporary overcurrent when the power is turned on, so the CPU 101 does not need to execute the above process after the OS program is started.

[0067] Furthermore, in the case where a failure is assumed when the power is turned on for the first time after manufacture, the CPU 101 may execute the above process only for the first startup after manufacture or for a certain number of startups since manufacture. Furthermore, once the information processing device 100 has successfully started up once without a fan error, the CPU 101 may not execute the above process for subsequent startups. The number of startups and a control flag indicating whether recovery is required may be stored in the BIOS memory 107.

[0068] 5 is a diagram showing an example of determining whether a fan has failed. In addition to a failure in the DDC 116, a possible cause of the fan 115 not rotating when the power is turned on may be a hardware failure of the fan 115, which is considered to be a low probability. Therefore, the CPU 101 may perform a determination process to distinguish between a failure in the DDC 116 and a failure in the fan 115.

[0069] Below, two examples of the determination methods will be described. Only one of the two determination methods may be implemented in the BIOS program, or both may be implemented. If both are implemented, CPU 101 may use only one of the determination methods, or may use both determination methods in combination. If two determination methods are used in combination, CPU 101 may use these determination methods as AND conditions and determine that fan 115 has failed if both determination methods suggest a fan failure. CPU 101 may also use these determination methods as OR conditions and determine that fan 115 has failed if at least one determination method suggests a fan failure.

[0070] In the first determination method, the CPU 101 records that it has attempted to restore the DDC 116. For example, the CPU 101 stores a control flag indicating that it has attempted to restore the DDC 116 in the BIOS memory 107. The CPU 101 resets itself, restarts the BIOS program, and reads the rotation speed of the fan 115 from the EC 111 again.

[0071] The CPU 101 determines whether it attempted to restore the DDC 116 at the previous reset and whether a fan error indicating that the fan rotation speed is 0 rpm has been detected again. If a fan error is detected again, it is possible that the fan 115 has failed. In this case, the CPU 101 makes no further attempts to restore the DDC 116. Therefore, thereafter, the CPU 101 does not need to read the fan rotation speed from the EC 111, and does not need to instruct the EC 111 to restore the DDC 116.

[0072] In the second determination method, when the CPU 101 detects a fan error, it further checks the status of other devices that always operate on a 5V power supply. In the second embodiment, it is assumed that the other devices that always operate on a 5V power supply are USB-related devices. If the USB-related device is operating normally, it is highly likely that the fan error has been detected due to a malfunction of the fan 115. On the other hand, if the USB-related device is not operating normally, it is highly likely that the fan error has been caused by a malfunction of the DDC 116.

[0073] The USB-related device may be an internal hardware component connected to the EC 111 via a control signal line, such as the PD circuit 114. In this case, the CPU 101 reads the status of the hardware component from the EC 111. The USB-related device may also be a USB device connected to the USB interface 110. In this case, the CPU 101 attempts to communicate with the USB device via the USB interface 110.

[0074] If a fan error is detected and other devices are not operating normally, the CPU 101 attempts to restore the DDC 116 as described above. On the other hand, if a fan error is detected and other devices are operating normally, the CPU 101 does not attempt to restore the DDC 116. Therefore, the CPU 101 does not need to instruct the EC 111 to restore the DDC 116. This allows the CPU 101 to distinguish between a failure in the DDC 116 and a malfunction in the fan 115, thereby reducing unnecessary restoration processing for the DDC 116. Next, an example of a procedure for DDC control by the information processing device 100 will be described.

[0075] 6 is a flowchart showing an example of a procedure for DDC control. In step S10, the EC 111 measures the rotation speed of the fan 115. Thereafter, the EC 111 continuously measures the rotation speed of the fan 115. In step S11, the CPU 101 reads the fan rotation speed from the EC 111 in accordance with the BIOS program. In step S12, the CPU 101 determines whether a fan error, in which the fan rotation speed is 0 rpm, has been detected based on the read result in step S11. If a fan error is detected, the process proceeds to step S13; if a fan error is not detected, the DDC control ends.

[0076] In step S13, CPU 101 checks the status of a USB-related device that always uses 5V power in accordance with the BIOS program. If there is no appropriate USB-related device whose status can be checked, CPU 101 may skip steps S13 and S14. In step S14, CPU 101 determines whether the USB-related device is operating normally. If the USB-related device is operating normally, the process proceeds to step S19. If the USB-related device is not operating normally, the process proceeds to step S15.

[0077] In step S15, the CPU 101, in accordance with the BIOS program, requests the EC 111 to restore the DDC 116. In step S16, the EC 111 sends an ENABLE signal via the ENABLE signal line to the DDC 116. Upon receiving the ENABLE signal, the DDC 116 performs a toggle operation to switch whether or not to output 5V DC.

[0078] In step S17, the CPU 101 resets itself and restarts the BIOS program. In accordance with the BIOS program, the CPU 101 reads the fan rotation speed again from the EC 111. Note that the CPU 101 does not have to be reset automatically after the ENABLE signal is sent, and may be reset at some other time, such as by a user operation.

[0079] In step S18, the CPU 101 determines whether a fan error in which the fan rotation speed is 0 rpm has been detected again based on the read result of step S17. If a fan error has been detected again, the process proceeds to step S19, and if a fan error has not been detected, the DDC control ends.

[0080] In step S19, CPU 101 inhibits subsequent recovery processing for DDC 116. In step S20, CPU 101 outputs a message indicating a fan failure in accordance with the BIOS program. CPU 101 may display the message on display 104 or may save the message as a log. Thereafter, CPU 101 may proceed with the execution of the OS program or may inhibit the execution of the OS program.

[0081] As described above, in the information processing device 100 according to the second embodiment, even if the protection circuit of the DDC 116 is activated due to a momentary overcurrent when the power is turned on, the 5V power supply is automatically restored at all times. This eliminates the need for personnel at the manufacturing plant or users at the shipping destination to perform restoration work such as inserting and removing a battery, improving convenience during testing and when starting use.

[0082] Furthermore, the CPU 101 can infer that the constant 5V power supply will be stopped even if the EC 111 does not have a control signal line for directly monitoring the state of the DDC 116. This reduces the number of GPIO ports used by the EC 111, facilitating the hardware design of the information processing device 100. Furthermore, by referring to the rotation speed of the fan 115, which is a typical hardware component that operates on a constant 5V power supply, the CPU 101 can infer that the constant 5V power supply will be stopped in a versatile and efficient manner.

[0083] Furthermore, when the EC 111 sends an ENABLE signal to the DDC 116, the CPU 101 may be configured to recheck the fan rotation speed after a reset. This allows the CPU 101 to distinguish between a fault in the DDC 116 and a failure in the fan 115. Furthermore, when a fan error is detected, the CPU 101 may also check the status of a USB-related device that always uses a 5V power supply. This also allows the CPU 101 to distinguish between a fault in the DDC 116 and a failure in the fan 115. As a result, unnecessary recovery processing is suppressed. [Explanation of symbols]

[0084] 10. Information processing equipment 11 Converter 12 Fans 13 processors 14 Data 15 Enable signal

Claims

1. a converter that converts a first DC having a first voltage into a second DC having a second voltage different from the first voltage, the converter stopping output of the second DC in response to detection of an abnormal current and resuming output in response to receiving an enable signal; a fan that rotates using the second direct current; a processor that acquires data on the number of revolutions per unit time of the fan, and controls the enable signal to be sent to the converter in response to detection of a fan error indicating that the number of revolutions is equal to or less than a threshold; An information processing device having the above configuration.

2. Further, another processor is connected to each of the fan and the processor via a control signal line, and measures the number of rotations of the fan; the processor acquires the data on the number of revolutions from the other processor, and requests the other processor to transmit the enable signal in response to detection of the fan error; 2. The information processing device according to claim 1.

3. The processor acquires the data of the number of rotations, detects the fan error, and controls the enable signal in accordance with a Basic Input Output System (BIOS) program executed when the information processing device is started.

2. The information processing device according to claim 1.

4. After the enable signal is transmitted, the processor reacquires the data of the rotation speed to determine whether the fan error has been eliminated, and if the fan error has not been eliminated, inhibits further transmission of the enable signal to the converter.

2. The information processing device according to claim 1.

5. The processor determines a state of a device that uses the second direct current other than the fan in response to detection of the fan error, and when the device is normal, inhibits transmission of the enable signal to the converter.

2. The information processing device according to claim 1.

Citation Information

Patent Citations

  • Method and device for controlling power source of computer and computer

    JP2001195277A

  • Electronic device with reduced power consumption during power-off and method of reducing power consumption

    JP2011248788A

  • Power circuit and information processor

    JP2019033593A

  • Electronic apparatus, electronic system and power supply control method

    JP2019040239A