Solid-state imaging device

By adopting a combined structure of photoelectric conversion, initialization, comparison and counter in solid-state imaging equipment, the problem of insufficient speed and accuracy is solved, high speed and high precision imaging effects are achieved, and the noise and cost of the equipment are reduced.

JP7624427B2Active Publication Date: 2025-01-30NUVOTON TECH CORP JAPAN
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Patent Information

Application Number
JP2022500433
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-02-14
Filing Date
2021-02-09
Publication Date
2025-01-30
Estimated Expiration
2041-02-09

Smart Images

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  • Figure 0007624427000002
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  • Figure 0007624427000003
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Patent Text Reader

Abstract

A solid-state imaging device (200) is provided with: a photoelectric conversion unit (100) which comprises a plurality of pixel cells (10) arrayed in rows and columns, each of the plurality of pixel cells (10) generating charge by photoelectric conversion, and which holds a potential corresponding to the amount of the generated charge; an initialization unit (101) for initializing the potential of the photoelectric conversion unit (100); a comparison unit (102) which compares the potential of the photoelectric conversion unit (100) with a predetermined reference signal, and which, if the potential and the predetermined reference signal correspond to each other, causes the initialization unit (101) to perform initialization; and a counter unit (103) which counts the number of times of initialization performed by the initialization unit (101), and outputs a signal corresponding to the number of times as a first signal indicating the intensity of incident light.
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Description

[Technical field]

[0001] The present disclosure relates to a solid-state imaging device. [Background technology]

[0002] Patent Document 1 discloses a pulse modulation method as a method for detecting light intensity in a CMOS image sensor. As the pulse modulation method, a pulse width modulation (PWM) method and the like are introduced. The PWM method is a method in which the intensity of incident light is reflected in the pulse width. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-252743 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, there is a demand for even faster and more accurate solid-state imaging devices than in the past.

[0005] The present disclosure provides a solid-state imaging device that allows for increased speed and accuracy. [Means for solving the problem]

[0006] A solid-state imaging device according to an aspect of the present disclosure includes a plurality of pixel cells arranged in a matrix, each of the plurality of pixel cells including a photoelectric conversion unit that generates electric charges by photoelectric conversion and holds an electric potential corresponding to an amount of the generated electric charges, an initialization unit that initializes the electric potential of the photoelectric conversion unit, and a reference signal that is a signal obtained by inputting a reference signal to the photoelectric conversion unit. Voltage Compare with The potential of the photoelectric conversion unit and the voltage of the predetermined reference signal a comparison unit that causes the initialization unit to execute initialization when the two match, and a counter unit that counts the number of initializations executed by the initialization unit and outputs a signal corresponding to the number of initializations as a first signal indicating the intensity of the incident light; an initialization control unit that, when an output line indicating a comparison result of the comparison unit is inverted, causes the initialization unit to execute initialization and feeds back a potential of the photoelectric conversion unit to the photoelectric conversion unit via the initialization unit; Equipped with. Effect of the Invention

[0007] According to the solid-state imaging device according to the present disclosure, it is possible to achieve high speed and high accuracy. [Brief description of the drawings]

[0008] [Figure 1A] FIG. 1A is a diagram showing a schematic configuration of a solid-state imaging device according to an embodiment. [Figure 1B] FIG. 1B is a diagram illustrating the operation of the solid-state imaging device of FIG. 1A. [Figure 2A] FIG. 2A is a diagram illustrating an example of a configuration of the solid-state imaging device according to the first embodiment. [Figure 2B] FIG. 2B is a diagram showing another configuration example of the pixel cell in FIG. 2A. [Figure 2C] FIG. 2C is a circuit diagram showing an example of the SF circuit in FIG. 2B. [Diagram 3] FIG. 3 is a time chart showing an example of the operation of the solid-state imaging device according to the first embodiment. [Figure 4] FIG. 4 is a diagram illustrating an example of a configuration of a solid-state imaging device according to the second embodiment. [Diagram 5] FIG. 5 is a time chart showing an example of the operation of the solid-state imaging device according to the second embodiment. [Figure 6A] FIG. 6A is a diagram illustrating an example of a configuration of a solid-state imaging device according to the third embodiment. [Figure 6B] FIG. 6B is a diagram showing another example of the configuration of the solid-state imaging device according to the third embodiment. In FIG. [Figure 7] FIG. 7 is a time chart showing an example of the operation of the solid-state imaging device according to the third embodiment. [Figure 8] FIG. 8 is a diagram illustrating an example of a configuration of a solid-state imaging device according to the fourth embodiment. In FIG. [Figure 9] FIG. 9 is a diagram illustrating an example of a configuration of a solid-state imaging device according to the fifth embodiment. In FIG. [Figure 10] FIG. 10 is a time chart showing an example of the operation of the solid-state imaging device according to the fifth embodiment. [Figure 11A] FIG. 11A is a diagram illustrating an example of a configuration of a solid-state imaging device according to the sixth embodiment. [Figure 11B] FIG. 11B is a diagram showing a voltage waveform generated by the taper voltage generating section of FIG. 11A. [Figure 12] FIG. 12 is a diagram illustrating an example of a configuration of a solid-state imaging device according to the seventh embodiment. In FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] First, an overview of a solid-state imaging device according to an embodiment of the present disclosure will be described.

[0010] A solid-state imaging device according to one embodiment of the present disclosure includes a plurality of pixel cells arranged in a matrix, each of the plurality of pixel cells including a photoelectric conversion unit that generates an electric charge by photoelectric conversion and holds an electric potential corresponding to the amount of the generated electric charge, an initialization unit that initializes the electric potential of the photoelectric conversion unit, a comparison unit that compares the electric potential of the photoelectric conversion unit with a predetermined reference signal and causes the initialization unit to perform initialization when the electric potential matches, and a counter unit that counts the number of initializations performed by the initialization unit and outputs a signal corresponding to the number of times as a first signal indicating the intensity of incident light.

[0011] According to this, the first signal can be generated as a digital signal, and it is easy to increase the speed. Furthermore, even if the incident light is so strong that the amount of charge generated by photoelectric conversion greatly exceeds the saturation charge amount of the photoelectric conversion unit 100, imaging is performed with initialization, so that imaging can be performed accurately even in a very bright scene.

[0012] For example, the solid-state imaging device may further include an AD conversion unit that performs AD conversion on the potential of the photoelectric conversion unit after the last initialization, and outputs the AD converted data as a second signal indicating the intensity of incident light.

[0013] According to this, the electric charge remaining in the photoelectric conversion unit after the last initialization without being initialized is AD converted and output as a second signal. Since the second signal corresponds to an amount of electric charge that is less than one count of the first signal, the intensity of the incident light can be calculated with higher accuracy.

[0014] For example, the AD conversion unit may be provided for each pixel cell.

[0015] This makes it possible to easily realize a global shutter.

[0016] For example, the AD conversion unit may be provided for each predetermined number of pixel cells.

[0017] According to this, if the predetermined number of pixel cells are pixel cells for each column, a rolling shutter can be easily realized.

[0018] For example, the solid-state imaging device may further include a signal processing unit that generates a third signal indicating an intensity of incident light by combining the first signal and the second signal.

[0019] This makes it possible to achieve both high speed and high accuracy. Regarding the increase in speed, if the number of bits of the counter section is reduced to limit the maximum count value, that is, if the number of initializations that can be counted within one frame period is limited, the frame rate can be easily increased. Even if the number of bits of the counter section is limited in this way, the accuracy is improved by the second signal, so that both high speed and high accuracy can be easily achieved.

[0020] For example, each of the plurality of pixel cells may further include a feedback circuit that feeds back a potential of the photoelectric conversion unit to the photoelectric conversion unit via the initialization unit when the photoelectric conversion unit is initialized by the initialization unit.

[0021] According to this, by initializing the potential of the photoelectric conversion unit through feedback, it is possible to reduce kTC noise during initialization, thereby enabling good imaging with less noise even in dark scenes.

[0022] For example, the feedback circuit may include an amplifier that outputs a difference between a voltage of the photoelectric conversion unit and a predetermined voltage to the initialization unit as an initial voltage.

[0023] This makes it possible to configure a feedback path via the amplifier section.

[0024] For example, the initialization unit may include a transistor, one of the source and drain of the transistor being connected to the photoelectric conversion unit, an initial voltage being input to the other of the source and drain of the transistor, and a gate of the transistor being connected to an output line indicating the comparison result of the comparison unit, and the amplification unit may include an amplifier that outputs the difference between the voltage of the photoelectric conversion unit and a predetermined voltage as the initial voltage to the drain of the transistor.

[0025] According to this, since the initialization section is composed of transistors, the initialization operation can be easily controlled to an appropriate speed, and the feedback loop can also be composed of a simple circuit.

[0026] For example, the initialization unit may include a transistor, one of a source and a drain of the transistor being connected to the photoelectric conversion unit, the other of the source and drain of the transistor receiving an initial voltage, and the gate of the transistor being connected to an output line indicating the comparison result of the comparison unit.

[0027] According to this, since the initialization section is composed of transistors, the initialization operation can be easily controlled to an appropriate speed.

[0028] For example, each of the plurality of pixel cells may further include an initialization control unit that causes the initialization unit to perform initialization when an output line indicating the comparison result of the comparison unit is inverted, and that feeds back the potential of the photoelectric conversion unit to the photoelectric conversion unit via the initialization unit.

[0029] This makes it possible to easily control the initialization section and the feedback section simultaneously without causing a timing lag between them.

[0030] For example, each of the plurality of pixel cells may further include an overflow drain section for discharging charge, and a transfer transistor for transferring charge exceeding a predetermined amount in the photoelectric conversion section to the overflow drain section, and the potential of the overflow drain section may be input to the comparison section as the potential of the photoelectric conversion section.

[0031] This makes it possible to reduce the number of elements connected to the photoelectric conversion unit, improve the amount of voltage per generated charge, and relatively suppress the influence of noise in the AD conversion unit, for example.

[0032] For example, the solid-state imaging device may further include a taper voltage generation unit that generates a taper voltage whose voltage changes over time when a signal indicating that the potential of the photoelectric conversion unit matches a predetermined reference signal is input from the comparison unit and supplies the taper voltage to the gate of the transistor.

[0033] This makes it possible to suppress kTC noise during the initialization operation, enabling good imaging with less noise even in dark scenes.

[0034] For example, the solid-state imaging device may include a first semiconductor substrate having the photoelectric conversion portion and a second semiconductor substrate having the counter portion, and the first semiconductor substrate and the second semiconductor substrate may be stacked.

[0035] This allows the solid-state imaging device 200 to be miniaturized due to its layered structure.

[0036] For example, the solid-state imaging device may include a first semiconductor substrate having the photoelectric conversion unit and a second semiconductor substrate having the AD conversion unit, and the first semiconductor substrate and the second semiconductor substrate may be stacked.

[0037] This allows the solid-state imaging device 200 to be miniaturized due to its layered structure.

[0038] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the drawings. Note that each of the embodiments described below shows a specific example of the present disclosure. The numerical values, shapes, materials, components, the arrangement and connection forms of the components, drive timing, etc. shown in the following embodiments are merely examples and are not intended to limit the present disclosure. In addition, among the components in the following embodiments, components that are not described in the independent claims showing the highest concept of the present disclosure will be described as optional components. In addition, each figure is not necessarily a strict illustration. In each figure, duplicated explanations of substantially the same configuration are omitted or simplified.

[0039] Next, a schematic configuration of a solid-state imaging device according to an embodiment of the present disclosure will be described.

[0040] Fig. 1A is a diagram showing a schematic configuration of a solid-state imaging device 200 according to an embodiment, and Fig. 1B is a diagram illustrating the operation of the solid-state imaging device 200 of Fig. 1A.

[0041] 1A, the solid-state imaging device 200 includes a plurality of pixel cells 10 arranged in a matrix. Each of the pixel cells 10 includes a photoelectric conversion unit 100, an initialization unit 101 that initializes the photoelectric conversion unit 100, and a counter unit 103.

[0042] The photoelectric conversion unit 100 generates charges by photoelectric conversion and holds a potential according to the amount of the generated charges. The potential of the photoelectric conversion unit 100 decreases over time from an initial voltage because charges are generated according to the amount of incident light, for example, as shown in FIG. 1B.

[0043] The initialization unit 101 initializes the photoelectric conversion unit 100 to an initial voltage when the voltage of the photoelectric conversion unit 100 drops to the reference voltage. For example, the initialization unit 101 turns on at the timing of the arrow in FIG. 1B when the potential of the photoelectric conversion unit 100 drops to the reference voltage, and initializes the photoelectric conversion unit 100. The initial voltage may be, for example, a power supply voltage Vdd or a predetermined voltage value. Having been initialized to the initial voltage, the initialization unit 101 turns off and cancels the initialization.

[0044] The counter unit 103 counts the number of times the initialization unit 101 initializes the photoelectric conversion unit 100, and outputs a signal corresponding to the number of times as a first signal indicating the intensity of incident light. In the example of Fig. 1B, the counter unit 103 starts a counting operation from an initial value of 0, and counts up to 3. The digital signal OUT1 is an example of the first signal, and in Fig. 1B, it is a digital value indicating a value of 3.

[0045] In this way, the solid-state imaging device 200 generates a digital signal OUT1 for each pixel cell. This enables high-speed imaging, and furthermore, even in a state in which the photoelectric conversion unit 100 is irradiated with light so strong that photoelectric conversion is not possible in the photoelectric conversion unit 100 (i.e., the amount of charge by photoelectric conversion exceeds the saturation charge amount), the photoelectric conversion unit 100 generates a digital signal while being initialized, making it possible to capture an image even in a scene that is bright enough to exceed the conversion capacity of the photoelectric conversion unit 100.

[0046] (Embodiment 1) In the first embodiment, a more specific configuration example of the solid-state imaging device 200 will be described. Fig. 2A is a diagram showing a configuration example of the solid-state imaging device 200 according to the second embodiment. Fig. 3 is a time chart showing an operation example of the solid-state imaging device 200 shown in Fig. 2A.

[0047] 2A and 3, the solid-state imaging device 200 according to this embodiment differs from the solid-state imaging device 200 shown in FIG. 1A in that the pixel cell 10 further includes a comparison unit 102, and the solid-state imaging device 200 further includes a reset voltage generation unit 20, a REF voltage generation unit 30, and a count control signal generation unit 40 connected to the pixel cell 10. Note that REF means a reference signal for comparison. The following description will be focused on the differences to avoid duplication.

[0048] The comparison unit 102 compares the potential of the photoelectric conversion unit 100 with a predetermined reference signal REF, and when they match, causes the initialization unit 101 to execute initialization. Specifically, the comparison unit 102 compares the high / low relationship between the voltage of the output signal PD of the photoelectric conversion unit 100 and the voltage of the reference signal REF output by the REF voltage generation unit 30, and outputs a low level as the reset signal RST if the voltage of the output signal PD is higher, or a high level if it is not higher.

[0049] The reset voltage generating unit 20 generates an output signal VINI. The output signal VINI may be, for example, a power supply voltage VDD or may be another voltage value. The output signal VINI is supplied to the photoelectric conversion unit 100 via the initialization unit 101 as an initial voltage or a reset voltage.

[0050] The REF voltage generating unit 30 generates a reference signal REF. The reference signal REF may be, for example, a voltage value of the photoelectric conversion unit 100 when the charge held in the photoelectric conversion unit 100 is saturated, or a voltage value between the voltage value and the power supply voltage VDD.

[0051] The count control signal generating unit 40 generates a count initialization signal INIT and a count stop signal STOP to control the counter unit 103. The count initialization signal INIT is a control signal for initializing the count value of the counter unit 103 to 0. The count stop signal STOP is a signal for controlling whether the counter unit 103 starts or stops the counting operation.

[0052] The timing chart in Fig. 3 shows imaging operations for two frames. The first frame corresponds to relatively strong incident light, and the second frame corresponds to relatively weak incident light.

[0053] As shown in FIG. 3, when the reset signal RST is at a high level, the initialization unit 101 initializes the output signal PD of the photoelectric conversion unit 100 to the output signal VINI output by the reset voltage generation unit 20.

[0054] When the count stop signal STOP output by the count control signal generating unit 40 is at a low level, the counter unit 103 counts the number of times the reset signal RST transitions from a low level to a high level and outputs the count result to the count signal OUT. When the count stop signal STOP is at a high level, the counter unit 103 stops in the counting state, and when the count initialization signal INIT becomes at a high level, the counter unit 103 initializes the count value to 0.

[0055] In addition, by setting the reference signal REF to a power supply voltage VDD higher than the output signal VINI, the reset signal RST becomes high level, initializing the photoelectric conversion unit 100, and by setting the count initialization signal INIT and the count stop signal STOP to high level, the count signal OUT1 is initialized to 0.

[0056] In addition, by setting the count initialization signal INIT and the count stop signal STOP to a low level and setting the reference signal REF to a lower voltage than the output signal VINI, the reset signal RST becomes a low level, initialization is stopped, the voltage of the output signal PD decreases from the output signal VINI at a rate corresponding to the amount of light irradiation, and when the voltage of the output signal PD reaches the voltage REF, the reset signal RST transitions to a high level, the count signal OUT becomes 1, the photoelectric conversion unit 100 is initialized, the voltage of the output signal PD becomes the output signal VINI, and the reset signal RST becomes a low level.

[0057] In addition, the voltage of the output signal PD decreases from the output signal VINI at a rate corresponding to the amount of light irradiation, and when it reaches the voltage VERF, the reset signal RST transitions to a high level, the count signal OUT becomes 2, the photoelectric conversion unit 100 is initialized, and the voltage of the output signal PD becomes the output signal VINI.

[0058] Furthermore, when the count stop signal STOP goes high, the count signal continues to hold the count value at that point in time, thereby generating a digital signal OUT1 corresponding to the amount of light irradiated to the photoelectric conversion unit 100 for each pixel cell.

[0059] The solid-state imaging device 200 according to the present embodiment described above with reference to Figs. 2A and 3 resets when a certain amount of charge is accumulated, and outputs the number of resets as a digital value. The solid-state imaging device 200 is capable of high-speed imaging by generating a digital signal for each pixel cell. Furthermore, even when the photoelectric conversion unit 100 is irradiated with light so strong that the photoelectric conversion unit 100 cannot perform photoelectric conversion, the photoelectric conversion unit 100 generates a digital signal while being initialized, so imaging is possible even in a scene that is bright enough to exceed the conversion capacity of the photoelectric conversion unit 100.

[0060] Furthermore, since the photoelectric conversion section 100 can capture an image accompanied by initialization even if the light receiving area is reduced, the solid-state imaging device 200 can be made smaller and less expensive.

[0061] If the number of bits of the counter unit 103 is M, the number of initializations is (2 M −1) times. M may be determined according to the difference between VINI and REF, for example.

[0062] The pixel cell 10 may include a SF (source follower) circuit 108 as shown in FIG. 2B. FIG. 2C shows a configuration example of the SF circuit 108. As shown in FIG. 2C, the SF circuit 108 is composed of an amplifier transistor 108a and a current source 108b. The amplifier transistor 108a converts a potential generated by the charge of the photoelectric conversion unit 100 into a voltage and outputs the voltage to the comparison unit 102. The current source 108b is a load that supplies a load current to the amplifier transistor 108a, and may be composed of, for example, a resistor, a diode, a transistor, or the like. By configuring as shown in FIG. 2B, it is possible to prevent the charge of the photoelectric conversion unit 100 from being destroyed and stabilize the operation.

[0063] (Embodiment 2) In the second embodiment, a solid-state imaging device that can achieve higher accuracy than that of the first embodiment by including an AD conversion section 50 will be described.

[0064] Fig. 4 is a diagram showing a configuration example of a solid-state imaging device 200 according to embodiment 2. Fig. 5 is a time chart showing an operation example of the solid-state imaging device 200 shown in Fig. 4.

[0065] 4 and 5, the solid-state imaging device 200 according to this embodiment differs from the solid-state imaging device 200 shown in Fig. 2A in that it has an AD conversion section 50 connected to the pixel cell 10 and a digital signal processing section 60. The following description will be focused on the differences, avoiding duplication.

[0066] The AD conversion unit 50 performs AD conversion on the potential of the photoelectric conversion unit 100 after it has been last initialized in a frame, and outputs the AD converted data as a second signal indicating the intensity of the incident light. Specifically, the AD conversion unit 50 outputs a digital signal OUT2 corresponding to the voltage of the output signal PD after the counter unit 103 stops counting. The AD conversion unit 50 may be, for example, a single-slope AD converter. The AD conversion unit 50 may also be of another type, such as a successive approximation type.

[0067] The digital signal processing unit 60 generates a third signal, digital signal OUT3, which indicates the intensity of the incident light, by combining the count signal OUT1, which is a first signal, and the digital signal OUT2, which is a second signal. For example, the digital signal processing unit 60 combines the count signal OUT1 and the digital signal OUT2 to generate a new digital signal OUT3. In the example of FIG. 5, the count signal OUT1 is 5 and the digital signal OUT2 is 6. The AD conversion unit 50 is assumed to have a 4-bit resolution of 16. Also, the counter unit 103 is assumed to have a 12-bit resolution of 2 12 In this case, the digital signal OUT3 has a resolution of 2 16 The digital signal OUT3 becomes (16 × count signal OUT1 + digital signal OUT2) = (16 × 5 + 6) = 96.

[0068] If the number of bits of the counter section 103 is M and the number of bits of the AD conversion section 50 is L, the number of bits of the digital signal OUT3 is M+L bits.

[0069] The digital signal processing unit 60 may simply concatenate the M-bit data of the count signal OUT1 and the L-bit data of the digital signal OUT2 as MSB side data and LSB side data.

[0070] In addition, the digital signal processing unit 60 may combine the M-bit data of the count signal OUT1 and the L-bit data of the digital signal OUT2 into data of the digital signal OUT3 having fewer bits than (M+L) by performing a calculation on the MSB side data and the LSB side data.

[0071] Conversely, the digital signal processing unit 60 may combine the M-bit data of the count signal OUT1 and the L-bit data of the digital signal OUT2 into data of the digital signal OUT3 having more bits than (M+L) by calculating the M-bit data of the count signal OUT1 and the LSB data.

[0072] 4 and 5, the solid-state imaging device according to the present embodiment converts the residual into an analog signal and outputs it digitally together with the number of resets. This makes it possible to output a higher-definition digital signal according to the amount of light irradiation, enabling good imaging that reproduces brightness and color closer to the outside world.

[0073] The AD conversion unit 50 may be provided for each pixel cell 10. In this way, a global shutter can be easily realized.

[0074] Furthermore, the AD conversion unit 50 may be provided for every predetermined number of pixel cells 10. The predetermined number of pixel cells 10 may be for every pixel cell 10 belonging to the same column. If the predetermined number of pixel cells are pixel cells for each column, a so-called rolling shutter can be easily realized.

[0075] 5, the digital signal processing unit 60 may perform CDS (Correlated Double Sampling) in AD conversion of the residual. Furthermore, the digital signal processing unit 60 may perform CDS using the AD conversion unit 50 in each section from the initialization of the output signal PD other than the residual to the next initialization. Furthermore, it may selectively determine in advance or dynamically whether to perform CDS in each section. For example, CDS may be performed on the output signal PD up to the first initialization, or CDS may be performed only when the illuminance is low.

[0076] (Embodiment 3) In the third embodiment, a configuration will be described that includes a feedback circuit that feeds back the potential of the photoelectric conversion unit 100 to the photoelectric conversion unit 100 via the initialization unit 101 during initialization by the initialization unit 101. By feeding back the initial voltage, it is possible to cancel kTC noise during initialization.

[0077] Fig. 6A is a diagram showing an example of the configuration of solid-state imaging device 200 according to the embodiment. Fig. 7 is a time chart showing an example of the operation of solid-state imaging device 200 shown in Fig. 6A.

[0078] 6A and 7, the solid-state imaging device 200 according to this embodiment differs from the solid-state imaging device 200 shown in FIG. 2A in that the pixel cell 10 has an inverting amplifier unit 104 and an inverting amplifier unit 105 instead of the comparison unit 102, and has a feedback circuit including the inverting amplifier unit 105 to which the output signal VINI of the reset voltage generation unit 20 is input.

[0079] The inverting amplifier unit 104 is an operational amplifier, and similar to the comparison unit 102, compares the voltage of the output signal PD of the photoelectric conversion unit 100 with the voltage of the reference signal REF output by the REF voltage generation unit 30, and outputs a low level as a reset signal RST if the voltage of the output signal PD is higher, or a high level if the voltage is lower.

[0080] Moreover, the inverting amplifier 105 is an operational amplifier, and configures a feedback circuit that feeds back the potential of the photoelectric conversion unit 100 to the photoelectric conversion unit 100 via the initialization unit 101 during initialization by the initialization unit 101. Specifically, the inverting amplifier 105 amplifies the difference between the voltage of the output signal PD and the output signal VINI output by the reset voltage generation unit 20, and outputs the amplified difference.

[0081] The solid-state imaging device according to the present embodiment described above in FIG. 6A and FIG. 7 performs feedback reset. With these configurations and drives, a digital signal is generated for each pixel cell, enabling high-speed imaging. Furthermore, even when the photoelectric conversion unit 100 is irradiated with light so strong that the photoelectric conversion unit 100 cannot perform photoelectric conversion, the photoelectric conversion unit 100 generates a digital signal while being initialized, making it possible to image even in a scene that is bright enough to exceed the conversion capacity of the photoelectric conversion unit 100. Furthermore, by adding an inverting amplifier unit 105 and initializing the amplified signal by feeding it back, it is possible to reduce noise during initialization. As shown in FIG. 7, each output signal PD immediately after initialization can be adjusted to a level with less variation due to noise. As a result, good imaging with less noise is possible even in a dark scene.

[0082] The pixel cell 10 in FIG. 6A may be configured to include a transfer transistor 109, an overflow drain section 110, and an overflow drain control transistor 111, as shown in FIG. 6B.

[0083] The transfer transistor 109 is a transfer transistor that transfers charges exceeding a predetermined amount in the photoelectric conversion unit 100 to the overflow drain unit 110. A voltage Vov that passes charges exceeding a predetermined amount is set to the gate of the transfer transistor 109.

[0084] The overflow drain unit 110 is a port for discharging electric charges that is set to a voltage Vd when the overflow drain control transistor 111 is in an on state. The voltage Vd may be, for example, a power supply voltage Vdd, or may be another voltage value.

[0085] 6B, by turning off the overflow drain control transistor 111 during the photoelectric conversion period, the voltage of the overflow drain section 110 changes in response to the charge overflowing from the photoelectric conversion section 100. When the potential of the overflow drain section 110 drops to the voltage of the reference signal REF, the inverting amplifier section 104 and the initialization section 101 reset the photoelectric conversion section 100. This makes it possible to reduce the number of elements connected to the photoelectric conversion section 100, improve the amount of voltage per generated charge, and relatively suppress the influence of noise from the AD conversion section 50, for example.

[0086] (Embodiment 4) In the fourth embodiment, a configuration example in which the second and third embodiments are combined will be described.

[0087] Fig. 8 is a diagram showing a configuration example of a solid-state imaging device 200 according to embodiment 4. The solid-state imaging device 200 in Fig. 8 includes the pixel cell 10 in Fig. 6A of embodiment 3 instead of the pixel cell 10 in Fig. 4 of embodiment 2.

[0088] The solid-state imaging device 200 shown in FIG. 8 includes an AD conversion unit 50 connected to the pixel cell 10, and a digital signal processing unit 60. The AD conversion unit 50 outputs a digital signal OUT2 corresponding to the voltage of the output signal PD after the counter unit 103 stops counting, and the digital signal processing unit 60 combines the count signal OUT with the digital signal OUT2 to generate a new digital signal OUT3.

[0089] Moreover, in addition to feedback reset, the solid-state imaging device 200 shown in FIG. 8 converts the residual into an analog-to-digital signal and outputs it digitally together with the number of resets. This makes it possible to output a higher-definition digital signal according to the amount of light irradiation, enabling imaging that reproduces brightness and color closer to that of the outside world.

[0090] (Embodiment 5) In embodiment 5, a configuration example is described in which, when an output line indicating the comparison result of the comparison unit is inverted, the initialization unit 101 is caused to perform initialization, and the potential of the photoelectric conversion unit 100 is fed back to the photoelectric conversion unit 100 via the initialization unit 101.

[0091] Fig. 9 is a diagram showing a configuration example of a solid-state imaging device 200 according to embodiment 5. Fig. 10 is a time chart showing an operation example of the solid-state imaging device 200 shown in Fig. 9.

[0092] 9 and 10, in the solid-state imaging device 200 according to this embodiment, compared to the solid-state imaging device 200 shown in FIG. 1A, the pixel cell 10 further includes an amplifier unit 106 and an initialization control unit 107, and the solid-state imaging device 200 further includes a reset voltage generation unit 20 connected to the pixel cell 10, a REF voltage generation unit 30, a count control signal generation unit 40, an AD conversion unit 50, a digital signal processing unit 60, and an initialization control unit 107.

[0093] Moreover, the amplifier 106 amplifies the difference between the voltage of the output signal PD of the photoelectric conversion unit 100 and the voltage of the reference signal REF2 output by the REF voltage generating unit 30, and outputs the amplified difference.

[0094] In addition, when the initialization selection signal SEL output from the initialization control unit 107 is at a low level, the initialization control unit 107 connects the output signal CNT of the amplifier unit 106 to the input signal SET to the initialization unit 101, and also connects the initialization signal CTL output from the initialization control unit 107 to a reset signal RST to the initialization unit 101, and when the initialization selection signal SEL is at a high level, the initialization control unit 107 connects the output signal CNT to the reset signal RST, and also connects the initialization voltage signal INI2 output from the initialization control unit 107 to the input signal SET.

[0095] In addition, when the reset signal RST is at a high level, the initialization unit 101 initializes the voltage of the output signal PD of the photoelectric conversion unit 100 by connecting the output signal PD to the input signal SET, and when the reset signal RST is at a low level, the initialization unit 101 disconnects the input signal SET and the output signal PD, thereby putting the output signal PD into a floating state.

[0096] In addition, when the count stop signal STOP output by the count control signal generating unit 40 is at a low level, the counter unit 103 counts the number of times the reset signal RST transitions from a low level to a high level and outputs the count result to the count signal OUT. When the count stop signal STOP is at a high level, the counter unit 103 stops in the counting state, and when the count initialization signal INI becomes at a high level, the counter unit 103 initializes the count value to 0.

[0097] In addition, by setting the reference signal REF2 as the output signal VINI, setting the initialization selection signal SEL to a low level, and setting the initialization signal CTL to a high level, the photoelectric conversion unit 100 is initialized to the output signal VINI, and by setting the count initialization signal INT and the count stop signal STOP to a high level, the count signal OUT is initialized to 0.

[0098] In addition, by setting the count initialization signal INI and the count stop signal STOP to low levels, setting the reference signal REF to a voltage VERF lower than the output signal VINI, and setting the initialization selection signal SEL to high level, the feedback path between the input and output of the amplifier unit 106 is blocked, the amplifier unit 106 essentially acts as a comparison unit, the output signal CNT becomes low level, initialization is stopped, the voltage of the output signal PD decreases from the output signal VINI at a rate according to the amount of light irradiation, and when the voltage of the output signal PD reaches the voltage VERF, the reset signal RST transitions to high level, the count signal OUT becomes 1, the photoelectric conversion unit 100 is initialized, the voltage of the output signal PD becomes the output signal VINI2 of the count initialization signal INI2, and the reset signal RST becomes low level.

[0099] In addition, the voltage of the output signal PD decreases from the output signal VINI at a rate corresponding to the amount of light irradiation, and when it reaches the voltage VERF, the output signal CNT transitions to a high level, the count signal OUT becomes 2, the photoelectric conversion unit 100 is initialized, and the voltage of the output signal PD becomes the output signal VINI2.

[0100] In addition, when the count stop signal STOP goes high and the count signal continues to hold the count value at that point, a digital signal corresponding to the amount of light irradiated to the photoelectric conversion unit 100 is generated for each pixel cell.

[0101] 9 and 10, the solid-state imaging device according to the present embodiment uses a comparison section and an inverting amplifier section in common, and these configurations and drives generate digital signals for each pixel cell, enabling high-speed imaging, and furthermore, even in a state in which the photoelectric conversion section 100 is irradiated with light so strong that photoelectric conversion cannot be performed by the photoelectric conversion section 100, the photoelectric conversion section 100 generates a digital signal while being initialized, enabling imaging even in a bright scene that exceeds the conversion capacity of the photoelectric conversion section 100. Furthermore, by configuring and driving the device so that only the first initialization is initialized by feeding back an amplified signal, good imaging with less noise is possible only in dark scenes where low noise is particularly required, while reducing the number of components allows low power consumption and small pixel size, enabling imaging with higher spatial resolution.

[0102] (Embodiment 6) In the sixth embodiment, a configuration example in which a tapered gate signal is supplied to the gate of a transistor constituting the initialization unit 101 will be described.

[0103] Fig. 11A is a diagram showing an example of the configuration of a solid-state imaging device according to embodiment 6. Fig. 11B is a diagram showing a voltage waveform generated by the taper voltage generating section 70 of Fig. 11A.

[0104] Figure 11A differs from Figure 8 in that a taper voltage generating section 70 is added. The following description will focus on the differences.

[0105] When a signal indicating that the potential of the photoelectric conversion unit 100 matches a predetermined reference signal is input from the inverting amplifier unit 104, the taper voltage generation unit 70 generates a tapered voltage whose voltage changes over time and supplies it to the gate of the transistor of the initialization unit 101.

[0106] As a result, in the solid-state imaging device 200 of this embodiment 6, by limiting the bandwidth during initialization of the photoelectric conversion unit 100, the taper reset that controls the ON / OFF of a switch using a signal whose voltage changes at a constant rate over time increases the effect of reducing the amount of noise superimposed on the output signal PD of the photoelectric conversion unit 100, making it possible to capture good images with less noise even in dark scenes.

[0107] (Embodiment 7) In the seventh embodiment, an example will be described in which the solid-state imaging device 200 is configured by two stacked semiconductor substrates.

[0108] 12 is a diagram showing a configuration example of a solid-state imaging device 200 according to an embodiment. The solid-state imaging device 200 in the figure includes a first semiconductor substrate 201 having a photoelectric conversion unit 100 and a second semiconductor substrate 202 having a counter unit 103. The first semiconductor substrate 201 and the second semiconductor substrate 202 are stacked and electrically connected.

[0109] 12, the photoelectric conversion unit 100 and the counter unit 103 are provided on different semiconductor substrates. Note that the photoelectric conversion unit 100 and the counter unit 103 can use any of the solid-state imaging devices 200 described in FIGS. 1A to 11B.

[0110] Thus, by arranging the photoelectric conversion section 100 and the counter section 103 in a stacked manner, it is possible to reduce the area of ​​the cell per pixel, enabling imaging with higher spatial resolution.

[0111] The second semiconductor substrate 202 may include an AD conversion section 50. [Industrial Applicability]

[0112] The distance measuring imaging device according to the present disclosure can be used in, for example, a camera or a distance measuring sensor. [Explanation of symbols]

[0113] 10 pixel cells 20 Reset voltage generator 30 REF voltage generator 40 Count control signal generator 50 AD conversion section 60 Digital Signal Processing Unit 70 Taper voltage generator 100 Photoelectric conversion unit 101 Initialization section 102 Comparison section 103 Counter section 104 Inverting amplifier 105 Inverting amplifier 106 Amplification section 107 Initialization control section 108 SF circuit 108a Amplifying transistor 108b current source 109 Transfer transistor 110 Overflow drain section 111 Overflow drain control transistor 200 Solid-state imaging device 201 First semiconductor substrate 202 Second semiconductor substrate

Claims

1. A plurality of pixel cells arranged in a matrix, Each of the plurality of pixel cells includes: a photoelectric conversion unit that generates charges by photoelectric conversion and holds a potential according to the amount of the generated charges; an initialization unit that initializes a potential of the photoelectric conversion unit; a comparison unit that compares a potential of the photoelectric conversion unit with a voltage of a predetermined reference signal, and causes the initialization unit to execute initialization when the potential of the photoelectric conversion unit and the voltage of the predetermined reference signal match; a counter unit that counts the number of initializations executed by the initialization unit and outputs a signal corresponding to the number of initializations as a first signal indicating the intensity of incident light; an initialization control unit that, when an output line indicating a comparison result of the comparison unit is inverted, causes the initialization unit to execute initialization and feeds back a potential of the photoelectric conversion unit to the photoelectric conversion unit via the initialization unit. Solid-state imaging device.

2. The photoelectric conversion unit further includes an AD conversion unit that performs AD conversion on the potential of the photoelectric conversion unit after the last initialization and outputs the AD converted data as a second signal indicating the intensity of incident light. The solid-state imaging device according to claim 1 .

3. The AD conversion unit is provided for each pixel cell. The solid-state imaging device according to claim 2 .

4. The AD conversion unit is provided for each predetermined number of pixel cells. The solid-state imaging device according to claim 2 .

5. The optical fiber further includes a signal processor that generates a third signal indicating an intensity of incident light by combining the first signal and the second signal.

5. The solid-state imaging device according to claim 2.

6. when the initialization selection signal is at a low level, the initialization control unit connects the output line of the comparison unit to an input signal line to the initialization unit and connects the initialization signal line to a reset signal line to the initialization unit, and when the initialization selection signal is at a high level, connects the output line of the comparison unit to the reset signal line and connects an initialization voltage signal to the input signal line to the initialization unit; When the signal on the reset signal line is at a high level, the initialization unit initializes a potential of the photoelectric conversion unit by connecting an output of the photoelectric conversion unit to the input signal line, and when the signal on the reset signal line is at a low level, the initialization unit disconnects the input signal line from the output of the photoelectric conversion unit to bring the output of the photoelectric conversion unit into a floating state.

6. The solid-state imaging device according to claim 1.

7. Each of the plurality of pixel cells further comprises: an overflow drain portion for discharging electric charge; a transfer transistor that transfers charges exceeding a predetermined amount of the photoelectric conversion unit to the overflow drain unit; The potential of the overflow drain section is input to the comparator section as the potential of the photoelectric conversion section.

7. The solid-state imaging device according to claim 1.

8. A first semiconductor substrate having the photoelectric conversion portion; a second semiconductor substrate having the counter portion; The first semiconductor substrate and the second semiconductor substrate are stacked.

8. The solid-state imaging device according to claim 1.

9. A first semiconductor substrate having the photoelectric conversion portion; a second semiconductor substrate having the AD conversion unit; The first semiconductor substrate and the second semiconductor substrate are stacked.

5. The solid-state imaging device according to claim 2.

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