Radiation detector

Abstract

A radiation detector for spatially resolved detection of radiation and a method for manufacturing the radiation detector are provided. The radiation detector includes at least one sensor tile (1) having a radiation-sensitive sensor material and defining a horizontal plane, a plurality of pixels (2) made of a conductive material connected to the sensor material, and at least one ASIC (5) having a plurality of input contacts (4) in electrical contact with the plurality of pixels (2), at least one of the input contacts (4) being horizontally offset relative to the connected pixel (2). A redistribution layer (10) is provided between the at least one sensor tile (1) and the at least one ASIC (5), the redistribution layer (10) having a plurality of conductor line portions (11) electrically connecting the plurality of input contacts (4) to the plurality of pixels (2). At least one of the conductor line portions (11) intersects at least one intersecting pixel different from the connected pixel. The at least one intersecting pixel has a missing portion (14) of conductive material that coincides at least in part with a projection of the intersecting conductor line portion (11). In this manner, parasitic capacitance between different pixels (2) is minimized or avoided, improving the quality of spatially resolved images.

Description

[Technical field]

[0001] The present invention relates to a radiation detector that provides location-resolved detection of radiation, and a method for making the detector. [Background technology]

[0002] Radiation detectors are mainly used for the detection of electromagnetic radiation, e.g. in the X-ray band or electrons with energies between 1 keV and 400 keV. In some applications, such as X-ray measurements or medical applications such as computed tomography (CT) scans, mammography or angiography, or in electron microscopy for applications such as cryogenic electron microscopy (Cryo-EM), scanning electron microscopy (SEM), transmission electron microscopy (TEM) and scanning transmission electron microscopy (STEM), location-resolved detection of radiation is required.

[0003] Known detectors are semiconductor detectors that directly or indirectly convert incident radiation, i.e. incident photons or electrons, into an electric charge proportional to the absorbed energy. Semiconductor radiation detectors can be built up from detector modules. Each module consists of one or more semiconductor sensor tiles and one or more readout application specific integrated circuits (ASICs). Thus, the photons or electrons are converted into an electric charge in the semiconductor sensor tiles. The electric charge is then evaluated, for example, on a position-resolved image of the incident radiation. In photon or electron counting detectors, the evaluation of the electric charge, which is completed in the ASIC, involves counting the number of charge pulses that exceed a certain threshold within a time frame.

[0004] By "positionally resolved" we mean that the detector determines, for example, the number of photons, the number of electrons, or the amount of radiation of stored energy per position in space. For that purpose, the space of sensitive material is discretized as pixels, which are usually represented by areas of conductive material defined on the sensor tile surface. In other embodiments, a pixel may refer to a corresponding area defined by a conductive diffusion layer of the sensor layer with a metal contact on top (the diffusion layer is part of a PIN diode structure formed inside the sensor layer of, for example, silicon). The bottom surface of the sensor tile contains pixels arranged periodically. The distance between adjacent pixels is defined as the "pitch". The spatial resolution of the detector depends on the size and spacing of the pixels. The smaller the pixel at which the incident photons or electrons are detected, the smaller the pixel pitch can generally be. The greater the number of area pixels of the sensor tile, the higher the spatial resolution.

[0005] Each pixel is electrically connected to an input contact of a readout ASIC, for example by a solder bump. A series of input contacts are arranged on the ASIC. The pitch of the input contacts of the ASIC is defined as the distance between adjacent input contacts. Typically, the pitch of the input contacts is uniform over the entire ASIC. When the input contacts do not cover the entire ASIC, such pitch uniformity may not be maintained between adjacent input contacts at the edges of adjacent ASICs.

[0006] The pitch between two normal input contacts is preferably 20 μm to 500 μm. In known semiconductor radiation detectors, the pixels and the input contacts are electrically connected directly, i.e. the sensor pixel pitch and the ASIC input contact pitch are the same, and the pixels connected to the input contacts are arranged opposite each other.

[0007] Multiple detector modules can be assembled side-by-side to record radiation over a larger area than a single detector module, with gaps in the areas where adjacent modules are connected leaving no radiation detected.

[0008] Furthermore, the quality of spatially resolved detection also depends on further factors. In conventional semiconductor detectors, the charge generated by the incident radiation is converted to a voltage in an ASIC with a charge-sensitive amplifier. The amplitude of the resulting voltage signal and its background noise level are strongly influenced by the input capacitance of the amplifier. The optimal performance of a semiconductor detector is achieved when the noise is as low as possible and the signal is as large as possible. Since the signal-to-noise ratio determines the fundamental performance parameters of the detector, such as the response of the detector to low-energy radiation, it is important that the signal-to-noise ratio of the voltage signal is high and uniform throughout the detector. To ensure a high uniformity of the signal-to-noise ratio, it is necessary to achieve a uniform capacitance distribution throughout the detector by reducing the input capacitance of the amplifier, which is sensitive to the charge. For the signal-to-noise ratio to be further reduced, further noise sources in the environment must be reduced as well.

[0009] In general, it is desirable to have a radiation detector that covers an area with no or at least reduced dead zones and no or at least reduced variations in pixel pitch between detector modules, sensor tiles, or two ASICs. This is particularly important in imaging applications, for example for medical or electronic image processing applications. In known radiation detectors, the gap between detector modules and / or adjacent ASICs has a different pitch between adjacent input contacts and adjacent connecting pixels. Radiation or photons that strike the gap between two detector modules or sensor tiles are not actually incident on the pixel and therefore are not detected, resulting in a loss of some of the incident radiation. Furthermore, X-rays or electrons striking the area between two ASICs distort the periodicity of the input contacts between adjacent ASICs, causing local variations in the spatial resolution of the detector. It is therefore an object of the present invention to provide a high-resolution radiation detector that covers a large area with no or at least minimized gaps, no or at least reduced variations in pixel pitch, and no or at least reduced variations in pixel pitch in the connections between ASICs, sensor tiles, and / or detector modules. The present invention may be of particular advantage in x-ray or electronic imaging applications. Summary of the Invention [Means for solving the problem]

[0010] In order to achieve the above object, a radiation detector for detecting radiation with position resolution according to the present invention is characterized by comprising the following components.

[0011] The device comprises at least one sensor tile having a sensor material sensitive to radiation and defining a horizontal plane. The sensor tile may have a rectangular or especially square shape with a side length of, for example, 2 cm, 4 cm, 6 cm or 8 cm in the horizontal plane. The radiation is X-ray radiation with an energy of approximately 2 keV to 200 keV or electron radiation with an energy of approximately 2 keV to 400 keV. X-rays for medical applications have energies in the range of approximately 2 keV to 100 keV and up to 200 keV. Suitable semiconductor sensor materials are silicon, gallium arsenide, cadmium telluride or cadmium zinc telluride. The sensor material is preferably adapted to convert incident radiation or incident photons into an electric charge, which can be measured.

[0012] A pixel is defined as a surface area in a horizontal plane of a plurality of pixels of conductive material in contact with the sensor material, and is generally made of metal. The charge induced in the pixel, particularly the charge resulting from the conversion of photons or electrons, is the pixel's measurement. The spatial resolution of the detector, i.e. the measurement per pixel or per unit area, therefore depends on the pixel pitch. The pixels are preferably rectangular, preferably square with a side length of approximately between 20 μm and 1000 μm, ideally between 30 μm and 450 μm. The set of pixels may be arranged in a grid, ideally a rectangular grid covering most of the sensitive material of the sensor tile, for example at least 90%, 95%, or 99%.

[0013] The at least one sensor tile includes at least one ASIC, the at least one sensor tile having a plurality of input contacts electrically contacting a plurality of pixels. At least one of the input contacts is horizontally offset with respect to the pixel it connects to, but each of the input contacts preferably connects to a corresponding pixel, where the number of pixels is equal to the number of input contacts. The sensor tile is connected to one or more ASICs, and preferably evaluates all signals of a sensor tile. The one or more ASICs are preferably configured to evaluate electrical signals collected at pixels connecting to the input contacts of the ASIC. In particular, the evaluation may include at least one or more of: determining the amount of charge per pixel and per time; counting the number of incident photons or electrons above a predetermined signal threshold, which is converted to a charge per pixel and per time; and performing further processing, such as calibration. Preferably, the at least one ASIC assigned to each sensor tile is arranged in a plane parallel to the horizontal plane defined by the sensor tile, and is preferably arranged in a stack with the sensor tile and possibly other components, such as a redistribution layer, as shown below. The input contacts of the ASIC preferably face the pixel even if other components are placed between them. To facilitate the connection of the input contacts to the pixels, it is desirable to place each input contact "directly below", i.e. with no horizontal offset from the pixel it connects to. This requires that the size of the ASIC is different from that of the sensor tile, or that there is space below the sensor tile. However, this is not possible since space is required horizontally next to the input contacts to place other components, such as input / output (I / O) pads for reading out the ASIC, setting its parameters, and providing power and reference voltages to the ASIC.

[0014] Providing a redistribution layer between at least one sensor tile and at least one ASIC, the redistribution layer having a plurality of conductor line sections electrically connecting a plurality of input contacts to a corresponding plurality of pixels, in other words, the redistribution layer facilitates an electrical connection, preferably also a mechanical connection, between the sensor tile and the ASIC. With a view to suitably connecting each of the input contacts to one of the pixels to which it is connected, the redistribution layer provides one conductor line section for each pixel / input contact pair. Such conductor line sections preferably have one or more horizontal portions and one or more vertical portions, called vias. Preferably, the conductor line sections connect the pixels to the input contacts of the at least one ASIC via under bump metallization (UBM) contacts and solder bumps.

[0015] In the radiation detector according to the present invention, at least one of the conductor line portions crosses at least one cross pixel other than the pixel it connects to. This means that the conductor line portion crosses at least one pixel, and this "cross pixel" may detect a signal different from the signal from the photons or electrons of the pixel it connects to. Preferably, the crossing conductor line portion crosses one or more different cross pixels by connecting to an input contact that is offset horizontally from the pixel it connects to. The cross pixel is preferably a pixel adjacent to the pixel it connects to.

[0016] The crossings implemented in known detectors create a problem of capacitive coupling between the different pixel signals, i.e. photons and charges detected by the connecting pixels affect the signal of the crossing pixels. This is also called crosstalk between pixels and reduces the signal quality. In particular, the crossings introduce so-called parasitic capacitances between the connecting pixels and at least one crossing pixel. Moreover, since this parasitic capacitance depends on the position and the geometry of the crossing pixels, not all pixels see the same input capacitance at the ASIC amplifier, resulting in an uneven signal-to-noise ratio.

[0017] In the radiation detector according to the invention, this problem is avoided or at least minimized in the following way: At least one intersecting pixel has a missing part of conductive material which at least partly coincides with the projection of the intersecting conductor line part. By projection we mean the area of ​​the perpendicular projection of the conductor line part onto the surface of the intersecting pixel, i.e. the area of ​​the surface of the intersecting pixel which is perpendicular to the surface of the pixel in the horizontal plane. The pixel consists of conductive material, but preferably at least part of the projection does not contain conductive material. This means that the pixel, which may be rectangular or square, may have an aperture which at least partly coincides with the projection.

[0018] Such pixel design avoids or at least minimizes parasitic capacitance between the crossing pixel and the pixel that connects to a particular input contact or a particular conductor line section of the ASIC, respectively. Furthermore, a more uniform input capacitance distribution is obtained at the ASIC input contact. This can be understood by considering that the capacitance C, which is a simplified example of a parallel plate capacitor with a dielectric constant ε of the material between the electrodes, an electrode area A, and an electrode distance d, is given by C=εA / d. Thus, the larger the electrode area A, the larger the capacitance C, which is an undesirable parasitic capacitance. Thus, reducing the opposing electrode area A in a parallel plate capacitor with a cutout in at least one crossing pixel, as implemented in the present invention, minimizes the parasitic capacitance.

[0019] Preferably, each pixel of the tile is a cross pixel and has a gap from the cross conductor line. Such a design reflects the dense arrangement of input contacts on the ASIC. In general, the pixel design according to the invention allows for a thinner redistribution layer in particular. For example, this corresponds to a reduction in the electrode spacing d in the above formula, but without increasing the parasitic capacitance and degrading the measurement quality.

[0020] At the same time, the pixel design according to the invention allows the size and / or shape of the ASIC to be varied independently of the size and / or shape of the sensor tiles. This creates various possibilities for the design of the radiation detector. In particular, it facilitates the reduction of the gap between tiles, in particular their width, while keeping the pixel pitch constant. In this way, the reduction of radiation or photons passing through the detector undetected eliminates distortion of the effective resolution in the areas between adjacent ASICs or adjacent sensor tiles.

[0021] The horizontal offset between the pixel and the connecting input contact on the ASIC is the offset between the location of the input contact and the location of the termination point of the conductor line portion in the area of ​​the pixel to be connected. Depending on the size of a given pixel, the termination points may be in various areas of the pixel as required. Thus, for example, designing the termination points in the area of ​​the pixel for each pixel is effective for further reducing crosstalk. In one embodiment, at least two pixels of a set of pixels have different termination points in the respective pixel. It is preferable that at least one, and preferably all, of the termination points are located at the edge of the pixel area to be connected. The connecting conductor line portion is located directly in the adjacent gap, which can minimize crosstalk. It is preferable to apply a combination of the two previous embodiments. The termination points are preferably located only at certain edges of the pixel, but can also be located at different edges. For example, the termination points can be at the right edge of the pixels of the first subset and the termination points can be at the left edge of the pixels of the second subset.

[0022] Further advantageous features according to the present invention are as follows:

[0023] Preferably, the at least one sensor tile has a larger surface area in a horizontal plane than the at least one ASIC. Furthermore, the at least one sensor tile, in a projection onto the at least one ASIC assigned to it, protrudes beyond at least one end of the at least one ASIC. Preferably, the at least one sensor tile has a larger surface area in a horizontal plane than the at least one ASIC assigned to it. More preferably, in particular, the horizontal extension of the set of pixels extends more than the array of the input contacts.

[0024] This means that there is space available in the ASIC below the sensor tiles and in addition to the input contact array of the ASIC for various components, such as for the ASIC's input / output (I / O) pads. In this way, adjacent tiles can be placed close to each other, thus avoiding unnecessary gaps between the sensor tiles. In one embodiment, the sensor tiles have a surface area of ​​at least 2 cm by 2 cm.

[0025] In a preferred embodiment, the sensor comprises a set of multiple sensor tiles and / or modules arranged adjacent to one another in a horizontal plane, the multiple sensor tiles and / or modules being separated by multiple gaps, the total surface area of ​​the multiple gaps in the horizontal plane being less than 10%, in particular less than 5% or 1% of the total surface area of ​​the multiple sensor tiles.

[0026] In a preferred embodiment, an electric field (bias voltage) is applied across the semiconductor sensor tile to collect the charge generated inside the semiconductor sensor tile. The electric field is preferably generated by applying a high voltage (HV) to the side of the sensor tile facing the incident radiation. This HV is typically applied to the metal electrode of the sensor tile, for example, through a wire bond to a metal electrode, or through a wire bond that connects to a conductive tape on the surface of the electrode, or using a conductive tape that connects directly to the electrode or to the semiconductor.

[0027] Furthermore, the area of ​​the recess is preferably at least 80%, in particular at least 90%, of the projected area defining the projection. The recess may have a different shape, in particular larger or smaller than the projected portion, but it is preferred that the recess occupies at least a portion of the projection in order to minimize parasitic capacitances.

[0028] The recesses are preferably bounded by continuous edges of conductive material. This means in particular that the recesses are openings through the pixel and not just depressions in the pixel. In one embodiment, the recesses cover the entire area of ​​the projected portion but do not reach the edges of the pixel, where a continuous electrical connection remains. In particular when the projected portion divides the intersection pixel into two or more parts, such a pixel design ensures the same potential over the entire pixel.

[0029] Alternatively or additionally, the parasitic capacitance can be minimized or avoided in other ways according to the above formula, i.e. by changing the dielectric constant ε of the material between the conductor line portion, which is the electrode, and the crossing pixel, or by changing the electrode distance d, i.e. the distance between the conductor line portion and the crossing pixel, which is similar to the thickness of the redistribution layer. According to this consideration, it is preferred that the redistribution layer has a thickness of at least 1 μm, in particular at least 5 μm. Furthermore, it is preferred that the redistribution layer comprises a low-k material, which means a dielectric material with a relative dielectric constant εr<3.9. Preferred examples of low-k materials are, for example, porous silicon oxide, fluorine-doped silicon oxide, and polyamide.

[0030] In a further embodiment, the radiation detector comprises a substrate holding at least one ASIC in contact therewith. The substrate may include an electrically insulating substrate and external conductive vias passing through the insulating substrate, for example one external conductive via for each ASIC. In particular, the I / O pads of the at least one ASIC are electrically connected to the external conductive vias, in particular by printed micro-wiring, or tape bonding (TAB), or wire bonding. Thus, the substrate preferably acts as a holder, in particular facilitating the mounting of one or more ASICs and at least one module onto a radiation detector.

[0031] In yet another embodiment, the radiation detector further comprises a shield between the redistribution layer and the at least one ASIC. This shield is preferably arranged on the surface of the redistribution layer and preferably faces at least one of the I / O pads of the ASIC or the conductive vias of the electrically insulating substrate carrying the ASIC. The shield is preferably conductive and grounded. The shield is useful for avoiding or at least minimizing crosstalk between the digital or analog signals transmitted between the I / O pads of the ASIC and the redistribution layer or the conductor line parts of the pixels. It is preferred that the projection of the shield covers at least 50%, in particular at least 80%, of the surface area of ​​the ASIC not covered by the input contacts.

[0032] According to another aspect of the invention, there is provided a method of manufacturing a radiation detector, comprising the steps of:

[0033] Providing at least one sensor tile having a sensor material sensitive to radiation, and forming a set of pixels of conductive material in contact with the sensor material, in particular by applying photolithography and metallization techniques.

[0034] In particular, depositing a dielectric passivation layer which contributes to the redistribution layer.

[0035] Etching per-pixel via holes in the dielectric passivation layer.

[0036] Filling the via holes with a conductive material, in particular by applying photolithography and metallization techniques, to form a plurality of conductor line portions defining a plurality of redistribution line portions on the surface of the dielectric protective layer.

[0037] A step of defining contact points of the multiple conductor line sections, in particular by multiple UBMs (under bump metallizations), and depositing another dielectric protection layer on the surface of the multiple redistribution line sections, in particular contributing to the redistribution layer.

[0038] Electrically connecting contacts of the plurality of conductor trace portions to a plurality of input contacts of at least one ASIC.

[0039] At least one input contact is horizontally offset with respect to the pixel it connects, and at least one of the conductor line portions intersects with at least one intersecting pixel different from the pixel it connects, and at least one intersecting pixel has a missing portion of conductive material that coincides at least in part with a projection of the conductor line portion it intersects.

[0040] Furthermore, the method preferably comprises at least one of the following steps:

[0041] The method comprises the step of arranging a set of tiles adjacent to one another in a horizontal plane, wherein the tiles are separated by gaps, the total surface area of ​​the gaps in the horizontal plane being less than 10%, in particular less than 5% or 1% of the total surface area of ​​the tiles.

[0042] The method includes providing a substrate for carrying at least one ASIC, in particular an electrically insulating substrate having at least one external conductive via extending through the insulating substrate for one ASIC.

[0043] The method includes mounting at least one sensor tile and the at least one ASIC on an electrically insulating substrate.

[0044] The method includes electrically connecting at least one I / O pad of at least one ASIC to at least one external conductive via, in particular by printed micro-interconnects, tape bonding (TAB), or wire bonding.

[0045] The various embodiments and features described relate to radiation detectors and methods as well, and synergistic effects thereof may result from different combinations of the various embodiments and features, not specifically described.

[0046] The invention will be better understood and other objects will become apparent from a consideration of the following detailed description taken in conjunction with the accompanying drawings, in which: [Brief description of the drawings]

[0047] [Figure 1] FIG. 1 shows a pixelated sensor tile (left) and an ASIC (right) that contains an array of input contacts for a conventional radiation detector. [Diagram 2] FIG. 2 is a cross-sectional view of a radiation detector module having a pixelated sensor and a pixelated ASIC as in FIG. [Figure 3a] FIG. 3a is a diagram showing a detector module of a radiation detector, which is a diagram showing a detector module composed of a sensor tile for each ASIC. [Figure 3b] FIG. 3b shows a detector module of a radiation detector, in which multiple ASICs are connected to one sensor tile. [Figure 4] FIG. 4 is an exploded view of a conventional radiation detector. [Diagram 5] FIG. 5 is a cross-sectional view of a radiation detector having a conventional redistribution layer. [Figure 6] FIG. 6 is a perspective view of a rewiring layer of a conventional radiation detector. [Figure 7] FIG. 7 is a plan view of the redistribution layer of FIG. [Figure 8] FIG. 8 is a top view of six representative pixels of a radiation detector according to one embodiment of the present invention. [Figure 9] FIG. 9 is a cross-sectional view of a tile and redistribution layer of a radiation detector according to one embodiment of the present invention. [Figure 10] FIG. 10 is a cross-sectional view of an embodiment of the present invention similar to FIG. 9, where the redistribution layer is thicker. [Figure 11] FIG. 11 is a cross-sectional view of the assembly of an ASIC in a substrate according to one embodiment of the present invention. [Figure 12] FIG. 12 is a cross-sectional view of a radiation detector having a substrate according to the embodiment of FIG. [Figure 13a] 2 illustrates a photolithography mask that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 13b] 1 is a cross-sectional view of a radiation detector that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 14a] 2 illustrates a photolithography mask that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 14b] 1 is a cross-sectional view of a radiation detector that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 15a] 2 illustrates a photolithography mask that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 15b] 1 is a cross-sectional view of a radiation detector that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 16a] 2 illustrates a photolithography mask that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 16b] 1 is a cross-sectional view of a radiation detector that may be used in a method of manufacturing a radiation detector according to an embodiment of the present invention. [Figure 17] FIG. 17 illustrates photolithography masks for redistribution line sections and vias in the outer and inner portions of a tile of a radiation detector according to one embodiment of the present invention. [Figure 18] FIG. 18 illustrates photolithography masks for redistribution line sections and vias in the outer and inner portions of a tile of a radiation detector according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0048] In order to better understand the problem of the present invention and the means for solving it, a first characteristic of a conventional radiation detector will be described with reference to FIGS. 1 to 7. FIG.

[0049] FIG. 1 shows a pixelated sensor (left side) and an ASIC (right side) including an array of input contacts of a conventional radiation detector. At least one pixelated sensor tile 1 or an array of sensor tiles and at least one ASIC 5 or an array of ASICs 5 constitute a radiation detector module, and one or more radiation detector modules constitute a radiation detector. In FIG. 1, the array of pixels 2 contacting the radiation-sensitive sensor material has a size of 256×256 pixels. The pixelated ASIC 5 (right side of FIG. 1) has a number of input contacts 4, the same number as the pixels having the pixelated sensor, i.e., 256×256. In addition, the ASIC 5 includes a number of I / O pads 6 for inputting and outputting electrical signals, and peripheral circuits such as a number of control blocks and a number of guard rings occupying a part of the ASIC surface.

[0050] Typically, the pixels 2 and the input contacts 4 of the ASIC 5 are electrically connected to each other in a one-to-one correspondence between the pixels and the corresponding input contacts, meaning that the number of the input contacts 4 is equal to the number of the pixels 2. For simplicity, the pixels 2 and the input contacts 4 to be connected are arranged adjacent to each other. In conventional radiation detectors, the pixels in the outermost rows and columns of the pixel matrix are typically larger than normal pixels inside the pixel matrix to ensure sensitivity to radiation in this region.

[0051] In one embodiment, a single sensor tile is connected to multiple ASICs, typically in a one-to-one correspondence with the pixels and the input contacts of the ASICs that are electrically connected to each other.

[0052] As shown in Figure 2, a number of pixels 2 and corresponding input contacts 4 are conventionally arranged directly above / below each other, where vertical is defined as being orthogonal to the direction in which the sensor tile 1 and pixel array extend in a horizontal plane. Electrical connections are typically established by a number of solder balls or bump bonds 3.

[0053] The radiation detector module of Fig. 2 is mounted on a High Density Interconnect (HDI) printed circuit board 8 with readout electronics. In the state of the art, the electrical connections between the I / O pads 6 of the ASIC 5 and the HDIPCB 8 are established by wire bonds 7.

[0054] To increase the detector area, a radiation detector is formed by arranging several radiation detector modules, shown as a single module in FIG. 2, side by side, as shown in FIG. 3a and FIG. 3b. From the description of FIG. 2, FIG. 3a and FIG. 3b, it can be seen that when conventional detector modules are arranged side by side on the surface of the PCB 8, gaps 9 are formed between each of the several sensor tiles 1. Thus, conventional radiation detectors present gaps 9 in the horizontal plane, in which no sensor material is arranged and therefore no radiation or photons are detected. This leads to a loss of detail in the resulting image and a reduction in the measurement signal. In FIG. 3a, each of the several ASICs is equipped with one sensor tile, while in FIG. 3b, one sensor tile is connected to several ASICs. Thus, in FIG. 3a, an even smaller gap is formed between the tiles of several identical detector modules. This small gap is absent in FIG. 3b. However, in this case, the pixels in the area between the two ASICs have a larger pitch than standard pixels.

[0055] To avoid these drawbacks, a solution in the form of a redistribution layer between the pixels 2 and the input contacts 4 has been proposed and is shown in FIGS.

[0056] FIG. 4 shows an exploded view of a radiation detector module. It is composed of a sensor tile 1 and an ASIC 5 similar to that shown in FIG. 1. However, in contrast to FIG. 1, the pixelated sensor tile 1 of the embodiment of FIG. 4 has the same size in the horizontal plane as the ASIC 5. This leads to a situation where the pixels 2 in contact with the sensor material of the sensor tile 1 occupy a larger area than the connecting input contacts 4 of the ASIC 5. As shown in FIG. 5, the pitch of the input contacts of the ASIC, i.e. the distance between adjacent input contacts 4, is smaller than the sensor pixel pitch 2a, i.e. the distance between adjacent pixels 2 on the sensor tile 1. In this configuration, at least some of the input contacts 4 are necessarily eccentric with respect to their corresponding respective pixels 2.

[0057] 5 also shows a prior art solution including a redistribution layer 10 that establishes one-to-one connections through a plurality of conductor trace portions 11 in a dielectric material 12 to a plurality of input contacts 4 that connect to a plurality of pixels 2. The redistribution layer 10 is typically monolithically integrated with the sensor tile 1.

[0058] 6 and 7 show a perspective view and a top view of the redistribution layer 10, respectively. Note that the vertical direction in the figures in FIG. 6 and FIG. 7 is upside down from the vertical direction in the previous figures. The multiple conductor line portions 11 in FIG. 6 and FIG. 7 are presented in an oblique shape that connects the multiple pixels 2 and the multiple input contacts 4 via the shortest possible paths. However, in a typical implementation of a radiation detector, the multiple conductor line portions 11 extend along the horizontal and vertical directions as shown in FIG. 5 due to the manufacturing process.

[0059] As shown in Figures 5 to 7, the arrangement of the conductive pixels 2, the conductor line portions 11, and the input contacts 4 results in the formation of capacitance between a particular pixel 2 and the conductor line portion 11 that crosses the pixel, for example in the dielectric layer of the redistribution layer 10. Such capacitance is shown diagrammatically in Figure 9. This leads to crosstalk between pixels, reducing the signal-to-noise ratio and, as a result, blurring the resulting image and reducing the effective resolution. Such capacitance is undesirable and is referred to as "parasitic" capacitance.

[0060] In figures 8 to 18, a solution to the described problem according to an embodiment of the invention is shown. In figure 8, a plan view of six representative pixels 2 of a sensor tile 1 used in a detector according to an embodiment of the invention is shown. Whereas the pixels of conventional detectors (figures 1 to 7) are continuous in the horizontal plane, i.e. are displayed as a continuous conductive material, at least one pixel 2 according to the invention comprises a missing part 14. This missing part 14 coincides with at least a part of the projection of the conductor line part 11 across the pixel 2. Advantageously, the projection is performed in a vertical direction. In this way, the parasitic capacitance 13 is minimized or avoided by minimizing or avoiding the overlap between the pixels 2 and the conductor line parts 11. It is clear that the size and shape of the missing part 14 is individual and may be different for each pixel 2.

[0061] The missing portions 14 in FIG. 8 do not completely match the projection of the conductor line portions 11. Instead, the pixels 2 retain the rectangular or square outline of the prior art. This means that the pixels 2 have a continuous edge 15 of conductive material. Such a continuous edge 15 avoids a pixel 2 being divided into separate parts that may have different potentials. Even if a charge is generated directly above the missing portion 14, the electric field distribution inside the sensor ensures that the charge is collected.

[0062] However, in general, it is desirable for the missing portion 14 to coincide with as much of the projection as possible, for example at least 80%, particularly at least 90%, of the area of ​​the projection. It is also desirable for many or all of the pixels 2 intersected by the conductor line portions 11 in the redistribution layer 10 to have such missing portions 14. This significantly improves the quality of the resulting image.

[0063] Alternatively or additionally, it is preferable to apply the concept of the missing portion to the capacitance formed between the multiple conductor line portions 11 and the multiple input contacts 4 where the conductor line portions intersect. In this case, at least one of the intersecting input contacts has one missing portion that at least partially coincides with the projection of the multiple conductor line portions.

[0064] Figures 9 to 12 show further advantages of the radiation detector according to the invention. The embodiment shown in Figure 9, in the cross-section through the sensor tile 1 and the redistribution layer 10, is characterized by a low-k material as the dielectric material 12 of the redistribution layer 10. As is evident from the general formula for the capacitance of a parallel plate capacitor above, the use of a low-k material allows a reduction of the parasitic capacitance 13. Thus, in the embodiment of Figure 9, the thickness of the redistribution layer 10 may be in the range of 0.1 μm to 2 μm, for example 1 μm, while reducing the parasitic capacitance 13 to an acceptable level for imaging applications.

[0065] FIG. 10 shows a cross section similar to that of FIG. 9, except that the redistribution layer 10 is thicker. The thickness can range from 2 μm to 10 μm, for example 5 μm. Increasing the thickness of the redistribution layer 10 also reduces the parasitic capacitance by increasing the distance between the conductor line portion 11 and the pixel 2 that it crosses, as understood by the above equation for a parallel plate capacitor. However, arbitrarily increasing the thickness of the redistribution layer may increase both the resistance and the self-capacitance of the conductor line portion. Furthermore, the required thickness range may lead to undesirable complexity in the manufacturing process.

[0066] 11 and 12 show a cross section of a radiation detector with a substrate 15 according to an embodiment of the invention. FIG. 11 shows an exploded view of the assembly of an ASIC 5 on a functional integration substrate 15, while FIG. 12 shows the ASIC 5 integrated inside the functional integration substrate 15 with a bump-connected sensor with a redistribution layer 10. In known radiation detectors, signals are transferred to the readout electronics 8 through wire bonds 7, resulting in gaps 9 in the active area of ​​the detector (see FIG. 2 and FIG. 3a, 3b). According to an embodiment of the invention in FIG. 11 and FIG. 12, the ASIC 5 is mounted on the substrate 15, in particular in a pocket of the substrate 15. Furthermore, the I / O pads 6 of the ASIC 5 are connected via connections 17 to external conductive vias 16 inside the substrate 15, which is preferably a dielectric functional integration substrate 15. The connections 17 can be established, for example, by printed micro-wiring, tape bonding (TAB) or wire bonding. The dimensions of the substrate pockets and / or the vias 16 are optimized to minimize the gaps 9 of the detector. In this way, a radiation detector or detector module is realised which is highly suitable for imaging, for example in medical applications.

[0067] FIG. 12 shows a further advantageous feature that a shield 18 is arranged on the redistribution layer 10 and faces the ASIC 5. The shield 18 faces the areas of the ASIC 5 that are not covered by the input contacts 4, but may preferably also face the I / O pads 6 and / or the vias 16 and / or the connections 17. It therefore shields the conductor trace parts 11 from crosstalk signals due to digital or analog signals of the connections 17. The shield 18 may consist of a metal layer. It is preferably covered by a dielectric layer or coating in the direction facing the ASIC 5. Furthermore, the shield 18 is preferably connected to a ground pad of the ASIC 5 or of the substrate 15. In a different embodiment, the shield 18 is arranged on the ASIC 5 facing the redistribution layer 10.

[0068] The shield (18) between the redistribution layer (10) and the at least one ASIC (5) is preferably disposed on a surface of the redistribution layer (10) facing the at least one ASIC (5), preferably facing at least one of the I / O pads (6) of the ASIC (5) or the conductive vias (16) of the electrically insulating substrate (15) carrying the ASIC (5), and in particular is electrically conductive and grounded.

[0069] Figures 13a and 13b to 16a and 16b show features of a method for manufacturing a radiation detector according to some embodiments of the invention. In this context, Figures 13a, 14a, 15a and 16a as well as Figures 17 and 18 show photolithographic masks used in this manufacturing method. In a first step, a sensor tile 1 is provided, which comprises a sensor material sensitive to radiation. Then, a number of metal pixels 2 are defined by photolithographic and metallization techniques (see Figures 13a and 13b). The number of pixels 2 have missing parts 14 that at least partially coincide with the projection of the conductor line parts that cross the pixels, as described above. In a next step (Figures 14a and 14b), a dielectric coating layer 12 is deposited on the surfaces of the sensor tile 1 and the pixels 2. Then, via holes 12a are opened through the dielectric coating layer 12 to all the pixels 2. The holes 12a are defined by photolithographic techniques and formed by etching.

[0070] In the next step (FIGS. 15a and 15b), the redistribution line portion 11b is defined by photolithography and metallization techniques. In the same step, the holes 12a are filled with a conductive material to form the vias 11a. The vias 11a and the redistribution line portion 11b serve as the conductor line portion 11 of the redistribution layer 10. The surface of the dielectric coating layer 12 is then passivated by a dielectric thin-film layer 12b, for example of SiO2, SU8 or SiNx, and a UBM 11c defined by photolithography and metallization (FIGS. 16a and 16b). The UBM 11c is adapted to establish an electrical connection to the input contacts 4 of the ASIC 5. The dielectric coating layer 12, the dielectric thin-film layer 12b and the conductor line portion 11 serve as the redistribution layer 10.

[0071] 17 and 18 show photolithography masks of the vias 11a, redistribution line portions 11b and UMBs 11c in the outer and inner parts, respectively, of a sensor tile of a radiation detector used in one embodiment of the manufacturing method. It is clear that the pixels 2, connecting input contacts 4, such vias 11a and UBMs 11c in the outer part of the sensor tile 1 (FIG. 17) are more horizontally offset than in the inner part of the sensor tile 1 (FIG. 18). This means that the redistribution line portions 11b are longer in the outer part than in the inner part. In other words, the redistribution is greatest at the edge of the sensor and least at the center of the sensor.

[0072] In general, it is more preferable to make the conductor line portion 11, and particularly the redistribution line portion 11b, have a path that minimizes the area that their projection covers on the pixel 2. If the area required by the redistribution line portion 11b is constant, as can be seen from Fig. 17, the redistribution line portion 11b will be made to have a path that follows the gap 21 between the pixels 2. This again reduces the parasitic capacitance between different pixels or input contacts.

[0073] While presently preferred embodiments of the invention have been shown and described, it is to be clearly understood that the invention is not limited thereto and may be variously embodied and embodied within the scope of the appended claims.

Claims

1. 1. A radiation detector for position-resolved detection of radiation, comprising: at least one sensor tile (1) having a sensor material sensitive to radiation, said sensor tile (1) defining a horizontal surface; a set of pixels (2) made of a conductive material in contact with the sensor material; The at least one sensor tile (1) further comprises at least one ASIC (5) assigned to the at least one sensor tile (1), the at least one sensor tile (1) having a plurality of input contacts (4) in electrical connection with the plurality of pixels (2), the input contacts (4) being arranged on the at least one ASIC (5), at least one of the input contacts (4) being offset horizontally with respect to the pixel (2) it connects to, a redistribution layer (10) between the at least one sensor tile (1) and the at least one ASIC (5), the redistribution layer (10) having a plurality of conductor line portions (11) electrically connecting the plurality of input contacts (4) to a plurality of the connecting pixels (2); At least one of the conductor line portions (11) intersects with at least one intersecting pixel different from the pixel to which it is connected; A radiation detector, wherein the at least one intersecting pixel has a missing portion (14) of the conductive material that at least partially coincides with a projection of the intersecting conductor line portion (11).

2. the sensor material being adapted to convert incident radiation into an electric charge; The radiation detector of claim 1 , wherein the sensor material comprises a semiconductor material including silicon, gallium arsenide, cadmium telluride, or cadmium zinc telluride.

3. said at least one sensor tile (1) in a projection onto said at least one ASIC (5) assigned thereto protrudes beyond at least one edge of said at least one ASIC (5); said at least one sensor tile (1) having a surface area in said horizontal plane larger than said at least one ASIC (5) assigned thereto; 3. A radiation detector as claimed in claim 1 or 2, wherein the horizontal extension of the set of pixels (2) is greater than the array of input contacts (4).

4. Each pixel (2) of the set of pixels (2) is assigned to one of the input contacts (4), 4. The radiation detector according to claim 1, wherein each pixel (2) of the set of pixels (2) is electrically connected to the input contact (4) assigned to it by one of the conductor line portions (11).

5. At least one of the conductor line portions (11) intersecting the at least one intersecting pixel other than the connected pixel is electrically connected to at least one of the input contacts (4) that is offset in a horizontal direction with respect to the connected pixel (2), a horizontal offset of at least one of the input contacts (4) with respect to the connected pixel (2) indicates an offset between a position of the input contact (4) and a position of an end point of the connecting conductor line portion (11) within a region of the connected pixel (2); 5. The radiation detector according to claim 1, wherein for at least two pixels (2) of the set of pixels (2), the positions of the end points within the connecting pixels are different.

6. providing inter-pixel gaps (21) of non-conductive material between adjacent said pixels; The radiation detector of claim 1 , wherein at least a portion of at least one of the conductor line portions (11) is aligned with one of the inter-pixel gaps (21).

7. 7. The radiation detector according to claim 1, wherein the area of ​​the recess (14) amounts to at least 80% of the area of ​​the projection defined by the portion of the projection.

8. 8. A radiation detector according to claim 1, wherein the recess (14) is bounded by a plurality of edges (15) of continuous conductive material.

9. The redistribution layer (10) has a thickness of at least 1 μm; 9. The radiation detector of claim 1, wherein the plurality of conductor line portions (11) and the plurality of input contacts (4) of the at least one ASIC (5) are connected via a plurality of solder bumps and a plurality of under-bump metallizations (11C).

10. a set of sensor tiles (1) arranged adjacent to one another in the horizontal plane, the sensor tiles (1) being separated by a plurality of gaps (9); The radiation detector of claim 1 , wherein a total surface area of ​​the gaps in the horizontal plane is less than 10% of a total surface area of ​​the sensor tiles (1).

11. a substrate (15) for contacting and holding said at least one ASIC (5); The substrate (15) is an electrically insulating substrate, the insulating substrate having at least one conductive via (16) penetrating the insulating substrate for each ASIC (5); 11. The radiation detector of claim 1, wherein at least one I / O pad (6) of the at least one ASIC (5) is electrically connected to the at least one conductive via (16).

12. 12. The radiation detector of claim 1, further comprising a shield (18) between the redistribution layer (10) and the at least one ASIC (5), the shield (18) being disposed on a surface of the redistribution layer (10) opposite at least one I / O pad (6) of the at least one ASIC (5) or a conductive via (16) of an electrically insulating substrate (15) holding the ASIC (5).

13. The radiation detector of claim 12 , wherein the projection of the shield (18) covers at least 50% of a surface area of ​​the redistribution layer (10) not covered by the plurality of input contacts (4).

14. Providing at least one sensor tile (1) having a sensor material sensitive to radiation; forming a set of pixels (2) made of a conductive material in contact with the sensor material; depositing a dielectric passivation layer (12) which contributes to the redistribution layer (10); Etching via holes (12a) for each pixel (2) in the dielectric passivation layer (12); filling the via holes (12a) with a conductive material to form a plurality of conductor line portions (11) defining a plurality of redistribution line portions (11b) on a surface of the dielectric protection layer (12); A step of defining contact points of the plurality of conductor line portions (11) and depositing another dielectric protection layer (12b) that contributes to the redistribution layer (10) on the surface of the plurality of redistribution line portions (11b); and electrically connecting the contacts of the plurality of conductor line portions (11) to a plurality of input contacts (4) of at least one ASIC (5), At least one input contact (4) is horizontally offset with respect to the pixel (2) it connects to; At least one of the conductor line portions (11) intersects with at least one intersecting pixel different from the pixel to which it is connected; The at least one intersecting pixel has a missing portion (14) of the conductive material that at least partially coincides with a projection of the intersecting conductor line portion (11).

15. The method further comprises providing a substrate (15) for contacting and holding the at least one ASIC (5), the substrate (15) being an electrically insulating substrate, the insulating substrate having at least one conductive via (16) passing through the insulating substrate for one ASIC (5); The method further comprises the step of mounting at least one sensor tile (1) and the at least one ASIC (5) on the electrically insulating substrate (15); 15. The method of claim 14, further comprising the step of electrically connecting at least one I / O pad (6) of the at least one ASIC (5) to at least one external conductive via (16).

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