Semiconductor Device

JP7637722B2Active Publication Date: 2025-02-28ROHM CO LTD
View PDF 16 Cites 0 Cited by

Patent Information

Application Number
JP2023110545
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2012-06-06
Filing Date
2023-07-05
Publication Date
2025-02-28
Estimated Expiration
2033-06-05

AI Technical Summary

Benefits of technology

【0007】 さらにこの構造において、モリブデンからなるショットキーメタルの厚さが10nm~150nmであるため、ショットキーメタルからSiC半導体層に加わる応力を緩和でき、しかもその応力のばらつきを小さくすることができる。そのため、前記半導体装置を量産した場合に、逆方向リーク電流のばらつきを小さくすることができる。その結果、逆方向リーク電流が一定範囲に収まるような品質の半導体装置を安定して供給することができる。また、前記ショットキーメタルの厚さを10nm~100nmとすれば、逆方向リーク電流のばらつきをさらに小さくすることができる。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 0007637722000001
    Figure 0007637722000001
  • Figure 0007637722000002
    Figure 0007637722000002
  • Figure 0007637722000003
    Figure 0007637722000003
Patent Text Reader

Abstract

To provide a semiconductor device capable of reducing forward voltage while suppressing a reverse leakage current to a comparable level as in a conventional technology and also decreasing a variation in the reverse leakage current.SOLUTION: A semiconductor device 1 includes: a substrate 5 composed of n+ type SiC; a drift layer 6 laminated on a surface 5A of the substrate 5 and composed of an n- type SiC semiconductor layer having a surface and a back surface; an anode electrode 12 which is in contact with the surface of the SiC semiconductor layer and has a multilayered structure (a titanium layer 121, an aluminum layer 122); and a cathode electrode 8 formed on the back surface side of the SiC semiconductor layer. A Schottky junction unit 11 is formed between the anode electrode and the surface of the SiC semiconductor layer, and a plurality of fine recessed regions repeatedly arranged in cross sectional view are formed on only the Schottky junction unit of the SiC semiconductor layer. A part of the anode electrode is embedded in the fine recessed region.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including a Schottky barrier diode made of SiC. [Background technology]

[0002] Conventionally, semiconductor power devices that are mainly used in systems in various power electronics fields such as motor control systems, power conversion systems, etc. SiC Schottky barrier diodes are well known as semiconductor power devices (for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-79339 A [Patent Document 2] JP 2011-9797 A Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a semiconductor device that can reduce the forward voltage while suppressing the reverse leakage current to the same level as in the past, and further, can reduce the variation in the reverse leakage current. [Means for solving the problem]

[0005] A semiconductor device for solving the above problem includes a first conductivity type SiC semiconductor layer, and a Schottky metal made of molybdenum in contact with a surface of the SiC semiconductor layer and having a thickness of 10 nm to 150 nm, wherein a junction between the SiC semiconductor layer and the Schottky metal is flat or has an uneven structure of 5 nm or less.

[0006] With this structure, the junction between the SiC semiconductor layer and the Schottky metal is flat or has an uneven structure of 5 nm or less, which makes it possible to reduce the forward voltage while keeping the reverse leakage current at the same level as before.

[0007] Furthermore, in this structure, since the thickness of the Schottky metal made of molybdenum is 10 nm to 150 nm, the stress applied from the Schottky metal to the SiC semiconductor layer can be alleviated, and the variation in the stress can be reduced. Therefore, when the semiconductor device is mass-produced, the variation in the reverse leakage current can be reduced. As a result, it is possible to stably supply semiconductor devices of such quality that the reverse leakage current falls within a certain range. Furthermore, if the thickness of the Schottky metal is 10 nm to 100 nm, the variation in the reverse leakage current can be further reduced.

[0008] The Schottky metal preferably has a single crystal structure in which no crystal interface is exposed in a vertical cross section, which allows the characteristics of the Schottky metal to be uniform throughout.

[0009] The semiconductor device preferably includes an anode electrode formed on the Schottky metal, the anode electrode preferably including a titanium layer at a junction with the Schottky metal, and in that case, the anode electrode may include an aluminum layer formed on the titanium layer.

[0010] The semiconductor device preferably includes a nickel contact layer in contact with a back surface of the SiC semiconductor layer.

[0011] The semiconductor device may further include a cathode electrode including a titanium layer formed on the nickel contact layer, and in this case, an alloy layer including titanium and carbon may be further formed between the nickel contact layer and the cathode electrode.

[0012] The semiconductor device may further include a carbon layer formed on the nickel contact layer.

[0013] The semiconductor device may further include a guard ring of a second conductivity type formed to surround the junction of the SiC semiconductor layer, in which case the SiC semiconductor layer may be made of n-type SiC and the guard ring may be made of p-type SiC.

[0014] It is also preferable that the guard ring is formed so as to extend outward beyond the outer periphery of the Schottky metal.

[0015] When the load connected to the semiconductor device is inductive, a counter electromotive force is generated in the load when the current flowing through the load is interrupted. This counter electromotive force may cause a reverse voltage, with the anode side being positive, to be applied between the anode and cathode. In such a case, the resistance value of the guard ring can be made relatively low, so that heat generation due to the current flowing through the guard ring can be suppressed. As a result, the device can be prevented from being thermally destroyed. In other words, the inductive load tolerance (L load tolerance) can be improved.

[0016] Furthermore, when the semiconductor device includes a field insulating film formed on the surface of the SiC semiconductor layer and having an opening that selectively exposes the bond portion of the SiC semiconductor layer and the inner periphery of the guard ring, it is preferable that the Schottky metal is bonded to the SiC semiconductor layer within the opening and rises onto the field insulating film with a rise amount of 10 μm to 60 μm from the periphery of the opening.

[0017] With this configuration, when a reverse voltage is applied between the anode and cathode as described above, the distance through which the current flows within the guard ring can be shortened, suppressing heat generation due to the current and thus preventing thermal destruction of the device.

[0018] Therefore, by combining the above-mentioned dopant concentration of the guard ring and the amount of the Schottky metal rising onto the field insulating film, it is possible to realize an excellent inductive load resistance (L load resistance).

[0019] The Schottky metal may be formed so that its outer periphery is in contact with the guard ring.

[0020] A method for manufacturing a semiconductor device to solve the above problems includes the steps of forming a Schottky metal made of molybdenum having a thickness of 10 nm to 150 nm on a surface of a first conductivity type SiC semiconductor layer, and heat-treating the Schottky metal with the surface of the Schottky metal exposed, to make a junction between the SiC semiconductor layer and the Schottky metal flat or have an uneven structure with a thickness of 5 nm or less.

[0021] According to this method, the junction between the SiC semiconductor layer and the Schottky metal is made flat or has an uneven structure of 5 nm or less, which makes it possible to provide a semiconductor device that can reduce the forward voltage while suppressing the reverse leakage current to the same level as in the past.

[0022] Furthermore, in this structure, the thickness of the Schottky metal made of molybdenum is 10 nm to 150 nm, so that the stress applied from the Schottky metal to the SiC semiconductor layer can be alleviated and the variation in the stress can be reduced. Therefore, when the semiconductor device obtained by this method is mass-produced, the variation in the reverse leakage current can be reduced. As a result, it is possible to stably supply semiconductor devices of such quality that the reverse leakage current falls within a certain range.

[0023] The step of heat-treating the SiC semiconductor layer is preferably performed in an oxygen-free atmosphere. Specifically, the step of heat-treating the SiC semiconductor layer is preferably performed in a nitrogen atmosphere. In this case, the step of heat-treating the SiC semiconductor layer is preferably performed using a resistance heating furnace.

[0024] According to these methods, it is possible to prevent the Schottky metal (molybdenum) from being oxidized during heat treatment, and the surface of the Schottky metal from changing into molybdenum oxide.

[0025] The method of manufacturing a semiconductor device preferably includes forming an anode electrode on the Schottky metal, and the step of forming the anode electrode preferably includes forming a titanium layer in contact with the Schottky metal. In this case, the step of forming the anode electrode may include forming an aluminum layer in contact with the titanium layer.

[0026] The method for manufacturing a semiconductor device preferably includes the steps of forming a nickel contact layer on a back surface of the SiC semiconductor layer and heat treating the nickel contact layer before forming the Schottky metal. [Brief description of the drawings]

[0027] [Figure 1] FIG. 1 is a plan view of a semiconductor device according to one embodiment of the present invention. [Diagram 2] FIG. 2 is a cross-sectional view taken along the line II-II in FIG. [Diagram 3] FIG. 3 is an enlarged view of the area surrounded by the dashed circle in FIG. [Figure 4] FIG. 4 is a flow chart for explaining an example of a manufacturing process of the semiconductor device. [Diagram 5] FIG. 5 is a diagram showing a modification of the semiconductor device of FIG. [Figure 6] FIG. 6 is a diagram showing a modification of the semiconductor device of FIG. [Figure 7] FIG. 7 is a diagram showing a modification of the semiconductor device of FIG. [Figure 8] FIG. 8 is a TEM image of the Schottky interface of Reference Example 1. [Figure 9] FIG. 9 is a TEM image of the Schottky interface of Comparative Example 1. [Figure 10]FIG. 10 is a correlation diagram between Vf and Ir for Example 1 and Comparative Example 1. [Figure 11] FIG. 11 shows If-Vf curves (Ta=25° C.) for Example 1 and Comparative Example 1. [Figure 12] FIG. 12 shows If-Vf curves (Ta=125° C.) for Example 1 and Comparative Example 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0029] Fig. 1 is a plan view of a semiconductor device according to an embodiment of the present invention, Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1, Fig. 3 is an enlarged view of the area within the dashed circle in Fig. 2.

[0030] The semiconductor device 1 is an element that uses SiC, and is, for example, a square chip in plan view. The semiconductor device 1 may be rectangular in plan view. Its size is 0.5 mm to 20 mm in each of the vertical and horizontal directions on the paper surface of FIG. 1. That is, the chip size of the semiconductor device 1 is, for example, 0.5 mm / □ to 20 mm / □.

[0031] The surface of the semiconductor device 1 is divided by an annular guard ring 2 into an active region 3 inside the guard ring 2 and an outer peripheral region 4 outside the guard ring 2. The guard ring 2 is, for example, a semiconductor layer containing a p-type dopant. Examples of the dopant that can be used include B (boron), Al (aluminum), and Ar (argon). The depth of the guard ring 2 may be about 100 nm to 1000 nm.

[0032] Referring to FIG. 2, the semiconductor device 1 includes n + A substrate 5 made of type SiC and a n-type SiC film laminated on a surface 5A of the substrate 5. -and a drift layer 6 made of type SiC. In this embodiment, the substrate 5 and the drift layer 6 are shown as an example of the SiC semiconductor layer of the present invention.

[0033] The thickness of the substrate 5 is 50 μm to 600 μm, and the thickness of the drift layer 6 thereon may be 3 μm to 100 μm. In addition, the n-type dopant contained in the substrate 5 and the drift layer 6 may be, for example, N (nitrogen), P (phosphorus), As (arsenic), or the like. The relationship between the dopant concentrations of the substrate 5 and the drift layer 6 is such that the dopant concentration of the substrate 5 is relatively high, and the dopant concentration of the drift layer 6 is relatively low compared to that of the substrate 5. Specifically, the dopant concentration of the substrate 5 is 1×10 18 ~1×10 20 cm -3 The dopant concentration of the drift layer 6 is 5×10 14 ~5×10 16 cm -3 may be also possible.

[0034] A nickel (Ni) contact layer 7 is formed on the entire back surface 5B (for example, the (000-1) C surface) of the substrate 5. A cathode electrode 8 is formed on the nickel contact layer 7. The nickel contact layer 7 is made of a nickel-containing metal that forms an ohmic junction with the substrate 5. Such a metal may include, for example, a nickel silicide layer. The cathode electrode 8 has a structure (Ti / Ni / Au / Ag) in which titanium (Ti), nickel (Ni), gold (Au), and silver (Ag) are laminated in this order from the nickel contact layer 7 side, with an Ag layer exposed on the outermost surface.

[0035] A contact hole 9 is formed on a surface 6A (for example, a (0001) Si surface) of the drift layer 6, exposing a part of the drift layer 6 as an active region 3, and a field insulating film 10 is formed covering the outer periphery region 4 surrounding the active region 3. The field insulating film 10 may be made of, for example, SiO2 (silicon oxide). The film thickness of the field insulating film 10 may be 0.5 μm to 3 μm.

[0036] On the field insulating film 10, a Schottky metal 11 and an anode electrode 12 are formed in a laminated manner.

[0037] The Schottky metal 11 is in contact with the surface 6A of the drift layer 6 through the contact hole 9, and forms a Schottky barrier between the Schottky metal 11 and the drift layer 6. Specifically, the Schottky metal 11 is made of molybdenum (Mo) and has a thickness of 10 nm to 150 nm. The Schottky metal 11 is embedded in the contact hole 9 and rises up onto the field insulating film 10 so as to cover the peripheral portion of the contact hole 9 in the field insulating film 10 from above. More specifically, the Schottky metal 11 preferably rises up onto the field insulating film 10 so that the guard ring 2 extends (protrudes) outward from the peripheral edge 19 of the Schottky metal 11. In order to protrude the guard ring 2 outward, for example, it is preferable that the width W (amount of rise) from the peripheral edge 19 of the contact hole 9 of the portion (rising portion 18) of the Schottky metal 11 that rises up onto the field insulating film 10 is 10 μm to 60 μm. In this embodiment, the periphery of the contact hole 9 indicates the position where the thickness of the field insulating film 10 is 0 (zero). Therefore, for example, when the contact hole 9 is formed in a tapered shape whose diameter narrows from the upper end to the lower end, the width W is measured from the lower end of the periphery of the contact hole 9.

[0038] Since Schottky metal 11 is relatively thin at 10 nm to 150 nm, it is possible to reduce the step between the upper part of Schottky metal 11 that rises onto field insulating film 10 and the lower part that contacts surface 6A of drift layer 6. This also makes it possible to reduce the step at the outermost surface of anode electrode 12, making it easier to bond a bonding wire to the outermost surface.

[0039] Also, the Schottky metal 11 may have a single crystal structure in which no crystal interface is exposed in a vertical cross section. Whether the Schottky metal 11 has a single crystal structure or not can be confirmed, for example, by photographing a cross section of the Schottky metal 11 using a TEM (Transmission Electron Microscope) and observing the image. With this configuration, the characteristics of the Schottky metal 11 can be made uniform throughout.

[0040] Here, as shown in Fig. 3, when the uneven structure 13 is formed at the junction 61 (part of the surface 6A) between the drift layer 6 and the Schottky metal 11, the height H1 of the uneven structure 13 is 5 nm or less. When a plurality of recesses are formed in the uneven structure 13 as shown in Fig. 3, the height H1 of the uneven structure 13 may be the depth of the deepest recess. Note that, although this embodiment shows an example in which the uneven structure 13 is formed at the junction 61, the junction 61 of the semiconductor device 1 may be a flat structure with almost no unevenness.

[0041] The anode electrode 12 may have a two-layer structure of a titanium layer 121 formed on the Schottky metal 11 and an aluminum layer 122 formed on the titanium layer 121. The anode electrode 12 is exposed on the outermost surface of the semiconductor device 1 and is connected to a bonding wire or the like. Similarly to the Schottky metal 11, the anode electrode 12 rides up onto the field insulating film 10 so as to cover the periphery of the contact hole 9 in the field insulating film 10 from above. The titanium layer 121 preferably has a thickness of 70 nm to 230 nm, and the aluminum layer 122 preferably has a thickness of 3.2 μm to 5.2 μm (for example, 4.2 μm). More specifically, the titanium layer 121 may have a two-layer structure of a lower layer of Ti and an upper layer of TiN. In this case, the thickness of Ti is 10 nm to 40 nm (for example, 25 nm), and the thickness of TiN is 60 nm to 190 nm (for example, 130 nm).

[0042] The guard ring 2, which divides the drift layer 6 into the active region 3 and the outer periphery region 4, is formed along the contour of the contact hole 9 in the field insulating film 10 so as to straddle the inside and outside of the contact hole 9 (so as to straddle the active region 3 and the outer periphery region 4). Therefore, the guard ring 2 has an inner portion 21 (inner periphery) that protrudes inwardly into the contact hole 9 and contacts the end portion of the Schottky metal 11 in the contact hole 9, and an outer portion 22 that protrudes outwardly from the contact hole 9 and faces the Schottky metal 11 with the peripheral portion of the field insulating film 10 in between.

[0043] A surface protective film 14 is formed on the outermost surface of the semiconductor device 1. An opening 15 exposing the anode electrode 12 is formed in the center of the surface protective film 14. A bonding wire is bonded to the anode electrode 12 through this opening 15. The surface protective film 14 may have a two-layer structure of a silicon nitride (SiN) film 141 formed on the anode electrode 12 and a polyimide film 142 formed on the silicon nitride film 141. Preferably, the silicon nitride film 141 has a thickness of 800 nm to 2400 nm (for example, 1600 nm), and the polyimide film 142 has a thickness of 5 μm to 14 μm (for example, 9 μm).

[0044] In this semiconductor device 1, a forward bias state is created in which a positive voltage is applied to the anode electrode 12 and a negative voltage is applied to the cathode electrode 8, causing electrons (carriers) to move from the cathode electrode 8 to the anode electrode 12 via the active region 3 of the drift layer 6, causing a current to flow. This causes the semiconductor device 1 (Schottky barrier diode) to operate.

[0045] In addition, in this semiconductor device 1, the junction 61 between the drift layer 6 and the Schottky metal 11 is flat or has an uneven structure 13 of 5 nm or less. This makes it possible to reduce the forward voltage regardless of the usage environment (ambient temperature, etc.) while suppressing the leakage current (reverse leakage current) flowing in a reverse bias state to the same level as in the past.

[0046] Furthermore, in this structure, since the thickness of the Schottky metal 11 made of molybdenum is 10 nm to 150 nm (for example, 100 nm), the stress applied from the Schottky metal 11 to the drift layer 6 (for example, the compressive stress indicated by the arrow in FIG. 3) can be relaxed, and the variation in the stress can be reduced. Therefore, when the semiconductor device 1 is mass-produced, the variation in the reverse leakage current can be reduced. For example, the process capability index Cpk can be set to 1.0 or more (preferably, 1.3 to 3.0). As a result, the semiconductor device 1 can be stably supplied with a quality in which the reverse leakage current falls within a certain range.

[0047] In addition, the Schottky metal 11 rides on the field insulating film 10 so that the guard ring 2 extends (protrudes) outward beyond the outer periphery 19 of the Schottky metal 11. When the load connected to the semiconductor device 1 is inductive, a counter electromotive force is generated in the load when the current flowing through the load is interrupted. Due to this counter electromotive force, a reverse voltage in which the anode side is positive may be applied between the anode and the cathode. In such a case, the resistance value of the guard ring 2 can be made relatively low, and the distance of the current flowing through the guard ring 2 can be shortened. This makes it possible to suppress heat generation due to the current flowing through the guard ring 2, thereby preventing the device from being thermally destroyed. In other words, the inductive load tolerance (L load tolerance) of the semiconductor device 1 can be improved.

[0048] FIG. 4 is a flow chart for explaining an example of a manufacturing process for the semiconductor device 1. As shown in FIG.

[0049] First, the drift layer 6 is epitaxially grown on the surface 5A of the substrate 5 (step S1). Next, a mask is formed on the surface 6A of the drift layer 6, for example, by a CVD (Chemical Vapor Deposition) method, and impurities are injected toward the surface 6A of the drift layer 6 through the mask. Thereafter, the drift layer 6 is heat-treated, thereby selectively forming the guard ring 2 on the surface portion of the drift layer 6 (step S2).

[0050] Next, a field insulating film 10 that completely covers the guard ring 2 is formed on the front surface 6A of the drift layer 6 by, for example, thermal oxidation or CVD (step S3). Next, a nickel contact layer 7 is formed on the rear surface 5B of the substrate 5 by, for example, sputtering. Thereafter, the substrate 5 is carried into an electric furnace, in which the nickel contact layer 7 is heat-treated at a predetermined first temperature (step S4). The heat treatment of the nickel contact layer 7 is preferably performed, for example, in an induction heating furnace whose interior is adjusted to a nitrogen atmosphere. Next, the field insulating film 10 is patterned to form a contact hole 9, and the guard ring 2 is selectively exposed in the contact hole 9 (step S5).

[0051] Next, the Schottky metal 11 made of molybdenum (Mo) having a thickness of 10 nm to 150 nm is formed on the entire surface 6A of the drift layer 6 by, for example, a sputtering method. Then, the substrate 5 is carried into an electric furnace, and in the state where the surface of the Schottky metal 11 is exposed, heat treatment is performed at a predetermined second temperature (step S6). The heat treatment in the state where the surface of the Schottky metal 11 is exposed means that the Schottky metal 11 is heat treated without forming a protective cap such as a metal or a film on the surface of the Schottky metal 11. The heat treatment of the Schottky metal 11 is preferably performed, for example, in a resistance heating furnace adjusted to an atmosphere substantially free of oxygen (nitrogen atmosphere in this embodiment). If the heat treatment is performed in a nitrogen atmosphere, the Schottky metal 11 (molybdenum) is not oxidized during the heat treatment, and the surface portion of the Schottky metal 11 is not changed to molybdenum oxide. Therefore, it is possible to omit the formation of a protective cap on the surface of the Schottky metal 11, and it is possible to prevent the Schottky metal 11 from being raised by the thickness of the protective cap, and as a result, the thickness of the Schottky metal 11 can be maintained at 10 nm to 150 nm.

[0052] Next, the titanium layer 121 and the aluminum layer 122 are laminated in this order on the Schottky metal 11 to form the anode electrode 12 (step S7), and then the surface protection film 14 is formed (step S8).

[0053] Finally, a cathode electrode 8 is formed on the nickel contact layer 7, thereby obtaining the semiconductor device 1 shown in FIG.

[0054] Although the embodiment of the present invention has been described above, the present invention can be embodied in other forms.

[0055] For example, the semiconductor device 1 can be embodied in modified forms shown in FIGS.

[0056] 5, a carbon layer 16 is formed between the nickel contact layer 7 and the cathode electrode 8. The carbon layer 16 is a layer formed when the remaining carbon (C) that does not contribute to the reaction is precipitated on the surface of the nickel contact layer 7 when nickel deposited on the rear surface 5B of the substrate 5 and silicon in the substrate (SiC) 5 react with each other by the heat treatment in step S4 in FIG.

[0057] 6, an alloy layer 17 containing carbon is formed between the nickel contact layer 7 and the cathode electrode 8. The alloy layer 17 is a layer formed by alloying the carbon (C) remaining at the time of forming the nickel silicide layer and the titanium (Ti) of the cathode electrode 8, for example, by heat treatment after depositing the electrode material (Ti / Ni / Au / Ag) of the cathode electrode 8.

[0058] That is, Figures 5 and 6 show that a layer derived from excess carbon generated during the formation of the nickel silicide layer may be formed between the nickel contact layer 7 and the cathode electrode 8, and the carbon layer 16 and the alloy layer 17 shown in each figure may be formed as one of them, or may be formed as both are laminated.

[0059] 7, field insulating film 10 is omitted, and guard ring 2 is entirely exposed on surface 6A of drift layer 6. Schottky metal 11, which rides up onto field insulating film 10 in FIG. 2, has an end portion covering the entire inner periphery of guard ring 2 such that guard ring 2 extends (protrudes) outward beyond outer periphery 19 of Schottky metal 11. As a result, the end portion of Schottky metal 11 is joined to the inner periphery of guard ring 2.

[0060] Also, for example, a configuration may be adopted in which the conductivity type of each semiconductor portion of the above-mentioned semiconductor device 1 is inverted. For example, in the semiconductor device 1, a p-type portion may be n-type, and an n-type portion may be p-type.

[0061] Alternatively, the nickel contact layer 7 may be heat-treated in a resistance heating furnace, and the Schottky metal 11 may be heat-treated in an induction heating furnace.

[0062] The semiconductor device (semiconductor power device) of the present invention can be incorporated into a power module used in an inverter circuit constituting a drive circuit for driving an electric motor used as a power source for electric vehicles (including hybrid vehicles), trains, industrial robots, etc. It can also be incorporated into a power module used in an inverter circuit that converts the power generated by solar cells, wind power generators, and other power generating devices (particularly private power generating devices) so as to match the power of a commercial power source.

[0063] In addition, the features understood from the disclosure of the above-mentioned embodiments can be combined with each other in different embodiments, and the components shown in each embodiment can be combined within the scope of the present invention.

[0064] The embodiments of the present invention are merely specific examples used to clarify the technical content of the present invention, and the present invention should not be construed as being limited to these specific examples. The spirit and scope of the present invention are limited only by the appended claims.

[0065] This application corresponds to Patent Application No. 2012-129219 filed with the Japan Patent Office on June 6, 2012, the entire disclosure of which is incorporated herein by reference. EXAMPLES

[0066] Next, the present invention will be described based on examples and comparative examples, but the present invention is not limited to the following examples. <Example 1, Comparative Example 1 and Reference Example 1> Following the flow of Fig. 4, twelve semiconductor devices 1 (SiC wafer units) having the structure shown in Fig. 1 were fabricated (Example 1). The thickness of the Schottky metal 11 was set to 100 nm.

[0067] Meanwhile, 20 semiconductor devices were fabricated (Comparative Example 1) in the same manner as in Example 1, except that the surface of the 400-nm-thick Schottky metal 11 (molybdenum) was protected with a 200-nm-thick molybdenum nitride (MoN) and the Schottky metal 11 was heat-treated in the same process (oxygen atmosphere) as the nickel contact layer 7. Also, a semiconductor device having a configuration in which a 200-nm-thick molybdenum nitride (MoN) was provided on the 400-nm-thick Schottky metal 11 (molybdenum) was fabricated following the flow of FIG. 4 (Reference Example 1). <Evaluation> (1) TEM images The Schottky interfaces of the semiconductor devices obtained in Reference Example 1 and Comparative Example 1 were photographed by TEM. The obtained images are shown in FIGS.

[0068] As shown in FIG. 8, it was found that in Reference Example 1, the Schottky interface (the junction between the SiC and the Schottky metal) had a smooth flat structure. It was also found that molybdenum (Mo) had a single crystal structure with no exposed crystal interface. Example 1 also had a similar structure.

[0069] On the other hand, as shown in Fig. 9, it was found that in Comparative Example 1, an uneven structure was formed in which multiple recesses (blackened areas in Fig. 9) with a depth of about 20 nm were formed at the Schottky interface. It was also found that a crystal interface appeared inside the molybdenum (Mo). (2) Relationship between Vf and Ir Next, the relationship between the forward voltage Vf (1 mA) required to pass a forward current of 1 mA and the reverse leakage current Ir was examined in each of Example 1 and Comparative Example 1. FIG. 10 is a correlation diagram between Vf and Ir for each of Example 1 and Comparative Example 1.

[0070] 10, in Example 1 and Comparative Example 1, Vf and Ir are in a trade-off relationship with each other, but in the case where the reverse leakage current Ir is suppressed to the same level, it was found that Example 1 can lower Vf. That is, Example 1, which has a flat Schottky interface (less surface roughness), can reduce the forward voltage while suppressing the reverse leakage current to the same level as Comparative Example 1. (3)Vf-If characteristics Next, the Vf-If characteristics were examined for each of Example 1 and Comparative Example 1. Fig. 11 shows the If-Vf curves (Ta = 25°C) for each of Example 1 and Comparative Example 1. Fig. 12 shows the If-Vf curves (Ta = 125°C) for each of Example 1 and Comparative Example 1.

[0071] As shown in FIGS. 11 and 12, it was found that the forward voltage Vf can be made lower in Example 1 than in Comparative Example 1 in both temperature ranges where the ambient temperature Ta is 25° C. and 125° C. (4) Variation in reverse leakage current The process capability index Cpk of the reverse leakage current was examined for each of Example 1 and Comparative Example 1. As a result, it was found that Example 1 had Cpk=1.82, which is smaller than Reference Example 1, which had Cpk=0.38, indicating that the variation in reverse leakage current was smaller. [Explanation of symbols]

[0072] 1 Semiconductor device 2 Guard Ring 5 Substrate 6 Drift Layer 6A surface 61 Joint 7 Nickel contact layer 11 Schottky Metal 12 Anode electrode 121 Titanium layer 122 Aluminum layer 13 Uneven structure 16 Carbon Layer 17 Alloy layer 18 Climbing section 19 Outer rim

Claims

1. a SiC semiconductor layer having a front surface and a back surface; a Schottky layer made of molybdenum and having a thickness of 10 nm to 150 nm formed on the surface of the SiC semiconductor layer; an aluminum electrode layer formed on the Schottky layer; a cathode electrode formed on the back surface of the SiC semiconductor layer, a Schottky junction is formed between the Schottky layer and the surface of the SiC semiconductor layer; A plurality of recesses are formed only in the Schottky junction of the SiC semiconductor layer, In a region of the surface of the SiC semiconductor layer excluding the Schottky junction, no recesses similar to the plurality of recesses formed in the Schottky junction are formed, a portion of the Schottky layer embedded in the recesses;

2. A field insulating film having an opening formed on the surface of the SiC semiconductor layer, a field insulating film including an inclined portion and a flat portion, and the Schottky layer contacts the surface of the SiC semiconductor layer through the opening to form the Schottky junction; 2. The semiconductor device according to claim 1, wherein said Schottky layer and said aluminum electrode layer are formed so as to cover both said inclined portion and a part of said flat portion of said field insulating film.

3. 3. The semiconductor device according to claim 2, wherein a portion of said aluminum electrode layer from a periphery of said opening in said field insulating film to an outer periphery of said aluminum electrode layer has a width of 10 [mu]m or more.

4. A SiC semiconductor layer having a front surface and a back surface; a Schottky layer made of molybdenum and having a thickness of 10 nm to 150 nm formed on the surface of the SiC semiconductor layer; an aluminum electrode layer formed on the Schottky layer; a cathode electrode formed on the back surface of the SiC semiconductor layer; A field insulating film having an opening formed on the surface of the SiC semiconductor layer, a field insulating film including an inclined portion and a flat portion, and the Schottky layer contacts the surface of the SiC semiconductor layer through the opening to form the Schottky junction; a titanium layer formed between the Schottky layer and the aluminum electrode layer and having a thickness of 60 nm to 190 nm; a Schottky junction is formed between the Schottky layer and the surface of the SiC semiconductor layer; A plurality of recesses are formed only in the Schottky junction of the SiC semiconductor layer, In a region of the surface of the SiC semiconductor layer excluding the Schottky junction, no recesses similar to the plurality of recesses formed in the Schottky junction are formed, a portion of the Schottky layer is embedded in the recesses; the Schottky layer and the aluminum electrode layer are formed so as to cover both the inclined portion and a part of the flat portion of the field insulating film.

5. 5. The semiconductor device according to claim 2, wherein the field insulating film has a thickness of 0.5 μm to 3 μm.

6. The SiC semiconductor layer includes a substrate and an epitaxial layer on the substrate, 6. The semiconductor device according to claim 2, wherein the substrate has a thickness of 50 μm to 600 μm.

7. 7. The semiconductor device according to claim 2, wherein the field insulating film contains Si.

8. 8. The semiconductor device according to claim 2, wherein each of the length and width of the semiconductor device is 0.5 mm to 20 mm.

9. The semiconductor device according to any one of claims 2 to 8, further comprising a surface protective film covering an outer periphery of the aluminum electrode layer and a part of the surface of the SiC semiconductor layer.

10. 10. The semiconductor device according to claim 9, wherein said surface protection film has a two-layer structure including a silicon nitride film and a polyimide film on said silicon nitride film.

11. The semiconductor device according to claim 2, further comprising a guard ring formed in the SiC semiconductor layer so as to surround the Schottky junction.

12. The semiconductor device according to any one of claims 2 to 11, wherein the SiC semiconductor layer has a first conductivity type.

13. 12. The semiconductor device according to claim 11, wherein the Schottky junction and an inner periphery of the guard ring are selectively exposed from the opening in the field insulating film.

14. a portion of the surface of the SiC semiconductor layer is exposed from the periphery of the field insulating film; The semiconductor device according to any one of claims 2 to 8, further comprising a surface protective film covering an outer periphery of the aluminum electrode layer and a portion of the exposed surface of the SiC semiconductor layer.

15. 15. The semiconductor device according to claim 1, wherein each of the recesses has a depth of 5 nm or less.

16. The semiconductor device according to any one of claims 1 to 10, further comprising a guard ring formed in the SiC semiconductor layer so as to extend outward beyond an outer periphery of the aluminum electrode layer.

17. Further comprising a surface protective film covering an outer periphery of the aluminum electrode layer and a part of the surface of the SiC semiconductor layer; The semiconductor device according to claim 1 , wherein a peripheral portion of the surface protective film extends to an end face of the SiC semiconductor layer.

18. The semiconductor device according to any one of claims 1 to 17, wherein the recesses have a depth of 5 nm or less and are irregularly arranged on the SiC semiconductor layer.

Citation Information

Patent Citations

  • Schottky barrier diode

    JP1997283771A

  • Schottky barrier semiconductor device and manufacture thereof

    JP1998125936A

  • Semiconductor device, power converter using semiconductor device, driving inverter, general-purpose inverter, and high power high frequency communication equipment

    JP2005079339A

  • Schottky barrier diode and manufacturing method thereof

    JP2008103436A

  • Solderable top metal for silicon carbide devices

    JP2008518445A