Semiconductor device manufacturing method

Abstract

To provide a method for manufacturing a semiconductor device that can detect etching endpoints with high accuracy.SOLUTION: A method comprises: forming a semiconductor element in an element region of a semiconductor substrate; adding at least one protrusion on a top surface, which is one main surface in a dicing line region of the semiconductor substrate; forming a film on the top surface in the dicing line region, forming a film so that the film covers a first step on a side surface of the at least one protrusion and the top surface of the film has a second step; and plasma etching the film, and in the plasma etching, the end point of the plasma etching is detected based on the intensity of the emission of the product generated in the plasma etching of the film.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a method for etching an interlayer insulating film using a plasma etching device to form a contact hole, which includes a step of detecting the end point of etching the interlayer insulating film using an etching end point detection device that measures the etching end point based on a change in the emission intensity of light of a specific wavelength emitted from a plasma region of the plasma etching device. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 11-003882 Summary of the Invention [Problem to be solved by the invention]

[0004] When detecting the end point of etching based on the intensity of light emitted by a product produced during etching, if the intensity of the light emitted is weak, the accuracy of detecting the end point of etching decreases.

[0005] The present disclosure is intended to solve such problems, and aims to provide a method for manufacturing a semiconductor device that increases the intensity of the luminescence emitted by the products produced during etching, thereby enabling the endpoint of etching to be detected with high accuracy. [Means for solving the problem]

[0006] The method for manufacturing a semiconductor device according to the present disclosure includes forming a semiconductor element in an element region of a semiconductor substrate, adding at least one protrusion onto an upper surface, which is one main surface, in a dicing line region of the semiconductor substrate, forming a film on the upper surface in the dicing line region, forming the film so that the film covers a first step on a side surface of the at least one protrusion and the upper surface of the film has a second step, plasma etching the film, and detecting an end point of the plasma etching based on an intensity of light emitted by a product generated in the plasma etching of the film. and etching a region of the upper surface in the dicing line region other than the region where the at least one protrusion is added before the formation of the at least one protrusion, or etching a region of the upper surface in the dicing line region other than the region where the at least one protrusion is added after the formation of the at least one protrusion and before the formation of the film, thereby making the first step larger. This is a method for manufacturing a semiconductor device. Effect of the Invention

[0007] The present disclosure provides a method for manufacturing a semiconductor device that is capable of detecting the etching end point with high accuracy. [Brief description of the drawings]

[0008] [Figure 1] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Diagram 2] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Diagram 3] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Figure 4] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Diagram 5] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Figure 6] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Figure 7] 13A to 13C are diagrams illustrating a state during manufacturing in a manufacturing method of a semiconductor device according to a second embodiment. [Figure 8] 1A to 1C are diagrams illustrating a state during manufacturing in the manufacturing method of the semiconductor device according to the first embodiment. [Figure 9]It is a diagram showing a state during the manufacturing process of the semiconductor device of Embodiment 1. [Figure 10] It is a diagram showing a state during the manufacturing process of the semiconductor device of Embodiment 1. [Figure 11] It is a diagram showing an example of the arrangement of protrusions provided in the dicing line region. [Figure 12] It is a diagram showing the semiconductor device of Embodiment 1. [Figure 13] It is a diagram showing the element region and the dicing line region of the semiconductor substrate. [Figure 14] It is a flowchart of the manufacturing method of the semiconductor device of Embodiment 1.

Mode for Carrying Out the Invention

[0009] <A. Embodiment 1> <A-1. First> One of the methods used when manufacturing a semiconductor device is etching. For example, when forming a contact hole in an interlayer insulating film, plasma etching is used.

[0010] If the etching time is short, the etching is not sufficiently performed, and for example, problems such as the contact hole not being able to reach the diffusion region or the lower layer wiring and non-conduction occurring may occur. Conversely, if the etching time is long, the etching is overperformed, and for example, problems such as overetching the diffusion region or the lower layer wiring and damaging the underlying layer to some extent may occur. When the etching is terminated when a predetermined time has elapsed, it is difficult to suppress these problems.

[0011] One method for ending etching at a more appropriate timing is to use an etching endpoint detector (End Point Detector, hereinafter simply referred to as EPD) to detect the endpoint of etching based on the emission intensity of the products in the etching. However, for example, when forming contact holes by etching, if the etched area (that is, the opening area of the resist used during etching) is small and the emission intensity of the products in the etching released from the plasma region is weak, it is difficult to accurately determine the etching endpoint even when using an EPD.

[0012] Hereinafter, in this embodiment, taking the case of forming contact holes by etching in the element region as an example, a method capable of accurately detecting the endpoint of etching will be described. However, the method described below is also applicable to cases other than forming contact holes by etching. For example, when a first metal layer and a second metal layer are formed on a semiconductor substrate, it is also applicable when forming through holes for connecting the first metal layer and the second metal layer.

[0013] <A-2. Manufacturing Method> FIG. 14 is a flowchart showing a method for manufacturing a semiconductor device according to this embodiment.

[0014] First, in step S1, a semiconductor substrate 3 is prepared. As shown in FIG. 13, the semiconductor substrate 3 has an element region 1 and a dicing line region 2. Hereinafter, as an example, the case where the semiconductor substrate 3 is a semiconductor substrate of a silicon semiconductor will be assumed and described. However, the semiconductor substrate 3 may be a semiconductor substrate of a semiconductor other than a silicon semiconductor. For example, the semiconductor substrate 3 may be a semiconductor substrate of a SiC semiconductor or a GaN semiconductor. The semiconductor substrate 3 has one main surface and the other main surface facing each other.

[0015] The semiconductor substrate 3 is an n-type silicon semiconductor substrate. Even if a p-type silicon semiconductor substrate is used as the semiconductor substrate 3, a semiconductor device having the same functions and effects as when an n-type silicon semiconductor substrate is used as the semiconductor substrate 3 can be manufactured. When a p-type silicon semiconductor substrate is used as the semiconductor substrate 3, the conductivity type of each region in the manufactured semiconductor device is opposite to that when the semiconductor substrate 3 is an n-type silicon semiconductor substrate.

[0016] The concentration of the impurity contained in the semiconductor substrate 3 is appropriately selected depending on the breakdown voltage of the semiconductor device to be manufactured. The semiconductor substrate 3 contains, for example, arsenic or phosphorus as an n-type impurity. The concentration of the n-type impurity in the semiconductor substrate 3 is, for example, 1.0E+12 / cm 3 ~1.0E+15 / cm 3 It is.

[0017] Next, in step S2, a semiconductor element structure is partially formed in each of the element regions 1 of the semiconductor substrate 3. In step S2, the semiconductor element structure is partially formed by, for example, a process such as ion implantation or epitaxial growth. Each element region 1 includes an active region through which a main current flows and a termination region for maintaining a breakdown voltage of the semiconductor device. In a plan view, the termination region surrounds the periphery of the active region. For example, a well-known breakdown voltage maintaining structure can be appropriately selected and provided in the termination region. Also, as shown in FIG. 13, in the semiconductor substrate 3, each element region 1 is surrounded by a dicing line region 2. That is, the active region is surrounded by the dicing line region 2.

[0018] Next, in step S3, as shown in Figures 1, 10, and 11, protrusions 4 are formed on the upper surface 3a, which is one of the main surfaces of the dicing line region 2. Figure 11 is an enlarged view of region 20 in Figure 13, and is a diagram showing an example of an in-plane arrangement of protrusions 4. Figure 1 is a cross-sectional view taken along line AA in Figure 11. Figure 10 is an enlarged view of the vicinity of protrusion 4 in Figure 1, and is a diagram showing an example of a detailed configuration of protrusion 4.

[0019] As shown in FIG. 11, at least some of the multiple protrusions 4 are formed, for example, in the dicing line region 2, aligned in the X direction which is a certain direction within the surface of the semiconductor substrate 3.

[0020] As shown in FIG. 11, at least some of the multiple protrusions 4 are formed in a matrix in the dicing line region 2, for example, in the X direction within the plane of the semiconductor substrate 3 and in the Y direction intersecting the X direction.

[0021] The projections 4 may be arranged in a different manner in addition to the arrangement shown in FIG.

[0022] The film 5 to be etched (see FIG. 2) formed to cover the step 4a on the side of the protrusion 4 in step S4 described later is three-dimensionally formed by tracing the shape of the protrusion 4. As a result, the surface area of ​​the upper surface of the film 5 to be etched, that is, the area to be etched, becomes larger than the area of ​​the film 5 to be etched in a plan view. By increasing the surface area of ​​the upper surface of the film 5 to be etched, the emission intensity of the product generated by etching the film 5 to be etched in the plasma etching in step S5 described later becomes higher. By arranging the protrusions 4 finely in the in-plane direction, the surface area of ​​the upper surface of the film 5 to be etched becomes larger. For example, as shown in FIG. 11, four or more protrusions 4 are formed in a square region 21 of the upper surface 3a in the dicing line region 2, the length of one side of which is 10 times the size of the step 4a of the protrusion 4.

[0023] The arrangement of the protrusions 4 may be any arrangement that can increase the surface area of ​​the upper surface of the etched film 5 formed in step S4. The protrusions 4 may be arranged in a stripe pattern in the dicing line region 2. Furthermore, the protrusion 4 may be, for example, a single protrusion having a fine pattern within the plane.

[0024] The side surface of the protrusion 4 may be flush as shown in Fig. 1, or may not be flush. As shown in Fig. 8, the protrusion 4 may be a protrusion whose in-plane area varies depending on the position in the height direction, and whose side surface has a step-like step 4b. Fig. 8 shows an example in which the step 4b of the side surface of the protrusion 4 is a two-step step, but the step of the side surface of the protrusion 4 may be a three or more step step. By making the step 4b a step-like step, the surface area of ​​the upper surface of the film 5 to be etched, which is formed by tracing the shape of the protrusion 4, becomes larger.

[0025] As shown in FIG. 10, the protrusion 4 includes, for example, a TEOS (Tetraethyl orthosilicate) layer 11, a SiN layer 10, and a polysilicon layer 12. The TEOS layer 11, the SiN layer 10, and the polysilicon layer 12 are laminated in this order from the side closer to the semiconductor substrate 3. Although not shown in FIG. 1, a film in which a TEOS layer, a SiN layer, and a polysilicon layer are laminated may be formed on the active region of the element region 1, similar to the protrusion 4 on the dicing line region 2 shown in FIG. 10. For example, in the active region, a TEOS layer as an interlayer insulating film, a SiN layer as an underlying insulating film, and a polysilicon layer as a resistor are formed. The protrusion 4 is formed as a protrusion in which the TEOS layer 11, the SiN layer 10, and the polysilicon layer 12 are laminated, for example, in the same process in which the TEOS layer, the SiN layer, and the polysilicon layer are laminated on the active region. By forming the protrusions 4 in the same process as forming a film in the active region, the manufacturing cost can be reduced and the protrusions 4 can be provided in the dicing line region 2. Some of the multiple protrusions 4 may be protrusions including the TEOS layer 11, the SiN layer 10, and the polysilicon layer 12.

[0026] Next, in step S4, the film to be etched 5 is formed as shown in Fig. 2 and Fig. 6. Fig. 6 is an enlarged view of the vicinity of the protrusion 4 in Fig. 2. The film to be etched 5 is formed so that the film to be etched 5 covers the step 4a on the side surface of the protrusion 4. By forming it in this manner, a step 5a is also formed on the upper surface of the film to be etched 5. As a result, the surface area of ​​the upper surface of the film to be etched 5 is increased compared to when the protrusion 4 is not present.

[0027] The film to be etched 5 is, for example, a TEOS film. The film to be etched 5 may be a film including multiple layers. For example, as shown in FIG. 9, the film to be etched 5 includes a TEOS layer 8a, a SOG (Spin On Glass) layer 9, and a TEOS layer 8b.

[0028] Next, in step S5, plasma etching is performed on the film 5 to be etched. Before performing plasma etching on the film 5 to be etched, a photoresist 6 is formed on the film 5 to be etched, as shown in Fig. 3. The photoresist 6 is formed so as to have openings in a region where a contact hole 7 is to be formed (see Fig. 4) and in a region where the protrusion 4 of the dicing line region 2 is provided.

[0029] In step S5, the film 5 to be etched is etched in a portion corresponding to the contact hole 7 and in a portion surrounding the protrusion 4. The portion of the film 5 to be etched that is formed on the upper surface 3a of the element region 1 is selectively etched, and after completion of step S5, the film 5 to be etched has the contact hole 7 formed therein as shown in FIG.

[0030] In the plasma etching in step S5, the light emitted from the plasma region includes light emitted by products generated by plasma etching the film 5 to be etched. In step S5, the intensity of the light emitted by products generated by plasma etching the film 5 to be etched is detected, and the etching end point is detected based on the intensity of the light emitted. For example, when a TEOS film, which is the film 5 to be etched, is etched using plasma of a gas containing CF4, the etching end point is detected based on the intensity of the light emitted by SiF4 generated by the reaction of SiO2+4F→SiF4+O2.

[0031] The intensity of the light emitted by the product generated by plasma etching the film to be etched 5 is detected, for example, by using an EPD. In step S5, for example, a reference value for the intensity of the light emitted by the product generated by plasma etching the film to be etched 5 is set in advance, and when the intensity of the light emitted by the product generated by plasma etching the film to be etched 5 falls below the reference value, it is determined that the etching of the film to be etched 5 has been completed, and the plasma etching is terminated.

[0032] Since the film to be etched 5 is formed so as to cover the step 4a and the surface area of ​​the upper surface of the film to be etched 5 is increased, the intensity of the light emitted by the product generated by plasma etching of the film to be etched 5 is increased. Therefore, the etching end point can be detected with high accuracy. For example, even if the area of ​​the film to be etched 5 in the element region 1 that is etched is small, the etching end point can be detected with high accuracy.

[0033] Next, in step S6, the remaining structure of the semiconductor element is formed. As a result, a semiconductor element 101 is formed in the element region 1 as shown in Fig. 5. In step S6, for example, as shown in Fig. 5, an electrode 13 is formed so as to pass through a contact hole 7 and be electrically connected to the semiconductor substrate 3. In Fig. 5, the structure inside the semiconductor substrate 3 and the structure on the lower surface side of the semiconductor substrate 3 are omitted.

[0034] Next, in step S7, dicing is performed along the dicing line regions 2. As a result, individual semiconductor devices are obtained.

[0035] As described above, in the manufacturing method of the semiconductor device of the present embodiment, at least one protrusion 4 is added on the upper surface 3a in the dicing line region 2, and the film to be etched 5 is formed on the upper surface 3a in the dicing line region 2 so that the film to be etched 5 covers the step 4a on the side of at least one protrusion 4, and the upper surface of the film to be etched 5 has the step 5a. Then, in the plasma etching of the film to be etched 5, the end point of the plasma etching is detected based on the intensity of the light emitted by the product generated in the plasma etching of the film to be etched 5. The film to be etched 5 formed to cover the step 4a is formed so that the upper surface of the film to be etched 5 has the step 5a. The surface area of ​​the upper surface of the film to be etched 5 is increased by the amount of the step 5a, and the surface area of ​​the upper surface of the film to be etched 5 is larger than the area of ​​the film to be etched 5 in a plan view. As a result, the amount of the film to be etched 5 removed in the etching of step S5 increases, so that the reaction product from there increases, and the light emission intensity of the reaction product increases. This allows the end point of the etching to be detected with high accuracy. By being able to detect the etching end point with high accuracy, for example, it is possible to prevent insufficient etching and excessive etching of the underlayer.

[0036] The plasma etching in step S5 may be anisotropic etching or isotropic etching. In the case of isotropic etching, as shown in Fig. 12, the film 5 to be etched does not remain on the side walls of the protrusions 4, so that the attenuation of the light emitted by the by-product generated in the plasma etching of the film 5 to be etched becomes sharp, and the end point can be detected more accurately.

[0037] When the plasma etching in step S5 is isotropic etching, in a plan view, a dicing line region 2 is provided around an element region 1 where a semiconductor element is formed. At least one protrusion 4 is provided on an upper surface 3a in the dicing line region 2, and a semiconductor device 100 is obtained in which a film covering the side surfaces is not provided for each of the at least one protrusions 4. At least one of the at least one protrusions 4 includes, for example, a TEOS layer 11, a SiN layer 10, and a polysilicon layer 12. The semiconductor device 100 may include the entire semiconductor substrate 3 before dicing, or may be one in which each element region 1 is separated by dicing. In dicing, the semiconductor substrate 3 is not necessarily cut in the entire dicing line region 2, and may be cut in a region narrower than the width of the dicing line region 2. Therefore, the semiconductor device 100 after being diced and separated has, for example, a dicing line region 2 on the outer peripheral portion, and in the dicing line region 2, at least one protrusion 4 is provided on the upper surface 3a, and a film covering the side surfaces is not provided for each of the at least one protrusions 4.

[0038] <B. Embodiment 2> In the method for manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 7, a recess 30 is formed in the semiconductor substrate 3. Except for forming the recess 30, the method for manufacturing a semiconductor device according to the present embodiment is the same as the method for manufacturing a semiconductor device according to Embodiment 1.

[0039] For example, after forming the protrusion 4 in step S3 and before forming the film to be etched in step S4, the recess 30 is formed by etching a region on the upper surface 3a of the semiconductor substrate 3 where the protrusion 4 is not formed. Further, for example, before forming the protrusion 4 in step S3, the recess 30 is formed by etching a region other than the region where the protrusion 4 is formed on the upper surface 3a of the semiconductor substrate 3, and then the protrusion 4 is formed in step S3.

[0040] By forming the recess 30, the step on the side of the protrusion 4 becomes larger, and as a result, the surface area of ​​the upper surface of the film 5 to be etched formed so as to cover the side of the protrusion 4 becomes larger. Therefore, the amount of the film 5 to be etched that is removed in the etching of step S5 increases, and the reaction products therefrom increase, and the emission intensity of the reaction products increases. This makes it possible to detect the end point of the etching with higher accuracy. This makes it possible to suppress, for example, insufficient etching and excessive etching of the underlayer.

[0041] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate. [Explanation of symbols]

[0042] 1 element region, 2 dicing line region, 3 semiconductor substrate, 3a upper surface, 4 protrusion, 4a, 4b, 5a step, 5 film to be etched, 6 photoresist, 7 contact hole, 8a, 8b, 11 TEOS layer, 9 SOG layer, 10 SiN layer, 12 polysilicon layer, 13 electrode, 30 recess, 100 semiconductor device, 101 semiconductor element.

Claims

1. forming a semiconductor element in an element region of a semiconductor substrate; Adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate; forming a film on the upper surface in the dicing line region; In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step; Plasma etching the film; In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film; etching a region of the upper surface in the dicing line region other than the region to which the at least one protrusion is added before forming the at least one protrusion, or etching a region of the upper surface in the dicing line region other than the region to which the at least one protrusion is added after forming the at least one protrusion and before forming the film, thereby making the first step larger; A method for manufacturing a semiconductor device.

2. 2. The method of manufacturing a semiconductor device according to claim 1, In the formation of the film, the film is also formed on the upper surface of the element region; In the plasma etching, a portion of the film formed on the upper surface of the element region is selectively etched. A method for manufacturing a semiconductor device.

3. Forming a semiconductor element in an element region of a semiconductor substrate; Adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate; forming a film on the upper surface in the dicing line region; In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step; Plasma etching the film; In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film; The first step is a step having two or more steps. A method for manufacturing a semiconductor device.

4. 4. A method for manufacturing a semiconductor device according to claim 1, comprising the steps of: the film includes a first TEOS layer, a SOG layer, and a second TEOS layer; A method for manufacturing a semiconductor device.

5. 5. A method for manufacturing a semiconductor device according to claim 1, comprising the steps of: the at least one protrusion is a plurality of protrusions; At least some of the protrusions are arranged on the upper surface in the dicing line region of the semiconductor substrate, and are aligned in a first direction in the plane of the upper surface. A method for manufacturing a semiconductor device.

6. Forming a semiconductor element in an element region of a semiconductor substrate; Adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate; forming a film on the upper surface in the dicing line region; In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step; Plasma etching the film; In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film; the at least one protrusion is a plurality of protrusions; At least some of the plurality of protrusions are arranged in a matrix on the upper surface in the dicing line region of the semiconductor substrate, in a first direction within the upper surface and in a second direction intersecting the first direction. A method for manufacturing a semiconductor device.

7. Forming a semiconductor element in an element region of a semiconductor substrate; Adding at least one protrusion onto an upper surface, which is one of the main surfaces, in a dicing line region of the semiconductor substrate; forming a film on the upper surface in the dicing line region; In the formation of the film, the film is formed so that the film covers a first step on a side surface of the at least one protrusion and a top surface of the film has a second step; Plasma etching the film; In the plasma etching, an end point of the plasma etching is detected based on an intensity of light emitted by a product generated in the plasma etching of the film; the at least one protrusion is a plurality of protrusions; four or more of the plurality of protrusions are arranged within a square region, the square region having a side length ten times the size of the first step, on the upper surface in a dicing line region of the semiconductor substrate; A method for manufacturing a semiconductor device.

8. 8. A method for manufacturing a semiconductor device according to claim 1, comprising the steps of: At least one of the at least one protrusions includes a polysilicon layer, a SiN layer, and a TEOS layer; A method for manufacturing a semiconductor device.

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