Nanopore sensing element

Abstract

The nanopore sensing element includes a planar structure with a plurality of fluid passages extending between a first chamber and a second chamber. The planar structure supports a nanopore in a membrane across each passage, and a sensor electrode is positioned to sense a fluid potential in each passage between the nanopore and the second chamber. The passages include a planar fluidic resistance portion between the sensor electrode and the second chamber, the planar fluidic resistance portion extending in a plane direction of the planar structure and configured to form a fluidic resistance.

Description

[Technical field]

[0001] The present invention relates to a nanopore sensing element. [Background technology]

[0002] Nanopore sensing elements have been developed to sense a wide range of species, including single molecules such as polymer molecules. A known nanopore sensing element is MinION®, manufactured and sold by Oxford Nanopore Technologies Ltd. Nanopore-based sensing here utilizes the measurement of ionic current through a biological nanopore located in a highly resistive amphiphilic membrane. MinION® has an array of nanopore sensors. When a molecule, for example a polymeric analyte such as DNA, is translocated through the nanopore, the measurement of the variation in ionic current can be used to determine the sequence of the DNA strand. Nanopore elements for the detection of analytes other than polynucleotides, such as proteins, are also known from WO2013 / 123379. Summary of the Invention [Problem to be solved by the invention]

[0003] While many nanopore sensing elements, such as MinION®, use biological nanopores, an alternative is to use solid-state nanopores. One example of a nanopore sensing element using a solid-state nanopore is disclosed in WO2016 / 127007, which is hereby incorporated by reference in its entirety. The performance of solid-state nanopore sensors is limited by the sensing elements, manufacturing techniques and their tolerances, which may result from variations in the formation of the nanopore or assembly of the sensor. These and other factors are detrimental to the bandwidth, sensitivity and controllability of such nanopore sensors.

[0004] The present invention is directed to overcoming the problems associated with implementing a nanopore sensor device having multiple nanopore sensors. [Means for solving the problem]

[0005] According to one aspect of the invention, there is provided a nanopore sensing element comprising: a planar structure having first and second chambers and a plurality of fluid passages extending between the first and second chambers, the planar structure configured to support a nanopore in a membrane across each passage; and a sensor electrode arranged to sense a fluid potential in each passage between the nanopore and the second chamber, the passages including a planar fluidic resistance portion between the sensor electrode and the second chamber, the planar fluidic resistance portion extending in a planar direction of the planar structure and configured to form a fluidic resistance.

[0006] By providing a planar fluidic resistance portion, a voltage divider is formed across the sensor electrode that includes the resistance of the nanopore on one leg and the resistance of the planar fluidic resistance portion on the other leg, such that the fluid potential sensed in the passage by the sensor electrode allows sensing of the current flowing through the passage and therefore sensing of the nanopore. This allows nanopore sensing.

[0007] Furthermore, the formation of planar fluid resistance parts extending in the planar direction of the planar structure improves the ease of manufacture compared to fluid resistance parts formed by access holes extending through the thickness of the planar structure. This is because the typical resistance of a nanopore means that the fluid resistance parts must have a relatively high resistance in order to perform pressure division through the nanopore. Thus, fluid resistance parts formed by access holes extending through the thickness of the planar structure must be relatively long and have a relatively high aspect ratio that is difficult to manufacture. In contrast, planar fluid resistance parts extending in the planar direction of the planar structure are in principle easier to form. However, their construction and formation remain technical problems, and some of the following aspects of the invention are directed to improving the ease of manufacture.

[0008] The fluid resistance portion may be of a linear shape. The fluid resistance portion may have a continuous linear shape without curves or bends. The fluid resistance portion may be of a linear shape and extend in a direction perpendicular to the planar structure. The fluid resistance of the fluid resistance portion may be less than the resistance of the nanopore. The fluid resistance of the fluid resistance portion may be less than 50% to about 1% of the resistance of the nanopore. The fluid resistance of the fluid resistance portion may be about 10% of the resistance of the nanopore. In one embodiment, the planar structure comprises a nanopore support layer configured to support a nanopore in a membrane extending across the passage, and a further layer in which the planar fluid resistance portion is formed.

[0009] By forming the planar fluidic resistance portion in a layer different from the nanopore support layer that supports the nanopore in the membrane, the nanopore support layer can be designed and manufactured with properties suitable for nanopore support, while allowing the planar fluidic resistance portion to be formed in a further layer having different material properties.

[0010] In some types of embodiments, the nanopore support layer includes a well that opens into the first chamber, the well forming a portion of the passageway and configured to support the nanopore in the membrane extending across the well.

[0011] The further layer may be a dielectric layer, which facilitates the manufacture of the planar fluidic resistor part by allowing the use of various techniques suitable for processing dielectric materials, such as deposition and removal processes.

[0012] The first and second chambers may be on opposite sides of the planar structure such that a passageway extends through the planar structure, in which case the substrate may include an access hole extending therethrough forming part of the passageway.

[0013] In another embodiment that may be combined with, but is not dependent on, a separate nanopore support layer, the first and second chambers are on opposing sides of a planar structure such that the passageway extends through the planar structure, in which case the planar structure includes a substrate and a further layer supported by the substrate, the planar fluidic resistance portion is formed in the further layer, and the substrate may include an access hole extending therethrough to form part of the passageway.

[0014] This facilitates the manufacture of the planar fluidic resistor portion by allowing further layers to be processed on the substrate, for example the further layers may be dielectric layers, which facilitates the manufacture of the planar fluidic resistor portion by allowing the use of various techniques suitable for processing dielectric materials, such as deposition and removal processes, as described above.

[0015] In some embodiments, the further layer is between the first chamber and the substrate. Advantageously, this positions the further layer in which the planar fluidic resistance portion is formed close to the nanopore in the passage.

[0016] Advantageously, each access hole may be shared by multiple passages by being commonly fluidly connected to multiple planar fluidic resistance portions, allowing the areal density of passages and nanopores over the area of ​​the planar structure to be increased.

[0017] The substrate may be a semiconductor wafer, which allows the planar fluidic resistor portion to be formed in further layers using conventional semiconductor processing techniques.

[0018] Additionally, the planar structure may further include a circuit layer supported by the semiconductor wafer, the circuit layer including circuit components connected to the sensor electrodes, allowing the semiconductor wafer to provide a substrate supporting both the circuit layer and the further layer in which the planar fluidic resistance portion is formed.

[0019] In this case, advantageously, the circuit layer is formed on the semiconductor wafer and the dielectric layer is formed on the circuit layer, this sequence simplifying manufacture to provide the circuit layer and the further layer in which the planar fluidic resistance portion is formed.

[0020] In another embodiment, the planar structure further includes a semiconductor wafer having a circuit layer supported thereby, the circuit layer having circuit components connected to the sensor electrodes, the semiconductor wafer and the circuit layer including access holes extending therethrough that form part of the passageway, and a substrate bonded to the semiconductor wafer between the semiconductor wafer and the second chamber.

[0021] In another embodiment, the planar structure includes a substrate, a circuit layer supported by the semiconductor wafer, the circuit layer including circuit components connected to the sensor electrodes, and a nanopore support layer configured to support a nanopore in a membrane extending across the passageway, the planar fluidic resistance portion being formed in the nanopore support layer, which facilitates fabrication of the planar fluidic resistance portion by allowing a variety of techniques suitable for processing the nanopore support layer.

[0022] In this case, the nanopore support layer may include a well opening into the first chamber, the well forming part of the passageway and configured to support the nanopore in the membrane extending across the well.

[0023] The first and second chambers may be on opposite sides of the planar structure, in which case the passageway extends through the planar structure.The substrate may include an access hole extending therethrough that forms part of the passageway.

[0024] An access hole may be shared by multiple passages by being commonly fluidly connected to multiple planar fluid resistance portions. When an access hole is shared between two or more passages, the resistance of the access hole is configured to suppress crosstalk between the passages. The resistance of the common access hole may be negligible within the passages.

[0025] The substrate may be a semiconductor wafer.

[0026] In either embodiment, the planar fluidic resistance portion may advantageously extend along a serpentine path, which facilitates packaging of the planar fluidic resistance portion with a length sufficient to provide the desired resistance in discrete regions on the planar structure, thereby helping to increase the areal density of the nanopore sensor.

[0027] In either embodiment, the planar fluidic resistance portion may advantageously include sections each extending in the planar direction of the planar structure but at different depths within the planar structure. This facilitates packaging of planar fluidic resistance portions with sufficient length to provide the desired resistance within discrete regions on the planar structure, thereby helping to increase the areal density of the nanopore sensor. The sections at different depths may overlap.

[0028] To enable a better understanding, embodiments of the invention will now be described, by way of non-limiting examples, with reference to the accompanying drawings, in which: [Brief description of the drawings]

[0029] [Figure 1] FIG. 2 is a cross-sectional view of a nanopore sensing element. [Diagram 2] FIG. 2 is a cross-sectional view of the planar structure of a nanopore sensing element. [Diagram 3] FIG. 2 is a plan view of the planar structure. [Figure 4] FIG. 1 is a diagram of a circuit for a nanopore sensing element. [Diagram 5] FIG. 2 is a plan view of a planar fluidic resistance portion that may be formed in a dielectric layer of a planar structure. [Figure 6] 1A-1C are a series of cross-sectional views of layers processed during the manufacture of a planar structure. [Figure 7] FIG. 2 is a cross-sectional view of a planar structure having a first modified structure. [Figure 8]FIG. 2 is a cross-sectional view of a planar structure having second and third modified structures. [Figure 9] 13A-13C are plan views of alternative configurations of planar fluidic resistance portions formed in a dielectric layer of a planar structure. [Figure 10] 10 is a series of cross-sectional views of layers processed during the manufacture of a planar structure in which the planar fluidic resistance portion has the alternative configuration of FIG. 9. [Figure 11] 11 is a series of cross-sectional views of layers processed during the fabrication of a base layer of a planar structure having a fourth modified structure in which a planar fluidic resistor portion is formed on a substrate bonded to a semiconductor wafer. [Figure 12] 11A-11C are a series of cross-sectional views of layers processed during the fabrication of a planar structure having a fifth modified structure in which a planar fluidic resistance portion is formed in a nanoporous support layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] FIG. 1 shows a nanopore sensing element 1 that is constructed as follows.

[0031] The nanopore sensing element 1 comprises a first chamber 3 and a second chamber 4 with a planar structure 10 between the first chamber 3 and the second chamber 4. In use, the first and second chambers 3, 4 are filled with a fluid such as an ionic solution or ionic liquid. The first and second chambers 3, 4 are shown diagrammatically in Figure 1 but may be configured in any suitable structure.

[0032] The first and second chambers 3, 4 may be closed or may be configured as part of a flow cell allowing the flow of a solution therethrough.

[0033] The planar structure 10 comprises a plurality of fluid passages 20 extending between the first chamber 3 and the second chamber 4. The fluid passages 20 are thus filled with fluid in use and fluidly connect the first chamber 3 and the second chamber 4. Each of the fluid passages 20 is connected to the first and second chambers 3, 4 such that the nanopores 22 are in parallel paths of fluid communication. The plurality of fluid passages 20 may be arranged in a two-dimensional array across the planar structure 10.

[0034] 1, the structure of the planar structure 10 is not shown, and therefore the fluid passages 20 are shown only diagrammatically. The configuration of the planar structure 10 and the fluid passages 20 will be described in detail below.

[0035] In this example, the first chamber 3 and the second chamber 4 are on opposite sides of the planar structure 10, so that the passage 20 extends through the planar structure 10. However, alternatively, the first chamber 3 and the second chamber 4 may be located at different positions on the same side of the planar structure 10.

[0036] In this example, actuation electrodes 5, 6 are provided in the first and second chambers 3, 4. In use, a potential difference may be applied between the actuation electrodes 5, 6, and thus across each fluid passage 20, to cause the flow of analyte between the first chamber 3 and the second chamber 4. The actuation electrodes 5, 6 may be configured to apply substantially the same potential difference across all fluid passages 20. Additionally or alternatively, the nanopore sensing element 1 may be configured to cause the flow of analyte through the fluid passages 20 using other techniques.

[0037] The first chamber 3 may function as a cis chamber and hold an analyte to be analyzed by the nanopore sensing element 1. The second chamber 4 may function as a trans chamber and receive the analyte from the first chamber 3.

[0038] As will be described in more detail below, the planar structure 10 supports a nanopore 23 in a membrane 22 that extends across each passageway 20. Examples of suitable membranes 22 and nanopores 23 are described below.

[0039] Each of the fluid passages 20 includes a sensor electrode 24 positioned to sense a fluid potential in the respective passage 20 between the nanopore 23 and the second chamber 4. When an analyte passes through the nanopore 22, a change in potential caused by a change in ionic current is detected by the sensor electrode 24. Thus, the passages 20 and the sensor electrodes 24 formed therein function as respective sensors in the nanopore sensor element 1.

[0040] FIG. 2 shows the structure of the planar structure 10, showing one of a number of fluid passages 20 for clarity, as follows:

[0041] The planar structure 10 includes a nanoporous support layer 30 and a base layer 100 secured together.

[0042] The nanopore support layer 30 is configured to support a nanopore 23 in the membrane 22 extending across the passage 20. In particular, the nanopore support layer 30 comprises a well 31 that opens into the first chamber 3. The well 31 forms part of the passage 20. The well 31 is configured to support the membrane 22, and thereby the nanopore 22, that extends across the passage 20, in particular across the opening of the well 31. The nanopore support layer 30 includes a wall layer 32 that includes a wall 33 that defines the well 31.

[0043] The nanoporous support layer 30 may be made of any suitable material, for example, a ceramic such as silicon dioxide or silicon nitride, a photoresist such as SU-8 or TMMF / TMMR, a plastic such as acrylic (PMMA), or an epoxy resin.

[0044] 3 shows an example in which a plurality of wells 31 are arranged in a plane in a regular planar array having a repeating structure in a plan view (from above in FIG. 2). Although FIG. 3 shows only nine wells 4 for simplicity, in general, the nanopore support layer 30 may have any number of wells 31, typically much greater than nine, for example on the order of 1000 or more, practically on the order of 100,000, and feasibly up to 5,000,000 or more. Each of the wells 31 and corresponding passages 20 are disposed within a respective footprint 35.

[0045] The base layer 100 is between the nanopore support layer 30 and the second chamber 4 and includes the following layers: The base layer 100 includes a semiconductor wafer 101, which in this example forms the substrate and supports a circuit layer 110 and a dielectric layer 120. The circuit layer 110 includes circuit components connected to the sensor electrodes 24. The circuit components for each passage 20 are located within the same footprint 35 as the passage 20.

[0046] The semiconductor wafer 101 is typically made of silicon, but in principle can be any semiconductor material suitable as a support for the circuit layer 110, such as silicon dioxide, quartz, glass, amorphous aluminum oxide or sapphire.

[0047] The dielectric layer 120 provides a planar fluidic resistance portion 150 which forms part of the passage 20, and thus forms a further layer in this example. In this way, the fluidic passage 20 provides a fluidic resistance between the sensor electrode 24 and the second chamber 4. More specifically, the fluidic passage 20 through the base layer 100 includes the following portions fluidly connected in series: A well 31 or access thereto, as described above, a dielectric access hole 121 extending from the well 31 through the dielectric layer; a planar fluidic resistance portion 150 formed in the dielectric layer and fluidly connected to the dielectric access hole 121; a circuit layer access hole 111 extending through the circuit layer 110 and fluidly connected to the planar fluid resistance portion 150; and A wafer access hole 102 extending through the semiconductor wafer 101 and fluidly connected to a circuit layer access hole 111.

[0048] The sensor electrode 24 is formed in the dielectric access hole 121 .

[0049] The planar fluidic resistance portion 150 is configured to form a fluidic resistance. In this manner, the fluidic passage 20 is configured to provide a fluidic resistance between the sensor electrode 24 and the second chamber 4, as described below with reference to FIG. 4, which is a diagram of a circuit of the nanopore sensing element 1.

[0050] As a result, the passage 20 forms a voltage divider 50 having a nanopore 23 such that the sensor electrode 24 is disposed between two legs 51 and 52 of the voltage divider 50. A first leg 51 of the voltage divider 50 is formed between the first drive electrode 5 and the sensor electrode 24, and a second leg 52 of the voltage divider 50 is formed between the sensor electrode 24 and the second drive electrode 6.

[0051] The resistance of the nanopore 23, along with any additional solution resistance between the first actuation electrode 5 and the sensor electrode 24, is present in the first leg 51 of the voltage divider 50. The well 31 and the dielectric access hole 121 may be designed to have minimal fluidic resistance compared to the nanopore 23.

[0052] The fluid resistance of the planar fluidic resistance portion 150 is present in the second leg 52 of the voltage divider 50. The circuit layer access holes 111 and the wafer access holes 102 may be designed to provide a negligible fluidic resistance compared to the fluidic resistance of the planar fluidic resistance portion 150, although this is not required and they may be designed to provide additional fluidic resistance.

[0053] The first and second chambers 51 , 52 also have negligible fluid resistance compared to the passage 20 due to the relatively narrow cross-sectional area of ​​the passage 20 .

[0054] Sensor circuit 55 is configured to sense the fluid potential at sensor electrode 24 in passageway 20. As a result of voltage divider 50, the fluid potential sensed in passageway 20 by sensor electrode 24 allows for sensing of the flow through passageway 20, and thus the flow through nanopore 23. Sensor electrode 24 can detect voltage fluctuations as material, such as molecules on a DNA strand, moves through nanopore 23. This provides nanopore sensing.

[0055] The sensor electrode 24 resides between the nanopore 23 and the planar fluidic resistance portion 150. The configuration in Figure 2 is an example, but the sensor electrode 24 may be located elsewhere in the passageway 20, such as in the well 31.

[0056] In some embodiments, the sensor electrode 126 may function as a terminal (eg, base or gate) of a transistor element to measure the electrical potential of the fluid at the location of the sensor electrode 24 .

[0057] Some or all of the components of sensor circuitry 55 are formed in circuit layer 110. Such components may include, for example, any one or more of transistor elements, amplifiers, gating circuits, etc., for which sensor electrodes 24 serve as terminals (e.g., bases or gates). If only some of the components of sensor circuitry 55 are formed in circuit layer 110, the remainder of sensor circuitry 55 may be formed in a separate integrated circuit chip connected to circuit layer 150.

[0058] The design considerations for the planar flow resistance section 150 and the passageway 20 overall are as follows:

[0059] The passage, and in particular the planar fluid resistance portion 150, may be configured such that when the passage 22 is filled with fluid, the resistance of the first and second legs 51, 52 of the voltage divider 50 are substantially matched and relatively high relative to the resistance of the fluid in the first and second chambers 3, 4 such that the resistance of the first and second chambers 3, 4 does not significantly affect the measurement.

[0060] The signal-to-noise ratio may be optimized by selecting the hydraulic resistance of the first and second legs 51, 52 of the voltage divider 50 to be equal. However, this is not required and the hydraulic resistance of the planar hydraulic resistance section 150 may be varied to take other factors into account while still obtaining an acceptable signal-to-noise ratio. An acceptable signal-to-noise ratio may be achieved with the hydraulic resistance of the second leg 52 of the voltage divider 50 being significantly smaller than the resistance of the first leg of the voltage divider, for example with the hydraulic resistance of the second leg 52 of the voltage divider 50 being less than 10%, for example 2%, of the resistance of the first leg 51 of the voltage divider 50. In some embodiments, the lower limit of the hydraulic resistance of the second leg 52 of the voltage divider 50 may be set by the desired signal-to-noise ratio.

[0061] Other factors that may be considered in selecting the fluid resistance of the second leg 52 of the voltage divider 50, and specifically the planar fluid resistance portion 150, are as follows.

[0062] Increasing the fluidic resistance of the second leg 52 reduces the diffusion of ions, causing increased depletion of ions near the pore, thereby causing signal attenuation over the time scale of a typical event for which a signal is obtained. To increase the read length limit caused by this effect, the fluidic resistance of the planar fluidic resistance portion 150 may be reduced. In many embodiments, this factor may provide an upper limit on the fluidic resistance of the planar fluidic resistance portion 150. Increasing the fluidic resistance of the planar fluidic resistance portion 150 may increase the voltage fluctuation across the nanopore 23, complicating signal processing. To limit this effect, the fluidic resistance of the planar fluidic resistance portion 150 may be reduced. Reducing the fluidic resistance of the planar fluidic resistance portion 150 may increase the bandwidth or provide room for additional capacitance in the passage 20 or membrane 22.

[0063] Taking these factors into consideration, the fluidic resistance of the second leg of the voltage divider may be less than the resistance of the nanopore 23, and is typically at most 50% or at most 25% of the resistance of the nanopore 23. In some embodiments, the optimal fluidic resistance of the second leg 52 of the voltage divider 50 may be about 10% of the resistance of the nanopore 23.

[0064] When the ratio of the fluidic resistance of the second leg 52 of the voltage divider 50 to the resistance of the first leg 51 of the voltage divider 50 is reduced, the signal-to-noise ratio does not vary linearly with the resistance ratio. For example, in some embodiments, when the fluidic resistance of the second leg 52 of the voltage divider 50 is about 10% of the resistance of the nanopore 23, the signal-to-noise ratio is about 30% of its optimal value.

[0065] FIG. 5 shows an example of a planar fluid resistance portion 150 that is constructed as follows.

[0066] The planar fluidic resistance portion 150 extends in the planar direction of the planar structure 10 along a serpentine path between the dielectric access hole 121 and the circuit layer access hole 111. Providing the planar fluidic resistance portion 150 with such a planar configuration allows it to be manufactured in the dielectric layer 120. Providing the planar fluidic resistance portion 150 with a serpentine path allows the planar fluidic resistance portion 150 to have a sufficient length while being packaged within a discrete area of ​​the planar structure 10, i.e., within the footprint 35, which in this example is approximately square.

[0067] In this example, the serpentine path of the fluid-resistant portion 150 is linear and includes multiple linear legs extending back and forth. More generally, the planar fluid-resistant portion 150 may include any suitable serpentine path, which may be any path that is not linear between its ends, including paths that are much simpler or much more complex than those shown in FIG. 5. For example, a simple variation on the serpentine path may include multiple legs extending back and forth in a similar manner, but of a curvilinear configuration rather than a straight one. In other examples, the serpentine path may have other curvilinear shapes, including a spiral shape.

[0068] The geometry of the planar fluid resistance portion 150, particularly its path length and cross-sectional area, is designed to provide a desired fluid resistance in relation to the fluid to be filled. That is, the fluid resistance of the planar fluid resistance portion 150 can be varied by changing its length, cross-sectional area, and the ion concentration of the fluid therein. For example, to increase the fluid resistance, the planar fluid resistance portion 150 can be configured to have an increased ratio of length to cross-sectional area and / or a lower ion concentration. The passage may be provided with a lower ion concentration than the first and / or second chambers 3, 4, since maintaining a relatively high ion concentration in the first and second chambers 3, 4 improves the signal-to-noise ratio.

[0069] In embodiments, the planar fluid resistance portion 150 may have a length of at least 1 μm, at least 10 μm, at least 100 μm, or at least 1000 μm.

[0070] In embodiments, the planar fluidic resistance portion 150 may have a cross-section with a characteristic dimension (eg, the square root of the area) that is at most 100 μm, at most 10 μm, at most 1 μm, or at most 10 nm.

[0071] In general, any length and cross section may be selected together.

[0072] In very general terms, the pathway 20 may have any geometry that provides a measurable signal at the sensor electrode 24. The measurable signal depends on the measurement circuitry, bandwidth, noise, etc., but may typically be at least 1 μV, at least 10 μV, at least 100 μV, or at least lmV.

[0073] Some methods for forming the planar structure 10 are as follows.

[0074] In some of these methods, the planar fluidic resistance portion 150 is formed in the dielectric layer 120. This allows the use of a variety of techniques suitable for processing dielectric materials, such as deposition and removal processes, thereby facilitating the manufacture of the planar fluidic resistance portion 150.

[0075] Also, in some of these methods, the circuit layer 110 is formed on the semiconductor wafer 101 and the dielectric layer 120 is formed on the circuit layer 110 and thus between the first chamber 3 and the semiconductor wafer 101. Again, this simplifies manufacturing since the circuit layer 110 can be formed using conventional semiconductor processing techniques and then the planar fluidic resistor portion 150 is formed in the dielectric layer 120 thereon. This facilitates the construction of the entire base layer 100 using similar techniques, typically as part of general processing in a semiconductor fabrication facility. This also avoids the need for a separate bonding process, as would be required if the planar fluidic resistor portion 150 were formed on a substrate separate from the semiconductor wafer 101 on which the circuit layer 110 is formed.

[0076] Figures 6a-6j show a sequence of views of layers processed during a method of fabrication carried out as follows: A base layer 100 is fabricated from a semiconductor wafer 101, for example a single complementary metal oxide semiconductor (CMOS) silicon wafer. Figure 6a shows the semiconductor wafer 101 prior to fabrication of the base layer structures, including deep trench isolation (DTI) and connections in the circuit layer 110 for the sensor electrodes 24.

[0077] In FIG. 6b, a metal sensor electrode 24 is deposited. In this example, the sensor electrode 24 is a platinum electrode about 100 nm thick, deposited by sputtering, evaporation or plating since Pt is not a standard metal in typical CMOS castings. Surface and open electrode passivation is performed. The passivation may be a plasma enhanced chemical vapor deposition (PECVD) low stress nitride or oxynitride. A thickness of 500 nm to 1 μm is sufficient for passivation since further passivation layers will be deposited in later processing. A circuit layer access hole 111 is formed through the circuit layer 110, specifically through the region of the DTI, although in general the circuit layer access hole 111 may be formed in other regions of the circuit layer 110. Typically the circuit layer access hole 111 through the DTI is about 6 μm in diameter and about 20 μm deep.

[0078] FIG. 6c shows that a sacrificial polymer coating is deposited via a lithography process. The sacrificial polymer can be polyimide or any other suitable polymer. The sacrificial polymer coating is formed in the shape of the channels of the planar fluidic resistor 15 portion 150 and fills the circuit layer access holes 111. The thickness of the sacrificial polymer defines the thickness of the planar fluidic resistor portion 150, which is about 300 nm in this example. The width in the plane of the channels constituting the meandering path of the planar fluidic resistor portion 150 will be selected by microelectromechanical system (MEMS) molding. In this example, the width is about 1 μm. For larger structures, for example when the width in the plane of the channels is larger, support pillars may be required along the meandering path. These can be formed by creating additional holes in the sacrificial polymer layer (not shown in FIG. 6).

[0079] In Figure 6d, a thin passivation layer is deposited, forming the bottom of dielectric layer 120. The thin passivation layer may be the same PECVD low stress nitride or oxynitride used previously in this process. The thin passivation layer needs to be of a minimum thickness to maintain structural integrity during later stages of the fabrication process, but also thin enough to allow for the creation and later filling of vias. For the above examples where the in-plane width of the channel is 1 μm, a thickness of 1-2 μm for the thin passivation layer is suitable.

[0080] In the step shown in Fig. 6e, an open via 154 is formed through the thin passivation layer to provide access to the sacrificial polymer (as shown in Fig. 5). The via 154 exposes the side of the sacrificial polymer for an etching, dissolution or plasma ashing process to remove the sacrificial polymer. For high aspect ratio channels such as those used in the serpentine path of the planar fluidic resistor portion 150, multiple locations along the serpentine path need to be exposed to reduce the aspect ratio of the etch. This can be facilitated by the design of the serpentine path of the planar fluidic resistor portion 150. Fig. 6f shows the state following plasma ashing or etching of the sacrificial polymer.

[0081] In Fig. 6g, a thick passivation layer is deposited to fill the vias 154 used to provide access to the sacrificial polymer. The thick passivation layer (also called the fill layer) should be significantly thicker than the thin passivation layer described above, but may be formed from the same PECVD low stress nitride or oxynitride material. In this example, a thickness of about 5 μm is used. This allows the thick passivation layer to maintain the structural integrity of the planar fluidic resistor portion 150. Following this, in Fig. 6h, the thick passivation layer is opened above the sensor electrode 24 to form the dielectric access hole 121.

[0082] In FIG. 6i, the semiconductor wafer 101 is thinned by grinding from below. In this example, the semiconductor wafer 101 is thinned to about 200-400 μm. Additionally or alternatively, the semiconductor wafer 101 may be ground at the beginning or during the process. This reduces the aspect ratio for the deep reactive ion etching (DRIE) process used to form the wafer access holes 102. During the thinning process, the front side of the semiconductor wafer, which now holds the structures deposited in the previous step, is protected. The wafer access holes 102 are formed by DRIE stopped at the DTI that holds the circuit layer access holes 111. Since the wafer access holes 102 are not part of the planar fluidic resistor portion 150, their diameter may be larger than the width of the serpentine path, for example about 20 μm, and may be free of thick dielectric. This is a relatively easy process for chips with a pitch of 40-50 μm.

[0083] Following this step, the complete base layer 100 is formed. Following this, the rear side (bottom) of the semiconductor wafer 101 is supported and the protection / support is removed from the front / top side. Then, on the front / top side of the base layer 100, the nanopore support layer 30 is formed by further lamination and lithography, creating the completed planar structure 10 shown in Figure 6j. A final dicing may then be performed to divide the semiconductor wafer 101 accordingly.

[0084] The present invention has the advantage that the base layer 100 can be manufactured using a single conventional semiconductor wafer (such as bulk CMOS). This includes the creation of the planar fluidic resistance portion 150 using a sacrificial polymer channel deposited directly on top of the semiconductor wafer. The method further uses DTI to separate the circuit layer 110 from the wafer access holes 102, which do not provide significant fluidic resistance, so the planar fluidic resistance portion 150 can be the primary determinant of the fluidic resistance in the second leg 52 of the voltage divider.

[0085] The nanopore sensing element 1 shown in Figure 2 and described above is merely one example and various alternatives are possible, some non-limiting examples of such alternatives are described below.

[0086] As in the example shown in Figures 6a-6j, the planar fluid resistance portion 150 is formed in the dielectric layer 120 at the interface with the circuit layer 110, as shown in Figure 6c, for example. Alternatively, the planar fluid resistance portion 150 may be formed at any other depth in the dielectric layer 120. As a first example of such an alternative, the planar fluid resistance portion 150 may be formed in the dielectric layer 120 at a position away from the interface with the circuit layer 110 and away from the outer surface of the dielectric layer 120 that forms the interface with the nanopore support layer 30. Figure 2 shows this example in a schematic manner. As a second example of such an alternative, the planar fluid resistance portion 150 may be formed in the dielectric layer 120 at the outer surface of the dielectric layer 120 that forms the interface with the nanopore support layer 30.

[0087] 2 and 6a-6j, circuitry layer 110 is formed on semiconductor wafer 101 and dielectric layer 120 is formed on circuitry layer 110, which provides the advantages described above. However, alternatively, dielectric layer 120 may be disposed between circuitry layer 110 and semiconductor wafer 101. This alternative may be manufactured using techniques similar to those described above with respect to Figures 6a-6j, except that dielectric layer 120 is formed on semiconductor wafer 101 before circuitry layer 110.

[0088] In this manufacturing method, silicon-on-insulator (SOI) CMOS wafers can be used with only minor modifications to the methods described above. As an example, FIG. 7 shows a base layer 100 fabricated using a SOI semiconductor wafer 101, which includes an insulator layer 160 (often a buried oxide) that can help reduce parasitic resistance in the semiconductor wafer. The only requirement for the SOI wafer is that the insulator layer 160 should be thick enough to provide a reliable DRIE etch stop. A suitable example is a 1μ buried oxide (BOX) layer. Such materials are commonly available in semiconductor manufacturing, so these improvements can be directly applied to existing SOI CMOS wafers using existing equipment already used for prior art devices, allowing new designs to be easily implemented.

[0089] Considerations regarding the areal density of each sensor formed by the passageway 20 and associated in the nanopore sensor element 30 are discussed below.

[0090] In some embodiments, the areal density of the sensors is, for example, 1 mm 2 In such a case, the circuit layer access holes 111 and the wafer access holes 102 may be designed to provide a negligible fluid resistance compared to the fluid resistance of the planar fluid resistance portion 150.

[0091] However, various densities are possible. By way of example, in one embodiment, the areal density of the sensors is 1 mm 2 400 per square (corresponding to a square footprint 35 with sides of 50 μm), in which case the length of the planar fluid resistance portion 150 may be 250 μm and the cross-sectional area of ​​the planar fluid resistance portion 150 may be 0.3 μm 2 (e.g., 0.3 μm×1 μm). In another embodiment, the sensor areal density is 1 mm 22500 per square (corresponding to a square footprint 35 with sides of 20 μm), in which case the length of the planar fluid resistance portion 150 may be 75 μm and the cross-sectional area of ​​the planar fluid resistance portion 150 may be 0.09 μm 2 (e.g. 0.3 μm×0.3 μm) may also be used.

[0092] As the area density of the sensors increases and the area of ​​the footprint 35 decreases, it may become difficult to achieve or provide a fluid resistance of the planar fluid resistance portion 150 with sufficient resistance due to spatial constraints, which depends on other factors such as the resistance of the nanopore 23, in which case the fluid resistance of the circuit layer access hole 111 and the wafer access hole 102 becomes significant in the second leg 52 of the voltage divider 50.

[0093] For the example dimensions discussed herein, this translates to an areal density of sensors of 1 mm 2 This may start to occur when the particle size reaches 625 per square (corresponding to a square footprint 35 with sides of 40 μm).

[0094] Typically, the sensor area density is 1 mm 2 Approaching 10,000 per square (corresponding to a square footprint 35 with sides of 10 μm or less) or more, the circuit layer access holes 111 and / or wafer access holes 102 may provide a fluidic resistance in addition to the fluidic resistance of the planar fluidic resistance portion 150. The size of the layer access holes 111 and / or wafer access holes 102 can be adjusted to provide the required fluidic resistance, and if an access hole is shared between two or more sensors, the resistance is configured to be negligible.

[0095] It is desirable to increase the areal density of fluid passages 20 on a semiconductor wafer. Generally, there are three main limiting factors as to how densely the fluid passages can be packed together: The configuration of circuit components associated with each fluid passage 20 in the circuit layer 110 that need to be packaged within the footprint 35. The configuration of the planar fluidic resistance portion 150, which also needs to be packaged within the footprint 35. This problem can be alleviated by reducing the cross-section of the planar fluidic resistance portion 150 along its tortuous path, thereby shortening its required length. It is also possible to use multiple layers of the planar fluidic resistance portion 150, as discussed further below. How densely packed the wafer access holes 102 can be without affecting the mechanical integrity of the semiconductor wafer.

[0096] As the footprint of the circuit components shrinks, the limiting factor for the areal density of the fluid passages 20 shifts from the circuit components to the packing of the wafer access holes 102. With the dimensions of the example discussed herein, this begins to occur when the pitch of the circuit components in the circuit layer 110 is significantly below 40 μm. It is also difficult to reduce the diameter of the wafer access holes 102 while maintaining a reliable manufacturing process with sufficiently thick wafers (e.g., 300 μm). However, the layout of the circuit components and the fluid passages 20 may be redesigned to bundle multiple fluid passages 20 into one shared access hole. Either or both of the wafer access holes 102 and the circuit layer access holes 111 may be shared. This design not only allows for a further increase in the areal density of the fluid passages 20 (e.g., beyond a pitch of 40 μm in the example herein), but also offers the prospect of reducing the aspect ratio requirement of the wafer access holes 102. Reducing the aspect ratio is advantageous when the wafer access holes 102 are manufactured using DRIE.

[0097] 8a and 8b show two examples of base layer 100 where each access hole is shared by multiple passages by being commonly fluidically connected to multiple planar fluidic resistance portions 150. FIG. 8a shows an example where a single wafer access hole 102 is shared between two fluid passages 20. FIG. 8b shows an example where two adjacent fluid passages 20 share both a wafer access hole 102 and a circuit layer access hole 111. Although FIGS. 8a and 8b show two fluid passages 20 sharing a circuit layer access hole 111 and / or a wafer access hole 102, in other embodiments, more than two fluid passages 20, such as three or four fluid passages, may share an access hole. This design can also be incorporated into the example of FIG. 7 using a SOI CMOS wafer. If common wafer access holes 102 and / or common circuit layer access holes 111 are implemented, their resistance may be negligible compared to the total resistance of the passages 20 to suppress crosstalk between nanopores 23 that share in common a portion of the passages 20. The common portions of the passages preferably have negligible resistance.

[0098] The cross-section of the common wafer access hole 102 may have a dimension (eg, the square root of the area) that is greater than the maximum dimension (eg, the square root of the area) of the sensor footprint.

[0099] In these examples, the dielectric layer 120 is between the first chamber 3 and the substrate. Alternatively, the dielectric layer 120 may be between the semiconductor wafer 101 and the second chamber 4. For example, the dielectric layer 120 may be on the opposite side of the semiconductor wafer 101 to the circuit layer 110. Alternatively, the circuit layer 110 may also be formed on the opposite side of the semiconductor wafer 101 to the first chamber 3, with the dielectric layer 120 formed thereon. Although this is possible, it is not preferred, as it would involve capacitance of the access holes to the voltage divider, thus reducing the bandwidth.

[0100] By using a multi-layer planar fluidic resistance portion 150, the areal density of the fluid passages 20 can be further increased. FIG. 9 shows a top view of such a multi-layer planar fluidic resistance portion 150. In this example, the planar fluidic resistance portion 150 includes sections 151, 152, each extending in the planar direction of the planar structure 10 but at different depths within the planar structure 10. The dielectric access hole 121 is connected to the first section 152 of the planar fluidic resistance portion 150 above the sensor electrode 24. In this example, the first section 152 is above the second section 151 (i.e. between the second section and the first chamber 3). However, this is not necessary and the first section 152 may instead be below the second section 151 (i.e. between the second section 151 and the semiconductor wafer 101). The second section 151 is connected to the circuit layer access hole 111 and thereby to the wafer access hole 102. The first and second sections 152, 151 are connected together by vias 153. Vias 154 are provided adjacent to a portion of the passage 20 and are used for the plasma ashing process used to etch and remove the sacrificial polymer during fabrication. These vias 154 are optional and are used to reduce the aspect ratio that the ashing process needs to reach in the fluidic channels. These vias 154 are filled with a thick passivation layer following removal of the sacrificial polymer.

[0101] Figures 10a-10m show a sequence of layers processed during a manufacturing method for forming a multi-layer planar fluidic resistance part 150, which is carried out as follows: Figures 10a-10d show the same steps as those carried out in Figures 6a-6d. Following these steps, a sacrificial polymer is deposited in the shape of the second section 151 of the planar fluidic resistance part 150, and a thin passivation layer is deposited thereon.

[0102] In Figure 10e a via 153 is formed in the thin passivation layer along with a further portion of the dielectric access hole 121. In Figure 10f further sacrificial polymer is deposited in the form of the first section 152 of the planar fluidic resistor portion 150 and the dielectric access hole 121.

[0103] In Fig. 10h, a further thin passivation layer is deposited and in Fig. 10i, vias are formed through the further thin passivation layer and through both passivation layers to expose the sacrificial polymer in both the first and second sections 152, 151 of the planar fluidic resistor portion 150 as well as the dielectric access hole 121. The vias expose the sides of the sacrificial polymer for an etching or plasma ashing process to remove the sacrificial polymer. Fig. 10j shows the state following etching or plasma ashing of the sacrificial polymer.

[0104] The steps shown in Figures 10k-10m are the same as the steps shown in Figures 6h-6j, namely, depositing a thick passivation layer, opening the thick passivation layer over the sensor electrodes 24, and forming wafer access holes 102.

[0105] In the above examples, the substrate supporting the dielectric layer 120 on which the planar fluidic resistance portion 150 is formed is a semiconductor wafer 101, and the planar structure 10 is formed by depositing layers directly on the semiconductor wafer 101. However, in some embodiments, the substrate supporting the dielectric layer on which the planar fluidic resistance portion 150 is formed may be a different component than the semiconductor wafer 101 on which the circuit layer 110 is formed. In this case, the substrate supporting the planar fluidic resistance portion 150 and the semiconductor wafer 101 may be manufactured separately and then bonded together.

[0106] An example of a method for producing a base layer 100 of this type of planar structure 10 is shown in Figures 11a to 11e and is carried out as follows. In this example, the substrate on which the planar fluidic resistance portion 150 is formed is a MEMS (Micro-Electro-Mechanical System) wafer 170. The MEMS wafer 170 has the advantage of being able to withstand the high temperature thermal oxidation processes used to form the planar fluidic resistance portion 150, allowing conventional MEMS processes to be used. The MEMS wafer 170 may be made of any suitable material, for example quartz, silicon oxide, glass, aluminum oxide or sapphire. In principle, the MEMS wafer 170 may be replaced by a substrate made of any other material suitable for supporting a dielectric layer 172, which will be described below, for example a semiconductor wafer.

[0107] As shown in FIG. 11a, a MEMS wafer 170 is provided and MEMS wafer access holes 171 are formed extending therethrough by DRIE.

[0108] 11b shows the formation of a dielectric layer 172 on the surface of the MEMS wafer 170 by thermal oxidation. Typically, the dielectric layer 172 may have a thickness on the order of 2 μm or more. Thus, in this example, the dielectric layer 172 is an oxide of the material of the MEMS wafer 170.

[0109] 11c illustrates the formation of a planar fluidic resistor portion 150 in the dielectric layer 172 by etching using a lithographic process. The planar fluidic resistor portion 150 may have any shape as described above.

[0110] In Fig. 11d, the base layer 100 is formed by bonding the MEMS wafer 170 shown in Fig. 11c to a semiconductor wafer 101 supporting a circuit layer 110. The semiconductor wafer 101 has a similar configuration to that described above, except that the dielectric layer 120 is not provided, and the semiconductor wafer 101 is upside down in Fig. 11d compared to the previous figures. As described above, the circuit layer 110 includes circuit components connected to the sensor electrodes 24. The semiconductor wafer 101 and the circuit layer 110 include access holes 102, 111 extending therethrough that form part of the passage 20. In this example, the semiconductor wafer 101 is a SOI CMOS wafer including an insulator layer 170 similar to that shown in Fig. 7, and the handle layer is removed after bonding.

[0111] Similarly, the semiconductor wafer 101 and the circuit layer 101 may be manufactured using processes similar to those described above.

[0112] 11c is bonded to the semiconductor wafer 101 by bonding the outer surface of the dielectric layer 172, on which the planar fluidic resistance portion 150 is formed, to the outer surface of the circuit layer 110. As a result, the MEMS wafer 170, which forms the substrate in this embodiment, is bonded to the semiconductor wafer 101 between the semiconductor wafer 101 and the second chamber 4.

[0113] As in the above examples, the nanopore support layer 30 is secured to the base layer 100 as shown in FIG. 11d, for example, by forming the nanopore support layer 30 separately and adhering it to the base layer 100, or by forming the nanopore support layer 30 directly on the base layer 100.

[0114] This bonded two-wafer approach to fabrication, in which separate wafers are used to form the planar fluidic resistor portion 150 and the circuitry, has the advantage that the processes for forming each structure can be more easily optimized when performed separately. For example, the semiconductor wafer 101 can be more easily thinned before forming the wafer access holes 102 without the layer on which the planar fluidic resistor portion 150 is formed. This can be advantageous in some situations. However, this two-wafer process introduces significant complexity, since two completely separate fabrication processes need to be performed and an additional bonding step needs to be performed. The processes used to process SOI CMOS also create limitations on the circuit design and casting options. This is likely to increase the cost of manufacturing compared to forming all of the planar structure 10 in a single, albeit longer, step. Therefore, in many situations, a single-wafer approach is likely to be preferred.

[0115] Although various methods for manufacturing the planar structure have been discussed above, the planar structure is not limited to these methods and may be formed by any other suitable method.

[0116] In the above examples, the planar fluidic resistance portion 150 is formed in a dielectric layer, such as the dielectric layer 120 supported by the semiconductor wafer 101 in FIG. 2, or the dielectric layer 172 supported by the MEMS wafer 170 in FIGS. 11a-11d. Alternatively, the planar fluidic resistance portion 150 may be formed in the nanopore support layer 30. This provides the advantage that the planar fluidic resistance portion 150 can be manufactured using the same process as that used to manufacture the structure of the nanopore support layer 30. In the following method, the planar fluidic resistance portion 150, although formed in the nanopore support layer 30, follows a tortuous path, which may be the same as that shown in FIG. 5.

[0117] An example of a method for manufacturing this type of planar structure 10 is illustrated in Figures 12a to 12f and is carried out as follows.

[0118] Figures 11a and 12b generally correspond to the steps described above with respect to Figures 6a and 6b.

[0119] After these steps, the semiconductor wafer 101 (which forms the substrate of the planar structure 10) and circuit layer 110 are present and the sensor electrodes 24 have been deposited. A passivation layer has been deposited and circuit layer access holes 111 have been drilled through the passivation layer and the circuit layer 110. Figure 12c shows the formation of the wafer access holes 102 prior to the formation of the planar fluidic resistor portion 150. This is in contrast to the method of Figure 6 where the wafer access holes 102 are formed only in the penultimate step after the formation of the planar fluidic resistor portion 150. Alternatively, the wafer access holes 102 may be formed after the nanoporous support layer 30 is formed.

[0120] Figure 12d shows a sacrificial polymer layer 180 deposited on the dielectric layer 110 in the shape of the planar flow resistor portion 150, similar to the step shown in Figure 6c. The sacrificial polymer layer 180 may comprise a photoresist, which may be deposited by spin coating and / or lamination, and subsequently patterned in the shape of the planar flow resistor portion 150. Patterning the photoresist may include, for example, exposure using a mask and subsequent development.

[0121] As shown in Figure 12e, a photoresist layer 181 is then deposited on the base layer 100 over the sacrificial polymer layer 180. The photoresist layer 181 is used to form the nanopore support structure 30. The photoresist layer 181 is exposed to light and developed to form a wall layer 32 having walls 33 that define wells 31.

[0122] The photoresist layer 181 is then developed and the sacrificial polymer layer 180 is also removed to form the planar fluidic resistor portion 150, as shown in FIG. 12f.

[0123] Following these steps, similar to the embodiments described above, the planar structure includes a substrate, in this example comprising a semiconductor wafer 101, a circuit layer 110 supported by the semiconductor wafer 101, a circuit layer including circuit components connected to the sensor electrodes, and a nanopore support layer 30 configured to support a nanopore 23 in a membrane 22 extending across a passageway 20. However, unlike the previous embodiments, a planar fluidic resistance portion 150 is formed in the nanopore support layer 30.

[0124] As shown in Figure 12f, the nanopore support layer 30 comprises a well 31. When the planar structure 10 is integrated into the nanopore sensing element 1, the well 31 opens into the first chamber 3. The well 31 forms part of the passageway 20 and is configured to support a nanopore 23 in the membrane 22 extending across the well 31.

[0125] In the nanopore sensing element 1, the first chamber 3 and the second chamber 4 are on opposite sides of a planar structure 10. A passageway 20 extends through the planar structure 10 and the substrate (in this case a semiconductor wafer 101) includes an access hole 102 extending therethrough that forms part of the passageway 20.

[0126] 8, in some embodiments, each access hole 102 is shared by multiple passages 20 by being commonly fluidly connected to multiple planar fluidic resistance portions 150. In the case of the planar structure of FIG. 12, in which the planar fluidic resistance portions 150 are formed in the nanopore support layer 30, the multiple passages 20 may be connected to each other within the nanopore support layer 30, or alternatively, may be connected by sharing only wafer access holes 102 and / or circuit layer access holes 111 in the base layer 100.

[0127] Table 1 shows some non-limiting examples of areal densities of sensors in the nanopore sensing element 1 that may be applied to any of the configurations described above. Table 1 also shows the corresponding size and area of ​​the footprint 35 when the footprint 35 is a square, although the footprint 35 may have any other shape. [Table 1]

[0128] Table 2 shows some non-limiting examples of the distribution of fluid resistance between the nanopore 23 and various portions of the passage 20 for various areal densities of sensors that may be applied to the nanopore sensing element 1 in the configuration described above.

[0129] Table 2: · The column labeled "23" indicates the % of fluidic resistance provided by nanopore 23. · The column labeled "30" indicates the % of fluidic resistance provided by a planar fluidic resistance portion 150 formed in a nanoporous support layer 30, for example as shown in FIG. The column labeled "120-top" indicates the % of fluid resistance provided by a planar fluid resistance portion 150 formed in a dielectric layer 120 disposed above the circuit layer 110, for example as shown in FIG. 2. The column labeled "120-bottom" shows the % of fluid resistance provided by the planar fluid resistance portion 150 formed in the dielectric layer 120 disposed between the circuit layer 110 and the semiconductor wafer 101, in accordance with the alternative embodiment described above. · The column labeled "111" indicates the % of flow resistance provided by the dielectric access hole 111. The column labeled "102" shows the % of fluid resistance provided by the wafer access holes 102 (and / or circuit layer access holes 111) when each passageway 20 has a respective wafer access hole 102, for example as shown in FIG. 2. The column labeled "102-common" indicates the % of fluid resistance provided by the wafer access holes 102 (and / or circuit layer access holes 111) when multiple passages 20 share the wafer access holes 102 (and / or circuit layer access holes 111), for example as shown in Figures 8a and 8b. Note: When common wafer access holes 102 and / or common circuit layer access holes 111 are implemented, their resistance may be negligible compared to the total resistance in order to suppress crosstalk between nanopores 23 that share portions of the passages 20 in common. The common portions of the passages 20 preferably have negligible resistance. [Table 2]

[0130] Some general points are as follows:

[0131] The ratio of the percentage "%" in the column labeled "23", indicating the % of fluid resistance provided by nanopore 23, to the total resistance of all other columns, may be 1:1. This ratio may range from 1:1 to as much as 99:1. The upper limit of the ratio may be, for example, 3:2, 7:3, 4:1, or 19:1. An exemplary ratio is 9:1. In other words, the nanopore resistance may be about 50% when the ratio is 1:1, and may be greater than 50% when the nanopore resistance dominates the total resistance in the passage. The nanopore resistance may be >60%, >70%, ... >90%, ... etc.

[0132] The inventors have found that a nanopore resistance of about 1:1 results in an optimal signal:noise ratio, but results in an increased voltage drop across the nanopore during translocation and measurement of species such as DNA through the nanopore, leading to increased ion depletion. This results in changes in fluid resistance and nanopore resistance, ultimately leading to a decrease in the voltage signal. Thus, a nanopore resistance greater than 50% of the total resistance is preferred. A nanopore resistance of about 90% causes a voltage drop of about 20 mV, which is considered to be the upper acceptable limit for the voltage drop that allows the generation of a sufficient voltage signal at the sensing electrode.

[0133] The areal density of the array is 1 mm 2 Density of over 10,000 per mm 2 Such as a density of more than 25000 per mm 2 As the density increases beyond a certain number of sensors per wafer, the resistance of the fluidic pathway is distributed along its length between the planar fluidic resistance portion and the access hole portion. At high densities, a wafer access hole may be common to more than one sensor, and when this occurs, the resistance of the common access hole is preferably negligible to suppress detectable crosstalk between nanopore sensors sharing the same wafer access hole.

[0134] 1 and 2 are shown filled with fluid, with membranes 22 extending across respective passages 20, and with nanopores 23 inserted in the membranes 22, some types of nanopore sensing elements 1 may be provided without membranes 22 and nanopores 23. In that case, the end user of the nanopore sensing element 1 will carry out the steps to form the membrane 22 and have the nanopore 23 inserted therein.

[0135] WO2020 / 183172 discloses various nanopore sensing elements, and the structures and methods disclosed therein may be applied to the present disclosure, which is hereby incorporated by reference in its entirety.

[0136] Examples of membranes 22 and nanopores 23 are as follows.

[0137] In one type of nanopore sensing element 1, the nanopore 23 is a biological nanopore and the membrane 22 is capable of having the biological nanopore 23 inserted therein. In another type of nanopore sensing element 1, the membrane 22 is a solid layer and the nanopore 23 is formed therein, either as an opening or as a biological nanopore.

[0138] The membrane 22 may be an amphiphilic layer, i.e. a layer formed from amphiphilic molecules, such as phospholipids, that have both hydrophilic and lipophilic properties. The amphiphilic molecules may be synthetic or natural. Non-natural amphiphilic molecules and amphiphilic molecules that form monolayers are known in the art and include, for example, block copolymers (Gonzalez-Perez et al., Langmuir, 2009, 25, 10447-10450). The membrane 22 may be a triblock or diblock copolymer membrane.

[0139] Membranes 22 formed from block copolymers have several advantages over biological lipid membranes: because triblock copolymers are synthetic, the exact structure can be carefully controlled to provide the appropriate chain lengths and properties needed to form membranes and interact with pores and other proteins.

[0140] Membrane 22 may be one of the membranes disclosed in WO2014 / 064443 or WO2014 / 064444, which are hereby incorporated by reference in their entireties, and which also disclose suitable polymers.

[0141] The amphipathic molecules may be chemically modified or functionalized to facilitate binding of the polynucleotide.

[0142] The amphiphilic layer may be a monolayer or a bilayer.

[0143] The membrane 22 may be a lipid bilayer. Suitable lipid bilayers are disclosed in WO2008 / 102121, WO2009 / 077734 and WO2006 / 100484, which are hereby incorporated by reference in their entirety. Methods for forming lipid bilayers are known in the art. Lipid bilayers are commonly formed by the method of Montal and Mueller (Proc. Natl. Acad. Sci. USA., 1972; 69: 3561-3566).

[0144] The membrane 22 may be a solid layer. Suitable state layers can be formed from both organic and inorganic materials, including, but not limited to, microelectronic materials, insulating materials such as Si3N4, Al2O3 and SiO, organic and inorganic polymers such as polyamides, plastics such as Teflon or elastomers such as two-component addition-cured silicone rubber, and glass. The solid layer may be formed from graphene. Suitable graphene layers are disclosed in WO2009 / 035647, which is incorporated herein by reference in its entirety. Nature Nanotechnology, 2011;6:253-260 by Yusko et al., and U.S. Patent Application Publication No. 2013 / 0048499, both of which are incorporated herein by reference in their entireties, describe the delivery of proteins to transmembrane pores in solid layers without the use of microparticles.

[0145] The nanopore 23 may be any transmembrane pore. The nanopore 23 may be biological or artificial. Suitable nanopores 23 include, but are not limited to, protein pores, polynucleotide pores, and solid-state pores. The nanopore 23 may be a DNA origami pore (Langecker et al., Science, 2012;338:932-936).

[0146] A transmembrane protein pore may comprise a barrel or channel through which ions may flow. The barrel or channel of a transmembrane protein pore typically comprises amino acids that facilitate interaction with a nucleotide, polynucleotide or nucleic acid.

[0147] The transmembrane protein pore for use according to the invention comprises:

number

[0148] The analyte (including, for example, a protein, peptide, small molecule, polypeptide, polynucleotide) may be present in a sample. The sample may be any suitable sample. The sample may be a biological sample. Any embodiment of the method described herein may be performed in vitro on a sample obtained or extracted from any organism or microorganism. The organism or microorganism is typically an archaea, prokaryote or eukaryote, and typically belongs to one of the five kingdoms: Plantae, Animalia, Fungi, Monera, and Protista. In some embodiments, the methods of the various aspects described herein may be performed in vitro on a sample obtained or extracted from any virus.

[0149] The specimen may be a fluid sample. The specimen may comprise a body fluid. The body fluid may be obtained from a human or an animal. The human or animal may have, be suspected of, or be at risk of a disease. The specimen may be urine, lymph, saliva, mucus, semen, or amniotic fluid, but may also be whole blood, plasma, or serum. Typically, the specimen is of human origin, but alternatively may be from other mammals, such as commercially farmed animals such as horses, cows, sheep, or pigs, or alternatively may be pets such as cats or dogs. Alternatively, the specimen may be of plant origin.

[0150] The analyte may be a non-biological sample. The non-biological sample may be a fluid sample. An ionic salt, such as potassium chloride, may be added to the sample to achieve ionic flow through the nanopore.

[0151] A polynucleotide may be single-stranded or double-stranded. At least a portion of the polynucleotide may be double-stranded.

[0152] A polynucleotide may be a nucleic acid such as deoxyribonucleic acid (DNA) or ribonucleic acid (RNA). A polynucleotide may comprise a single strand of RNA hybridized to a single strand of DNA. A polynucleotide may be any synthetic nucleic acid known in the art. A polynucleotide may be natural or artificial.

[0153] The method may include determining two, three, four, five or more properties of the polynucleotide. The one or more properties may be selected from: (i) the length of the polynucleotide, (ii) the identity of the polynucleotide, (iii) the sequence of the polynucleotide, (iv) the secondary structure of the polynucleotide, and (v) whether the polynucleotide is modified.

[0154] For (iii), the sequence of the polynucleotide may be determined as previously described. Suitable sequencing methods, in particular those using electrical measurements, are described in Stoddart D et al., Proc Natl Acad Sci 12;106(19):7702-7, Lieberman KR et al., J Am Chem Soc. 15 2010;132(50):17961-72, and in International Patent Application WO2000 / 28312.

[0155] The secondary structure can be measured in a variety of ways. For example, if the method involves electrical measurements, the change in residence time or the change in the ionic current through the pore may be used to measure the secondary structure. This allows regions of single stranded polynucleotides to be distinguished from regions of double stranded polynucleotides.

[0156] The presence or absence of any modification may be measured. The method may include determining whether the polynucleotide is modified by methylation, by oxidation, by damage, with one or more proteins, or with one or more labels, tags or spacers. Particular modifications will result in particular interactions with the pore, which may be measured using the methods described below.

[0157] In some embodiments of the various aspects described herein, the method may further include characterizing the target polynucleotide. Upon contacting the target polynucleotide with the pore, one or more measurements are made that are indicative of one or more properties of the target polynucleotide as the polynucleotide moves relative to the pore.

[0158] The method may include determining whether the polynucleotide is modified. The presence or absence of any modification may be measured. The method may include determining whether the polynucleotide is modified by methylation, by oxidation, by damage, with one or more proteins, or with one or more labels, tags, or spacers.

[0159] Also provided is a device for characterizing a target analyte, such as a target polynucleotide. The device includes a plurality of pores as disclosed herein and a plurality of membranes. The plurality of pores may be present in the plurality of membranes. The number of pores and the number of membranes may be equal. A single pore may be present in each membrane.

[0160] A device for characterizing a target analyte may include an array of pores as disclosed herein in a plurality of membranes.

[0161] The device may further include instructions for carrying out the method. The device may be any conventional device for sample analysis, such as an array or chip. Any of the embodiments discussed above with respect to the method are equally applicable to the device of the present invention.

[0162] The apparatus may be configured to carry out the methods as disclosed herein.

[0163] The device may include a nanopore sensor element 1 capable of supporting a plurality of pores and membranes and operable to perform characterization of an analyte using the pores and membranes, and at least one port for delivery of material to perform the characterization.

[0164] Alternatively, the device may include a nanopore sensor element 1 capable of supporting a plurality of pores and membranes and operable to perform characterization of an analyte using the pores and membranes, and at least one reservoir for holding material for performing the characterization.

[0165] The device may include a sensor element capable of supporting a membrane and a plurality of pores and membranes and operable to perform a characterization of an analyte using the pores and membranes, at least one reservoir for holding materials for performing the characterization, a fluidic system configured to controllably supply materials from the at least one reservoir to the sensor element, and one or more containers for receiving respective samples, the fluidic system configured to selectively supply analytes from the one or more containers to the sensor element.

[0166] The device may be any of those described in WO2009 / 077734, WO2010 / 122293, WO2011 / 067559 or WO00 / 28312, modified to include the nanopore sensing element 1 disclosed herein.

[0167] Control of the movement of the analyte relative to the nanopore, e.g., the rate of movement, rejection of the analyte, etc., may be managed by the systems and methods disclosed in WO2016 / 059427. Rejection of the analyte by the nanopore sensor may include expulsion of the analyte from the nanopore.

[0168] The features in the above description and drawings are interchangeable and interchangeable in light of the teachings of this specification. The present invention has been described above purely by way of example, and modifications may be made within the spirit and scope of the present invention, ranging from equivalents of features described herein to combinations of one or more features. The present invention also resides in any individual feature described or implied herein.

Claims

1. 1. A nanopore sensing element comprising: First and second chambers; a planar structure comprising a plurality of fluid passages extending between the first chamber and the second chamber, the planar structure configured to support a plurality of nanopores in a plurality of membranes across each passage; a plurality of sensor electrodes disposed to sense a fluid potential in each passage between the plurality of nanopores and the second chamber; the planar structure further comprises a substrate, a nanopore support layer configured to support the nanopores in the membranes extending across the passages, and a further layer; the substrate is a semiconductor wafer; the plurality of passages include a plurality of planar fluid resistance portions between the sensor electrode and the second chamber, the plurality of planar fluid resistance portions being portions of the passages in which a fluid flows in a planar direction of the planar structure, and configured to form fluid resistance; A nanopore sensing element wherein said planar fluidic resistance portion is formed in said further layer.

2. 2. The nanopore sensing element of claim 1, wherein the nanopore support layer comprises a plurality of wells opening into the first chamber, the plurality of wells forming part of the plurality of passages and configured to support the plurality of nanopores in the plurality of membranes extending across the plurality of wells.

3. The nanopore sensing element according to claim 1 or 2, wherein said further layer is a dielectric layer.

4. A nanopore sensing element according to any one of claims 1 to 3, wherein said further layer is supported by said substrate.

5. 5. The nanopore sensing element of claim 4, wherein the first chamber and the second chamber are on opposite sides of the planar structure, the plurality of passages extend through the planar structure, and the substrate comprises a plurality of access holes, the plurality of access holes extending through the substrate and forming part of the plurality of passages.

6. the first chamber and the second chamber are on opposite sides of the planar structure, and the plurality of passageways extend through the planar structure; the further layer being supported by the substrate; The nanopore sensing element of claim 1 , wherein the substrate includes a plurality of access holes extending therethrough, the plurality of access holes forming a portion of the plurality of passageways.

7. 7. The nanopore support layer of claim 6, wherein the nanopore support layer comprises a plurality of wells opening into the first chamber, the plurality of wells forming part of the plurality of passages and configured to support the plurality of nanopores in a plurality of membranes extending across the plurality of wells. Pore-sensing element.

8. The nanopore sensing element according to any one of claims 6 to 7, wherein said further layer is a dielectric layer.

9. A nanopore sensing element according to any one of claims 5 to 8, wherein the further layer is between the first chamber and the substrate.

10. The nanopore sensing element according to any one of claims 5 to 9, wherein each access hole is commonly fluidly connected to a plurality of planar fluid resistance portions, and thereby shared by a plurality of passages.

11. The nanopore sensing element of claim 1 , wherein the planar structure further comprises a circuit layer supported by the semiconductor wafer, the circuit layer including a plurality of circuit components connected to the sensor electrodes.

12. The nanopore sensing element of claim 11 , wherein the circuit layer is formed on the semiconductor wafer and the dielectric layer is formed on the circuit layer.

13. the semiconductor wafer having a circuit layer supported by the semiconductor wafer, the circuit layer having a plurality of circuit components connected to the sensor electrodes, the semiconductor wafer and the circuit layer including a plurality of access holes extending through the circuit layer and forming a portion of the plurality of passages; The nanopore sensing element according to any one of claims 5 to 10, wherein the substrate is bonded to the semiconductor wafer between the semiconductor wafer and the second chamber.

14. The planar structure is a circuit layer supported by the substrate, the circuit layer including a plurality of circuit components connected to the sensor electrodes; The nanopore sensing element of claim 1 further comprising:

15. 15. The nanopore sensing element of claim 14, wherein the nanopore support layer comprises a plurality of wells opening into the first chamber, the plurality of wells forming part of the plurality of passages and configured to support the plurality of nanopores in the plurality of membranes extending across the plurality of wells.

16. 16. A nanopore sensing element as described in claim 14 or 15, wherein the first chamber and the second chamber are on opposite sides of the planar structure, the plurality of passages extend through the planar structure, and the substrate comprises a plurality of access holes, the plurality of access holes extending through the substrate and forming part of the plurality of passages.

17. 17. The nanopore sensing element of claim 16, wherein each access hole is commonly fluidly connected to a plurality of planar fluidic resistance portions, thereby being shared by a plurality of passages.

18. The nanopore sensing element of any one of claims 1 to 17, wherein the planar fluidic resistance portion extends along a tortuous path.

19. A nanopore sensing element as described in any one of claims 1 to 18, wherein the plurality of nanopores are a plurality of biological nanopores, and the plurality of membranes enable the plurality of biological nanopores to be inserted into the plurality of membranes.

20. 20. The nanopore sensing element of claim 19, wherein said planar structure further comprises a plurality of said membranes extending across respective passages, and optionally a plurality of biological nanopores interposed in said plurality of membranes.

21. The nanopore sensing element of any one of claims 1 to 18, wherein the plurality of membranes are a plurality of solid membranes, the planar structure further comprises the plurality of solid membranes, and the nanopore is formed in the plurality of solid membranes.

22. A nanopore sensing element according to any one of claims 1 to 21, wherein the planar fluid resistance portion comprises a plurality of sections, each of the plurality of sections extending in a planar direction of the planar structure but at a different depth within the planar structure.

23. A nanopore sensing element as described in any one of claims 1 to 22, wherein the passage includes a plurality of wells opening into the first chamber, and the planar structure is configured to support the plurality of nanopores in a plurality of membranes extending across the plurality of wells.

24. A nanopore sensing element as claimed in any preceding claim, wherein the first chamber and the second chamber are on opposite sides of the planar structure and the plurality of passages extend through the planar structure.

25. The nanopore sensing element of any one of claims 1 to 24, further comprising a plurality of actuation electrodes in said first and second chambers.

26. A nanopore sensing element according to any preceding claim, wherein the resistance of the nanopore is greater than 50% of the total resistance of the passageway, the resistance of the nanopore being an electrical resistance.

27. 27. The nanopore sensing element of claim 26, wherein the resistance of the nanopore is 90% of the total resistance of the passageway.

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