Wiring Board

Abstract

A wiring board according to the present disclosure comprises: a first insulating layer having a first surface and a second surface positioned on the reverse side from the first surface; a second insulating layer positioned on the outermost surface layer among the insulating layers positioned on the first surface side; a third insulating layer positioned on the outermost surface layer among the insulating layers positioned on the second surface side; a first mounting region positioned on the outermost surface of the first surface side; a second mounting region positioned on the outermost surface of the first surface side so as to surround the first mounting region; a plane conductor positioned on the surface of the third insulating layer; and a solder resist that covers the surface of the third insulating layer and the plane conductor and has an opening that exposes a part of the plane conductor. In planar perspective, in a frame-shaped region between the outer peripheral edge of the first mounting region and the outer peripheral edge of the second mounting region, the plane conductor has a clearance, which is point symmetric, at a position having the center of the opening as a symmetrical point.

Description

[Technical field]

[0001] The present invention relates to a wiring board. [Background technology]

[0002] Known LSI packages in which an LSI chip is mounted on a wiring board include FC-BGA (Flip Chip Ball Grid Array), etc. A stiffener is provided for the wiring board used in such an LSI package for the purpose of reinforcement, as described in Patent Document 1, for example. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 3173459 Summary of the Invention [Means for solving the problem]

[0004] The wiring board according to the present disclosure includes a first insulating layer having a first surface and a second surface opposite to the first surface, a second insulating layer located on the outermost surface of the insulating layers located on the first surface side, a third insulating layer located on the outermost surface of the insulating layers located on the second surface side, a first mounting area located on the outermost surface of the first surface side, a second mounting area located on the outermost surface of the first surface side so as to surround the first mounting area, a plane conductor located on the surface of the third insulating layer, and a solder resist covering the surface of the third insulating layer and the plane conductor and having an opening exposing a part of the plane conductor. In a planar perspective view, in a frame-shaped area between the outer periphery of the first mounting area and the outer periphery of the second mounting area, the plane conductor has clearances at positions that are point-symmetric with respect to the center of the opening. [Brief description of the drawings]

[0005] [Figure 1]1 is an explanatory diagram for explaining a state in which a chip and a stiffener are mounted on a wiring board according to an embodiment of the present disclosure. [Diagram 2] 2 is an explanatory diagram for illustrating a state in which a wiring board according to an embodiment of the present disclosure is viewed in the direction of an arrow A shown in FIG. [Diagram 3] 2 is an explanatory diagram for illustrating a state in which a wiring board according to an embodiment of the present disclosure is viewed from the direction of arrow B shown in FIG. [Figure 4] 1 is an explanatory diagram illustrating an example of a plane conductor included in a wiring board according to an embodiment of the present disclosure. [Diagram 5] 13A and 13B are explanatory diagrams showing modified examples of openings formed in the solder resist. [Figure 6] FIG. 11 is an explanatory diagram for explaining a clearance. [Figure 7] FIG. 13 is a diagram showing a stress simulation result. [Figure 8] FIG. 8 is a diagram showing stress values ​​generated in an opening according to the simulation results shown in FIG. 7. [Figure 9] FIG. 13 is an explanatory diagram for explaining a modification of the clearance. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] Conventional wiring boards are prone to warping due to differences in the thermal expansion coefficients of the board, the chip, and the stiffener. In particular, warping tends to cause stress to concentrate in the area between the chip and the stiffener, which makes it easy for cracks to occur in the plane conductors (especially the plane conductors around the solder) on the surface facing this area (opposite surface). Therefore, there is a demand for wiring boards that are less likely to crack even when used repeatedly in high and low temperature environments.

[0007] As described above, in a plan view, in the frame-shaped region between the outer edge of the first mounting region and the outer edge of the second mounting region, the plane conductor has clearances at positions that are symmetrical with respect to the center of the opening, so that the wiring board according to the present disclosure is less susceptible to cracking even when repeatedly used in high-temperature and low-temperature environments.

[0008] A wiring board according to an embodiment of the present disclosure will be described with reference to Figures 1 to 6. Figure 1 is an explanatory diagram for explaining a state in which a chip and a stiffener are mounted on a wiring board according to an embodiment of the present disclosure. As shown in Figure 1, a wiring board 1 according to an embodiment includes a first insulating layer 21, a second insulating layer 22, a third insulating layer 23, a conductor layer 4, and a solder resist 5.

[0009] First insulating layer 21 has first surface 211 and second surface 212 located on the opposite side to first surface 211. First surface 211 and second surface 212 correspond to main surfaces of first insulating layer 21. In wiring board 1 according to one embodiment, first insulating layer 21 corresponds to a core insulating layer.

[0010] The first insulating layer 21 is not particularly limited as long as it is made of an insulating material. Examples of insulating materials include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. Two or more of these resins may be mixed. The thickness of the first insulating layer 21 is not particularly limited, and is, for example, 400 μm or more and 1800 μm or less.

[0011] The first insulating layer 21 may contain a reinforcing material. Examples of the reinforcing material include insulating cloth materials such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more types of reinforcing materials may be used in combination. Furthermore, the first insulating layer 21 may have inorganic insulating fillers dispersed therein, such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide.

[0012] In the first insulating layer 21, a through-hole conductor (not shown) is usually located to electrically connect the upper and lower surfaces of the first insulating layer 21. The through-hole conductor is located in a through-hole that penetrates from the first surface 211 to the second surface 212 of the first insulating layer 21. The through-hole conductor is formed, for example, by metal plating such as copper plating. The through-hole conductor is connected to the conductor layer 4 formed on both surfaces of the first insulating layer 21. The through-hole conductor may be formed only on the inner wall surface of the through-hole, or may be filled in the through-hole.

[0013] Conductive layers 4 and insulating layers are alternately laminated on the first surface 211 of the first insulating layer 21. In this specification, the insulating layer located on the outermost surface of the insulating layers located on the first surface 211 side is defined as the second insulating layer 22. The conductive layer 4 is located on the outermost surface on the first surface 211 side of the wiring board 1, excluding the solder resist 5. That is, at least two conductive layers 4 and one insulating layer are laminated on the first surface 211 side, and this one insulating layer corresponds to the second insulating layer 22.

[0014] The conductor layer 4 is not limited as long as it is made of a conductor such as a metal. Specifically, the conductor layer 4 is made of a metal foil such as a copper foil, a metal plating such as a copper plating, etc. The thickness of the conductor layer 4 is not particularly limited and is, for example, 10 μm or more and 30 μm or less.

[0015] The insulating layer including the second insulating layer 22 is not particularly limited as long as it is made of a material having insulating properties, similar to the first insulating layer 21. Examples of the insulating material include resins such as epoxy resin, bismaleimide-triazine resin, polyimide resin, and polyphenylene ether resin. Two or more of these resins may be mixed and used. The insulating layers including the second insulating layer 22 may be made of the same resin or different resins. The insulating layer including the second insulating layer 22 and the first insulating layer 21 may be made of the same resin or different resins.

[0016] Furthermore, an inorganic insulating filler such as silica, barium sulfate, talc, clay, glass, calcium carbonate, titanium oxide, etc. may be dispersed in the insulating layer including the second insulating layer 22. The thickness of the insulating layer including the second insulating layer 22 is not particularly limited and is, for example, 5 μm or more and 50 μm or less. The insulating layers including the second insulating layer 22 may each have the same thickness or different thicknesses.

[0017] In the insulating layer including the second insulating layer 22, a via hole conductor (not shown) for electrically connecting between layers is formed. The via hole conductor is located in a via hole penetrating the upper and lower surfaces of the insulating layer including the second insulating layer 22. The via hole conductor is formed by metal plating such as copper plating. The via hole conductor is connected to the conductor layers 4 located on both sides of the insulating layer including the second insulating layer 22. The via hole conductor may be filled in the via hole, or may be located only on the inner wall surface of the via hole.

[0018] 1, solder resist 5 may be located on the surface of second insulating layer 22 and on the surface of conductor layer 4 laminated on the outermost layer on the first surface 211 side. In FIG. 1, solder resist 5 is located only on the surface of conductor layer 4. However, conductor layer 4 is a wiring pattern, and solder resist 5 is located on the surface of second insulating layer 22 in areas where conductor layer 4 does not exist.

[0019] The solder resist 5 is made of a resin, such as an acrylic modified epoxy resin. The solder resist 5 has an opening 51 for electrically connecting the conductor layer 4 and the electrode of the chip 7 via the solder 6. The opening 51 is provided in the first mounting region 31, for example.

[0020] The first mounting area 31 is an area for mounting the chip 7, and is located on the outermost surface on the first surface 211 side. The first mounting area 31 has a polygonal shape such as a square shape when viewed from above, depending on the shape of the chip 7. Examples of the chip 7 mounted in the first mounting area 31 include semiconductor integrated circuit elements and optoelectronic elements. The chip 7 is mounted so that corners of the first mounting area 31 and corners of the chip 7 overlap each other in a planar perspective view.

[0021] 1 and 2, in wiring board 1, second mounting area 32 is located on the outermost surface on the first surface 211 side so as to surround first mounting area 31. Fig. 2 is an explanatory diagram for explaining the state of wiring board 1 as viewed from the direction of arrow A shown in Fig. 1. Second mounting area 32 is, for example, an area where stiffener 8 is provided to improve the rigidity of wiring board 1.

[0022] Similarly to the first surface 211, the second surface 212 of the first insulating layer 21 also has conductor layers 4 and insulating layers laminated alternately. In this specification, the insulating layer located on the outermost surface of the insulating layers located on the second surface 212 side is defined as the third insulating layer 23. The conductor layer 4 is located on the outermost surface of the wiring board 1 on the second surface 212 side, excluding the solder resist 5. That is, at least two conductor layers 4 and one insulating layer are laminated on the second surface 212 side, and this one insulating layer corresponds to the third insulating layer 23.

[0023] The conductor layer 4 and the insulating layer laminated on the second surface 212 are the same as those described for the conductor layer 4 and the insulating layer laminated on the first surface 211, and a detailed description thereof will be omitted. As shown in FIG. 1, the conductor layer 4 laminated on the outermost layer on the second surface 212 side, that is, the conductor layer 4 located on the surface of the third insulating layer 23, is a plain conductor. Body 41 It is.

[0024] As shown in FIG. 1, the surface of the third insulating layer 23 and the plane conductor Body 41 On the surface of this is positioned a solder resist 5. The solder resist 5 is as described above, and a detailed description thereof will be omitted.

[0025] In FIG. 1, the solder resist 5 is a plane conductor. Body 41 However, the plane conductor is located only on the surface of the Body 41 Although it is basically a solid layer, some parts have wiring patterns and are plane conductors. Body 41 In the portion where no solder exists, the solder resist 5 is located on the surface of the third insulating layer 23. Body 41 The solder resist 5 on the surface of the Body 41 An opening 51 is provided for electrically connecting the electrode 50 to an electrode of another wiring board (such as a motherboard) via solder 6.

[0026] Plane Conduction Body 41 In Fig. 3, when wiring board 1 is seen through a plan view, frame-shaped area 33 is located between the outer periphery of first mounting area 31 and the outer periphery of second mounting area 32. Frame-shaped area 33 is specifically the hatched portion shown in Fig. 3. Fig. 3 is an explanatory diagram for explaining a state viewed from the direction of arrow B shown in Fig. 1.

[0027] A plane conductor located in the frame region 33 Body 41 As shown in Fig. 4, clearances (gaps) 42 are located at positions that are point-symmetrical with respect to the center of opening 51 in the solder resist. Fig. 4 is an explanatory diagram for explaining an example of a plane conductor 41. By arranging clearances 42 in this manner, even if warping occurs due to differences in the thermal expansion coefficients of wiring board 1, chip 7, and stiffener 8, the plane conductor 41 can be prevented from warping. Body 41 The stress concentration around the periphery of the solder 6 connected to the wiring board 1 is alleviated. As a result, the wiring board 1 is less likely to crack even when it is repeatedly used in high and low temperature environments. The "point symmetrical position with respect to the center of the opening 51 of the solder resist as the symmetrical point" can be defined as, for example, the midpoint of a line segment that bisects the length L (described later), the intersection of diagonals, or the center of gravity of each clearance 42.

[0028] The shape of the frame region 33 is determined according to the shapes of the first mounting region 31 and the second mounting region 32. In the wiring board 1, the first mounting region 31 and the second mounting region 32 each have a rectangular shape when viewed in a plan view, as shown in Fig. 2. Therefore, the frame region 33 has a rectangular frame shape having four corners and four sides, as shown in Fig. 3.

[0029] The clearance 42 includes a first clearance 421 located at a corner of the rectangular frame region 33, and a second clearance 422 located in a region other than the corners of the frame region 33. As shown in Fig. 4, the first clearances 421 are arranged along a diagonal line connecting the corners of the frame region 33. As shown in Fig. 4, the second clearances 422 are arranged in a direction perpendicular to a side of the frame region 33 adjacent to the second clearance 422.

[0030] When frame region 33 has a rectangular frame shape, stress is likely to occur at the corners in a direction along a diagonal line connecting the corners, and stress is likely to occur in a direction perpendicular to the sides of frame region 33 in regions other than the corners. Therefore, by positioning first clearance 421 and second clearance 422 as described above, cracks are less likely to occur even when used repeatedly in high-temperature and low-temperature environments.

[0031] As shown in Fig. 4, the solder resist 5 has a plurality of openings 51. The shape of the openings 51 may be circular when seen through from above as shown in Fig. 4, or may be a shape other than a circle (for example, a polygonal shape such as a triangle or a rectangle).

[0032] The multiple openings 51 may all have the same shape, or may have a mixture of different shapes. For example, at least some of the openings 51 may be circular, and openings 51 other than circular may be mixed. For example, in the frame-shaped region 33, an opening located in the inner region 331 between the outer periphery of the first mounting region 31 and the inner periphery of the second mounting region 32 may be an elongated opening 52 having at least one of a rectangular shape and an elliptical shape.

[0033] In the inner region 331 surrounded by the first mounting region 31 and the second mounting region 32, tensile stress is likely to occur, for example, when electronic components are mounted in the first mounting region 31. By providing the long opening 52, the tensile stress can be further reduced. In the region other than the inner region 331, a circular opening 51 in which electronic components can be easily mounted may be adopted. With such a configuration, the tensile stress can be reduced while maintaining the mounting efficiency.

[0034] Specifically, as shown in Fig. 5, an elongated opening 52 having an elliptical shape may be located in an inner region 331 of the frame-shaped region 33, and an opening 51 having a circular shape may be located in a region other than the inner region 331. Fig. 5 is an explanatory diagram showing a modified example of the opening 51 formed in the solder resist 5.

[0035] The inner region 331 is a frame-shaped region surrounded by the first mounting region 31 and the second mounting region 32. The shape of the inner region 331 is determined according to the shape of the first mounting region 31 and the shape of the second mounting region 32, and may be, for example, a rectangular frame shape having four corners 331a and four sides 331b as shown in FIG.

[0036] When the internal region 331 has a rectangular frame shape, the elongated opening 52 includes a first elongated opening 521 located at a corner 331a of the internal region 331 and a second elongated opening 522 located at a side 331b of the internal region 331. The elongated openings 52 may be positioned regularly or irregularly.

[0037] For example, the first long opening 521 may be positioned so that its short axis direction is along a diagonal line connecting the corners of the internal region 331. The second long opening 522 may be positioned so that its short axis direction is perpendicular to the side of the internal region 331 adjacent to the second long opening 522. When the internal region 331 has a rectangular frame shape, tensile stress is likely to occur in the corners 331a in the direction along the diagonal line connecting the corners 331a, and tensile stress is likely to occur in the side 331b in the direction perpendicular to the side of the internal region 331. By positioning the first long opening 521 and the second long opening 522 in this way, the tensile stress can be further reduced.

[0038] The long opening 52 is not limited as long as it has a rectangular or elliptical shape. For example, when the long opening 52 has a rectangular shape, the long side may have an aspect ratio of 3.15 to 5 with respect to the short side of 1. When the long opening 52 has an elliptical shape, the flattening ratio may be 0.1 to 0.5. If the aspect ratio and flattening ratio are such values, the tensile stress can be further reduced.

[0039] The opening area of ​​the openings 51 is not limited, and all the openings may have substantially the same area, or some of the openings may have different areas. The opening area of ​​the long opening 52 may be substantially the same as the opening area of ​​the openings 51 other than the long opening 52. By making the opening areas substantially the same in this manner, the amount of solder 6 can be made substantially constant, and mounting reliability can be further improved.

[0040] "Approximately the same" does not only mean exactly the same area, but also includes cases where the area differs by about ±5%. Specifically, when the area of ​​one opening (for example, the area of ​​the long opening) is 1, the area of ​​the other opening (for example, the area of ​​the opening other than the long opening) is 0.95 to 1.05 is also defined as "approximately the same."

[0041] When the opening 51 has a circular shape, the clearance 42 may be, for example, an arc shape along the edge of the opening 51, as shown in Fig. 4. A part of the solder resist 5 may be located in the clearance 42. That is, the clearance 42 may be filled with the solder resist 5. By filling the clearance 42 with the solder resist 5, it is possible to reduce bulging starting from the clearance 42.

[0042] The clearance 42 will be described with reference to Fig. 6. As shown in Fig. 6, the clearance 42 has an arc shape that follows the edge of the opening 51, which has a circular shape. When viewed from above, the clearance 42 is located away from the edge of the opening 51. The distance between the edge of the opening 51 and the clearance 42 may be, for example, 50 µm or less. The closer the edge of the opening 51 and the clearance 42 are, the less likely cracks will occur.

[0043] The clearance 42 may have a length of at least 50 μm in a direction perpendicular to the edge of the opening 51. This length in the direction perpendicular to the edge of the opening 51 is shown as width W in FIG. 6. The upper limit of the width W may be, for example, 100 μm. If the width W is within this range, a better balance between the stress relaxation effect and the electrical characteristics is achieved. Although FIG. 6 shows an example in which the widths W in the clearances 42 are different, the widths W may be the same.

[0044] The length of the clearance 42 (length L shown in FIG. 6) is not limited as long as it is a length that surrounds the opening 51. This is because, when the clearance 42 surrounds the opening 51, the plane conductor Body 41 This is because, in the opening 51, electrical connection will be cut off between the portion surrounded by the clearance 42 and the other portion. This length L may be a length such that the angle θ between imaginary lines connecting the center of the opening 51 and the two ends of the clearance 42 is at least 90°. If the angle θ is 180°, the clearance 42 will surround the opening 51. Therefore, the upper limit of the angle θ should be 135°. If the angle θ is of this magnitude, a better balance between the stress relaxation effect and the electrical characteristics will be achieved.

[0045] The wiring board 1 as described above is formed, for example, as follows. First, the first insulating layer 21 is prepared. Through holes are formed in the first insulating layer 21 by drilling, blasting, or laser processing. Next, the conductor layer 4 and the insulating layer are alternately laminated on the first surface 211 side and the second surface 212 side of the first insulating layer 21. When the conductor layer 4 is formed on the surface of the first insulating layer 21 by copper plating using, for example, a semi-additive method, the through-hole conductor may be formed in the through-hole, or the through-hole conductor may be formed in the through-hole in advance. The method of forming the conductor layer 4 and the through-hole conductor is as described above, and a detailed description thereof will be omitted.

[0046] The insulating layer is formed by applying a film made of a resin such as epoxy resin, bismaleimide-triazine resin, polyimide resin, or polyphenylene ether resin under vacuum and then thermally curing it. Next, the insulating layer is laser processed to form a via hole with the conductor layer 4 at the bottom. After the laser processing, a desmear process is performed to remove carbides and the like, improving the adhesive strength between the via hole and the via hole conductor. When the conductor layer 4 is formed on the surface of the insulating layer, a via hole conductor is formed in the via hole by plating metal.

[0047] A desired number of conductor layers 4 and insulating layers can be formed by repeating the steps of forming the conductor layers 4 and the insulating layers. Of the insulating layers stacked on the first surface 211 side, the insulating layer located on the outermost surface is referred to as the second insulating layer 22, and of the insulating layers stacked on the second surface 212 side, the insulating layer located on the outermost surface is referred to as the third insulating layer 23.

[0048] The conductor layer 4 formed on the surface of the third insulating layer 23 is called a plane conductor. Body 41 In the plane conductor 41 located in the frame-shaped region 33, a clearance 42 is formed by, for example, the semi-additive method described above, which is point-symmetric with respect to the center of the opening 51 in the covering solder resist 5.

[0049] Next, the surface of the second insulating layer 22 and the surface of the conductor layer 4 laminated on the outermost layer on the first surface 211 side, as well as the surface of the third insulating layer 23 and the plane conductor Body 41 The surface of the first surface 211 is covered with a solder resist 5. The solder resist 5 covering the first surface 211 side has an opening 51 formed in an area that will become the first mounting area 31. The solder resist 5 may fill the clearance 42.

[0050] In this manner, the wiring board 1 according to the embodiment is obtained. Since the clearance 42 is provided in the wiring board 1, even if warping occurs due to the difference in the thermal expansion coefficients of the wiring board 1, the chip 7, and the stiffener 8, the plane conductor can be prevented from being warped. Body 41 This reduces stress concentration around the periphery of the solder 6 connected to the wiring board 1. As a result, the wiring board 1 is less susceptible to cracks even when used repeatedly in high-temperature and low-temperature environments.

[0051] Next, the stress simulation results (planar and cross-sectional stress distribution diagrams) of the outermost conductor layer for the wiring board according to the present disclosure are shown in FIG. 7. These results were obtained under the conditions shown in Table 1 below. Obtained 7A to 7C are plan views on the left and cross-sectional views on the right. In the stress distribution diagrams, the darker the color, the higher the stress value. The left side of each plan view is a comparison diagram showing that a clearance is provided in the conductor so as to surround the opening in the solder resist, and therefore the stress is small (such a circular conductor surrounded by a clearance is, for example, a signal conductor that needs to be insulated from the surrounding plain conductors). ABF-GL102F " is a thermosetting build-up film manufactured by Ajinomoto Fine-Techno Co., Ltd. "SR7300G" in Table 1 is , manufactured by Resonac Inc. It is a photosensitive solder resist.

[0052] TIFF0007645399000001.tif149161

[0053] FIG. 8 is a graph showing stress values ​​generated in the openings in the stress simulation results in FIGS. 7A to 7C. The stress value of the circular opening shown in FIG. 7A (the circular opening on the right side in the plan view) is 468.5 MPa, the stress value of the elliptical opening shown in FIG. 7B (the long opening on the right side in the plan view) is 441.1 MPa, and the stress value of the opening with clearances above and below the elliptical opening shown in FIG. 7C (the long opening and clearance on the right side in the plan view) is 380.2 MPa. Thus, it can be seen that the elliptical opening (FIG. 7B) reduces stress generation by about 25% compared to the circular opening (FIG. 7A), and the case where clearances are provided around the elliptical opening (FIG. 7C) reduces stress generation by about 54% compared to the case of only the elliptical opening (FIG. 7B).

[0054] The wiring board of the present disclosure is not limited to the above-mentioned embodiment. In the wiring board 1 according to one embodiment, the clearance 42 has an arc shape along the edge of the opening 51 of the solder resist 5. However, the clearance 42 is not limited to the arc shape. As shown in FIG. 9, the clearance 42 may have, for example, a linear shape or a dot shape. When the clearance 42 is a dot shape, as shown in FIG. 9, the dot-shaped clearance 42 may be formed in an arc shape along the edge of the opening 51, or the dot-shaped clearance 42 may be formed in a linear shape.

[0055] When the clearance 42 has a linear shape, the length of the clearance 42 may be such that the angle θ between the imaginary lines connecting the center of the opening 51 and the two ends of the clearance 42 is at least 90°, as in the case of the arc shape. The upper limit of the angle θ is preferably 135°, as described above.

[0056] When the clearance 42 has a dot shape, the length of the clearance 42 may be such that the angle θ between the imaginary lines connecting the center of the opening 51 and the clearance 42 having the dot shape at both ends is at least 90°. The upper limit of the angle θ is preferably 135° as described above.

[0057] In wiring board 1 according to one embodiment, first mounting area 31 has a quadrangular shape when viewed in a plan view. However, the shape of the first mounting area in the wiring board of the present disclosure may be a polygonal shape such as a triangular shape, a pentagonal shape, or a hexagonal shape, or may be a circular shape or an elliptical shape when viewed in a plan view, and is not limited to this shape.

[0058] In the wiring board 1 according to one embodiment, the second mounting area 32 has a rectangular frame shape in plan view. However, the shape of the second mounting area in the wiring board of the present disclosure may be a polygonal frame shape such as a triangular frame shape, a pentagonal frame shape, or a hexagonal frame shape, or may be a circular ring shape or an elliptical ring shape in plan view, and is not limited to this shape.

[0059] In the wiring board 1 according to the embodiment, the pair of clearances 42 located at positions symmetrical with respect to the center of the opening 51 in the solder resist have the same shape and size, but the shapes and sizes of the clearances may differ depending on the magnitude of the stress generated around the opening 51. This makes it easier to maintain a balance between the distribution of stress and the electrical characteristics. [Explanation of symbols]

[0060] 1. Wiring board 21 First insulating layer 22 Second insulating layer 23 Third insulating layer 211 Page 1 212 2nd page 31 First mounting area 32 Second mounting area 33 Frame Area 331 Internal area 4 Conductor Layer 41 Plane Conductor body 42 Clearance 421 First Clearance 422 Second Clearance 5 Solder resist 51 Aperture 52 Long opening 521 First long opening 522 Second long opening 6 Solder 7. Chip 8 Stiffna

Claims

1. a first insulating layer having a first surface and a second surface opposite the first surface; a second insulating layer located on the outermost layer of the insulating layers located on the first surface side; a third insulating layer located on the outermost layer of the insulating layers located on the second surface side; a first mounting area located on the outermost surface of the first surface side; a second mounting area located on the outermost surface of the first surface side so as to surround the first mounting area; a plane conductor located on a surface of the third insulating layer; a solder resist covering a surface of the third insulating layer and the plane conductor and having an opening exposing a part of the plane conductor; Including, In a planar perspective view, in a frame-shaped region between an outer periphery of the first mounting region and an outer periphery of the second mounting region, the plane conductor has clearances at positions that are symmetrical with respect to a center of the opening. Wiring board.

2. In a plan view, the frame-shaped region has a rectangular frame shape having four corners and four sides, The solder resist has a plurality of the openings, the plane conductor has a plurality of the clearances, each of which corresponds to one of the openings; the plurality of clearances include a first clearance located at the corners of the rectangular frame and a second clearance located in an area of ​​the rectangular frame other than the corners, The first clearances are located along a diagonal line connecting the corners, The wiring board according to claim 1 , wherein the second clearance is positioned in a line perpendicular to the side portion adjacent to the second clearance.

3. 3. The wiring board according to claim 1, wherein at least a portion of the opening is circular in plan view, and the clearance is an arc shape that follows an edge of the opening in the circular opening.

4. 3. The wiring board according to claim 1, wherein a part of the solder resist is located in the clearance.

5. The wiring board according to claim 1 , wherein the clearance is located away from an edge of the opening in a plan view.

6. 3. The wiring board according to claim 1, wherein an angle between imaginary lines connecting a center of the opening and two ends of the clearance is at least 90 degrees in plan view.

7. The wiring board according to claim 1 , wherein the clearance has a length of at least 50 μm in a direction perpendicular to an edge of the opening.

8. 3. The wiring board according to claim 1, wherein the opening located in an internal region of the frame-shaped region between an outer peripheral edge of the first mounting region and an inner peripheral edge of the second mounting region is an elongated opening having at least one of a rectangular shape and an elliptical shape.

9. The internal region is a rectangular frame having four corners and four sides, The elongated opening includes a first elongated opening located at a corner of the internal region and a second elongated opening located at a portion other than the corner of the internal region, a minor axis direction of the first elongated opening is a direction along a diagonal line connecting corners of the internal region, The wiring board according to claim 8 , wherein a minor axis direction of the second elongated opening is perpendicular to a side of the internal region adjacent to the second elongated opening.

10. 9. The wiring board according to claim 8, wherein when the elongated opening has a rectangular shape, the long side has an aspect ratio of 3.15 to 5 relative to the short side of 1, and when the elongated opening has an elliptical shape, the flattening ratio is 0.1 to 0.

5.

11. The wiring board according to claim 8 , wherein an opening area of ​​the elongated opening is substantially the same as an opening area of ​​the openings other than the elongated opening.

Images