Quantum chip manufacturing method, device, electronic device, computer program, and quantum chip

Abstract

A method, an apparatus, an electronic device, a computer-readable storage medium, a computer program product, and a quantum chip for manufacturing a quantum chip are provided, which includes the steps of: determining an initial characteristic frequency of a chip substrate; and performing a pattern etching process on a first surface of the chip substrate based on a numerical comparison result between the initial characteristic frequency and a quantum operation frequency to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern, where the quantum operation frequency is the operation frequency of a quantum bit of a quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is the pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is the maximum; and etching a quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

Description

[Technical field]

[0001] This application claims priority to a Chinese patent application having application number 202210713974.9, filed on June 22, 2022, the entire contents of which are incorporated herein by reference.

[0002] The present invention relates to chip processing technology, and in particular to a method for manufacturing a quantum chip, an apparatus, an electronic device, a computer-readable storage medium, a computer program product, and a quantum chip. [Background technology]

[0003] Quantum computing uses the principle of superposition states to perform calculations, and therefore quantum computing has a stronger computing power than conventional computers for certain problems, attracting great interest from academia and industry. The computing power of quantum computing mainly depends on the relaxation time and scalability. To achieve good scalability, quantum bits are usually constructed by fabricating nonlinear circuits on a substrate using superconducting materials. In this case, the important factor affecting the relaxation time of the quantum bit is the substrate eigenmode of the chip.

[0004] The effect of substrate eigenmodes on the coherence of qubits shortens the relaxation time, limiting the computational power of quantum computing, and there is no effective solution in the related art. Summary of the Invention

[0005] Embodiments of the present invention provide a method, apparatus, electronic device, computer-readable storage medium, computer program product, and quantum chip for manufacturing a quantum chip, which can reduce the effect of the chip substrate's natural frequency on the quantum bit coherence, extend the coherence time of the quantum chip, and increase the computational power of the quantum chip.

[0006] The technical solutions of the embodiments of the present invention are as follows:

[0007] In an embodiment of the present invention, a method for manufacturing a quantum chip, which is executed by an electronic device, is provided, the method including the steps of: determining an initial characteristic frequency of a chip substrate; performing a pattern etching process on a first surface of the chip substrate based on a numerical comparison result between the initial characteristic frequency and a quantum operating frequency to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern, wherein the quantum operating frequency is an operating frequency of a quantum bit of a quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is a pattern when a difference between the characteristic frequency of the chip substrate and the quantum operating frequency is maximum; and etching the quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0008] In an embodiment of the present invention, a quantum chip manufacturing apparatus is provided, the apparatus including: a determination module for determining an initial natural frequency of a chip substrate; an etching module for performing a pattern etching process on a first surface of the chip substrate based on a numerical comparison result between the initial natural frequency and a quantum operating frequency to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern, the quantum operating frequency being the operating frequency of a quantum bit of a quantum circuit, the second surface being the opposite surface to the first surface, and the target pattern being the pattern when the difference between the natural frequency of the chip substrate and the quantum operating frequency is maximum; and a manufacturing module for etching the quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0009] In an embodiment of the present invention, there is provided a quantum chip, wherein a chip substrate of the quantum chip includes a first surface and a second surface opposite to each other, the first surface has a target pattern, the target pattern being a pattern in which a difference between an inherent vibration frequency of the chip substrate and a quantum operating frequency is maximized, a quantum circuit is disposed on the second surface, and an operating frequency of a quantum bit of the quantum circuit is the quantum operating frequency.

[0010] In an embodiment of the present invention, an electronic device is provided that includes a memory that stores computer-executable instructions and a processor that, when executing the computer-executable instructions stored in the memory, realizes a method for manufacturing a quantum chip according to an embodiment of the present invention.

[0011] In an embodiment of the present invention, a computer-readable storage medium having computer-executable instructions stored thereon is provided, the instructions, when executed by a processor, implementing a method for manufacturing a quantum chip according to an embodiment of the present invention.

[0012] In an embodiment of the present invention, a computer program product is provided that includes computer readable instructions, which, when executed by a processor, implements a method for manufacturing a quantum chip according to an embodiment of the present invention.

[0013] The embodiment of the present invention has the following advantageous effects.

[0014] Based on the numerical comparison result between the initial characteristic frequency and the quantum operation frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. Since the target pattern is a pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is maximized, the effect of the characteristic frequency of the chip substrate on the coherence of the quantum bit can be eliminated, so that the computing power of the quantum chip can be increased. A quantum circuit is etched on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip. Since the patterning is etched on the first surface of the chip substrate, there is no effect on the shape and dimensions of the second surface of the chip substrate, so that the quantum circuit can be normally manufactured. [Brief description of the drawings]

[0015] [Figure 1]1 is a schematic diagram of a configuration of a quantum chip manufacturing system according to an embodiment of the present invention. [Diagram 2] 1 is a schematic diagram illustrating a configuration of an electronic device according to an embodiment of the present invention. [Figure 3A] 3A and 3B are schematic flow charts of a method for manufacturing a quantum chip according to an embodiment of the present invention. [Figure 3B] 3A and 3B are schematic flow charts of a method for manufacturing a quantum chip according to an embodiment of the present invention. [Figure 4] 1 is a schematic flow chart of a method for manufacturing a quantum chip according to an embodiment of the present invention. [Diagram 5] 3 is a schematic diagram of cutting in a method for manufacturing a quantum chip according to an embodiment of the present invention. FIG. [Figure 6] 3 is a schematic diagram of cutting in a method for manufacturing a quantum chip according to an embodiment of the present invention. FIG. [Figure 7] 4 is a schematic diagram showing a change in the natural frequency of a quantum chip according to an embodiment of the present invention; FIG. [Figure 8] 3 is a schematic diagram of cutting in a method for manufacturing a quantum chip according to an embodiment of the present invention. FIG. [Figure 9] 3 is a schematic diagram of cutting in a method for manufacturing a quantum chip according to an embodiment of the present invention. FIG. [Figure 10] 4 is a schematic diagram showing a change in the natural frequency of a quantum chip according to an embodiment of the present invention; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] In order to make the objectives, technical means and advantages of the present invention clearer, the following will further describe the embodiments of the present invention in detail with reference to the drawings. The described embodiments do not limit the present invention, and all other embodiments that a person skilled in the art can obtain without performing creative work belong to the scope of protection of the present invention.

[0017] In the following description, references to "some embodiments" describe a subset of all possible embodiments, but the "some embodiments" may be the same or different subsets of all possible embodiments and may be combined with each other unless inconsistent.

[0018] In the following description, references to the terms "first," "second," and "third" are merely intended to distinguish between similar objects and do not represent a particular order of the objects. It should be noted that "first," "second," and "third" may be interchanged with respect to a particular order or order, where permitted, such that the described embodiments of the invention may be practiced in orders other than those shown or described herein.

[0019] Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art. The terms used in this specification are merely for describing the embodiments of the present invention and are not intended to limit the present invention.

[0020] Before describing the embodiments of the present invention in more detail, the nouns and terms contained in the embodiments of the present invention will be explained, and the nouns and terms contained in the embodiments of the present invention are suitable for the following interpretation.

[0021] (1) Eigenmode of the chip substrate: This is a standing wave field that satisfies the resonance conditions and forms along the vertical direction of the axis. Since the chip substrate is usually rectangular and corresponds to a two-dimensional resonant cavity formed in the chip substrate in the microwave band, it has its own eigenmode.

[0022] (2) Quantum computing: A new type of computing mode that performs calculations by controlling quantum information units according to the rules of quantum mechanics. Compared with conventional general-purpose computers, its theoretical model is a general-purpose Turing machine. A general-purpose quantum computer is a general-purpose Turing machine whose theoretical model has been reinterpreted by the laws of quantum mechanics.

[0023] (3) Quantum circuit: A set of quantum gates connected acyclically via input / output circuits. The size and depth of a quantum circuit are the number of nodes and the depth of the bottom connection graph.

[0024] (4) Quantum chip: A chip that integrates quantum circuits on a substrate and performs quantum information processing functions.

[0025] (5) Quantum superposition state: A superposition state of different quantum states of a quantum system, obtained by performing a normalized linear combination of multiple quantum states of a quantum system.

[0026] (6) Relaxation time: The time required for a quantum bit to degenerate from a quantum superposition state to a classical state.

[0027] (7) Relaxation rate: The rate at which a quantum bit degenerates from a quantum superposition state to a classical state.

[0028] Conventional computers can only operate one bit of decision state at a time, but quantum computing can operate the superposition state by utilizing the principle of state superposition, which greatly improves the computing power. However, the superposition state based on quantum mechanics is easily depolarized to the classical state due to interference from the environment. The time it takes to depolarize is called the relaxation time, and the length of the relaxation time directly affects the computing power of the quantum computer. In addition to the relaxation time, scalability is also an important indicator that affects quantum computing, and scalability directly determines the number of bits of the computer. Quantum computing schemes based on superconductivity can achieve relatively good scalability. Usually, superconducting materials such as aluminum and tantalum are selected to fabricate nonlinear inductance circuits on silicon substrates or sapphire substrates to configure quantum bits.

[0029] In this case, in addition to the losses due to the material and substrate, the factors that affect the relaxation time of the quantum bit include the substrate eigenmode. The substrate is generally rectangular, and since there are standing waves of electromagnetic waves inside the substrate, the eigenmode of the substrate can be formed. The operating frequency of a superconducting quantum bit is generally 4 gigahertz to 6 gigahertz, and an 8 mm x 8 mm silicon substrate is often used to manufacture quantum chips, and the eigenfrequency (also called the "natural frequency") of an 8 mm x 8 mm silicon substrate is 7.7 gigahertz, and the eigenfrequency of an 8 mm x 8 mm sapphire substrate is about 8.4 gigahertz. This is relatively close to the operating frequency of the quantum bit, and as the number of bits on the chip increases, the size of the chip needs to be increased, for example, a 10 mm x 10 mm silicon chip or sapphire chip is used. In this case, the natural frequency of the 10 mm x 10 mm silicon chip is 6.1 GHz, and the natural frequency of the 10 mm x 10 mm sapphire substrate is 6.7 GHz, in which case the natural frequency of the chip and the operating frequency of the quantum bit are closer.

[0030] The inventors of the present invention have discovered, in carrying out embodiments of the present invention, that for a quantum chip of superconducting material, the relaxation rate due to substrate modes can be seen by reference to Equation (1).

[0031]

number

[0032] As can be seen from formula (1), when the substrate's natural frequency and the quantum bit's operating frequency are relatively close, i.e., Δ is very small, the relaxation speed of the quantum bit caused by the substrate mode is fast, which obviously affects the quantum bit's coherence. Therefore, an important way to improve the quantum bit's coherence is to increase the difference between the substrate's natural frequency and the quantum bit's operating frequency.

[0033] For silicon substrates, the relevant technology uses deep silicon etching process to etch periodic through holes in the silicon substrate, and when the period of the micro-holes is smaller than the wavelength of the electromagnetic wave, the existence of the micro-holes can significantly suppress the eigenmode of the chip substrate. The wear of the sapphire substrate is lower than that of the silicon substrate, so the application of the sapphire substrate is more widespread in quantum chips. For sapphire, there is currently no full-scale through hole process.

[0034] In the case of a sapphire substrate, the related art changes the size of the sapphire substrate, and since the operating frequency of the quantum chip is lower than the natural frequency of the sapphire substrate, the natural frequency of the substrate can be shifted to a higher frequency by reducing the size of the sapphire substrate. For example, if the operating frequency of the quantum chip is 5 gigahertz, when the size of the substrate is 10 mm*10 mm, its natural frequency is 6.7 gigahertz, in this case, Δ is 1.7 gigahertz. If an 8 mm*8 mm substrate is selected, its natural frequency is 8.4 gigahertz, in this case, Δ is 3.4 gigahertz. A chip size of 6 mm*6 mm may be selected, its natural frequency is 11.2 gigahertz, in this case, Δ is 6.5 gigahertz. As can be seen from the above, reducing the substrate size can greatly expand the distance between the natural frequency of the chip substrate and the operating frequency of the quantum bits. However, such a method can only be applied when the number of quantum bits is small, for example, only a few quantum bits. When the number of quantum bits increases, for example to more than 100 quantum bits, the number of circuits on the chip increases dramatically, so a larger substrate must be selected and the substrate size cannot be easily changed.

[0035] In conclusion, the effect of the substrate eigenmode on the coherence of the quantum bit shortens the relaxation time, limiting the computational power of quantum computing, and there is no effective solution in the related art.

[0036] Embodiments of the present invention provide a method, apparatus, electronic device, computer-readable storage medium, computer program product, and quantum chip for manufacturing a quantum chip, which can reduce the effect of the chip substrate's natural frequency on the quantum bit coherence, extend the coherence time of the quantum chip, and increase the computational power of the quantum chip.

[0037] The following describes exemplary applications of the electronic device according to the embodiment of the present invention. The device according to the embodiment of the present invention may be implemented as various types of user terminals such as notebook computers, tablet computers, desktop computers, set-top boxes, mobile devices (e.g., mobile phones, portable music players, personal digital assistants, dedicated messaging devices, portable game devices), or may be implemented as a server. The following describes exemplary applications of the device implemented as a server.

[0038] 1 is a schematic diagram of a configuration of a quantum chip manufacturing system according to an embodiment of the present invention. As shown in FIG 1, a terminal 400 is connected to a server 200 via a network 300, which may be a wide area network or a local area network, or a combination of both.

[0039] In some embodiments, the method for manufacturing a quantum chip according to the embodiment of the present invention may be implemented by a terminal and a server in cooperation with each other. The server 200 determines an initial characteristic frequency of the chip substrate, the server 200 compares the initial characteristic frequency of the chip substrate with a quantum operation frequency, and the server 200 determines a target pattern based on the numerical comparison result, and transmits the target pattern to the terminal 400. The terminal 400 performs a pattern etching process on a first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. The quantum operation frequency is the operation frequency of the quantum bit of the quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is the pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is the maximum. The terminal 400 etches a quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0040] In some embodiments, the method for manufacturing a quantum chip according to the embodiment of the present invention may be performed by a terminal or a server alone. The method for manufacturing a quantum chip according to the embodiment of the present invention will be described as an example. The terminal 400 determines an initial characteristic frequency of the chip substrate, the terminal 400 compares the initial characteristic frequency of the chip substrate with a quantum operation frequency, and the terminal 400 determines a target pattern based on the numerical comparison result, and transmits the target pattern to the terminal 400. The terminal 400 performs a pattern etching process on a first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. The quantum operation frequency is the operation frequency of the quantum bit of the quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is the pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is maximum. The terminal 400 etches a quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0041] In some embodiments, the server 200 may be an independent physical server, a server cluster or a distributed system consisting of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, intermediate clouds, domain name services, security services, CDNs, and big data and artificial intelligence platforms. The terminal 400 may be, but is not limited to, a smartphone, a tablet computer, a notebook computer, a desktop computer, a smart speaker, a smart watch, a smart voice interaction device, a smart home appliance, an in-vehicle terminal, an aircraft, etc. The terminal and the server may be directly or indirectly connected via wired or wireless communication, but the present invention is not limited thereto.

[0042] In some embodiments, the terminal or server may realize the quantum chip manufacturing method according to the embodiments of the present application by executing a computer program. For example, the computer program may be an original program or software module in an operating system, a local (Native) application program (APP: Application), i.e., a program that needs to be installed and executed in an operating system, such as an industrial equipment maintenance APP, or an applet, i.e., a program that can be executed simply by downloading it to a browser environment. In other words, the above computer program may be any type of application, module, or plug-in software.

[0043] FIG. 2 is a schematic diagram of an electronic device according to an embodiment of the present invention. As shown in FIG. 2, a terminal 400 includes at least one processor 410, a memory 450, at least one network interface 420, and a user interface 430. The components in the terminal 400 are connected via a bus system 440. The bus system 440 is used to realize connection and communication between these components. The bus system 440 includes a power bus, a control bus, and a status signal bus in addition to a data bus. For convenience of explanation, the buses in FIG. 2 are collectively referred to as the bus system 440.

[0044] The processor 410 may be an integrated circuit chip with signal processing capabilities, such as a general purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., where a general purpose processor may be a microprocessor or any conventional processor, etc.

[0045] The user interface 430 includes one or more output devices 431 that enable the display of media content, including one or more speakers and / or one or more visual displays. The user interface 430 further includes one or more input devices 432, including user interface components that facilitate user input, such as a keyboard, a mouse, a microphone, a touch screen display, a camera, and other input buttons and widgets.

[0046] Memory 450 may be removable, non-removable, or a combination thereof. Exemplary hardware devices include solid-state memory, hard drives, optical drives, etc. Memory 450 preferably includes one or more storage devices that are physically separate from processor 410.

[0047] The memory 450 may include volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be Read Only Memory (ROM), and the volatile memory may be Random Access Memory (RAM). The memory 450 described in embodiments of the present invention is intended to include any suitable type of memory.

[0048] In some embodiments, memory 450 may store data to support various operations, examples of which include programs, modules, and data structures, or a subset or superset thereof, such as those illustrated below.

[0049] The operating system 451 includes system programs for handling various basic system services, implementing various basic services, and performing hardware-related tasks, such as a framework layer, a core library layer, and a driver layer for handling hardware-based tasks.

[0050] The network communication module 452 reaches other electronic devices through one or more (wired or wireless) network interfaces 420. Network interfaces 420 include, for example, Bluetooth, wireless compatibility (WiFi), and Universal Serial Bus (USB).

[0051] The display module 453 displays information through associated output devices 431 (eg, displays, speakers, etc.) via a user interface 430 (eg, a user interface for operating peripherals and displaying content and information).

[0052] The input processing module 454 detects one or more user inputs or interactions from one of the one or more input devices 432 and interprets the detected inputs or interactions.

[0053] In some embodiments, the apparatus according to the embodiment of the present invention may be realized by software. As shown in FIG. 2, the quantum chip manufacturing apparatus 455 stored in the memory 450 may be software in the form of programs and plug-ins, and includes a determination module 4551, an etching module 4552 and a manufacturing module 4553. These modules are logical, so they may be arbitrarily combined or further divided according to the realized functions. The following describes the functions of the modules.

[0054] The method for manufacturing a quantum chip according to the embodiment of the present invention will be described with reference to an exemplary application and implementation of the terminal according to the embodiment of the present invention. The steps performed by the terminal may be performed by a client executed on the terminal, and for the convenience of explanation, the present specification does not specifically distinguish between the terminal and the client executed on the terminal. It should be noted that the method for manufacturing a quantum chip according to the embodiment of the present invention may be performed by various forms of computer programs executed on the terminal, and is not limited to the client executed on the terminal, and may be the operating system, software module, script, and applet described above.

[0055] 3A is a schematic flow chart of a method for manufacturing a quantum chip according to an embodiment of the present invention. The following will be described with reference to steps 101 to 103 shown in FIG.

[0056] In step 101, an initial natural frequency of the chip substrate is determined.

[0057] In some embodiments, determining the initial natural frequency of the chip substrate in step 101 includes obtaining a length and width of the first surface of the chip substrate when the first surface of the chip substrate is rectangular, for example, obtaining the length and width of the rectangle when the first surface of the chip substrate is rectangular, and determining the initial natural frequency of the chip substrate based on the length and width of the first surface. Because the thickness of the chip substrate is much smaller than the length and width of the chip substrate, the chip substrate may be regarded as a two-dimensional resonant cavity to calculate the initial natural frequency. According to an embodiment of the present invention, the chip substrate may be regarded as a two-dimensional resonant cavity to calculate the initial natural frequency, thereby improving the calculation efficiency of the initial natural frequency.

[0058] In some embodiments, determining the initial natural frequency of the chip substrate based on the length and width of the first surface may be achieved by: performing a square operation on the length to obtain a first square result; performing a square operation on the width to obtain a second square result; determining a first ratio between the square result of the pi constant and the first square result and a second ratio between the square result of the pi constant and the second square result; performing a square root operation on the sum of the first ratio and the second ratio to obtain a square root result; and determining the ratio of the square root result and a substrate constant as the initial natural frequency, the substrate constant being based on the magnetic permeability of the chip substrate and the dielectric constant of the chip substrate. According to the embodiments of the present invention, the chip substrate can be regarded as a two-dimensional resonant cavity to calculate the initial natural frequency, so that the initial natural frequency can be determined accurately and efficiently.

[0059] As an example, when the chip substrate is regarded as a two-dimensional resonant cavity to calculate the initial natural frequency, the calculation of the initial natural frequency may refer to Equation (2).

[0060]

number

[0061] In step 102, based on the numerical comparison result between the initial natural frequency and the quantum operating frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern.

[0062] As an example, the quantum operating frequency is the operating frequency of a quantum bit of a quantum circuit, the second surface is the surface opposite to the first surface, and the target pattern is the pattern where the difference between the natural frequency of the chip substrate and the quantum operating frequency is maximized.

[0063] For example, a substrate etching method is determined according to the numerical comparison result that the quantum operating frequency is smaller than the natural frequency of the chip substrate or is equal to or larger than the natural frequency of the chip substrate, specifically, a target pattern for etching is determined. Then, a pattern etching process is performed on the first surface of the chip substrate based on the target pattern to obtain a chip substrate whose second surface is complete and whose first surface has the target pattern. When the quantum operating frequency is smaller than the natural frequency of the chip substrate, the target pattern is etched to shift the natural frequency of the chip substrate to a higher frequency, i.e., the target pattern of the first surface is obtained when the natural frequency of the chip substrate is at its maximum value. When the quantum operating frequency is equal to or larger than the natural frequency of the chip substrate, the target pattern is etched to shift the natural frequency of the chip substrate to a lower frequency, i.e., the target pattern of the first surface is obtained when the natural frequency of the chip substrate is at its minimum value.

[0064] As an example, the initial chip substrate is a cube. The thickness (height) of the cube is much smaller than the length and width of the cube. The initial chip substrate has a surface (two opposing faces of the cube) determined by two length sides and two width sides, and the first surface is any one of the two surfaces and the second surface is the other surface. The surface on which the pattern etching has been performed is the back surface (back side) (first surface) of the chip substrate, and the surface on which the pattern etching has not been performed and which remains intact during etching is the front surface (second surface) of the chip substrate. The second surface being intact means that the second surface has not been pattern etched, and when the pattern etching is performed on the first surface, the second surface is not affected by the etching and still maintains an intact surface, for example, the second surface has not been punched through during the etching process of the first surface.

[0065] In some embodiments, when the initial natural frequency is less than the quantum operating frequency, the target pattern has a cubic recess at the center of the first surface. When the initial natural frequency is equal to or greater than the quantum operating frequency, the target pattern has a cubic protrusion at the center of the first surface. According to the embodiments of the present invention, the natural frequency can be minimized or maximized by a simple target pattern, and the pattern etching efficiency can be effectively improved.

[0066] As an example, the chip substrate may be regarded as a resonant cavity. Before etching the back surface, the chip substrate is a two-dimensional resonant cavity, and after etching the back surface, the shape of the resonant cavity changes, so that the standing wave field formed along the longitudinal direction of the axis changes, thereby changing the natural frequency of the substrate. When the natural frequency of the substrate is equal to or greater than the operating frequency of the quantum bit, the description will be given with reference to Figs. 5-6. Figs. 5-6 show a schematic diagram of a method of machining a concave groove on the back surface of the chip substrate using a dicing machine grindstone. When cutting, the cutting depth of the grindstone on the chip substrate may be set to 330 microns, in which case the remaining thickness of the chip substrate is 100 microns. When the dicing machine grindstone cuts from one side of the chip substrate to the other side, the amount of removal in the lateral direction is 200 microns, that is, a groove 200 microns wide and 330 microns deep can be cut out for each cut. The back surface of the chip substrate may be processed into a convex shape as shown in FIG. 5, and the periphery of the back surface of the chip substrate may be sequentially removed to process into a convex shape with a protruding center as shown in FIG. 6. FIG. 7 is a diagram showing the relationship between the natural frequency of the substrate and the amount of material removed from the chip substrate. With the increase in the amount of removal on both sides or the periphery of the back surface of the chip substrate, the natural frequency of the chip substrate increases obviously, and then with the continuous increase in the amount of removal, the natural frequency of the chip substrate begins to decrease, and continues to decrease until the removal of the material of 330 microns thick on the back surface is completed. In this case, the length of one side of the chip substrate is 10 millimeters, and the thickness of the chip substrate is 100 microns, which corresponds to the need to obtain the corresponding target pattern when the natural frequency in FIG. 7 is the maximum value, that is, the cubic convex with a protruding center as shown in FIG. 6.

[0067] As an example, when the natural frequency of the substrate is smaller than the operating frequency of the quantum bit, the following description will be given with reference to FIG. 8. FIG. 8 shows a schematic diagram of a method of processing a groove on the back surface of a sapphire substrate using a dicing machine grindstone. In this case, the cutting parameters of the dicing machine grindstone may be set. For example, a groove is etched in the middle part. Similarly, a groove with a width of 200 microns and a depth of 330 microns can be cut out for each cut. The number of cuts can be precisely controlled, and the shape shown in FIG. 8 can be obtained after multiple cuts. It is also possible to process only the central region. However, the dicing machine can only completely cut from one side of the chip to the other side of the chip. FIG. 10 is a diagram showing the relationship between the natural frequency of the sapphire substrate and the amount of removal of the sapphire substrate. With the increase in the amount of material removal, the natural frequency of the chip substrate first obviously decreases, and then, with the continuous increase in the amount of removal, the natural frequency of the chip substrate begins to rise, and finally reaches a situation where it approaches the natural frequency of the initial chip substrate. Therefore, in actual processing, the amount of material removed must be accurately controlled to reach the maximum value of the difference between the natural frequency of the chip substrate and the quantum bit operating frequency, which corresponds to obtaining the corresponding target pattern when the natural frequency in Figure 10 is at its minimum value, i.e., the cubic recess with a concave center as shown in Figure 9.

[0068] In step 103, a quantum circuit is etched on the second surface of the patterned etched chip substrate to form a quantum chip.

[0069] As an example, the chip substrate that has been subjected to the pattern etching process is the chip substrate obtained in step 102, i.e., the first surface of the chip substrate includes the target pattern, and the second surface (front) of the chip substrate is fabricated with a qubit circuit (i.e., the quantum circuit in step 103). The fabricated quantum circuit includes circuit structures such as a readout circuit, a filter, a resonant cavity, and a Josephson junction.

[0070] 3B is a schematic flow chart of a method for manufacturing a quantum chip according to an embodiment of the present invention. In some embodiments, as shown in FIG. 3B, according to the numerical comparison result between the initial characteristic frequency and the quantum operating frequency in step 102, a pattern etching process is performed on the first surface of the chip substrate, and a chip substrate whose second surface is perfect and whose first surface has a target pattern can be obtained by performing steps 1021 to 1023 shown in FIG. 3B.

[0071] In step 1021, when the initial natural frequency is smaller than the quantum operating frequency, a target pattern of the first surface is obtained where the natural frequency of the chip substrate is at a minimum value.

[0072] In step 1022, if the initial natural frequency is equal to or greater than the quantum operating frequency, obtain a target pattern of the first surface where the natural frequency of the chip substrate is at a maximum value.

[0073] In step 1023, a pattern etching process is performed on the first surface of the chip substrate according to the target pattern to obtain a chip substrate whose second surface is perfect and whose first surface has the target pattern.

[0074] In some embodiments, the above-mentioned acquisition of the target pattern of the first surface when the natural frequency of the chip substrate is the minimum may be realized by executing the steps of acquiring the geometric parameters of the chip substrate, the material of the chip substrate, and a plurality of candidate patterns of the chip substrate, calling a first neural network model to acquire geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern, performing a fusion process on the geometric features, material features, and pattern features of the candidate pattern for each candidate pattern to acquire a first fusion feature, performing a first mapping process on the first fusion feature, and acquiring a predicted natural frequency of the candidate pattern, and sorting the predicted natural frequencies of the plurality of candidate patterns in ascending order, and setting the candidate pattern corresponding to the highest predicted natural frequency after sorting as the target pattern. In this way, the target pattern of the chip substrate when the natural frequency is the minimum can be acquired.

[0075] In some embodiments, the above-mentioned obtaining the target pattern of the first surface when the natural frequency of the chip substrate is maximized may be realized by executing the steps of: obtaining geometric parameters of the chip substrate, a material of the chip substrate, and a plurality of candidate patterns of the chip substrate; calling a first neural network model to obtain geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; performing a fusion process on the geometric features, material features, and pattern features of the candidate pattern for each candidate pattern to obtain a first fusion feature, performing a first mapping process on the first fusion feature to obtain a predicted natural frequency of the candidate pattern; and sorting the predicted natural frequencies of the plurality of candidate patterns in descending order, and setting the candidate pattern corresponding to the highest predicted natural frequency after sorting as the target pattern. This allows the obtaining of the target pattern of the chip substrate when the natural frequency is maximized.

[0076] By predicting the natural frequency of each candidate pattern using an artificial intelligence method and selecting the candidate pattern corresponding to the maximum natural frequency as the target pattern, or selecting the candidate pattern corresponding to the minimum natural frequency as the target pattern, the efficiency of obtaining the target pattern can be improved and the efficiency of pattern etching can be improved.

[0077] The training process of the above-mentioned first neural network model is described below. Obtain the geometric parameters of the sample chip substrate, the sample material of the sample chip substrate, and a number of sample candidate patterns of the sample chip substrate. Call the initialized first neural network model to obtain the sample geometric features corresponding to the sample geometric parameters, the sample material features corresponding to the sample material, and the sample pattern features of each sample candidate pattern; for each sample candidate pattern, perform a fusion process on the sample geometric features, the sample material features, and the sample pattern features of the sample candidate pattern, obtain the first sample fusion feature, perform a first mapping process on the sample first fusion feature, obtain the predicted natural frequency of the sample candidate pattern, determine the error between the predicted natural frequency of the sample candidate pattern and the label natural frequency of the sample candidate pattern, update the parameters of the first neural network model according to the error, and take the updated first neural network model as the first neural network model of the subsequent call if the error converges to a minimum value.

[0078] In some embodiments, the first surface of the chip substrate is a plane. Before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is a minimum, a plurality of simulation cutting processes are performed on the first surface of the chip substrate until the first surface of the chip substrate becomes a plane again, and for the first surface of the chip substrate obtained by each simulation cutting process, an electromagnetic wave is simulated to propagate on the first surface of the chip substrate, and a process is performed to obtain a transmission frequency of the electromagnetic wave when a resonance phenomenon occurs during propagation, and the transmission frequencies corresponding to each simulation cutting process are sorted in ascending order, and the transmission frequency at the top of the sorting is determined as the natural frequency when the natural frequency is a minimum.

[0079] As an example, the chip substrate is a rectangular parallelepiped having an initial thickness. Performing a simulation cutting process multiple times on the first surface of the chip substrate is not actually cutting the chip substrate, but is performing a simulation cutting. Obtaining the first surface after cutting the chip substrate until the first surface of the chip substrate becomes flat again corresponds to the chip substrate becoming a rectangular parallelepiped again, and the thickness is simply reduced compared to the initial one. A first surface having a different pattern can be obtained for each simulation cutting. The electromagnetic wave is simulated and propagated on the first surface of the chip substrate, and the electromagnetic wave is simulated and propagated on the first surface of various patterns by the simulation software. The transmission frequency of the electromagnetic wave when a resonance phenomenon appears during the propagation may be obtained as the natural frequency of the corresponding pattern. The transmission frequencies corresponding to the multiple simulation cutting processes may be sorted in ascending order, and the top transmission frequency after sorting is determined as the natural frequency when it is the minimum value, that is, the pattern corresponding to the top transmission frequency after sorting may be set as the target pattern.

[0080] In some embodiments, the first surface of the chip substrate is a plane. Before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is maximized, a plurality of simulation cutting processes are performed on the first surface of the chip substrate until the first surface of the chip substrate becomes flat again, and for the first surface of the chip substrate obtained by each simulation cutting process, an electromagnetic wave is simulated to propagate on the first surface of the chip substrate, and a process is performed to obtain a transmission frequency of the electromagnetic wave when a resonance phenomenon occurs during the propagation, and the transmission frequencies corresponding to each simulation cutting process are sorted in descending order, and the transmission frequency at the top of the sorting is determined as the natural frequency when the natural frequency is maximized.

[0081] As an example, the chip substrate is a rectangular parallelepiped having an initial thickness. Performing a simulation cutting process multiple times on the first surface of the chip substrate is not actually cutting the chip substrate, but is performing a simulation cutting. Obtaining the first surface after cutting the chip substrate until the first surface of the chip substrate becomes flat again corresponds to the chip substrate becoming a rectangular parallelepiped again, and the thickness is simply reduced compared to the initial one. A first surface having a different pattern can be obtained for each simulation cutting. The electromagnetic wave is simulated and propagated on the first surface of the chip substrate, and the simulation software can be used to realize the simulation propagation of the electromagnetic wave on the first surface of various patterns. The transmission frequency of the electromagnetic wave when a resonance phenomenon appears during propagation may be obtained as the natural frequency of the corresponding pattern. The transmission frequencies corresponding to the multiple simulation cutting processes may be sorted in descending order, and the top transmission frequency after sorting is determined as the natural frequency when the maximum value is reached, that is, the pattern corresponding to the top transmission frequency after sorting may be set as the target pattern.

[0082] According to an embodiment of the present invention, a first surface having different patterns is obtained after the multiple simulation cuttings, the natural frequency corresponding to the first surface of each pattern is obtained by a simulation method, and the pattern with the maximum or minimum natural frequency is determined as the target pattern, thereby making it possible to accurately obtain the target pattern.

[0083] In some embodiments, any one simulation cutting process may be any of the following processes. A grindstone cutting unit may be obtained, and the grindstone cutting unit may perform simulation cutting on the first surface of the chip substrate. For example, a microscope system built into the dicing machine may be used to measure the position of the chip substrate and determine the height of the chip substrate to the grindstone. Cutting parameters for the chip substrate are set for each cut based on the grindstone calibrated in advance. Taking a square chip substrate with a side length of 10 mm and a thickness of 430 microns as an example (grindstone cutting unit), the grindstone may set the cutting depth for the chip substrate to 330 microns when cutting the chip substrate with a thickness of 430 microns, and in this case, the remaining thickness of the chip substrate is 100 microns. When the dicing machine grindstone cuts from one side of the chip substrate to the other side, the lateral removal amount is 200 microns, that is, a groove with a width of 200 microns and a depth of 330 microns can be cut in one cut. The movement trajectory of the simulation light beam on the first surface of the chip substrate and the residence time of the simulation light beam at each position during the movement may be obtained, and a simulation cutting process may be performed on the first surface of the chip substrate based on the movement trajectory and the residence time. For example, a focused plasma or a laser may be used to machine the center of the chip. To remove material on the chip substrate, first, the position of the focused plasma on the chip substrate or the position of the focus of the laser beam on the chip substrate is accurately controlled, then the movement trajectory of the focused plasma or the laser beam and the residence time at each position on the substrate are controlled by a program, and finally, a chip substrate having a groove in the center is machined, as shown in FIG. 9.

[0084] In some embodiments, a chip substrate of a quantum chip includes first and second opposing surfaces, the first surface having a target pattern, the target pattern being a pattern for which a difference between an inherent vibration frequency of the chip substrate and a quantum operating frequency is maximized, and a quantum circuit is disposed on the second surface, the operating frequency of the quantum bits of the quantum circuit being the quantum operating frequency.

[0085] As an example, first, an initial characteristic frequency of the chip substrate is determined. Then, based on a numerical comparison result between the initial characteristic frequency and the quantum operating frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. The quantum operating frequency is the operating frequency of the quantum bit of the quantum circuit, the second surface is the surface opposite to the first surface, and the target pattern is the pattern when the difference between the characteristic frequency of the chip substrate and the quantum operating frequency is maximum. Finally, a quantum circuit is etched on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0086] Based on the numerical comparison result between the initial characteristic frequency and the quantum operation frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. Since the target pattern is a pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is maximized, the effect of the characteristic frequency of the chip substrate on the coherence of the quantum bit can be eliminated, so that the computing power of the quantum chip can be increased. A quantum circuit is etched on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip. Since the patterning is etched on the first surface of the chip substrate, there is no effect on the shape and dimensions of the second surface of the chip substrate, so that the quantum circuit can be normally manufactured.

[0087] The following describes an example of the application of an embodiment of the present invention in a real application scenario.

[0088] In some embodiments, the method for manufacturing a quantum chip according to the embodiments of the present invention may be performed by a terminal and a server in cooperation with each other. The server determines an initial characteristic frequency of the chip substrate, the server compares the initial characteristic frequency of the chip substrate with a quantum operating frequency, and the server determines a target pattern based on a numerical comparison result, and sends the target pattern to the terminal. The terminal performs a pattern etching process on a first surface of the chip substrate to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern. The quantum operating frequency is an operating frequency of a quantum bit of a quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is a pattern when the difference between the characteristic frequency of the chip substrate and the quantum operating frequency is maximum. The terminal etches a quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0089] An embodiment of the present invention can significantly reduce the effect of substrate modes on bit coherence and extend the bit coherence time by modifying the overall shape of the substrate by etching a pattern on the back surface of the substrate to adjust the substrate's natural frequency and increase the distance between the quantum bit operating frequency and the substrate's natural frequency.

[0090] A method for manufacturing a quantum chip according to an embodiment of the present invention uses a pattern etched on the back surface of a substrate to change the eigenfrequency of the substrate eigenmode and increase the difference between the operating frequency of the quantum bit and the eigenfrequency of the substrate, thereby reducing the effect of the chip substrate eigenmode on the quantum bit coherence and extending the coherence time.

[0091] 4 is a schematic flow chart of a method for manufacturing a quantum chip according to an embodiment of the present invention. As shown in FIG. 4, in step 201, the initial natural frequency of the chip substrate is calculated. Specifically, since the thickness of the chip substrate is much smaller than the length and width of the chip, the chip substrate can be regarded as a two-dimensional resonant cavity, and the calculation of the initial natural frequency can refer to Equation (3).

[0092]

number

[0093] Moreover, the natural frequency of the chip substrate may be output using simulation software, and after obtaining the natural frequency of the chip substrate, the initial natural frequency may be compared with the operating frequency of the quantum bit.

[0094] In step 202, a substrate etching method is determined based on the numerical comparison result of whether the working frequency of the quantum bit is higher or lower than the natural frequency. Specifically, a target pattern for etching is determined, and if the working frequency of the quantum bit is lower than the natural frequency of the chip substrate, the target pattern is etched to shift the natural frequency of the chip substrate to a higher frequency, and if the working frequency of the quantum bit is equal to or higher than the natural frequency of the chip substrate, the target pattern is etched to shift the natural frequency of the chip substrate to a lower frequency.

[0095] In step 203, the chip substrate is etched by ion milling, laser milling, or mechanical dicing. Specifically, the back surface of the chip substrate is etched by ion milling, laser milling, or mechanical dicing to form a target pattern, such as a groove structure or a protrusion structure, and the size of the groove or protrusion is precisely controlled to maximize the difference between the natural frequency of the chip substrate and the operating frequency of the quantum bit.

[0096] In step 204, a quantum chip is obtained by etching the surface of the chip substrate to form quantum circuits. In particular, because the dimensions and morphology of the surface are not affected by the pattern etching, quantum bit circuits may be fabricated on the surface, including structures such as readout circuits, filters, resonant cavities, and Josephson junctions.

[0097] In step 205, the quantum chip is packaged and subjected to a low-temperature test process for the quantum chip, specifically, the quantum chip is put into a refrigerator and then a quantum algorithm is executed.

[0098] In some embodiments, when the natural frequency of the substrate is equal to or greater than the operating frequency of the quantum bit, the description will be given with reference to FIG. 5-FIG. 6. FIG. 5-FIG. 6 are schematic diagrams showing a method of processing a groove on the back surface of a sapphire substrate using a dicing machine grindstone, and this process can be performed directly using a commercially available dicing machine. First, the surface of the sapphire is attached to a hoop with a dedicated blue film, and then the back surface of the sapphire is placed in the dicing machine facing the grindstone. Next, the position of the sapphire is measured using a microscope system built into the dicing machine to identify the height from the sapphire to the grindstone. The cutting parameters of the sapphire are set according to each cutting of the grindstone calibrated in advance. Taking a square sapphire with a side length of 10 millimeters and a thickness of 430 microns as an example, when cutting a sapphire substrate with a thickness of 430 microns, the cutting depth of the grindstone to the sapphire may be set to 330 microns, and in this case, the remaining thickness of the sapphire is 100 microns. When the grinding wheel of the dicing machine cuts from one side of the sapphire to the other, the amount of removal in the lateral direction is 200 microns, that is, a groove 200 microns wide and 330 microns deep can be cut out for each cut, and the back surface of the sapphire may be processed into a convex shape as shown in Figure 5. Furthermore, the periphery of the back surface of the sapphire may be sequentially removed to process it into a convex shape with a protruding center as shown in Figure 6.

[0099] In some embodiments, FIG. 7 shows the relationship of the natural frequency of the sapphire substrate with the amount of removal of the sapphire substrate. With the increase in the amount of removal on both sides or around the backside of the sapphire, the natural frequency of the sapphire increases obviously, and then with the continued increase in the amount of removal, the structure of the sapphire approaches an increasingly thin perfect sapphire, and then the natural frequency of the sapphire begins to decrease, decreasing until the backside sapphire with a thickness of 330 microns is removed. At this time, the dimensions of the sapphire are 10 mm side length and 100 microns thick. At this time, the difference between the natural frequency of the sapphire and the natural frequency when the thickness is 430 microns is small. Therefore, it is necessary to accurately select an appropriate amount of removal during actual operation so that the difference between the natural frequency of the sapphire and the operating frequency of the quantum bit is maximized.

[0100] In some embodiments, if the natural frequency of the substrate is equal to or lower than the operating frequency of the qubit, the natural frequency of the substrate may be continued to be reduced. FIG. 8 shows a schematic diagram of a method for processing a groove on the back surface of a sapphire substrate using a dicing machine grindstone. In this case, the cutting parameters of the dicing machine grindstone may be set. For example, a groove is etched in the middle part. Similarly, in each cut, a groove with a width of 200 microns and a depth of 330 microns may be obtained, and the number of cuts may be precisely controlled, and the shape shown in FIG. 8 may be obtained after multiple cuts.

[0101] In some embodiments, only the central area may be processed. However, the dicing machine can only cut completely from one side of the chip to the other side of the chip. Therefore, if only the center of the chip is processed, the dicing machine cannot be used. Referring to FIG. 9, the center of the chip may be processed using a focused plasma or a laser. To remove material on the chip substrate, first, the position of the focused plasma on the chip substrate or the position of the focal point of the laser beam on the chip substrate is precisely controlled, then the trajectory of the movement of the focused plasma or the laser beam and the dwell time at each position on the substrate are controlled by a program, and finally, a chip substrate having a groove in the center is processed as shown in FIG. 9.

[0102] In some embodiments, Fig. 10 shows the relationship between the natural frequency of the sapphire substrate and the amount of material removed. With the increase in the amount of material removed, the natural frequency of the chip substrate first decreases obviously, and then with the increase in the amount of material removed, the natural frequency of the chip substrate starts to increase, and finally reaches a situation where it approaches the natural frequency of the initial chip substrate. Therefore, in the actual processing, it is necessary to accurately control the amount of material removed so that the difference between the natural frequency of the chip substrate and the operating frequency of the quantum bit is the maximum value.

[0103] According to the embodiment of the present invention, the natural frequency of the chip substrate can be significantly improved or reduced by etching a convex or concave pattern on the back surface of the chip substrate, and the difference between the natural frequency of the chip substrate and the operating frequency of the quantum bit can be increased, so that the coherence time can be extended. Since the pattern is etched on the back surface of the chip substrate, the shape and size of the front surface of the chip substrate are not affected, and the subsequent processing of the quantum chip is not affected. In addition, there is no requirement on the type of the chip substrate, and in addition to the sapphire substrate, it can also be a silicon substrate or a silicon carbide substrate, and has good compatibility.

[0104] The following will continue to describe an exemplary configuration in which the quantum chip manufacturing apparatus 455 according to the embodiment of the present invention is implemented as a software module. In some embodiments, as shown in FIG. 4, the software modules of the quantum chip manufacturing apparatus 455 stored in the memory 450 include a determination module 4551 for determining an initial characteristic frequency of a chip substrate, an etching module 4552 for performing a pattern etching process on a first surface of the chip substrate based on a numerical comparison result between the initial characteristic frequency and the quantum operating frequency, and obtaining a chip substrate whose second surface is complete and whose first surface has a target pattern, where the quantum operating frequency is the operating frequency of the quantum bit of the quantum circuit, the second surface is the opposite surface to the first surface, and the target pattern is the pattern when the difference between the characteristic frequency of the chip substrate and the quantum operating frequency is maximum, and a manufacturing module 4553 for etching a quantum circuit on the second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip.

[0105] In some embodiments, the determination module 4551 is configured to obtain a length and a width of the first surface of the chip substrate when the first surface is rectangular, and determine an initial natural frequency of the chip substrate based on the length and width of the first surface.

[0106] In some embodiments, the determining module 4551 is configured to perform a square operation on the length to obtain a first squared result, perform a square operation on the width to obtain a second squared result, determine a first ratio between the squared result of the Pi constant and the first squared result and a second ratio between the squared result of the Pi constant and the second squared result, perform a square root operation on a sum of the first ratio and the second ratio to obtain a square root result, and determine the initial natural frequency as a ratio of the square root result and a substrate constant, where the substrate constant is obtained based on the magnetic permeability of the chip substrate and the dielectric constant of the chip substrate.

[0107] In some embodiments, the etching module 4552 is configured to perform a pattern etching process on the first surface of the chip substrate based on a numerical comparison result between the initial natural frequency and the quantum operating frequency, and obtain a target pattern on the first surface of the chip substrate when the natural frequency of the chip substrate is at a minimum value if the initial natural frequency is less than the quantum operating frequency, before obtaining a chip substrate having a complete second surface and a target pattern on the first surface. When the initial natural frequency is greater than or equal to the quantum operating frequency, the target pattern on the first surface of the chip substrate is obtained when the natural frequency of the chip substrate is at a maximum value.

[0108] In some embodiments, when the initial natural frequency is less than the quantum operating frequency, the target pattern has a cubic recess at the center of the first surface, and when the initial natural frequency is greater than or equal to the quantum operating frequency, the target pattern has a cubic protrusion at the center of the first surface.

[0109] In some embodiments, before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is minimized, the etching module 4552 is configured to perform the following processes: obtain geometric parameters of the chip substrate, a material of the chip substrate, and multiple candidate patterns of the chip substrate, and call a first neural network model to obtain geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; for each candidate pattern, perform a fusion process on the geometric features, material features, and pattern features of the candidate pattern to obtain a first fusion feature, perform a first mapping process on the first fusion feature, and obtain a predicted natural frequency of the candidate pattern; and sort the predicted natural frequencies of the multiple candidate patterns in ascending order, and set the candidate pattern corresponding to the highest predicted natural frequency after sorting as the target pattern.

[0110] In some embodiments, before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is maximum, the etching module 4552 is configured to perform the following processes: obtain geometric parameters of the chip substrate, a material of the chip substrate, and multiple candidate patterns of the chip substrate, and call a first neural network model to obtain geometric features corresponding to the geometric parameters, material features corresponding to the material, and pattern features of each candidate pattern; for each candidate pattern, perform a fusion process on the geometric features, material features, and pattern features of the candidate pattern to obtain a first fusion feature, perform a first mapping process on the first fusion feature, and obtain a predicted natural frequency of the candidate pattern; and sort the predicted natural frequencies of the multiple candidate patterns in descending order, and set the candidate pattern corresponding to the highest predicted natural frequency after sorting as the target pattern.

[0111] In some embodiments, the first surface of the chip substrate is a plane. The etching module 4552 is configured to perform a plurality of simulated cutting processes on the first surface of the chip substrate until the first surface of the chip substrate becomes a plane again before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is a minimum value, perform a process of simulating propagation of an electromagnetic wave on the first surface of the chip substrate for the first surface of the chip substrate obtained by each simulated cutting process, obtain a transmission frequency of the electromagnetic wave when a resonance phenomenon appears during propagation, sort the transmission frequencies corresponding to each simulated cutting process in ascending order, and determine the top transmission frequency after sorting as the natural frequency when the natural frequency is a minimum value.

[0112] In some embodiments, the first surface of the chip substrate is a plane. The etching module 4552 is configured to perform a simulation cutting process on the first surface of the chip substrate multiple times until the first surface of the chip substrate becomes a plane again before obtaining a target pattern of the first surface when the natural frequency of the chip substrate is maximized, perform a process of simulating propagation of an electromagnetic wave on the first surface of the chip substrate for the first surface of the chip substrate obtained by each simulation cutting process, obtain a transmission frequency of the electromagnetic wave when a resonance phenomenon appears during propagation, sort the transmission frequencies corresponding to each simulation cutting process in descending order, and determine the top transmission frequency after sorting as the natural frequency when the natural frequency is maximized.

[0113] In some embodiments, one of the simulation cutting processes is one of a process of preparing a grinding wheel cutting unit and performing simulation cutting on a first surface of a chip substrate using the grinding wheel cutting unit, and a process of acquiring a movement trajectory of a simulation light beam on the first surface of the chip substrate and a residence time of the simulation light beam at each position during movement, and performing a simulation cutting process on the first surface of the chip substrate based on the movement trajectory and the residence time.

[0114] An embodiment of the present invention provides a quantum chip, the chip substrate of the quantum chip includes first and second surfaces opposite each other, the first surface has a target pattern, the target pattern being a pattern for which a difference between an inherent vibration frequency of the chip substrate and a quantum operating frequency is maximized, and a quantum circuit is disposed on the second surface, the operating frequency of the quantum bits of the quantum circuit being the quantum operating frequency.

[0115] An embodiment of the present invention further provides a computer program product or computer program comprising computer instructions, the computer instructions being stored in a computer readable storage medium, a processor of an electronic device reading the computer instructions from the computer readable storage medium, and the processor executing the computer instructions to cause the electronic device to perform the method for manufacturing a quantum chip according to an embodiment of the present invention.

[0116] An embodiment of the present invention is a computer-readable storage medium having computer-executable instructions stored thereon, which, when executed by a processor, causes the processor to perform a method for manufacturing a quantum chip according to an embodiment of the present invention, such as a method for manufacturing a quantum chip as shown in Figures 3A-3B.

[0117] In some embodiments, the computer-readable storage medium may be a memory such as FRAM, ROM, PROM, EPROM, EEPROM, flash memory, magnetic surface memory, optical disk, or CD-ROM, or may be any device including one or any combination of the above memories.

[0118] In some embodiments, the executable instructions may be created in any type of programming language (including compiled or interpreted languages, or declarative or procedural languages) in the form of a program, software, software module, script, or code, and may be implemented in any form, for example as a stand-alone program, or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0119] As an example, the executable instructions may correspond to a file in a file system or may be stored as part of a file for holding other programs or data, such as in one or more scripts in a HyperText Markup Language (HTML) document, in a single file dedicated to the program being referenced, or in multiple cooperating files (e.g., files for storing one or more modules, subprograms, or code sections).

[0120] As an example, the executable instructions may be implemented and executed on a single electronic device, may be executed on multiple electronic devices located at a single location, or may be executed on multiple electronic devices distributed at multiple locations and interconnected via a communications network.

[0121] As described above, according to the embodiment of the present invention, a pattern etching process is performed on the first surface of the chip substrate based on the numerical comparison result between the initial characteristic frequency and the quantum operation frequency, and a chip substrate with a complete second surface and a target pattern on the first surface is obtained. Since the target pattern is a pattern when the difference between the characteristic frequency of the chip substrate and the quantum operation frequency is maximized, the effect of the characteristic frequency of the chip substrate on the coherence of the quantum bit can be eliminated, and the computational power of the quantum chip can be increased. A quantum circuit is etched on the second surface of the chip substrate that has been subjected to the pattern etching process, and a quantum chip is formed. Since the patterning is etched on the first surface of the chip substrate, there is no effect on the shape and dimensions of the second surface of the chip substrate, and therefore the quantum circuit can be normally manufactured.

[0122] The above only describes the exemplary embodiments of the present invention, and does not limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention are included within the protection scope of the present invention.

Claims

1. A method for manufacturing a quantum chip, the method comprising: determining an initial natural frequency of a chip substrate; According to a numerical comparison result between the initial characteristic frequency and the quantum operating frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate having a complete second surface and a target pattern on the first surface, the quantum operating frequency is an operating frequency of a quantum bit of a quantum circuit, the second surface is an opposite surface to the first surface, and when the initial characteristic frequency is smaller than the quantum operating frequency, the target pattern has a cubic recess at a center position of the first surface, and when the initial characteristic frequency is equal to or greater than the quantum operating frequency, the target pattern has a cubic protrusion at a center position of the first surface; and etching the quantum circuit into a second surface of the patterned etched chip substrate to form a quantum chip.

2. The step of determining an initial natural frequency of the chip substrate comprises: if the first surface of the chip substrate is rectangular, obtaining a length and a width of the first surface; and determining an initial natural frequency of the chip substrate based on a length and a width of the first surface.

3. Determining an initial natural frequency of the chip substrate based on a length and a width of the first surface includes: performing a squaring operation on the length to obtain a first squared result, and performing a squaring operation on the width to obtain a second squared result; determining a first ratio between the result of squaring a pi constant and the first squared result, and a second ratio between the result of squaring the pi constant and the second squared result; performing a square root extraction process on the sum of the first ratio and the second ratio to obtain a square root extraction result; 3. The method of claim 2, further comprising: a step of determining an initial natural frequency as a ratio of the square root result and a substrate constant, the substrate constant being obtained based on a magnetic permeability of the chip substrate and a dielectric constant of the chip substrate.

4. A method for manufacturing a quantum chip, executed by an electronic device, comprising: determining an initial natural frequency of a chip substrate; According to a numerical comparison result between the initial characteristic frequency and the quantum operation frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate having a complete second surface and a target pattern on the first surface, the quantum operation frequency being the operation frequency of a quantum bit of a quantum circuit, and the second surface being the opposite surface to the first surface; and etching the quantum circuit on a second surface of the chip substrate that has been subjected to the pattern etching process to form a quantum chip; According to a numerical comparison result between the initial characteristic frequency and the quantum operating frequency, a pattern etching process is performed on the first surface of the chip substrate to obtain a chip substrate having a complete second surface and a target pattern on the first surface, if the initial characteristic frequency is less than the quantum operating frequency, etching the first surface to shift the characteristic frequency to a higher frequency to obtain the target pattern; if the initial characteristic frequency is equal to or greater than the quantum operating frequency, etching the first surface to shift the characteristic frequency to a lower frequency to obtain the target pattern; and performing a pattern etching process on a first surface of the chip substrate based on the target pattern to obtain a chip substrate having a perfect second surface and the first surface carrying the target pattern.

5. The step of acquiring a target pattern of the first surface includes: obtaining a geometric parameter of the chip substrate, a material of the chip substrate, and a number of candidate patterns of the chip substrate; Call the first neural network model: A process of acquiring geometric features corresponding to the geometric parameters, material features corresponding to the materials, and pattern features of each of the candidate patterns; performing a fusion process on the geometric feature, the material feature, and the pattern feature of the candidate pattern for each of the candidate patterns to obtain a first fusion feature; performing a first mapping process on the first fusion feature to obtain a predicted natural frequency of the candidate pattern; and executing a process of sorting the predicted natural frequencies of the plurality of candidate patterns in ascending order, and determining the candidate pattern corresponding to the top predicted natural frequency after the sorting as the target pattern.

6. The step of acquiring a target pattern of the first surface includes: obtaining a geometric parameter of the chip substrate, a material of the chip substrate, and a number of candidate patterns of the chip substrate; Call the first neural network model: A process of acquiring geometric features corresponding to the geometric parameters, material features corresponding to the materials, and pattern features of each of the candidate patterns; performing a fusion process on the geometric feature, the material feature, and the pattern feature of the candidate pattern for each of the candidate patterns to obtain a first fusion feature; performing a first mapping process on the first fusion feature to obtain a predicted natural frequency of the candidate pattern; and executing a process of sorting the predicted natural frequencies of the plurality of candidate patterns in descending order, and determining the candidate pattern corresponding to the top predicted natural frequency after the sorting as the target pattern.

7. the first surface of the chip substrate is planar; prior to acquiring a target pattern of the first surface; performing a simulated cutting process on the first surface of the chip substrate multiple times until the first surface of the chip substrate becomes planar again; a step of performing a process of simulating propagation of an electromagnetic wave on the first surface of the chip substrate obtained by each simulation cutting process, and acquiring a transmission frequency of the electromagnetic wave when a resonance phenomenon occurs during propagation; The method according to claim 4 , further comprising the steps of: sorting the transmission frequencies corresponding to the respective simulated cutting processes in ascending order; and determining the top transmission frequency after the sorting as the natural frequency.

8. the first surface of the chip substrate is planar; prior to acquiring a target pattern of the first surface; performing a simulated cutting process on the first surface of the chip substrate multiple times until the first surface of the chip substrate becomes planar again; a step of performing a process of simulating propagation of an electromagnetic wave on the first surface of the chip substrate obtained by each simulation cutting process, and acquiring a transmission frequency of the electromagnetic wave when a resonance phenomenon occurs during propagation; The method according to claim 4 , further comprising the steps of: sorting the transmission frequencies corresponding to the respective simulated cutting processes in descending order; and determining the top transmission frequency after the sorting as the natural frequency.

9. Any of the simulation cutting processes includes: A process of performing simulation cutting on a first surface of the chip substrate by a grindstone cutting unit; and The method according to claim 7 or 8, which is any one of a process of acquiring a movement trajectory of a simulation light beam on a first surface of the chip substrate and a residence time of the simulation light beam at each position during the movement, and performing a simulation cutting process on the first surface of the chip substrate based on the movement trajectory and the residence time.

10. A quantum chip, the chip substrate of the quantum chip including first and second opposing surfaces; the first surface has a target pattern, and when an initial natural frequency of the chip substrate is less than a quantum operating frequency, the target pattern has a cubic recess at a center of the first surface, and when the initial natural frequency is equal to or greater than the quantum operating frequency, the target pattern has a cubic protrusion at a center of the first surface; A quantum chip having a quantum circuit disposed on the second surface, the quantum circuit having a quantum bit operating frequency that is the quantum operating frequency.

11. An apparatus for manufacturing quantum chips, comprising: a determination module for determining an initial natural frequency of the chip substrate; an etching module for performing a pattern etching process on a first surface of the chip substrate based on a numerical comparison result between an initial characteristic frequency and a quantum operating frequency to obtain a chip substrate whose second surface is complete and whose first surface has a target pattern, the quantum operating frequency being an operating frequency of a quantum bit of a quantum circuit, the second surface being an opposite surface to the first surface, and when the initial characteristic frequency is smaller than the quantum operating frequency, the target pattern has a cubic recess at a center position of the first surface, and when the initial characteristic frequency is equal to or greater than the quantum operating frequency, the target pattern has a cubic protrusion at a center position of the first surface; a fabrication module for etching the quantum circuit on a second surface of the pattern etched chip substrate to form a quantum chip.

12. a memory for storing computer executable instructions; A processor that, when executing computer-executable instructions stored in the memory, implements the method for manufacturing a quantum chip according to any one of claims 1 to 8.

13. A computer program comprising computer readable instructions, which when executed by a processor implements the method for manufacturing a quantum chip according to any one of claims 1 to 8.

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