Measurement of transceiver performance parameters in radar systems

Abstract

To make it possible to satisfy functional safety standards.SOLUTION: In an example of describing a radar system-on-a-chip (SOC) (102) configured to monitor performance parameters of one or more receive channels (202) and / or one or more transmit channels (204), the radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner (318) coupled to each of one or more transmit channels, a splitter (320) coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] This application relates generally to radar systems, and more particularly to measuring transceiver performance parameters in radar systems. [Background technology]

[0002] To reduce human operating errors, a new class of safety systems called advanced driver assistance systems (ADAS) are being introduced into automobiles. These systems can be activated by smart sensors, primarily based on millimeter-wave automotive radar. The proliferation of these assistance systems, which can provide features such as rearview cameras, electronic stability control, and vision-based pedestrian detection systems, has been made possible in part by improvements in microcontroller and sensor technology. Expanded embedded radar-based solutions are enabling supplemental safety features for ADAS designers.

[0003] In an automotive radar system, a radar sensor is useful for detecting obstacles around the vehicle and the speed of the detected objects relative to the vehicle. A processing unit in the radar system can determine the appropriate action required, for example, to avoid a collision or reduce collateral damage, based on the signal generated by the radar sensor. Current vehicle radar systems can detect objects and obstacles around the vehicle, the position of any detected objects and obstacles relative to the vehicle, and the speed of any detected objects and obstacles relative to the vehicle. For example, the radar system, via the processing unit, can warn the vehicle driver about potential dangers, prevent a collision by controlling the vehicle in a dangerous situation, take over partial control of the vehicle, or assist the driver in parking the vehicle.

[0004] Automotive radar systems must meet the functional safety requirements of the International Standard 26262 entitled "Automotive Functional Safety". ISO 26262 defines functional safety as the absence of undue risk resulting from the faulty behavior of electrical / electronic systems. Functional safety in automotive radar is to prevent harm to persons due to defects in components in the radar. For automotive radar, the radar should be recognized as functioning properly within a fault-tolerant time interval of approximately 100 milliseconds (ms). Thus, while the vehicle is in operation, any fault in any part of the radar that may lead to a degraded signal-to-noise ratio (SNR) or a false detection of the presence or location of an obstacle should be detected and an appropriate response should be made within approximately 100 ms. Summary of the Invention

[0005] In an illustrative example of a method and apparatus for measurement of transceiver performance parameters in a radar system, a radar system-on-chip (SOC) configured to monitor one or more performance parameters includes one or more receive channels, one or more transmit channels, transmit generation circuitry coupled to the one or more transmit channels, and a loopback path coupling the one or more transmit channels to the one or more receive channels. The transmit generation circuitry is operable to generate a continuous wave signal when the radar SOC operates in a test mode. The loopback path includes a combiner coupled to the one or more transmit channels, a splitter coupled to the one or more channels, and a single wire coupling an output of the combiner to an input of the splitter. The loopback path is operable to provide a test signal from at least one transmit channel that receives the continuous wave signal to at least one receive channel when the radar SOC operates in the test mode.

[0006] In one aspect, a radar system-on-chip (SOC) configured to monitor one or more performance parameters includes one or more receive channels, one or more transmit channels, and transmit generation circuitry coupled to the one or more transmit channels, the transmit generation circuitry operable to generate a continuous wave signal when the radar SOC is operated in a test mode.

[0007] In one aspect, a radar system-on-chip configured for monitoring one or more performance parameters includes a receive channel, a transmit channel, transmit generation circuitry coupled to the transmit channel, and a loopback path coupling the transmit channel to the receive channel. The transmit generation circuitry is operable to generate a continuous wave signal when the radar SOC operates in a test mode. The loopback path includes a first combiner coupled to an output of a programmable shifter included in each transmit channel, a second combiner coupled to an output of a power amplifier chain in each transmit channel, a frequency shifter coupled to an output of the second combiner, a third combiner coupled to an output of the first combiner and the frequency shifter, a splitter coupled to an output of each receive channel, and a single wire coupling an output of the third combiner to an input of the splitter. The loopback path is operable to provide a test signal from at least one transmit channel receiving the continuous wave signal to the receive channel when the radar SOC operates in a test mode. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a block diagram of an example frequency modulated continuous wave (FMCW) radar system configured to perform performance monitoring during operation of the radar system.

[0009] [Diagram 2] FIG. 1 is a block diagram of an example radar system-on-chip (SOC).

[0010] [Diagram 3]FIG. 3 is a simplified block diagram of an example embodiment of the radar SOC of FIG. 2, in which the radar SOC is configured to measure performance parameters of receive channels and / or transmit channels. [Figure 4] FIG. 3 is a simplified block diagram of an example embodiment of the radar SOC of FIG. 2, in which the radar SOC is configured to measure performance parameters of receive channels and / or transmit channels. [Diagram 5] FIG. 3 is a simplified block diagram of an example embodiment of the radar SOC of FIG. 2, in which the radar SOC is configured to measure performance parameters of receive channels and / or transmit channels.

[0011] [Figure 6] 1 is a flow chart of a method. [Figure 7] 1 is a flow chart of a method. [Figure 8] 1 is a flow chart of a method. [Figure 9] 1 is a flow chart of a method. [Figure 10] 1 is a flow chart of a method. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Specific embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings, in which like elements in the various drawings are designated by like reference numerals for consistency.

[0013] Embodiments of the present disclosure contemplate monitoring performance in a radar transceiver integrated circuit as a radar system-on-chip (SOC), i.e., a radar SOC, for example when used in an operating vehicle. More specifically, in various embodiments, the performance of receive and / or transmit channels of the radar SOC may be measured based on test signals captured on the SOC. For example, the test signals are useful for detecting mismatches in gain and phase response between multiple receive channels and / or multiple transmit channels, noise and spurious tone levels in the receive and / or transmit channels, and / or nonlinearity of the receive channels. In various embodiments, instead of having wires coupling each transmit channel / receive channel pair to transmit a test signal from the transmit channel to the receive channel, one or more transmit channels of the SOC are coupled to a combiner, and the output of the combiner is routed via a single wire to a splitter that is coupled to one or more of the receive channels.

[0014] 1 is a block diagram of an example frequency modulated continuous wave (FMCW) radar system 100 configured to perform performance monitoring during operation of the radar system 100. The example FMCW radar system 100 includes a radar system-on-chip (SOC) 102, a processing unit 104, and a network interface 106. The architecture of various embodiments of the radar SOC 102 are described with reference to FIGS.

[0015] The radar SOC 102 is coupled to the processing unit 104 via a high-speed serial interface. As described in more detail with reference to FIG. 2, the radar SOC 102 includes functionality for generating a plurality of digital intermediate frequency (IF) signals (alternatively referred to as dechirp signals, beat signals, or raw radar signals) that are provided to the processing unit 104 via the high-speed serial interface. Additionally, as described in more detail with reference to FIG. 3, FIG. 4, and FIG. 5, various embodiments of the radar SOC 102 are configured to generate test data for receive and / or transmit channels of the SOC 102 and to provide test data to the processing unit 104 to be used for monitoring performance parameters of the receive and / or transmit channels.

[0016] The processing unit 104 includes functionality for performing radar signal processing, i.e., for processing received radar signals to determine, for example, the range, speed, and angle of any detected objects. The processing unit 104 may also include functionality for performing post-processing of information about detected objects, such as tracking the objects, determining speed and direction of movement, etc. The processing unit 104 also includes functionality for performing performance monitoring based on test data provided by the radar SOC 102, and for performing mitigation based on conditions detected by the performance monitoring. Test data and options for performance monitoring are described in more detail herein.

[0017] The processing unit 104 may include any suitable processor or combination of processors as needed for the processing throughput of the application using the radar data. For example, the processing unit 104 may include a digital signal processor (DSP), a microcontroller (MCU), a SOC combining both DSP and MCU processing, or a field programmable gate array (FPGA) and a DSP.

[0018] The processing unit 104 provides control information via the network interface 106 to one or more electronic control units in the vehicle as needed. Electronic Control Unit (ECU) is a generic term for any embedded system in a vehicle that controls one or more electronic systems or subsystems in the vehicle. Examples of types of ECUs include Electronic / Engine Control Module (ECM), Powertrain Control Module (PCM), Transmission Control Module (TCM), Brake Control Module (BCM or EBCM), Central Control Module (CCM), Central Timing Module (CTM), Generic Electronic Module (GEM), Body Control Module (BCM), and Suspension Control Module (SCM).

[0019] The network interface 106 may implement any suitable protocol, such as a Controller Area Network (CAN) protocol, a FlexRay protocol, or an Ethernet protocol.

[0020] 2 is a block diagram of an example radar SOC 102. The radar SOC 102 may include multiple transmit channels 204 for transmitting FMCW signals and multiple receive channels 202 for receiving reflected transmitted signals. Also, the number of receive channels may be greater than the number of transmit channels. For example, an embodiment of the radar SOC 102 may have two transmit channels and four receive channels.

[0021] The transmit channel includes a suitable transmitter and antenna. The receive channel includes a suitable receiver and antenna. Each of the receive channels 202 is also identical and includes a low noise amplifier (LNA) 206, 208 for amplifying the receive signal, a mixer 210, 212 for mixing the signal generated by the transmit generating circuitry with the receive signal to generate an IF signal, a baseband bandpass filter 214, 216 for filtering the IF signal, a variable gain amplifier (VGA) 215, 217 for amplifying the filtered IF signal, and an analog-to-digital converter (ADC) 218, 220 for converting the analog IF signal to a digital IF signal. The mixer acts as a downconverter that generates an output signal having a frequency equal to the difference in frequency of the inputs it receives from the low noise amplifier and the transmit generating circuitry, both of which are radio frequency (RF) signals. The receive channel bandpass filter, VGA, and ADC can be collectively referred to as a baseband chain or baseband filter chain. The bandpass filter and the VGA may also be collectively referred to as an IF amplifier (IFA).

[0022] The receive channel 202 is coupled to a digital front-end (DFE) component 222 to provide a digital IF signal to the DFE 222. The DFE 222 includes functionality for performing decimation filtering on the digital IF signal to reduce the data transfer rate. The DFE 222 may also perform other operations on the digital IF signal, such as DC offset removal, digital compensation for non-idealities in the receive channel, such as RX-to-RX gain imbalance non-idealities and RX-to-RX phase imbalance non-idealities. The DFE 222 is coupled to a high-speed serial interface (I / F) 224 to forward the decimated digital IF signal to the processing unit 104 when the radar SOC 102 is in normal mode. In some embodiments, the DFE is also coupled to a control module 228 to forward a digital test signal to the control module 228 when the radar SOC 102 is in test mode.

[0023] A serial peripheral interface (SPI) 226 provides an interface for communication with the processing unit 104. For example, the processing unit 104 may use the SPI 226 to send control information to the control module 228, such as, for example, chirp timing and frequency, output power levels, triggering of monitoring functions, etc. The radar SOC 102 may use the SPI 226 to send test data to the processing unit 104, for example.

[0024] The control module 228 includes functionality for controlling the operation of the radar SOC 102 in normal and test modes. For example, the control module 228 may include a buffer for storing output samples of the DFE 222, an FFT (Fast Fourier Transform) engine for computing spectral information of the buffer contents, and an MCU executing firmware for controlling the operation of the radar SOC 102 in normal and test modes. The functionality of the control module 228 will be described in more detail with reference to the methods of FIGS. 6-10.

[0025] The programmable timing engine 232 includes functionality for receiving chirp parameter values ​​for a sequence of chirps in a radar frame from the control module 228, and for generating chirp control signals that control the transmission and reception of chirps in the frame based on the parameter values. For example, the chirp parameters are defined by the radar system architecture and may include transmitter enable parameters to indicate which transmitters are enabled, chirp frequency start values, chirp frequency slope, chirp duration, indicators of when the transmit channels should transmit and when to collect the DFE output digital for further radar processing, etc. One or more of these parameters may be programmable.

[0026] Radio frequency synthesizer (SYNTH) 230 includes functionality for generating an FMCW signal for transmission based on a chirp control signal from timing engine 232. In some embodiments, SYNTH 230 includes a phase-locked loop (PLL) with a voltage-controlled oscillator (VCO).

[0027] The clock multiplier 240 increases the frequency of the transmit signal (LO signal) to the LO frequency of the mixers 206, 208. The clean-up PLL (Phase Locked Loop) 234 operates to increase the frequency of an external low frequency reference clock (not shown) signal to the frequency of the SYNTH 230 and to filter reference clock phase noise from the clock signal.

[0028] Clock multiplier 240, synthesizer 230, timing generator 232, and clean-up PLL 234 are examples of transmit generation circuitry. The transmit generation circuitry generates a radio frequency (RF) signal as an input to the transmit channel and, via the clock multiplier, to the mixer in the receive channel. The output of the transmit generation circuitry may be referred to as a LO (local oscillator) signal or an FMCW signal.

[0029] 3, 4, and 5 are simplified block diagrams of example embodiments of the radar SOC 102 of FIG. 2, in which the radar SOC 102 is configured to measure receiver and / or transmitter performance parameters. For ease of explanation, the illustrated embodiments each have four receive channels and two transmit channels. In some embodiments, the number of receive channels and / or the number of transmit channels may vary. In these methods, the transmit generation circuitry is configured to generate an LO signal comprising a zero slope continuous wave signal, i.e., a continuous RF wave with a constant frequency, when the radar SOC operates in a test mode. When the radar SOC operates in a normal mode, the output of the transmit generation circuitry is an RF signal whose frequency varies over time, e.g., the frequency of the RF signal varies from 77 GHz to 81 GHz over a time period from 0 to 100 microseconds in response to a chirp control parameter, resulting in a reflected signal as a delayed version of the transmitted signal, and a mixer in each receive channel outputs an IF signal proportional to the round trip delay.

[0030] Each of the block diagrams of Figures 3, 4, and 5 includes at least one combiner. In general, a combiner may be a hardware circuit that adds input signals to form an output signal. If a combiner receives a single input signal, that signal is output by the combiner. In some embodiments, the combiner may apply a programmable gain or attenuation to each input signal before adding the signals. In some embodiments, the combiner may be symmetric such that the gain, attenuation, and / or delay of each input signal is substantially similar to the combiner output.

[0031] 3, the illustrated example FMCW radar SOC 102 is configured to provide an internal loopback of signals generated in the transmit channel 204 for each of the receive channels 202 when the SOC 102 operates in a test mode. As will be described in more detail with reference to the method of FIG. 6, this configuration is useful for determining gain and phase mismatch between receive channels at different radio and intermediate frequencies. As will be described in more detail with reference to the method of FIG. 7, this configuration is useful for determining a noise figure for the receive channels 202. As will be described in more detail with reference to the method of FIG. 10, this configuration is useful for determining nonlinearity metrics in the receive channels 202.

[0032] The two transmit channels each incorporate a signal power amplifier chain of a pre-power amplifier (PPA) 302, 312 coupled to the SYNTH 230 to receive the FMCW signal, a programmable shifter 304, 314 coupled to the PPA 302, 312 to receive the amplified signal, and a power amplifier (PA) 306, 316 coupled to the shifter 304, 314 to receive the shifted signal. In some embodiments, the shifter 304, 314 can be programmed for both frequency and phase shifting. Thus, the output signal of the shifter 304, 314 can have a frequency equal to the input frequency plus a programmable offset frequency and a phase equal to the input phase plus a programmable offset phase. A combiner 318 is coupled to the output of the shifters 304, 314 to receive and combine the shifted signals. The combiner 318 is also coupled to a splitter 320 to provide a combined signal to the splitter.

[0033] A splitter 320 is coupled to each of the receive channels 202. The splitter 320 splits the combined signal from the combiner 318 to provide signals of equal power and phase to each of the receive channels 202. The splitter 320 may be symmetric such that the gain, attenuation, and / or delay of the signals input from the splitter to the LNAs of each of the receive channels 202 are substantially similar.

[0034] Each receive channel 202 includes a radio frequency (RF) power detector 307, 309, 311, 313 coupled between the splitter 320 and a low noise amplifier (LNA). The power detectors 307, 309, 311, 313 measure the power of the combined signal from the combiner 308. This power measurement may also be referred to as a received signal strength indicator (RSSI). The power detectors 307, 309, 311, 313 are coupled to the control module 228 to provide the power measurements to the control module 228. In some embodiments, the power detectors 307, 309, 311, 313 may each incorporate a power detection sensor and an analog-to-digital converter for converting the power measurements from the sensor to digital power measurements. As described in more detail herein, the outputs of the power detectors 307, 309, 311, 313 (power measurements) may be accessed by the control module 228 when the radar SOC operates in a test mode.

[0035] 4, the illustrated example FMCW radar SOC is configured to provide, in each of the receive channels 202, an internal loopback of signals generated in the transmit channels 204 when the SOC 102 operates in a test mode. As will be described in more detail with reference to the method of FIG. 8, this configuration is useful for determining power and phase mismatch between the transmit channels 204.

[0036] In this example, a combiner 402 is coupled to each of the power amplifier chains of the transmit channels 204 to receive a signal from the power amplifier chains and to combine the two signals to generate a single signal. The combiner 402 may be symmetric so that the gain and / or delay of the signal from each transmit channel to the combiner output is substantially similar.

[0037] The combiner 402 is also coupled to a frequency shifter 404 to provide the combined signal to the frequency shifter 404. For example, the frequency shifter 404 may be an on-off keying (OOK) modulator or a binary phase shift keying (BPSK) modulator. An example of an OOK modulator is a circuit that achieves a frequency shift Fshift in an input signal by alternately outputting an input signal for 0.5 / Fshift and zeros for 0.5 / Fshift. An example of a BPSK modulator is a circuit that achieves a frequency shift Fshift in an input signal by alternately outputting an input signal with one polarity for 0.5 / Fshift and outputting an input signal with the opposite polarity for 0.5 / Fshift. The frequency shifter 404 is coupled to the splitter 320 to provide the frequency shifted combined signal to the splitter 320.

[0038] Each transmit channel 204 includes a radio frequency (RF) power detector 407, 417 coupled to an output of the PA 306, 316. Each power detector 407, 417 measures the power of the signal output from the respective PA 306, 316. The power detectors 407, 417 are coupled to the control module 228 to provide the power measurements to the control module 228. In some embodiments, each power detector 407, 417 may incorporate a power detection sensor and an analog-to-digital converter for converting the power measurements from the sensor to digital power measurements. As described in more detail herein, the output of the power detectors 407, 417 (power measurements) may be accessed by the control module 228 when the radar SOC operates in a test mode.

[0039] 5, the illustrated example FMCW radar SOC is a combination of the examples of FIG. 3 and FIG. 4, and may therefore implement any of the methods described herein when the SOC 102 operates in test mode. A loopback (LB) combiner 502 is added. The LB combiner 502 is coupled between the frequency shifter 404 and the splitter 240 to receive a combined signal from the power amplifier chain of the transmit channel 204. The LB combiner 502 is also coupled between the combiner 318 and the splitter 240 to receive the signal output from the combiner 318.

[0040] 6-10 are flow charts of methods for determining various performance parameters of the radar SOC 102 when the SOC 102 is operated in a test mode and properly configured. These methods may be performed under the control of the control module 228. Thus, the control module 228 may configure loopback paths and other components as necessary to perform the desired measurements. Additionally, in these methods, the test results, i.e., performance parameter values, determined by the control module 228 are reported to the safety processor.

[0041] In general, the safety processor receives the performance parameter values ​​and performs one or more actions based on the parameter values. For example, the safety processor may compare the parameter values ​​to predefined thresholds and notify affected entities if the thresholds are exceeded. In another example, one or more of the parameter values ​​may cause data received from the radar regarding the presence, location, and velocity of detected objects to be modified. In the methods described below, the safety processor is assumed to be the processing unit 104 for simplicity of explanation.

[0042] FIG. 6 is a flow chart of a method for determining gain and phase mismatch between receive channels 202 of a radar SOC 102. The method can be implemented in the exemplary embodiment of FIG. 3 and the exemplary embodiment of FIG. 5. The method can be implemented in any combination of radio and intermediate frequencies. For example, for a 77-81 GHz radar, the radio frequency (RF) can be 77, 79, or 81 GHz, and a typical intermediate frequency (IF) for performance monitoring can be 15, 10, 5, 2, 1, 0.5, or 0.1 MHz. In the following description, RF=80 GHz and IF=1 MHz are used as an example.

[0043] As shown in Figure 6, a loopback path from one of the transmit channels 204 to the receive channel 202 is enabled (600) by the control module 228. In the example SOC 102 of Figure 3, the loopback path includes the PPA and shifter of the selected transmit channel, the combiner 318, and the splitter 320. In the example SOC 102 of Figure 5, the loopback path also includes the LB combiner 502. Additionally, the other loopback path through the PA, combiner 402, and frequency shifter 404 is not enabled.

[0044] The control module 228 also generates 602 a continuous wave (CW) test signal, for example 80 GHz+1 MHz, through the loopback path from the selected transmit channel. The CW test signal may be generated by setting the frequency of the local oscillator (LO) signal from the SYNTH 230 to 80 GHz and programming a shifter in the power amplifier chain to add a 1 MHz frequency to the LO signal.

[0045] The test signal passes through the splitter 320 to each of the receive channels 202, and the control module 228 collects 604 a digital test data signal from each of the receive channels. In some embodiments, the control module 228 collects the signal from the output of the ADC in each receive channel 202. In other embodiments, the control module 228 collects the signal from the output of the DFE 222. The data collection from the receive channels 202 is performed simultaneously and synchronously, i.e., data collection from the four receive channels 202 is started at the same time.

[0046] The control module 228 performs a fast Fourier transform (FFT) on the test data signal to determine the amplitude Ai and phase θi (i=1,...,4) of the test data signal simultaneously and synchronously received at each of the four receive channels 202 (606). The amplitude Ai and phase θi of the test signal received at the receive channels may be determined as follows. For ease of explanation, assume that Ns samples of ADC data are collected at a sampling rate Fs, e.g., Ns=1024 and Fs=10.24 MHz, and an Ns-point FFT is performed to generate Ns FFT output complex samples referred to as FFTOut[0,1,2,...,Ns-1]. The period during which the DFE output is collected may be programmed as Ns / Fs, and the chirp duration may be equal to or slightly exceed Ns / Fs. The FFT output sample index indx corresponding to the test data signal at frequency IF is given by IF / Fs x Ns. The value of FFTOut[indx] is a complex number denoted by X+jY. The amplitude of this number is given by A=sqrt(X2+Y2) / Ns and the phase is given by θ=arctan(Y / X). The control module 228 also receives 608 power data Pi from each of the power detectors 307, 309, 311, 313 for the corresponding receive channel 202.

[0047] The control module 228 then calculates 610 performance parameters such as the gain for each receive channel, the gain mismatch between the receive channels, and the phase mismatch between the receive channels. These parameter values ​​are reported 612 to the safety processor 104. The gain for receive channel i may be calculated as follows: Gain i =20logA i -P i If the loopback paths are designed symmetrically across the receive channel, the gain can be calculated without using power data, namely, as follows: Gain i =20logA i

[0048] For the sake of brevity and ease of explanation, some additional constant terms are not shown on the right hand side of the gain calculation formula above. These constant terms are common and known to radio designers. There may be more additional constant terms, for example, to make the units of P and A consistent. For example, the value of A indicates the signal level at the ADC in the receive channel ("how many LSBs there are"), and the value of P indicates the value of the power detected at the input LNA of the receive channel ("dB milliwatts" or "dB watts"). To make the units of A and P consistent, A constant such as TIFF0007648861000001.tif946 may be added to the above formula for this purpose, where ADCFullScale is the full-scale voltage of the ADC (e.g., 1 volt), NumBits is the number of bits in each ADC output word, and Resistance may be, for example, a typical 50 ohm resistor. There may be other similar design constants to standardize for other standard concepts known to radio designers.

[0049] The gain mismatch between two receive channels i and j can be calculated as follows: GainMismatch i,j =Gain i -Gain j The phase mismatch between two receive channels i and j can be calculated as follows: PhaseMismatch i,j =θ i -θ j

[0050] The method is useful for finding gain, gain mismatch, and phase mismatch at various radio and intermediate frequencies. For example, the method is useful for calculating these parameters at RF=77 GHz, 79 GHz, and 81 GHz, all with IF set to, for example, 1 MHz. This helps to determine whether the gain and phase are well matched between multiple receive channels over a range of desired radio frequencies. In another example, the method is useful for calculating these parameters at IF=1 MHz, 5 MHz, and 10 MHz, all with RF set to, for example, 79 GHz. This helps to determine whether the gain and phase are well matched between multiple receive channels over a range of desired intermediate frequencies.

[0051] Figure 7 is a flow chart of a method for determining a noise figure in the receive channels 202 of the radar SOC 102. This method may be implemented in the example embodiment of Figure 3 and the example embodiment of Figure 5. Initially, a gain is determined for each of the receive channels (700), as described with reference to the method of Figure 6. The control module 228 then disables (702) the loopback path from the selected transmit channel, so that signals from the transmit channel cannot reach the receive channel, thus ensuring that only noise signals reach the receive channel.

[0052] The control module 228 then collects 704 digital noise data from each of the receive channels for a few microseconds and calculates 706 the noise power of each receive channel based on the corresponding noise data. In some embodiments, the control module 228 collects the noise data signals from the output of the ADC in each receive channel 202. In other embodiments, the control module 228 collects the noise data signals from the output of the DFE 222.

[0053] The noise power for receive channel i may be calculated by performing an FFT on the corresponding noise data and summing the squared values ​​of the FFT output. For example, the noise power for receive channel i may be calculated as follows: For ease of explanation, assume that Ns samples of ADC data are collected at a sampling rate Fs, e.g., Ns=1024 and Fs=10.24 MHz, and an Ns-point FFT is performed to generate Ns FFT output complex samples referred to as FFTOut[0,1,2,...,Ns-1]. The FFT output sample index range starting from indxMin to indxMax, corresponding to the IF bandwidth of interest for radar signal processing, is given by indexMin=0, indexMax=IFBandwidth / Fs×Ns. The value of FFTOut[indxMin to indxMax] is a complex number denoted by X[indx]+jY[indx], where indx=indxMin to indxMax is related. The noise power may be calculated as follows: A typical value for IFBandwidth is 5MHz or 10MHz, depending on the exact radar frequency planning, maximum target distance to scan, FMCW frequency slope, etc. The value of Fs should be selected higher than IFBandwidth.

[0054] The control module 228 then calculates 708 the noise power spectral density (PSD) of the noise power of each receive channel. The noise PSD for receive channel i may be calculated as follows: NoisePSD i = 10×log10(NoisePower i / IFBandwidth) where IFBandwidth is the bandwidth of the intermediate frequency (IF). Finally, the control module 228 calculates (710) a noise figure (NF) for each receive channel i based on the corresponding noise PSD and reports (712) the noise figures to the safety processor. Noise figure NF for receive channel i i can be calculated as follows: NF i =NoisePSD i -Gain i

[0055] In test mode, the shifters 304 and 314 as used in the methods of Figures 6, 7, and 9 provide a frequency shift IF to the LO signal to generate a test signal as input to the receive channel with a frequency offset of the IF from the LO RF frequency. Without this frequency shift, the frequency of the test signal would be the same as the LO frequency at the mixer in the receive channel, thus making the test signal at the IFA input substantially closer to 0 Hz. Typical IFA circuits and ADCs for radar SOCs have poor performance, i.e., high noise, near 0 Hz, but much better performance, i.e., low noise, at higher frequencies, e.g., several MHz. The noise near 0 Hz in the IFA and ADC can be referred to as flicker noise, and has negligible effect at higher frequencies in typical IFA and ADC circuits.

[0056] Also, the radar IFA circuit typically includes a high-pass filter (HPF) and a low-pass filter or an effective bandpass filter. The HPF in the IFA attenuates very low IF frequencies, such as 0 Hz and below 500 kHz. Therefore, when the test signal has such a low frequency, the ADC input and output include the test signal with a very low amplitude and a very large amount of noise that corrupts the test signal at similar / close frequencies. The low amplitude of the test signal at the ADC output and the high noise power near the IF frequency of the test signal may make the measurement of the above performance parameters difficult to perform and low accuracy. Using the shifters 304, 314 to shift the frequency of the LO signal ensures that the test signal passing through the IFA has a frequency IF significantly higher than 0 Hz. Therefore, the ADC input and output include the significant amplitude of the test signal and relatively low noise power at similar / close frequencies.

[0057] In the method of FIG. 10, shifters 304 and 314 also enable the generation of a multi-tone test signal that is comprised of different non-zero IF frequencies of multiple tones.

[0058] 8 is a flow chart of a method for determining power and phase mismatch between transmit channels 204 of a radar SOC 102. The method may be implemented in the example embodiment of FIG. 4 and the example embodiment of FIG. 5. The method may be implemented at any suitable radio frequency. For example, for a 77-81 GHz radar, the radio frequency (RF) may be 77, 79, or 81 GHz. In the following description, RF=80 GHz is used as an example.

[0059] As shown in Figure 8, a loopback path from one of the transmit channels 204 to the receive channel 202 is enabled (800) by the control module 228. In the example SOC 102 of Figure 4, the loopback path includes the PPA, shifter, and PA, i.e., power amplifier chain, of the selected transmit channel, the combiner 402, the frequency shifter 404, and the splitter 320. In the example SOC 102 of Figure 5, the loopback path also includes the LB combiner 502. Also, the loopback path through the combiner 318 is not enabled. In either embodiment, the other transmit channel is not enabled.

[0060] The control module 228 also generates (802) a continuous wave (CW) test signal, e.g., 80 GHz, through the loopback path from the selected transmit channel. The CW test signal may be generated by setting the frequency of the local oscillator (LO) signal from the SYNTH 230 to 80 GHz and programming a shifter in the power amplifier chain of the selected transmit channel to add a frequency of 0 MHz to the LO signal. The control module 228 also configures (803) the frequency shifter 404 to shift the test signal to an intermediate frequency (IF), e.g., 1 MHz.

[0061] The frequency shifted test signal passes through the splitter 320 to the receive channels 202, and the control module 228 collects (804) the digital data signal from one receive channel. Any one of the receive channels may be selected for data collection. In some embodiments, the control module 228 collects the test signal from the output of the ADC in the receive channel. In other embodiments, the control module 228 collects the test signal from the output of the DFE 222. The data collection is performed simultaneously and synchronously with the operation of the frequency shifter 404. That is, data collection begins at the same time that the frequency shifter 404 creates the desired frequency shift in the test signal and continues for a few microseconds.

[0062] The control module 228 performs a fast Fourier transform (FFT) on the test data signal to determine (806) the amplitude Ai and phase θi, i=1,...,2, of the received test data signal. The determination of the amplitude and phase is described above. In this process, Ai and θi are the combined amplitude and phase responses of transmit channel i and the selected receive channel at a given RF frequency. The control module 228 also receives (808) power data Pi from a power detector in the transmit channel. The data collection process 800-808 is repeated (809) for the other transmit channels.

[0063] The control module 228 then calculates 810 the performance parameters: power mismatch between the transmission channels and phase mismatch between the transmission channels. These parameter values ​​and the power of each transmission channel are reported 812 to the safety processor 104. The phase mismatch between two transmission channels i and j may be calculated as follows: PhaseMismatch i,j =θ i -θ j The power mismatch between two transmission channels i and j may be calculated as follows: PowerMismatch i,j =P i -P j

[0064] Alternatively, if the paths including the combiner and the paths to the selected receive channel inputs match across transmit channels, the power mismatch between two transmit channels i and j may be calculated as follows: PowerMismatch i,j =A i -A j In this case, the measured ADC output amplitude represents only the transmitter power mismatch at the various PA outputs. Compared to other power mismatch equations, this equation removes any errors in the power measurements from the power detector circuit.

[0065] The frequency shifter 404 used in the test mode in the method of FIG. 8 serves a similar purpose as previously described for the shifters 304, 314. Thus, if no frequency shift is performed by the frequency shifter 404, the test signal at the receive channel input will be close to 0 Hz and may be corrupted by flicker noise in the IFA and ADC. Also, the test signal will be attenuated by the HPF of the receive channel's IFA, and the amplitude of the ADC input and output corresponding to the test signal will be low. Due to the low amplitude of the test signal and the high noise power near the IF frequency of the test signal, measurements of the gain and phase mismatch of the transmit channel may be difficult and inaccurate to perform.

[0066] Also, the frequency shifter 404 after the PA in the transmit channel serves an additional purpose. To measure the gain and phase mismatch of the transmit channel, the method of FIG. 8 enables the PA in the transmit channel, which causes the external emission of the LO signal. This externally emitted LO signal is reflected by objects around the radar, such as the radar system or the chassis of the vehicle on which the radar system is installed. It also electromagnetically couples from the transmit channel antenna to the receive channel antenna. The entire signal received at the receive channel due to all reflections and couplings can be called the external signal. The frequency of the external signal is the same as the RF frequency of the LO signal. If no frequency shift is performed by the frequency shifter 404, the test signal received at the receive channel LNA also has the same frequency as the LO signal.

[0067] If the external signal and the test signal have the same frequency, the two cannot be distinguished when processing the ADC output. Therefore, measurements such as gain and phase mismatch of the transmission channel from the test signal may be corrupted due to the external signal, and the measurements may be erroneous. By applying a frequency shift to the PA output signal before the test signal is passed to the receive channel LNA, the frequency shifter 404 ensures that the frequencies of the external signal and the test signal at the LNA input, and therefore at the ADC output, are different. If the frequencies of the two signals at the ADC output are given a difference by performing FFT or equivalent digital signal processing, the above method can accurately estimate the gain and phase mismatch of the transmission channel from the test signal without the estimates being corrupted by the external signal. The test signal will correspond to the frequency IF and FFT index, while the external signal will correspond to a 0 Hz signal at the FFT input, and therefore to FFT index 0.

[0068] FIG. 9 is a flow chart of a method for determining the radar system noise figure for each combination of transmit and receive channels of the radar SOC 102. This method can be implemented in the example embodiment of FIG. 3 and the example embodiment of FIG. 5. In this method, instead of using a loopback path to measure this parameter, a test signal is transmitted by the transmit channel and the receive channel 202 receives the test signal as reflected from nearby static objects such as the chassis of the vehicle on which the radar system is mounted or the chassis of the radar system. The radar system noise figure is the average noise power that corrupts the received reflected signal. The noise sources are both the receive channel and the transmit channel used in measuring the radar system noise figure. The receive channel noise is directly added to the desired object reflected input signal, while the transmit channel noise corrupts the input signal mainly through electromagnetic coupling from the transmit antenna to the receive antenna and through strong reflections from nearby static objects.

[0069] Initially, a gain is determined for each of the receive channels (900), as described above with reference to the method of FIG. 6. The control module 228 then disables (902) the loopback path from the selected transmit channel, so that no signal from the transmit channel can reach the receive channel via this path, and no other transmit channels are enabled. The control module 228 also generates (903) a continuous wave (CW) test signal, e.g., RF=80 GHz, to be transmitted by the selected transmit channel. The CW test signal may be generated by setting the frequency of the local oscillator (LO) signal from the SYNTH 230 to 80 GHz and programming a shifter in the power amplifier chain of the selected transmit channel to add a frequency of 0 MHz to the LO signal.

[0070] The receive channels 202 receive the test signal as reflected from nearby static objects. The control module 228 collects 904 digital noise data from each of the receive channels for a few microseconds and calculates 906 the noise power of each receive channel based on the corresponding noise data. In some embodiments, the control module 228 collects the noise data signals from the output of the ADC in each receive channel 202. In other embodiments, the control module 228 collects the noise data signals from the output of the DFE 222. The calculation of the noise power for receive channel i is described above.

[0071] The control module 228 then calculates 908 the noise power spectral density (PSD) of the noise power of each receive channel. The calculated noise power includes the noise introduced by the selected transmit channel and receive channel. The noise PSD for receive channel i may be calculated as follows: NoisePSD i =10×log10( NoisePower i / IFBandwidth) where IFBandwidth is the bandwidth of the intermediate frequency (IF). The control module 228 then calculates (910) a radar system noise figure (RSNF) for each receive channel based on the corresponding noise PSD. Radar system noise figure RSNF for receive channel i i can be calculated as follows: R.S.N.F. i =NoisePSD i -Gain i

[0072] The radar system noise figure calculations 902-910 are repeated for the other transmit channels 911. Finally, the control module 228 reports the calculated radar system noise figures for each receive channel / transmit channel pair to the safety processor 912.

[0073] In the above method, the RF frequency used during collection of the ADC samples is substantially constant, i.e., it does not ramp as in normal FMCW radar operation. Thus, the received signals corresponding to reflections from objects at various distances all have substantially the same frequency, i.e., the same frequency as the aforementioned "RF". During normal operation in a typical FMCW radar, the frequency slope of the transmitted signal is non-zero, and the received signals corresponding to reflections from surrounding objects at various distances have a frequency equal to the RF plus a frequency proportional to the distance of the object. The power measured in the FFT of the ADC output includes the power of the reflected signal in addition to the radar system noise, which makes it difficult to distinguish between the power of the reflected signal and the radar system noise. In the above method, a constant RF with zero slope is used, which causes reflections from objects at various distances to occur at the same RF frequency. Also, the corresponding signals are highly attenuated by the high-pass filter in the receive channel, and the measured power at the output of the ADC closely matches the power of the radar system noise.

[0074] FIG. 10 is a flow chart of a method for determining a nonlinearity metric of a receive channel of a radar SOC 102. The method may be implemented in the example embodiment of FIG. 3 and the example embodiment of FIG. 5. The method may be implemented with any suitable RF and IF1 and IF2 frequencies. For example, for a 77-81 GHz radar, the RF may be 77, 79, or 81 GHz, and the IF1 and IF2 frequencies may be IF1=2 MHz, IF2=2.5 MHz. In describing the method, for illustrative purposes, RF=80 GHz, IF1=2 MHz, IF2=2.5 MHz are used. In some embodiments, the IF1 and IF2 frequency values ​​are selected to be m×IF1+n×IF2, where m is one or more of + / -1, + / -2, + / -3, . . . and n is one or more of + / -1, + / -2, + / -3, . . . and m and n are not integer multiples of IF1 or IF2.

[0075] An ideal receive channel produces a signal at the ADC output that is simply a scaled version of the received signal. Thus, if the LNA input signal is x, then the ADC output signal is k×x, where it has been downshifted in frequency from RF to IF. Such an ideal receive channel can be referred to as a linear receive channel. A non-ideal, or non-linear, receive channel produces k×x+k2×x2+k3×x3+··· at the ADC output. The effect of this non-linearity in an FMCW radar system is that instead of detecting an actual object reflection corresponding to the k×x term, the FMCW radar signal processor will mistakenly detect a missing object as being at a distance corresponding to k2×x2 and k3×x3. Also, when multiple reflections are present, a linear receive channel produces k×x1+k×x2 at the ADC output. However, a non-linear receive channel will produce k×x1+k×x2 at the ADC output. 31 ×x1 3 ×x2 2etc., which causes the FMCW radar signal processor to erroneously detect a missing object as being present at a corresponding distance. The method determines a nonlinearity metric that the safety processor can compare to a threshold to detect corruption / faults in the receive channel.

[0076] The presented method deals with the calculation of a nonlinearity metric for a single receive channel. The method can be repeated to calculate the nonlinearity metric for other receive channels. Alternatively, in some embodiments, the nonlinearity metric is calculated for all receive channels based on a single transmission of a two-tone test signal, i.e., a two-tone test data signal is collected from each of the receive channels and a nonlinearity metric is calculated for each receive channel.

[0077] As shown in Figure 10, initially the control module 228 configures (1000) a test path (loopback path) from the transmit channel 204 to the receive channel 202. In the example SOC 102 of Figure 3, the loopback path of the transmit channel includes the PPA and shifter of the transmit channel, the combiner 318, and the splitter 320. In the example SOC 102 of Figure 5, the loopback path also includes the LB combiner 502. The control module 228 also frequency shifts the shifter of one transmit channel by the IF1 frequency and frequency shifts the shifter of the other transmit channel by the IF2 frequency.

[0078] The control module 228 also generates (1002) an 80 GHz two-tone continuous wave (CW) test signal that passes through the enabled test paths of the transmit channels to the receive channels 202. The two-tone CW test signal may be generated by setting the frequency of the local oscillator (LO) signal from the SYNTH 230 to 80 GHz. The shifter programmed to frequency shift by the IF1 frequency propagates a signal at 80 GHz+IF1, and the shifter programmed to frequency shift by IF2 propagates a signal at 80 GHz+IF2, thus providing a two-tone test signal at the LNA input of the selected receive channel.

[0079] The control module 228 then collects a digital two-tone test data signal from one of the receive channels. In some embodiments, the control module 228 collects the test signal from the output of the ADC in the receive channel. In other embodiments, the control module 228 collects the test signal from the output of the DFE 222.

[0080] The control module 228 then calculates (1006) a nonlinearity metric for the receive channel based on the received two-tone test data signal. To calculate the nonlinearity metric, the control module performs an FFT of the test data signal and calculates the magnitudes M1, M2, Mmn of the two tones in the FFT output at frequencies IF1, IF2, m×IF1+n×IF2, where m is one or more of + / -1, + / -2, + / -3, ... and n is one or more of + / -1, + / -2, + / -3, .... This FFT may be performed as follows: For ease of explanation, assume that Ns samples of ADC data are collected at a sampling rate Fs, e.g., Ns=1024 and Fs=10.24 MHz, and an Ns-point FFT is performed to generate Ns FFT output complex samples, referred to as FFTOut[0,1,2,...,Ns-1]. The FFT output sample indices {indx1, indx2, indxmn} corresponding to the frequencies {IF1, IF2, m×IF1+n×IF2} are given by {IF1 / Fs×Ns, IF2 / Fs×Ns, (m×IF1+n×IF2) / Fs×Ns}. The value of FFTOut[indxi] is a complex number denoted by (X+jY). The magnitude M of this number is given by M=sqrt(X 2 +Y 2 ) / Ns. Therefore, we can find the values ​​of M1, M2, and Mmn corresponding to each index indx1, indx2, indxmn.

[0081] M1 and M2 correspond to two tones x1 and x2 provided to the receive channel at frequencies RF+IF1 and RF+IF2, and Mmn corresponds to the intermodulation products kmn x1m x2n created by the nonlinear receive channel. The values ​​of M1 and M2 are also significant. In an ideal receiver, the value of Mmn is close to zero, since an ideal receive channel would not produce intermodulation products. However, in a nonlinear receive channel, the value of Mmn may not be zero and may be several orders of magnitude smaller than M1 and M2. The smaller the value of Mmn, the better the receive channel performs.

[0082] Given M1, M2, and Mmn, the control module 228 calculates M1_dB=20×log10(M1), M2_dB=20×log10(M2), Mmn_dB=20×log10(Mmn) to convert these values ​​to decibels. Using the resulting converted values, the control module 228 calculates values ​​for the nonlinearity metrics (NM) and reports these metric values ​​to the safety processor (1008). Examples of two nonlinearity metrics that may be calculated are: NM1=M1_dB+0.5×M2_dB-0.5×M12_dB NM2 = M1_dB + M2_dB - M11_dB Other nonlinearity metrics can be similarly calculated as weighted sums of M1_dB, M2_dB, Mmn_dB, or the product of M1, M2, Mmn. If the value of Mmn is significantly lower than the values ​​of M1 and M2, then the value of NMi is high, and thus a low value of NMi indicates high intermodulation products in the receive channel.

[0083] By generating the two tones x1 and x2 from two different transmit channels, the intermodulation products created by the receive channels (operating on the combined signal k1 x1 + k2 x2) can be distinguished from any additional tones caused by nonlinearities in the individual transmit channels (each operating on only one of the two signals x1 and x2). 2 , x1 3 , x1 4 , . . . , and a corresponding additional term for x2 at the signal input to the receive channel. The method avoids corruption of the intermodulation products A by ensuring that their frequencies do not coincide with the frequencies of these terms.

[0084] The method of FIG. 10 assumes two transmit channels and a two-tone test signal for simplicity of explanation. The method can be extended to use more than two transmit channels, with each transmit channel programmed to generate a different frequency shift, i.e., IF1, IF2, IF3, .... The FFT indices corresponding to the multi-tone intermodulation products are observed to calculate the nonlinearity metric. The values ​​selected for IF1, IF2, IF3, ... to mitigate nonlinearity in the transmit channels should be such that no multiple of IF1, IF2, IF3, ... coincides with the frequency of the intermodulation product, m x IF1 + n x IF2 + p x IF3, where m, n, p are integers 0, + / -1, + / -2, ....

[0085] In another embodiment of the method of FIG. 10, the outputs of the shifters 304 and 314 are configured to reach the respective LNAs of the receive channels via different paths. For example, the output of the shifter 304 can be configured to reach the LNAs of the receive channels via the combiner 318 and the LB combiner 502 with the PA 306 disabled, and the output of the shifter 314 can be configured to be transmitted via the PA 316 and the corresponding antenna. This latter signal reaches the LNAs of the receive channels via reflections from external objects, such as a vehicle or radar chassis, and / or electromagnetic coupling from the transmit antenna to the receive antenna. Also, the IF frequency of the shifter 314 is programmed, for example, to 10 KHz, as well as a frequency offset corresponding to nearby strong reflections from external objects and / or electromagnetic coupling observed during normal FMCW radar operation, and the IF frequency of the shifter 304 is programmed, for example, to several MHz, corresponding to objects at medium reflection strength and medium distance.

[0086] In this embodiment, the tones through the external antenna path have a much higher amplitude than the tones achievable through the on-chip loopback path, and may better mimic the strength of the signals during actual radar operation. Also, when only one of the PAs is enabled, the strength of any undesirable intermodulation products generated by the transmit circuitry and loopback path is reduced, thus improving detection and estimation of intermodulation products generated by the receive channel.

[0087] In another embodiment of the method of FIG. 10, the outputs of the shifters 304 and 314 can be configured to be transmitted through the respective PAs and antennas. The transmitted signals reach the LNA of the receive channel via reflections from external objects, such as a vehicle or radar chassis, and / or electromagnetic coupling from the transmit antenna to the receive antenna. The IF frequency of the shifter 314 is programmed to, for example, 10 KHz, as well as a frequency offset corresponding to strong nearby reflections from external objects and / or electromagnetic coupling observed during normal FMCW radar operation, and the IF frequency of the shifter 304 is programmed to, for example, several MHz, corresponding to medium reflection strength and objects at medium distances. The output power of the PA 306 is kept high so that the magnitude of the reflected signal received by the LNA is similar to that of strong nearby reflections from external objects and / or electromagnetic coupling observed during normal FMCW radar operation, and the output power of the PA 316 is kept high so that the magnitude of the reflected signal reaching the LNA is similar to that of objects at medium reflection strength and medium distances.

[0088] While the present disclosure has been described with respect to a limited number of embodiments, other embodiments may be devised that are within the scope of the present disclosure.

[0089] For example, embodiments have been described herein in which the processing of signals to determine parameter values ​​is performed in a control module on the radar SOC, in some embodiments some or all of the signal processing is performed outside the SOC, for example, by a processing unit or by an external MCU.

[0090] In another example, embodiments have been described herein in which the safety processor is external to the radar SOC. In some embodiments, the safety processor is part of the radar SOC, for example, a control processor or another processor on the SOC.

[0091] In another example, an embodiment has been described herein in which an LO signal output by a SYNTH is provided to a PPA in a transmit channel and to a mixer in a receive channel. Some embodiments use an LO distribution network. In general, the LO distribution network is a tree of cells that communicate the LO signal to the mixers of the receive channels and the shifters of the transmit channels. For example, the cells can be wires, or amplifiers such as PPAs, or frequency multipliers, or frequency dividers.

[0092] In another example, a clock multiplier is used. In some embodiments, a multiplier is not needed because the SYNTH runs at the LO frequency rather than a lower frequency.

[0093] In another example, embodiments have been described herein in which the transmit signal generating circuitry is assumed to include a radio frequency synthesizer. In some embodiments, this circuitry includes an open loop oscillator (radio frequency oscillator), as well as a digital-to-analog converter (DAC) or other suitable transmit signal generating circuitry.

[0094] In another example, a method embodiment has been described herein in which the noise power spectral density (PSD) is calculated. In some embodiments, an alternative to the above formula for calculating the noise PSD is used to calculate the noise PSD. The noise PSD in any frequency band can be calculated using the FFT output corresponding to that frequency band and using the difference between the upper and lower frequency limits of that frequency band as the "IFBandwidth" in the above formula. This is useful when the noise PSD is expected to be different in different frequency bands.

[0095] In another example, the noise figure NF for the receive channel i i Method embodiments have been described herein in which the noise figure is calculated with respect to the gain of the receive channel. In some embodiments, the noise figure is determined without regard to the gain in the receive channel, i.e., NF i =NoisePSD i

[0096] In another example, the radar system noise figure RSNF for receive channel i i Method embodiments have been described herein in which R is calculated with respect to the gain of the receive channel. In some embodiments, the radar system noise figure is determined without regard to the gain in the receive channel, i.e., R.S.N.F. i =NoisePSD i

[0097] In another example, embodiments have been described herein with reference to an example FMCW radar SOC, some embodiments are for other types of radar, such as constant frequency, stepped frequency, and triangular frequency radar.

[0098] In another example, the radar SOC periodically and automatically operates in a test mode to monitor one or more of the performance parameters. In some such embodiments, the radar SOC may operate in a normal mode for a fixed period of time to transmit and receive frames of chirps. During the time period between frames, the radar SOC automatically operates in a test mode to monitor one or more of the performance parameters. For example, operation in normal mode may occur for 100 microseconds and operation in test mode may occur for 80 microseconds, repeated once every 500 microseconds. In another example, the durations may be 5 milliseconds, 3 milliseconds, and 40 milliseconds, respectively.

[0099] In another example, embodiments have been described herein that assume there are multiple transmit channels. Some embodiments have a single transmit channel or use only one transmit channel. In such embodiments, a combiner may or may not be present. If the combiner is coupled to a single transmit channel, the output signal of the combiner is the input signal of the combiner. In such embodiments, one or more performance parameters may be calculated, such as receive channel gain, receive channel phase, gain and phase mismatch between receive channels, receive channel noise figure, and radar system noise figure.

[0100] In another example, embodiments have been described herein that assume there are multiple receive channels. Some embodiments have a single receive channel or use only one receive channel. In such embodiments, a splitter may or may not be present. If a splitter is present, the splitter output is only coupled to the single receive channel. In such embodiments, one or more performance parameters can be calculated, such as transmit channel gain, transmit channel phase, gain and phase mismatch between transmit channels, transmit channel noise figure, and radar system noise figure.

[0101] In another example, embodiments have been described herein in which all receive channels are coupled to a splitter and all transmit channels are coupled to at least one combiner. In some embodiments, a subset of the receive channels are coupled to a splitter and / or a subset of the transmit channels are coupled to at least one combiner. In such embodiments, one or more of the methods described for determining the performance parameters may be implemented.

[0102] Although the method steps may be presented and described herein sequentially, one or more of the steps illustrated and described herein may be performed simultaneously, combined, and / or performed in a different order than illustrated and / or described herein. Thus, the embodiments are not limited to the particular order of steps illustrated and / or described herein.

[0103] Components in a radar system may be referred to differently and / or combined in ways not shown herein without departing from the described functionality. The term "couple" and its derivatives are intended to mean an indirect, direct, optical, and / or wireless electrical connection. For example, if a first device couples to a second device, the connection may be through a direct electrical connection, through an indirect electrical connection through other devices and connections, through an optical electrical connection, and / or through a wireless electrical connection.

[0104] Modifications in the described embodiments are possible, and other embodiments are possible, within the scope of the claims.

Claims

1. 1. A radar system-on-chip (SOC), comprising: a transmit generating circuit element operable to generate a signal when the radar SOC is operating in a test mode; a plurality of transmit channels coupled to the transmit generation circuitry, a transmit channel of the plurality of transmit channels coupled to the transmit generation circuitry to receive the signal, the transmit channel including a programmable shifter operable to add a non-zero frequency to a continuous wave signal to generate a test signal, the transmit channel operable to transmit the test signal based on the signal via a transmit antenna; a plurality of receive channels, each operable to receive the test signal via a receive antenna, the received test signal being a test signal reflected from a nearby stationary object or a test signal via electromagnetic coupling from the transmit antenna to the receive antenna; a control module coupled to the plurality of receive channels, the control module operable to calculate a difference between the plurality of receive channels using the received test signal; Including, an output of the programmable shifter is coupled to an input of a first receive channel of the plurality of receive channels via a loopback path; A radar system-on-chip (SOC), wherein the loopback path is operable to provide the test signal to the first receive channel.

2. 2. A radar system-on-chip (SOC) as claimed in claim 1, comprising: an output of the programmable shifter is coupled to an input of a second receive channel of the plurality of receive channels via the loopback path; the loopback path is operable to provide the test signal to the first receive channel and to the second receive channel; a radar system-on-chip (SOC) wherein the control module is further operable to calculate a difference between the first receive channel and the second receive channel, the difference being selected from the group consisting of: a gain mismatch between the first receive channel and the second receive channel, and a phase mismatch between the first receive channel and the second receive channel.

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