CONTROLLER, DISTORTION COMPENSATION DEVICE, COMMUNICATION DEVICE, AND METHOD FOR CONDITIONING INPUT SIGNAL FOR DISTORTION COMPENSATION - Patent application

Abstract

To enable relaxing the operation speed in distortion compensation.SOLUTION: A controller disclosed herein for an adjustor that adjusts an input signal for amplifier predistortion includes: a determiner that determines a target interval corresponding to power of the input signal among the set intervals; and a generator that produces a control signal. The adjuster is configured to adjust at least one of amplitude and phase of the input signal. Each of the plurality of intervals is associated with an adjustment amount of at least one of the amplitude and phase of the input signal. The generator generates, as the control signal, a signal indicating the adjustment amount associated with the target interval, and provides the control signal to the adjuster.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a controller, a distortion compensation device, a communicator, and a method for conditioning an input signal for distortion compensation. [Background technology]

[0002] A signal amplifier generates distortion in the signal. Therefore, distortion compensation is required to compensate for the distortion of the amplifier. Patent Document 1 and Non-Patent Document 1 disclose amplifier pre-distortion. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] US Patent Application Publication No. 2011 / 0032033 [Non-patent literature]

[0004] [Non-Patent Document 1] Karan Gumber et al. “A Modified Hybrid RF Predistorter Linearizer for Ultra Wideband 5G Systems”, IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, VOL. 7, NO. 4, DECEMBER 2017, pp.547-557 Summary of the Invention [Problem to be solved by the invention]

[0005] When an amplifier is operated at high efficiency, the distortion (unwanted radiation signal) of the amplifier spreads over a band three to five times the signal bandwidth. Conventional distortion compensation devices cancel out the distortion signal by generating an inverse signal (anti-distortion) of the distortion component. Therefore, the anti-distortion also needs to have a wide bandwidth of three to five times the signal bandwidth. In order to generate wideband anti-distortion, conventional distortion compensation devices need to operate at high speed.

[0006] Moreover, because signal bandwidths are expanding with the increasing speed of wireless communication, there is a need for even faster distortion compensation devices. For example, the signal bandwidth in a fourth-generation mobile communication system (4G) is 20 MHz at maximum, and the signal bandwidth in a fifth-generation mobile communication system (5G) is 400 MHz at maximum.

[0007] Furthermore, in the sixth generation mobile communication system (6G), the signal bandwidth is expected to exceed 1 GHz. A distortion compensation device compatible with the sixth generation mobile communication system (6G) is required to operate at extremely high speeds so as to perform distortion compensation over an ultra-wideband that is three to five times the signal bandwidth of over 1 GHz.

[0008] As described above, distortion compensation using reverse distortion requires high-speed operation at approximately three to five times the signal bandwidth, which poses the problem that ultra-high-speed operation is required to support ultra-wideband.

[0009] Therefore, a technique that enables relaxation of the operating speed in distortion compensation is desired. [Means for solving the problem]

[0010] One aspect of the present disclosure is a controller for an adjuster that adjusts an input signal for pre-distortion compensation of an amplifier. The disclosed controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal, the adjuster is configured to adjust at least one of the amplitude and phase of the input signal, and each of the plurality of sections is associated with an adjustment amount of at least one of the amplitude and phase of the input signal, and the generator generates a signal indicating the adjustment amount associated with the target section as the control signal and provides the control signal to the adjuster.

[0011] Another aspect of the present disclosure is a distortion compensation device. The disclosed distortion compensation device includes an adjuster including a first adjustment unit that adjusts at least one of the amplitude and phase of an input signal, and a controller, the controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal, each of the plurality of sections being associated with an adjustment amount of at least one of the amplitude and phase of the input signal, the generator generates a signal indicating the adjustment amount associated with the target section as the control signal, and provides the control signal to the first adjustment unit.

[0012] Another aspect of the present disclosure is a communication device. The communication device includes an amplifier and a distortion compensation device that compensates for distortion of the amplifier, the distortion compensation device includes an adjuster that adjusts at least one of the amplitude and phase of an input signal, and a controller, the controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal, each of the plurality of sections being associated with an adjustment amount of at least one of the amplitude and phase of the input signal, the generator generates a signal indicating the adjustment amount associated with the target section as the control signal, and provides the control signal to the adjuster.

[0013] Another aspect of the present disclosure is a method for adjusting an input signal for distortion compensation of an amplifier, comprising: determining a target section corresponding to a power of the input signal from among a plurality of set sections; and generating a control signal for adjusting at least one of an amplitude and a phase of the input signal, wherein an adjustment amount of at least one of the amplitude and the phase of the input signal is associated with each of the plurality of sections, and the control signal is generated as a signal indicating the adjustment amount associated with the target section. Effect of the Invention

[0014] According to the present disclosure, it is possible to relax the operating speed in distortion compensation. [Brief description of the drawings]

[0015] [Figure 1] FIG. 1 is a configuration diagram of a communication device. [Diagram 2] FIG. 2 is a configuration diagram of the distortion compensation circuit. [Diagram 3] FIG. 3 is a configuration diagram of a distortion compensation device. [Figure 4] FIG. 4 is a configuration diagram of a distortion compensation device. [Diagram 5] FIG. 5 is a circuit diagram of the controller. [Figure 6] FIG. 6 is a diagram showing the compensation characteristics of the gain. [Figure 7] FIG. 7 is a diagram showing phase compensation characteristics. [Figure 8] FIG. 8 is a diagram showing the gain characteristics of the amplifier. [Figure 9] FIG. 9 is a diagram showing the phase characteristics of the amplifier. [Figure 10] Figure 10 shows the controller circuit. [Figure 11] FIG. 11 is a circuit diagram of the controller. [Figure 12] FIG. 12 is a configuration diagram of a distortion compensation device. [Figure 13] FIG. 13 is a configuration diagram showing a modified example of a communication device. [Figure 14]FIG. 14 is a configuration diagram showing a modified example of a communication device. [Figure 15] FIG. 15 is a configuration diagram showing a modified example of a communication device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] [Description of the embodiments of the present disclosure]

[0017] (1) A controller according to an embodiment is a controller for an adjuster that adjusts an input signal for pre-distortion compensation of an amplifier. The controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal. The adjuster is configured to adjust at least one of the amplitude and phase of the input signal, and each of the plurality of sections is associated with an adjustment amount of at least one of the amplitude and phase of the input signal, and the generator generates a signal indicating the adjustment amount associated with the target section as the control signal and provides the control signal to the adjuster. In this case, it is possible to relax the operating speed in distortion compensation.

[0018] (2) It is preferable that the lengths of the multiple sections are not the same. In this case, the lengths of the multiple sections do not have to be the same.

[0019] (3) It is preferable that the determiner includes a comparator provided corresponding to each of a plurality of reference values ​​that define a plurality of intervals, the comparator provided corresponding to each of the plurality of reference values ​​is configured to compare the reference value with the input power, and the generator determines the adjustment amount corresponding to the target interval based on a comparison result by the comparator. In this case, the plurality of intervals can be easily determined.

[0020] (4) The determiner is configured to be able to switch between a first mode for a first amplifier having a first characteristic and a second mode for a second amplifier having a second characteristic different from the first characteristic, and it is preferable that in the first mode, the multiple sections are set according to the first characteristic, and in the second mode, the multiple sections are set according to the second characteristic. In this case, it is possible to handle amplifiers having different characteristics.

[0021] (5) It is preferable that the first characteristic is a characteristic in which the gain or phase of the input signal changes monotonically with respect to the power of the input signal, and the second characteristic is a characteristic in which the gain or phase of the input signal changes monotonically with respect to the power of the input signal, in which case either a monotonically changing characteristic or a characteristic having an extreme value can be handled.

[0022] (6) The adjuster includes a first adjuster to which a first input signal is input and adjusts at least one of the amplitude and phase of the first signal, and a second adjuster to which a second input signal that is delayed or advanced from the first input signal is input and adjusts at least one of the amplitude and phase of the second signal, the controller includes a first controller and a second controller, each of the first controller and the second controller includes the determiner and the generator, and it is preferable that the determiner of the first controller determines a target section corresponding to the power of the first input signal as the input signal among a plurality of set sections, and the determiner of the second controller determines a target section corresponding to the power of the second input signal as the input signal among a plurality of set sections. In this case, the memory effect of the amplifier is compensated.

[0023] (7) It is preferable that the plurality of sections are adjustable, so that it is possible to respond to changes in the characteristics of the amplifier.

[0024] (8) It is preferable that the input signal is a wireless signal, and the power value of the input signal is obtained from outside the controller. In this case, the power value of the input signal can be easily obtained.

[0025] (9) It is preferable that the difference between the maximum and minimum values ​​of the plurality of reference values ​​defining the plurality of sections is 50 dB or less. In this case, the plurality of sections are set within appropriate ranges.

[0026] (10) The determiner preferably includes a first determiner for determining a first target section corresponding to the power of the input signal among a plurality of first sections set for amplitude adjustment, and a second determiner for determining a second target section corresponding to the power of the input signal among a plurality of second sections set for phase adjustment, wherein an amplitude adjustment amount of the input signal is associated with each of the plurality of first sections, and a phase adjustment amount of the input signal is associated with each of the plurality of second sections, and the generator preferably includes a first generator for generating an amplitude control signal indicating the amplitude adjustment amount associated with the first target section as the control signal, and a second generator for generating a phase control signal indicating the phase adjustment amount associated with the second target section as the control signal. In this case, both the amplitude and the phase are adjusted.

[0027] (11) A distortion compensation device according to an embodiment includes an adjuster including a first adjustment unit that adjusts at least one of the amplitude and phase of an input signal, and a controller. The controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal. An adjustment amount of at least one of the amplitude and phase of the input signal is associated with each of the plurality of sections, and the generator generates a signal indicating the adjustment amount associated with the target section as the control signal and provides the control signal to the first adjustment unit. In this case, it is possible to reduce the operating speed in distortion compensation.

[0028] (12) A communication device according to an embodiment includes an amplifier and a distortion compensation device that compensates for distortion of the amplifier. The distortion compensation device includes an adjuster that adjusts at least one of the amplitude and phase of an input signal, and a controller, and the controller includes a determiner that determines a target section corresponding to the power of the input signal from among a plurality of set sections, and a generator that generates a control signal. An adjustment amount of at least one of the amplitude and phase of the input signal is associated with each of the plurality of sections, and the generator generates a signal indicating the adjustment amount associated with the target section as the control signal and provides the control signal to the adjuster. In this case, it is possible to relax the operating speed in distortion compensation.

[0029] (13) A method according to an embodiment is a method for adjusting an input signal for distortion compensation of an amplifier, comprising determining a target section corresponding to a power of the input signal from among a plurality of set sections; and generating a control signal for adjusting at least one of the amplitude and phase of the input signal. An adjustment amount of at least one of the amplitude and phase of the input signal is associated with each of the multiple sections, and the control signal is generated as a signal indicating the adjustment amount associated with the target section. In this case, it is possible to relax the operating speed in distortion compensation.

[0030] [Details of the embodiment of the present disclosure]

[0031] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In addition, the same or corresponding parts in the drawings are given the same reference numerals, and the description thereof will not be repeated. In addition, at least some of the embodiments described below may be arbitrarily combined. FIG. 1 shows a communication device 10 according to an embodiment. The communication device 10 is for wireless communication and is used, for example, as a base station or a user terminal in a mobile communication system. The user terminal performs wireless communication with the base station. The mobile communication system is preferably a fifth-generation or later generation communication system, for example, a sixth-generation mobile communication system.

[0032] The communication device 10 preferably communicates using millimeter waves, submillimeter waves, or frequencies with wavelengths shorter than submillimeter waves. These frequency bands have large transmission capacity and enable high-speed communication. Millimeter waves have wavelengths of approximately 10 mm to 1 mm. Millimeter waves have frequencies of approximately 30 GHz to 300 GHz. Submillimeter waves have wavelengths of approximately 1 mm to 0.1 mm. Submillimeter waves have frequencies of approximately 300 GHz to 3 THz. Note that which frequency band (millimeter waves, submillimeter waves, etc.) the communication device 10 uses is determined according to the definition or usage of the frequency band (millimeter waves, submillimeter waves, etc.) in the communication standard to which the communication device 10 complies.

[0033] A communication device 10 shown in Fig. 1 includes a distortion compensation circuit 12 and an amplifier 13. The distortion compensation circuit 12 compensates for distortion of the amplifier 13. The distortion of the amplifier 13 is represented by, for example, the AM-AM characteristic and the AM-PM characteristic of the amplifier. The AM-AM characteristic is a characteristic that indicates the output power (AM-AM) relative to the input power of the amplifier 13. The AM-PM characteristic is a characteristic that indicates the passing phase (AM-PM) relative to the input power of the amplifier 13.

[0034] The distortion compensation circuit 12 shown in Fig. 1 is a circuit for pre-distortion compensation. The distortion compensation circuit 12 outputs a pre-distortion-compensated signal and provides it to the amplifier 13. The pre-distortion-compensated signal is called a distortion compensation signal. The distortion compensation signal is a signal whose amplitude or phase has been adjusted in advance in consideration of the distortion occurring in the amplifier 13. The amplifier 13 amplifies and outputs the distortion compensation signal. The signal output from the amplifier 13 is transmitted from an antenna 14 as a wireless signal.

[0035] The communication device 10 shown in FIG. 1 further includes a baseband circuit 11. The baseband circuit 11 is a circuit that handles a baseband signal for a radio signal. The baseband circuit 11 is a digital circuit that handles a digital signal. The baseband circuit 11 outputs a baseband signal to the distortion compensation circuit 12. The baseband signal includes a baseband_I signal and a baseband_Q signal. The baseband signal provided to the distortion compensation circuit 12 is a digital signal. Hereinafter, the baseband signal provided to the distortion compensation circuit 12 is also referred to as a "pre-distortion compensation signal." The distortion compensation circuit 12 pre-distorts the pre-distortion compensation signal to generate a distortion compensation signal.

[0036] The distortion compensation circuit 12 includes an I signal terminal 12A to which a baseband_I signal is input, and a Q signal terminal 12B to which a baseband_Q signal is input. The I signal terminal 12A is connected to the baseband circuit 11 via a first baseband signal path 21. The Q signal terminal 12B is connected to the baseband circuit 11 via a second baseband signal path 22. The distortion compensation circuit 12 also includes an output terminal 12C for outputting a distortion compensation signal. The output terminal 12C is connected to the amplifier 13.

[0037] The baseband circuit 11 also functions as a control unit for the distortion compensation circuit 12 or the distortion compensation device 100 described below. The baseband circuit 11 as a control unit generates a power value of a pre-distortion compensation signal and provides it to the distortion compensation circuit 12. The power value provided to the distortion compensation circuit 12 is a digital signal. The power value indicates signal power (instantaneous power) that changes from moment to moment. The instantaneous power is power at a certain moment. The distortion compensation circuit 12 has a power value terminal 12D to which the power value is input. The power value terminal 12D is connected to the baseband circuit 11 via a power value path 23.

[0038] The distortion compensation circuit 12 or a distortion compensation device 100 described later is configured to acquire a power value from the baseband circuit 11, which is a control unit, and thus advantageously does not need to include a detector for detecting a power value from a signal input to the distortion compensation device 100. Note that the distortion compensation circuit 12 or a distortion compensation device 100 described later may include a detector for detecting a power value from a signal input to the distortion compensation device 100.

[0039] The baseband circuit 11 as a control unit controls a reference value V PD* and provides it to the distortion compensation circuit 12 or the distortion compensation device 100 described later. PD* The reference value terminal 12E is connected to the baseband circuit 11 via a reference value path 25. The baseband circuit 11 receives a reference value V PD* In order to determine the reference value V for the power section, the output signal of the amplifier 13 is acquired as a learning monitor signal via a learning monitor path 24. The learning monitor path 24 extends from the output side of the amplifier 13 and is connected to the baseband circuit 11. PD* The method for determining this will be described later.

[0040] As shown in FIG. 2, the distortion compensation circuit 12 includes a distortion compensation device 100 for pre-distortion compensation. The distortion compensation circuit 12 also includes digital / analog converters 401, 402 (DACs 401, 402) for converting a digital baseband signal input to the distortion compensation circuit 12 into an analog baseband signal. The distortion compensation circuit 12 also includes a quadrature modulator 410 that performs quadrature modulation on the analog baseband signal output from the DACs 401, 402. The quadrature modulator 410 generates a quadrature modulated signal from the baseband signal. In the embodiment, the quadrature modulated signal is provided to the distortion compensation device 100 as an input signal to the distortion compensation device 100. The distortion compensation device 100 performs analog pre-distortion compensation on the input signal to generate a distortion compensation signal. The distortion compensation signal is provided to the amplifier 13.

[0041] The distortion compensation circuit 12 includes a digital / analog converter 403 for converting a digital power value input to the distortion compensation circuit 12 into an analog power value. The analog power value is provided to the distortion compensation device 100 for distortion compensation. In addition, the reference value V PD* is provided to the distortion compensation device 100 for distortion compensation.

[0042] Here, the distortion of the amplifier 13 spreads over a wide band that is three to five times the bandwidth BW of the radio signal. In general, to compensate for distortion that spreads over five times the bandwidth BW, the signal before distortion compensation must also have a band five times the bandwidth of the radio signal. In this case, the DACs 401 and 402 that perform digital-to-analog conversion of the digital baseband signal before distortion compensation must operate at a high speed of 5×BW [Msps].

[0043] However, in this embodiment, as described later, the operating speed in distortion compensation is relaxed, so that the DACs 401 and 402 may operate at an operating speed (BW [Msps]) according to the bandwidth BW of the radio signal. The operating speed of the DAC 403 may also operate at an operating speed (BW [Msps]) according to the bandwidth BW of the radio signal. Therefore, the operating speed of the baseband circuit 11 can also be relaxed. The relaxed operating speed also reduces power consumption.

[0044] The distortion compensation device 100 shown in Fig. 2 includes a controller 200 and an adjuster 300. The distortion compensation device 100 according to the embodiment is an analog predistortion compensation device. The adjuster 300 adjusts an input signal in an analog manner for predistortion compensation of an amplifier. The controller 200 is for the adjuster 300 and controls the adjustment amount in the adjuster 300.

[0045] The adjuster 300 is configured to adjust at least one of the amplitude and phase of an analog input signal input to the distortion compensation device 100. A distortion compensation signal is generated by adjusting at least one of the amplitude and phase of the input signal. The distortion compensation device shown in FIG. 2 is capable of adjusting both the amplitude and phase. The adjuster 300 includes a variable resistor 310 (amplitude adjuster 310) for adjusting the amplitude, and a variable phase shifter 320 (phase adjuster 320) for adjusting the phase.

[0046] The controller 200 generates a control signal to be provided to the adjuster 300 in order to adjust at least one of the amplitude and phase of the input signal. The controller 200 uses a power value to generate the control signal. That is, the controller 200 determines the amount of adjustment of the amplitude or phase according to the power value of the input signal. The controller 200 also uses a reference value V PD* Also used is the reference value V PD* is, for example, a reference value V for determining the amount of amplitude adjustment. AM,PD* and the reference value V for determining the amount of phase adjustment. PM,PD* The reference value V for determining the amount of amplitude adjustment AM,PD* and the reference value V for determining the amount of phase adjustment. PM,PD* and are different from each other.

[0047] As shown in Fig. 3, the controller 200 includes a determiner 210 and a generator 250. In addition, the controller 200 has preset adjustment amounts 270 corresponding to each of a plurality of power intervals D0, D1, D2, D3, and D4, which will be described later. In the embodiment, the set adjustment amounts 270 may include an amplitude adjustment amount and a phase adjustment amount. The correspondence between the power intervals and the adjustment amounts will also be described later. The amplitude adjustment amount and the phase adjustment amount are different from each other.

[0048] The determiner 210 determines which of the multiple power intervals is the target interval that corresponds to the input power value (the power of the input signal). In this determination, one of the multiple power intervals is selected as the target interval. The generator 250 generates a control signal V AM,ctrl ,V PM,cos,ctrl ,V PM,sin,ctrl The control signal is an amplitude control signal V AM,ctrl and the phase control signal V given to the variable phase shifter 320. PM,cos,ctrl ,V PM,sin,ctrl The variable resistor 310 is responsive to a given amplitude control signal V ctrl_A The resistance changes in response to the input signal, thereby adjusting the amplitude of the input signal. This compensates and linearizes the gain characteristic of the amplifier 13. The variable phase shifter 320 adjusts the amplitude of the input signal in response to the input phase control signal V PM,cos,ctrl ,V PM,sin,ctrl The phase of the input signal is adjusted by changing the passing phase according to the input signal, thereby compensating and linearizing the phase characteristic of the amplifier 13.

[0049] 4 shows an example of the variable resistor 310 and the variable phase shifter 320. The variable resistor 310 is, for example, a variable voltage resistor 310. The variable voltage resistor 310 is AM,ctrl The resistance value changes according to the voltage of the variable voltage resistor. The variable voltage resistor is, for example, a PIN diode PI Att. It is sufficient for the variable resistor 310 to be capable of operating at an operating speed according to the bandwidth BW of the wireless signal.

[0050] As shown in FIG. 4, the variable phase shifter 320 includes a plurality of λ / 4 transmission lines and two variable resistors 320A and 320B. Here, λ is a wavelength corresponding to the frequency of a radio signal (quadrature modulated signal). The plurality of λ / 4 transmission lines are intended to equally distribute and combine signals. Equal distribution resistors may be used instead of the λ / 4 transmission lines. The variable resistors 320A and 320B are, for example, variable voltage resistors 320A and 320B. The variable voltage resistor 320A is a resistor that is connected to a phase control signal V PM,cos,ctrl The resistance value of the variable voltage resistor 320B changes according to the voltage of the phase control signal VPM,sin,ctrl The resistance value of variable voltage resistors 320A, 320B changes depending on the voltage at the terminals 320. Changing the resistance values ​​of variable voltage resistors 320A, 320B changes the passing phase of variable phase shifter 320. It is sufficient for variable resistors 320A, 320B to be operable at an operating speed according to the bandwidth BW of the radio signal.

[0051] 4, the determiner 210 includes a first determiner 211 and a second determiner 212. The generator 250 of the controller according to the embodiment includes a first generator 251 and a second generator 252.

[0052] The first determiner 211 and the first generator 251 are for controlling the variable resistor 310. The first determiner 211 and the first generator 251 are collectively referred to as a first sub-controller 271 or an amplitude controller. The first sub-controller 271 linearizes the gain characteristic of the amplifier 13 through the control of the variable resistor 310. The first sub-controller 271 may be referred to as a gain linearization encoder.

[0053] The second determiner 212 and the second generator 252 are for controlling the variable resistor 320A and the variable resistor 320B. The second determiner 212 and the second generator 252 are collectively referred to as the second sub-controller 272 or the phase controller. The second sub-controller 272 linearizes the phase characteristic of the amplifier 13 through the control of the variable resistors 320A and 320B. The second sub-controller 272 may be called a phase linearization encoder.

[0054] As described above, the controller 200 according to the embodiment includes the first sub-controller 271 and the second sub-controller 272. The first sub-controller 271 and the second sub-controller 272 include determiners 211, 212 and generators 251, 252, respectively.

[0055] The first sub-controller 271 and the second sub-controller 272 each independently calculate a control signal V AM,ctrl ,V PM,cos,ctrl ,V PM,sin,ctrlThat is, the first sub-controller 271 generates a control signal V AM,ctrl The second sub-controller 272 generates a control signal V PM,cos,ctrl ,V PM,sin,ctrl Generate.

[0056] FIG. 5 shows an example of a circuit of the determiner 211 and the generator 251 for the first sub-controller 271. In FIG. 5, the reference voltage V AM,PD* and the adjustment voltage V AM,ATT* In the case of the circuit shown in FIG. 5, * is a natural number from 1 to 4. Here, the reference voltage V AM,PD* and the adjustment voltage V AM,ATT* For example, the larger the value of *, the larger the value of V AM,PD1 <V AM,PD2 <V AM,PD3 <V AM,PD4 Also, V AM,ATT1 <V AM,ATT2 <V AM,ATT3 <V AM,ATT4 However, this example is a case where the variable resistor 310 has a characteristic that the amount of attenuation by the variable resistor 310 increases as the voltage applied to the variable resistor 310 increases. If the variable resistor 310 has a characteristic that the amount of attenuation by the variable resistor 310 decreases as the voltage applied to the variable resistor 310 increases, the reference voltage V AM,PD* and the adjustment voltage V AM,ATT* The larger the value of *, the smaller the value should be. The same applies to the variable resistors 320A and 320B.

[0057] The first determiner 211 includes a plurality of comparators 281, 282, 283, and 284. Each of the comparators 281, 282, 283, and 284 determines a power value of an input signal (input power) and a reference voltage V AM,PD* Compare with the reference voltage V AM,PD* When compared with the reference voltage V, the magnitude of the power value of the input signal is indicated by the magnitude of the voltage. Hereinafter, the voltage indicating the magnitude of the power value of the input signal will be referred to as the input voltage. AM,PD*is provided by the baseband circuit 11 as described above.

[0058] Each of the comparators 281, 282, 283, and 284 provided in the decision unit 210 detects whether the magnitude of the voltage indicating the power value (input power) of the input signal is greater than or equal to the reference voltage V AM,PD* If it is greater than the reference voltage V AM,PD* If the comparison result is smaller than the reference value, the output signal is set to Low.

[0059] The output signals (High / Low) of the comparators 281, 282, 283, and 284 are provided to the generator 250. Based on the comparison results by the comparators 281, 282, 283, and 284, the generator 250 generates an adjustment voltage V AM,ATT* and the control signal V AM,ctrl Generate.

[0060] The generator 250 includes a plurality of switches 291, 292, 293, and 294. When the gate voltage of the switch 291 becomes High, the switch 291 turns ON and outputs the adjustment voltage V AM,ATT1 appears at the source. When the gate voltage of the switch 292 becomes high, the switch 292 turns on and the adjustment voltage V AM,ATT2 appears at the source. When the gate voltage of the switch 293 becomes high, it turns on and the adjustment voltage V AM,ATT3 appears at the source. When the gate voltage of the switch 294 becomes high, it turns on and the adjustment voltage V AM,ATT4 is configured to appear in the source.

[0061] The switches 291, 292, 293, and 294 are provided so that the outputs (comparison results) of the comparators 281, 282, 283, and 284 are provided to the gates. The number of the switches 291, 292, 293, and 294 corresponds to the number of the comparators 281, 282, 283, and 284.

[0062] The comparators 281, 282, 283, and 284 are connected to a reference voltage V AM,PD* In FIG. 5, for the sake of simplicity, four reference voltages V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 In response to the reference voltage V AM,PD* The number of the reference voltages V is preferably 30 or more, and more preferably 60 or more. AM,PD* The number of the reference voltage V is preferably 300 or less, more preferably 150 or less, and even more preferably 100 or less. AM,PD* The number may be, for example, 64.

[0063] For example, four reference voltages V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 The input power is divided into five sections by the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 The reference power corresponding to each is P(V AM,PD1 ),P(V AM,PD2 ),P(V AM,PD3 ),P(V AM,PD4 ) P is a function that converts voltage into power. That is, P(V AM,PD1 ) is the reference voltage V AM,PD1 is the reference power corresponding to P(V AM,PD2 ) is the reference voltage V AM,PD2 is the reference power corresponding to P(V AM,PD3 ) is the reference voltage V AM,PD3 is the reference power corresponding to P(V AM,PD4 ) is the reference voltage V AM,PD4 The reference power P(V AM,PD1 ),P(V AM,PD2 ),P(V AM,PD3 ),P(V AM,PD4) is a threshold value for dividing the range of values ​​that the power of the input signal (input power) can take into multiple power intervals D0, D1, D2, D3, and D4. P(V AM,PD4 ) and the minimum value (minimum power value) P(V AM,PD1 ) should preferably be 50 dB or less.

[0064] The five sections are, for example, AM,PD1 ), the input power is lower than P(V AM,PD1 ) and P(V AM,PD2 ), the input power is P(V AM,PD2 ) and P(V AM,PD3 ), the input power is P(V PD3 ) and P(V AM,PD4 ) and the input power is P(V AM,PD4 ) is higher than the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 are thresholds for defining the multiple sections D0, D1, D2, D3, and D4 by voltage (see FIG. 6). AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 These are voltage values ​​corresponding to the power values ​​indicating the boundaries of the five sections D0, D1, D2, D3, and D4.

[0065] The interval lengths of the multiple intervals D0, D1, D2, D3, and D4 do not need to be the same, and may be non-identical. The interval lengths of the multiple intervals D0, D1, D2, D3, and D4 being non-identical means that the interval lengths of the multiple intervals D0, D1, D2, D3, and D4 are not all the same, and it is sufficient that the interval length of at least one interval included in the multiple intervals D0, D1, D2, D3, and D4 is different from the interval length of any other interval included in the multiple intervals D0, D1, D2, D3, and D4.

[0066] In addition, the reference voltage V in the first sub-controller 271 for amplitude adjustmentAM,PD* and the reference voltage V in the second sub-controller 272 for phase adjustment. PM,PD* As shown in Fig. 7, the interval lengths of the multiple intervals D0, D1, D2, and D3 set are different between the first sub-controller 271 and the second sub-controller 272. The multiple intervals set in the first sub-controller 271 for amplitude adjustment are also referred to as multiple first intervals. Also, the multiple intervals set in the second sub-controller 272 for phase adjustment are also referred to as second intervals. Each of the multiple first intervals is associated with an amplitude adjustment amount of the input signal, and each of the multiple second intervals is associated with a phase adjustment amount of the input signal.

[0067] As shown in FIG. 6, regarding the gain adjustment by the first sub-controller 271, in the section D0, the adjustment amount voltage V AM,ATT0 is associated with section D1, and the regulated voltage V AM,ATT1 is associated with section D2, and the regulated voltage V AM,ATT2 is associated with section D3, and the regulated voltage V AM,ATT3 is associated with section D4, and the adjustment voltage V AM,ATT4 If the function that converts the voltage into gain is g, the gain adjusted by the adjustment voltage is g(V AM,PD* )

[0068] The regulated voltage V corresponding to the section D0 AM,ATT0 is for controlling the variable resistor 310 so that the gain of the amplifier 13 in the section D0 falls within an error range x1 [dB] centered on the target gain [dB].

[0069] The regulated voltage V associated with the section D1 AM,ATT1 is for controlling the variable resistor 310 so that the gain of the amplifier 13 in the section D1 falls within an error range x1 [dB] centered on the target gain [dB].

[0070] The adjustment voltage V associated with section D2 AM,ATT2is for controlling the variable resistor 310 so that the gain of the amplifier 13 in section D2 falls within an error range x1 [dB] centered on the target gain [dB].

[0071] The adjustment voltage V associated with section D3 AM,ATT3 is for controlling the variable resistor 310 so that the gain of the amplifier 13 in the section D3 falls within an error range x1 [dB] centered on the target gain [dB].

[0072] The adjustment voltage V corresponding to the section D4 AM,ATT4 is for controlling the variable resistor 310 so that the gain of the amplifier 13 in section D4 falls within an error range x1 [dB] centered on the target gain [dB].

[0073] As shown in FIG. 7, the phase adjustment by the second sub-controller 272 is performed by, for example, adjusting four reference voltages V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 The input power is divided into five sections by the reference voltage V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 The reference power corresponding to each is P(V PM,PD1 ),P(V PM,PD2 ),P(V PM,PD3 ),P(V PM,PD4 ) is expressed as

[0074] Regarding phase adjustment, each section has an adjustment voltage V PM,cos,ATT* ,V PM,sin,ATT* The adjustment voltage V PM,cos,ATT* is the first phase control signal V PM,cos,ctrl of It is used to determine the voltage V PM,sin,ATT* is the second phase control signal V PM,sin,ctrl If the function that converts voltage into phase as an argument is g, the gain adjusted by the adjustment voltage is g(V PM,cos,PD* ,V PM,sin,PD* ) The gain adjusted by the adjustment voltage is g(V AM,PD* )

[0075] The voltage regulation amount V V corresponding to each section PM,cos,ATT* ,V PM,sin,ATT* is for controlling the variable phase shifter 320 so that the phase of the amplifier 13 in each section falls within an error range x2 [degrees] centered at 0 [degrees].

[0076] General distortion compensation is analog distortion compensation that linearizes the nonlinear characteristics before distortion compensation as a whole, as shown in Fig. 8 and Fig. 9. In contrast, the distortion compensation of the embodiment is a nonlinear characteristic that linearizes the nonlinear characteristics by a single adjustment amount V ATT* Therefore, as shown in Figs. 6 and 7, in the distortion compensation of the embodiment, the nonlinear characteristic before distortion compensation is not linear overall, but has a jagged shape. However, the gain and phase are within the allowable error ranges x1 and x2. Therefore, the distortion compensation performance is equivalent to that of the distortion compensation shown in Figs. 8 and 9. In this way, while general distortion compensation is analog-like distortion compensation that is linearized overall, the distortion compensation of the embodiment is digital-like distortion compensation that is compensated for each section. In the embodiment, since compensation is performed for each section, rough control is sufficient, and the operating speed (bandwidth) for control is relaxed.

[0077] In FIG. 6, for the sake of explanation, sections D5, D6, D7, and D8 are shown, and the adjustment voltage V AM,ATT3 ,V AM,ATT2 ,V AM,ATT1 ,V AM,ATT0 In the description of FIG. 5, however, for the sake of simplicity, sections D5, D6, D7, and D8 are ignored. In the following, the adjustment voltage is an amplitude adjustment voltage. In FIG. 6, amplitude adjustment voltages V associated with a plurality of first sections D0, D1, D2, D3, and D4 in the case of amplitude adjustment (gain control) are AM,ATT0 ,V AM,ATT1 ,V AM,ATT2 ,V AM,ATT3 ,VAM,ATT4 is shown, but the phase adjustment voltage V PM,ATT0 ,V PM,ATT1 ,V PM,ATT2 ,V PM,ATT3 ,V PM,ATT4 Similarly, the second sections D0, D1, D2, D3, and D4 are associated with each other for phase adjustment.

[0078] As mentioned above, the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 is adaptively adjusted by the baseband circuit 11 during operation of the amplifier 13 based on the learning monitor signal. PM,PD* The same is true for the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 First, the baseband circuit 11 obtains a model of the amplifier 13 from the baseband signal that will become the wireless signal and the learning monitor signal. The model of the amplifier 13 is expressed, for example, by a polynomial. Coefficients included in the polynomial are determined from the baseband signal that will become the wireless signal and the learning monitor signal. Next, the baseband circuit 11 uses the model of the amplifier 13 to obtain gain characteristics (AM-AM) as shown in FIG. 7 and phase characteristics (AM-PM) as shown in FIG. 8.

[0079] Then, the baseband circuit 11 calculates the amplitude adjustment voltage V ATT0 The section D0 is adjusted by the amplitude adjustment voltage V ATT1 The section D1 is adjusted by the amplitude adjustment voltage V ATT2 The section D2, the amplitude adjustment amount voltage V ATT3 The section D3 is adjusted by the amplitude adjustment voltage V ATT4The section D4 to be adjusted is determined by the above, and a reference power P [dB] that is a threshold value for dividing each section D0, D1, D2, D3, and D4 is determined. Each section D0, D1, D2, D3, and D4 is determined so that the gain or phase after adjustment falls within the error range x1 or x2.

[0080] The baseband circuit 11 converts the reference power P [dB] into a voltage value [V] to obtain a reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 Similarly, from the obtained phase characteristic, the reference voltage V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 is obtained.

[0081] Reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 may be determined by the baseband circuit 11 based on the learning monitor signal in the following manner. In the method described below, a model of the amplifier 13 is not used. First, the baseband circuit 11 measures the gain characteristic (AM-AM) and phase characteristic (AM-PM) of the amplifier 13 from the learning monitor signal. Then, the baseband circuit 11 determines the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 Each value is slightly changed. Then, the baseband circuit 11 remeasures the gain characteristic (AM-AM) and the phase characteristic (AM-PM). If the gain in the gain characteristic is improved in the direction in which the target gain or the phase in the phase characteristic is improved in the direction in which it is closer to 0, the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,VPM,PD2 ,V PM,PD3 ,V PM,PD4 If the gain or phase has deteriorated, the original reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 By repeating the above procedure, the optimized reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 The reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 and the reference voltage V for phase adjustment PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 and may each be determined independently.

[0082] During the operation of the amplifier 13, the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V PM,PD1 ,V PM,PD2 ,V PM,PD3 ,V PM,PD4 The target interval to which the power of the input signal belongs is determined using

[0083] For example, when the power of the input signal is in the section D0, the determiner 210 (the first determiner 211, the second determiner 212) determines the section D0 as the target section (the first target section or the second target section). When the 0th section D0 is the target section, the first generator 251 generates the adjustment amount voltage V AM,ATT0 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT0 A control signal V PM,cos,ctrl and the adjustment voltage VPM,sin,ATT0 A control signal V PM,sin,ctrl Each control signal is output via a low-pass filter 260.

[0084] That is, regarding the gain, when the power of the input signal is in the section D0, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 Therefore, the outputs (comparison results) of the comparators 281, 282, 283, and 284 shown in FIG. 5 all become Low. As a result, the switches 291, 292, 293, and 294 shown in FIG. 5 all become OFF. Therefore, the adjustment voltage V AM,ATT0 A control signal V AM,ctrl is output. The same is true for the phase.

[0085] When the power of the input signal is in the section D1, the determiner 210 (the first determiner 211, the second determiner 212) determines the section D1 as the target section (the first target section or the second target section). When the section D1 is the target section, the first generator 251 generates the adjustment amount voltage V AM,ATT1 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT1 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT1 A control signal V PM,sin,ctrl Generate.

[0086] That is, regarding the gain, when the power of the input signal is in the section D1, the voltage indicating the power value (input power) of the input signal is V AM,PD1 Larger than V AM,PD2 ,V AM,PD3 ,V AM,PD4 Therefore, the output (comparison result) of the comparator 281 is High, but the outputs (comparison results) of the comparators 282, 283, and 284 are all Low. As a result, the switch 291 is ON, but the switches 292, 293, and 294 are all OFF. Therefore, the adjustment voltage V AM,ATT1 A control signal V AM,ctrlis output. The same is true for the phase.

[0087] When the power of the input signal is in the section D2, the determiner 210 (the first determiner 211, the second determiner 212) determines the section D2 as the target section (the first target section or the second target section). When the section D2 is the target section, the first generator 251 generates the adjustment amount voltage V AM,ATT2 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT2 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT2 A control signal V PM,sin,ctrl Generate.

[0088] That is, regarding the gain, when the power of the input signal is in the section D2, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 Larger than V AM,PD3 ,V AM,PD4 Therefore, the outputs (comparison results) of the comparators 281 and 282 are High, but the outputs (comparison results) of the comparators 283 and 284 are Low. As a result, the switches 291 and 292 are ON, but the switches 293 and 294 are OFF. Therefore, the adjustment voltage V AM,ATT2 A control signal V AM,ctrl is output. The same is true for the phase.

[0089] When the power of the input signal is in the section D3, the determiner 210 (the first determiner 211, the second determiner 212) determines the section D3 as the target section (the first target section or the second target section). When the section D3 is the target section, the first generator 251 generates the adjustment amount voltage V AM,ATT3 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT3 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT3 A control signal V PM,sin,ctrl Generate.

[0090] That is, regarding the gain, when the power of the input signal is in the section D3, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 Larger than V AM,PD4 Therefore, the outputs (comparison results) of the comparators 281, 282, and 283 are High, but the output (comparison result) of the comparator 284 is Low. As a result, the switches 291, 292, and 293 are ON, but the switch 294 is OFF. Therefore, the adjustment voltage V AM,ATT3 A control signal V AM,ctrl is output. The same is true for the phase.

[0091] When the power of the input signal is in the section D4, the determiner 210 (the first determiner 211, the second determiner 212) determines the section D4 as the target section (the first target section or the second target section). When the section D4 is the target section, the first generator 251 generates the adjustment amount voltage V ATT4 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT4 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT4 A control signal V PM,sin,ctrl Generate.

[0092] That is, regarding the gain, when the power of the input signal is in the section D4, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 Therefore, the outputs (comparison results) of the comparators 281, 282, 283, and 284 are all High. As a result, the switches 291, 292, 293, and 294 are all ON. Therefore, the adjustment voltage V AM,ATT4 A control signal V AM,ctrl is output. The same is true for the phase.

[0093] By controlling adjuster 300 using the control signal generated as described above, it is possible to keep the gain or phase within the error ranges x1 and x2.

[0094] 5 is a circuit for the case where amplifier 13 has a characteristic (first characteristic) in which the gain (or phase) changes monotonically. Here, the monotonous change means a monotonous increase or decrease. In the case of amplifier 13 having the first characteristic, the change in gain or phase with respect to the power of the input signal changes monotonically.

[0095] On the other hand, the circuit in Fig. 10 is a circuit for the case where amplifier 13 has a characteristic (second characteristic) in which the change in gain or phase with respect to the power of the input signal has an extreme value. Here, the extreme value is a maximum value or a minimum value. In the case of the gain characteristic shown in Fig. 6, the gain has a maximum value in section D4. The circuit in Fig. 5 corresponds to distortion compensation from section D0 to section D4 among the multiple sections shown in Fig. 6, but the circuit in Fig. 10 corresponds to distortion compensation from section D0 to section D8 shown in Fig. 6.

[0096] The circuit in FIG. 10 is obtained by adding comparators 285, 286, 287, and 288, NOT gates 235, 236, 237, and 238, and AND gates 231, 232, 233, and 234 to the circuit in FIG.

[0097] During operation of the amplifier 13, the reference voltage V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V AM,PD5 ,V AM,PD6 ,V AM,PD7 ,V AM,PD8 Using the above, the target section to which the power of the input signal belongs is determined from among a plurality of sections D0, D1, D2, D3, D4, D5, D6, D7, and D8. Note that, as an example, V AM,PD1 <V AM,PD2 <V AM,PD3 <V AM,PD4 <V AM,PD5 <V AM,PD6 <V AM,PD7 <V AM,PD8 It is.

[0098] When the power of the input signal is in the section D0 to D4, the voltage indicating the power value (input power) of the input signal is VAM,PD5 ,V AM,PD6 ,V AM,PD7 ,V AM,PD8 10 is smaller than . Therefore, the outputs of the comparators 285, 286, 287, and 288 are all Low. And the outputs of the NOT gates 235, 236, 237, and 238 that determine the outputs of the comparators 285, 286, 287, and 288 are all High. Therefore, when the power of the input signal is in the section D0 to section D4, a High is input from the NOT gates 235, 236, 237, and 238 to the AND gates 231, 232, 233, and 234. As a result, when the power of the input signal is in the section D0 to section D4, the circuit of FIG. 10 is equivalent to that of FIG. 5, and a control signal is output in the same manner as described in FIG. 5.

[0099] Furthermore, when the power of the input signal is in section D5, the determiner 210 (the first determiner 211, the second determiner 212) determines that section D5 is the target section (the first target section or the second target section). When section D5 is the target section, the first generator 251 generates the adjustment amount voltage V ATT3 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT3 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT3 A control signal V PM,sin,ctrl Generate.

[0100] That is, regarding the gain, when the power of the input signal is in the section D5, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V AM,PD5 Larger than V AM,PD6 ,V AM,PD7 ,V AM,PD8The outputs of the comparators 281, 282, 283, and 284 are all High, and the output of the comparator 285 is also High. However, the outputs of the comparators 286, 287, and 288 are Low. In this case, the output of the NOT gate 235 is Low, and the outputs of the NOT gates 236, 237, and 238 are High. As a result, the output of the AND gate 234 is Low, and the outputs of the other AND gates 231, 232, and 233 are High. Therefore, the adjustment voltage V AM,ATT3 A control signal V AM,ctrl is output. The same is true for the phase.

[0101] When the power of the input signal is in section D6, the determiner 210 (the first determiner 211, the second determiner 212) determines that section D6 is the target section (the first target section or the second target section). When section D6 is the target section, the first generator 251 generates the adjustment amount voltage V ATT2 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT2 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT2 A control signal V PM,sin,ctrl Generate.

[0102] That is, regarding the gain, when the power of the input signal is in the section D6, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V AM,PD5 ,V AM,PD6 Larger than V AM,PD7 ,V AM,PD8 The outputs of the comparators 281, 282, 283, and 284 are all High, and the outputs of the comparators 285 and 286 are also High. However, the outputs of the comparators 287 and 288 are Low. In this case, the outputs of the NOT gates 235 and 236 are Low, and the outputs of the NOT gates 237 and 238 are High. As a result, the outputs of the AND gates 233 and 234 are Low, and the outputs of the other AND gates 231 and 232 are High. For this reason, the adjustment voltage VATT2 A control signal V AM,ctrl is output. The same is true for the phase.

[0103] When the power of the input signal is in section D7, the determiner 210 (the first determiner 211, the second determiner 212) determines that section D7 is the target section (the first target section or the second target section). When section D7 is the target section, the first generator 251 generates the adjustment amount voltage V ATT1 A control signal V AM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT1 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT1 A control signal V PM,sin,ctrl Generate.

[0104] That is, regarding the gain, when the power of the input signal is in the section D7, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V AM,PD5 ,V AM,PD6 ,V AM,PD7 Larger than V AM,PD8 The outputs of the comparators 281, 282, 283, and 284 are all High, and the outputs of the comparators 285, 286, and 287 are also High. However, the output of the comparator 288 is Low. In this case, the outputs of the NOT gates 235, 236, and 237 are Low, and the output of the NOT gate 238 is High. As a result, the outputs of the AND gates 232, 233, and 234 are Low, and the output of the other AND gate 231 is High. Therefore, the adjustment voltage V ATT1 A control signal V AM,ctrl is output. The same is true for the phase.

[0105] When the power of the input signal is in section D8, the determiner 210 (the first determiner 211, the second determiner 212) determines that section D8 is the target section (the first target section or the second target section). When section D8 is the target section, the first generator 251 generates the adjustment amount voltage V ATT0 A control signal VAM,ctrl The second generator 252 generates the adjustment voltage V PM,cos,ATT0 A control signal V PM,cos,ctrl and the adjustment voltage V PM,sin,ATT0 A control signal V PM,sin,ctrl Generate.

[0106] That is, regarding the gain, when the power of the input signal is in the section D8, the voltage indicating the power value (input power) of the input signal is V AM,PD1 ,V AM,PD2 ,V AM,PD3 ,V AM,PD4 ,V AM,PD5 ,V AM,PD6 ,V AM,PD7 ,V AM,PD8 Therefore, the outputs of the comparators 281, 282, 283, and 284 are all High, and the outputs of the comparators 285, 286, 287, and 288 are also High. In this case, the outputs of the NOT gates 235, 236, 237, and 238 are all Low. As a result, the outputs of the AND gates 231, 232, 233, and 234 are all Low. Therefore, the adjustment voltage V ATT0 A control signal V AM,ctrl is output. The same is true for the phase.

[0107] In the circuit shown in FIG. AM,PD1 >V AM,PD2 >V AM,PD3 >V AM,PD4 >V AM,PD5 >V AM,PD6 >V AM,PD7 >V AM,PD8 By setting it to, it is possible to deal with the characteristic having a minimum value (second characteristic).

[0108] Fig. 11 shows a circuit configured to be switchable between a first mode for a first amplifier having a first characteristic and a second mode for a second amplifier having a second characteristic. The example in Fig. 11 is a diagram related to gain, but the same is true for phase. The circuit in Fig. 11 is obtained by adding mode changeover switches 245, 246, 247, and 248 to the circuit in Fig. 10. Also, in Fig. 11, the adjustment voltage V AM,ATT5 ,VAM,ATT6 ,V AM,ATT7 ,V AM,ATT8 has been added, and the adjustment voltage V AM,ATT5 ,V AM,ATT6 ,V AM,ATT7 ,V AM,ATT8 In FIG. 11, switches 295, 296, 297, and 298 for V AM,PD1 <V AM,PD2 <V AM,PD3 <V AM,PD4 <V AM,PD5 <V AM,PD6 <V AM,PD7 <V AM,PD8 Also, V AM,ATT1 <V AM,ATT2 <V AM,ATT3 <V ATT4 <V AM,ATT5 <V AM,ATT2 <V AM,ATT3 <V ATT4 It is.

[0109] When the mode changeover switches 245, 246, 247, and 248 are switched to the first mode, the outputs of the comparators 285, 286, 287, and 288 are directly provided to the gates of the switches 295, 296, 297, and 298 (the state shown in FIG. 11). On the other hand, when the mode changeover switches 245, 246, 247, and 258 are switched to the second mode, the output of the comparator 285 is provided to the input of the NOT gate 235. Therefore, the circuit in FIG. 11 operates in the same manner as in FIG. 10. The mode changeover switch 245 is switched by a switching signal. The switching signal is provided from outside the distortion compensation circuit 12. The switching signal is provided, for example, from the baseband circuit 11. The first mode or the second mode is selected depending on whether the amplifier 13 has a first characteristic (monotonically changing characteristic) or a second characteristic (characteristic having an extreme value).

[0110] FIG. 12 shows a modification of the above-mentioned distortion compensation device 100 to compensate for the memory effect of the amplifier 13. The distortion compensation device 100 shown in FIG. 12 includes a non-memory term circuit 101, a memory term (+) circuit 102, and a memory term (-) circuit 103. The configurations of the memory term (+) circuit 102 and the memory term (-) circuit 103 are the same as those of the non-memory term circuit 101. The distortion compensation device 100 shown in FIG. 12 also includes delay elements 105A, 105B, 105C, and 105D. The distortion compensation device 100 shown in FIG. 3 corresponds to the non-memory term circuit 101 shown in FIG. 12. That is, the distortion compensation device 100 shown in FIG. 3 corresponds to the distortion compensation device 100 shown in FIG. 12 except for the memory term (+) circuit 102, the memory term (-) circuit 103, and the delay elements 105A, 105B, 105C, and 105D.

[0111] A first input signal, which is a pre-distortion compensation signal delayed by a delay element 105A, is provided to the non-memory term circuit 101. The first input signal corresponds to the input signal in the distortion compensation device 100 of FIG. 3. The non-memory term circuit 101 adjusts the amplitude and phase of the first input signal and outputs a first output signal. The non-memory term circuit 101 includes a first regulator 300A having a variable resistor and a variable phase shifter. The first regulator 300A is controlled by a first controller 200A. A first power value, which is a power value of the pre-distortion compensation signal delayed by a delay element 105C, is provided to the first controller 200A. The first controller 200A generates an amplitude control signal and a phase control signal based on the first power value.

[0112] A second input signal, which is the first input signal delayed by delay element 105B, is provided to memory term (+1) circuit 102. Memory term (+1) circuit 102 adjusts the amplitude and phase of the second input signal to output a second output signal. Memory term (+1) circuit 102 includes second regulator 300B having a variable resistor and a variable phase shifter. Second regulator 300B is controlled by second controller 200B. A second power value, which is the first power value delayed by delay element 105D, is provided to second controller 200B. Second controller 200B generates an amplitude control signal and a phase control signal based on the second power value.

[0113] The memory term (-1) circuit 103 is provided with the pre-distortion compensation signal as a third input signal. The memory term (-1) circuit 103 adjusts the amplitude and phase of the third input signal and outputs a third output signal. The memory term (-1) circuit 103 includes a third regulator 300C having a variable resistor and a variable phase shifter. The third regulator 300C is controlled by a third controller 200C. The third controller 200C is provided with the power value of the pre-distortion compensation signal as a third power value. The third controller 200C generates an amplitude control signal and a phase control signal based on the third power value.

[0114] The first output signal, the second output signal, and the third output signal are combined by combiners 107A and 107B to become a distortion-compensated signal.

[0115] 13 to 15 show modified examples of the communication device 10 shown in FIG. 1. In the communication device 10 shown in FIG. 13, a baseband signal is provided from the baseband circuit 11 to the distortion compensation circuit 12, but the power value and the reference value V PD* 13 is not provided to the baseband circuit 11. The learning monitor signal is provided to the distortion compensation circuit 12, not to the baseband circuit 11. The distortion compensation circuit 12 shown in FIG. 13 calculates a reference value V PD* 13 includes a detector for detecting the input signal because the power value of the input signal is not obtained from an external source. The power value is obtained by the detector built into the distortion compensation circuit 12.

[0116] In the communication device 10 shown in FIG. 14, a baseband signal is provided from a baseband circuit 11 to a distortion compensation circuit 12, but the power value and the reference value V PD* 1 is not given. Similarly to the distortion compensation circuit shown in FIG. 1, the distortion compensation circuit 12 shown in FIG. PD*is obtained from the baseband circuit 11. For this reason, the communication device 10 shown in Fig. 14 has a learning monitor path 24 extending from the output of the amplifier 13 to the baseband circuit 11, and a reference value path 25 extending from the baseband circuit 11 to the distortion compensation circuit 12. The distortion compensation circuit 12 shown in Fig. 14 is provided with a detector that detects the input signal because the power value of the input signal is not obtained from outside.

[0117] In the communication device 10 shown in FIG. 15, the distortion compensation circuit 12 shown in FIG. 13 calculates a reference value V PD* In FIG. 15, other points are the same as in FIG.

[0118] It should be noted that the embodiments disclosed herein are illustrative and not restrictive in all respects. The scope of the present invention is defined by the claims, not by the above meaning, and is intended to include the equivalent meaning of the claims and all modifications within the scope. [Explanation of symbols]

[0119] 10: Communication device 11: Baseband circuit 12: Distortion compensation circuit 12A :I signal terminal 12B:Q signal terminal 12C: Output terminal 12D: Power value terminal 12E: Reference value terminal 13: Amplifier 14: Antenna 21: First baseband signal path 22: Second baseband signal path 23: Power value path 24: Learning monitor path 25: Reference value path 100: Distortion compensation device 101: Non-memory term circuit 102: Memory term (+) circuit 103: Memory term (-) circuit 105A: Delay element 105B: Delay element 105C: Delay element 105D: Delay element 107A:Synthesizer 107B:Synthesizer 200: Controller 200A: First controller 200B: Second controller 200C: 3rd controller 210: Determiner 211: 1st determiner 212:Second determiner 213:Third determiner 231: AND gate 232: AND gate 233: AND gate 234: AND gate 235: NOT Gate 236: NOT gate 237: NOT Gate 238: NOT gate 245: Mode switch 250: Generator 251: 1st generator 252 :Second generator 253 :Third generator 260: Low pass filter 270:Adjustment amount 271: 1st sub-controller 272: Second sub-controller 273: 3rd sub-controller 281: Comparator 282: Comparator 283: Comparator 284: Comparator 285: Comparator 286: Comparator 287: Comparator 288: Comparator 289: Comparator 291: Switch 292: Switch 293: Switch 294: Switch 295: Switch 300: Regulator 300A: 1st regulator 300B:Second regulator 300C: 3rd regulator 310: Variable resistor 320: Variable phase shifter 320A: Variable resistor 320B: Variable resistor 401: Digital / Analog Converter 402: Digital / Analog Converter 403: Digital / Analog Converter 410: Quadrature modulator

Claims

1. 1. A controller for a regulator for adjusting an input signal for predistortion of an amplifier, comprising: a determiner for determining a target section corresponding to the power of the input signal from among a plurality of set sections; A generator for generating a control signal; Equipped with the adjuster is configured to adjust at least one of an amplitude and a phase of the input signal; an adjustment amount of at least one of an amplitude and a phase of the input signal is associated with each of the plurality of sections; The determiner is a plurality of comparators provided corresponding to a plurality of reference values ​​defining the plurality of intervals, Each of the plurality of comparators is configured to compare the reference value, which is an analog voltage, with the power of the input signal, which is an analog voltage; The generator includes: an analog circuit that generates the control signal having an adjustment amount voltage that is the adjustment amount associated with the target section, and provides the control signal to the regulator, a plurality of switches provided corresponding to the plurality of comparators; The plurality of switches include selectively passing the adjustment voltage, which is a plurality of preset analog voltages, based on a comparison result by the comparator; controller.

2. The lengths of the multiple sections are not the same. The controller of claim 1 .

3. The determiner is a first mode for a first amplifier having a first characteristic and a second mode for a second amplifier having a second characteristic different from the first characteristic; In the first mode, the plurality of sections are set according to the first characteristic, In the second mode, the plurality of sections are set according to the second characteristic. The controller according to claim 1 or 2.

4. the first characteristic is a characteristic in which a change in gain or phase with respect to the power of the input signal is a monotonous change, The second characteristic is a characteristic in which a change in gain or phase with respect to the power of the input signal has an extreme value. The controller of claim 3 .

5. The regulator is a first adjuster to which a first input signal is input and which adjusts at least one of an amplitude and a phase of the first input signal; a second adjuster that receives a second input signal that is delayed or advanced from the first input signal and adjusts at least one of an amplitude and a phase of the second input signal; Equipped with The controller: A first controller and a second controller are provided, each of the first controller and the second controller includes the determiner and the generator; The determiner of the first controller determines a target section corresponding to a power of the first input signal as the input signal among a plurality of set sections; The determiner of the second controller determines a target section corresponding to the power of the second input signal as the input signal from among a plurality of set sections. A controller according to any one of claims 1 to 4.

6. The plurality of sections are adjustable. A controller according to any one of claims 1 to 5.

7. the input signal is a radio signal; The power value of the input signal is obtained from outside the controller. A controller according to any one of claims 1 to 6.

8. The difference between the maximum value and the minimum value among the plurality of reference values ​​defining the plurality of sections is 50 dB or less. A controller according to any one of claims 1 to 7.

9. The determiner is a first determiner that determines a first target section corresponding to the power of the input signal from among a plurality of first sections set for amplitude adjustment; a second determiner that determines a second target section corresponding to the power of the input signal from among a plurality of second sections set for phase adjustment; Equipped with an amplitude adjustment amount of the input signal is associated with each of the plurality of first sections; a phase adjustment amount of the input signal is associated with each of the second sections; The generator includes: a first generator that generates, as the control signal, an amplitude control signal that indicates the amplitude adjustment amount associated with the first target section; a second generation unit that generates, as the control signal, a phase control signal that indicates the phase adjustment amount associated with the second target section; Equipped A controller according to any one of claims 1 to 8.

10. an adjuster including a first adjuster that adjusts at least one of the amplitude and the phase of an input signal; A controller, The controller: a determiner for determining a target section corresponding to the power of the input signal from among a plurality of set sections; A generator for generating a control signal; Equipped with an adjustment amount of at least one of an amplitude and a phase of the input signal is associated with each of the plurality of sections; The determiner is a plurality of comparators provided corresponding to a plurality of reference values ​​defining the plurality of intervals, Each of the plurality of comparators is configured to compare the reference value, which is an analog voltage, with the power of the input signal, which is an analog voltage; The generator includes: an analog circuit that generates the control signal having an adjustment amount voltage that is the adjustment amount associated with the target section, and provides the control signal to the first adjustment unit, a plurality of switches provided corresponding to the plurality of comparators; The plurality of switches include selectively passing the adjustment voltage, which is a plurality of preset analog voltages, based on a comparison result by the comparator; Distortion compensation device.

11. Amplifier and a distortion compensation device for compensating for distortion of the amplifier, The distortion compensation device comprises: an adjuster that adjusts at least one of the amplitude and phase of an input signal; A controller; Equipped with The controller: a determiner for determining a target section corresponding to the power of the input signal from among a plurality of set sections; A generator for generating a control signal; Equipped with an adjustment amount of at least one of an amplitude and a phase of the input signal is associated with each of the plurality of sections; The determiner is a plurality of comparators provided corresponding to a plurality of reference values ​​defining the plurality of intervals, Each of the plurality of comparators is configured to compare the reference value, which is an analog voltage, with the power of the input signal, which is an analog voltage; The generator includes: an analog circuit that generates the control signal having an adjustment amount voltage that is the adjustment amount associated with the target section, and provides the control signal to the regulator, a plurality of switches provided corresponding to the plurality of comparators; The plurality of switches include selectively passing the adjustment voltage, which is a plurality of preset analog voltages, based on a comparison result by the comparator; Communication device.

12. 1. A method for adjusting an input signal for distortion compensation of an amplifier, comprising: determining a target section corresponding to the power of the input signal from among the set multiple sections; Generate a control signal for adjusting at least one of the amplitude and phase of the input signal. Prepare for this. an adjustment amount of at least one of an amplitude and a phase of the input signal is associated with each of the plurality of sections; the determination of the target section is performed by comparing a power of the input signal, which is an analog voltage, with a reference value, which is a plurality of analog voltages that define the plurality of sections; The control signal is generated as a signal having an adjustment amount voltage, which is the adjustment amount corresponding to the target section, and the generation of the control signal is performed by a plurality of switches that selectively pass the adjustment amount voltages, which are a plurality of preset analog voltages, based on the result of the comparison. method.

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