Transient Voltage Absorption Element

Abstract

A transient voltage absorbing element (11) comprises a first path (1) and a second path (2), wherein: the first path (1) is a current path through which a surge current flows; the second path (2) is a current path in a frequency band of a signal which propagates on a signal line (SL); the first path (1) includes a series circuit of a diode (BD) which includes a depletion layer capacitance, a first inductor (L1), and a first resistance component (R1); and the second path (2) includes a series circuit of a capacitor (C2), a second inductor (L2), and a second resistance component (R2). The resistance value of the first resistance component (R1) is greater than the resistance value of the second resistance component (R2).

Description

[Technical field]

[0001] The present invention relates to a transient voltage absorbing element that absorbs surges such as transient abnormal voltages caused by ESD (electrostatic discharge) and lightning surges and switching surges. [Background technology]

[0002] In general, when a transient voltage absorbing element is inserted between a transmission line and ground, high frequency signals leak to the ground due to the stray capacitance of the transient voltage absorbing element, deteriorating the transmission characteristics of the transmission line.

[0003] Patent Document 1 discloses a transient voltage absorption circuit that protects ultra-high frequency circuits in the quasi-millimeter wave band or millimeter wave band from electrostatic surges. In the transient voltage absorption circuit of Patent Document 1, diodes are connected between the ends (points A and B) of a quarter-wave microstrip line connected to the input and output ends of the circuit to be protected, and the ground and power supply, respectively, so as to have opposite polarity in terms of DC. Points A and B are grounded via capacitors to bypass the high frequency.

[0004] With the above circuit configuration, the depletion layer capacitance of the diode is connected in parallel to the capacitor at high frequencies, so the effect of the depletion layer capacitance of the diode is small. Also, the 1 / 4 wavelength microstrip line acts as an open stub and has high impedance in the frequency band used, so the connection of the diode has almost no effect on the circuit to be protected, while absorbing surges and protecting the circuit to be protected. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2000-245057 A Summary of the Invention [Problem to be solved by the invention]

[0006] The transient voltage absorption circuit shown in Patent Document 1 is not affected by the depletion layer capacitance of the capacitor and diode for high frequency bypass in the frequency band where it acts as the open stub, i.e., in the frequency band used. For example, if an open stub with an electrical length of 1 / 4 wavelength at 10 GHz is used, it is possible to reduce the stray capacitance of the transient voltage absorption circuit connected to the signal line in the 10 GHz band, but if the signal to be passed through the signal line is broadband, it will be affected by the stray capacitance of the transient voltage absorption element, for example, in the 10 GHz band or higher. In other words, the stray capacitance of the transient voltage absorption element causes the high frequency signal to leak to the ground, resulting in a large insertion loss of the transmission line.

[0007] SUMMARY OF THE PRESENT EMBODIMENT An object of the present invention is to provide a transient voltage absorbing circuit which suppresses deterioration of the high frequency passing characteristics of a transmission line in a wide frequency band in use. [Means for solving the problem]

[0008] An example of a transient voltage absorbing element according to the present disclosure includes: a transient voltage absorbing element connected in shunt between the signal line and a reference potential; a first path and a second path connected in a shunt between the signal line and the reference potential; the first path is a current path through which a surge current flows, the second path is a current path in a frequency band of a signal propagating through the signal line, the first path includes a series circuit including a diode having a depletion layer capacitance, a first inductor component, and a first resistor component; the second path includes a series circuit including a capacitance, a second inductor component, and a second resistance component; the capacitance is a capacitance generated between wirings that are conductive to the diode, The resistance value of the first resistance component is higher than the resistance value of the second resistance component. It is characterized by: Effect of the Invention

[0009] According to the present invention, a transient voltage absorbing circuit is obtained that suppresses deterioration of the high-frequency passing characteristics of a transmission line in a wide frequency band in use. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a circuit diagram of a transient voltage absorbing circuit 101 according to the first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view of the transient voltage absorbing element 11, and in particular shows the first path 1 and the second path 2 shown in FIG. [Diagram 3] FIG. 3 is a cross-sectional view of the transient voltage absorbing element 11, and in particular illustrates the depletion layer capacitance of the diode BD and the capacitance C2 shown in FIG. [Figure 4] FIG. 4 is a diagram showing the frequency dependency of the impedance due to the stray capacitance (combined capacitance of the depletion layer capacitance of the diode BD and the capacitance C2) of the transient voltage absorption element 11. [Diagram 5] FIG. 5 is a circuit diagram of a transient voltage absorbing element 12 according to the second embodiment. [Figure 6] FIG. 6 is a plan view showing ap+ region formed in the surface layer of an epitaxial layer Epi on a semiconductor substrate. [Figure 7] 7(A) and 7(B) are diagrams showing examples of patterns of conductors Cond11, Cond12, Cond13, and Cond14 connected to each p+ region. [Figure 8] 8(A) and 8(B) are plan views showing an n+ region formed in the surface layer of an epitaxial layer Epi on a semiconductor substrate. [Figure 9] 9A and 9B are diagrams showing examples of patterns of conductors Cond11, Cond12, Cond13, and Cond14 connected to each n+ region. [Figure 10] FIG. 10 is a plan view showing the structure of a portion where a plurality of diodes are formed in the transient voltage absorbing element according to the third embodiment. [Figure 11]FIG. 11A is a cross-sectional view showing the structure of a portion where a plurality of diodes are formed in a transient voltage absorption element according to a fourth embodiment, and FIG. 11B is a plan view showing the structure of the portion where the plurality of diodes are formed. [Figure 12] FIG. 12A is a cross-sectional view showing the structure of a portion where a plurality of diodes are formed in a transient voltage absorption element according to the fifth embodiment, and FIG. 12B is a plan view showing the structure of the portion where the plurality of diodes are formed. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, several specific examples will be given with reference to the drawings to show several embodiments for carrying out the present invention. In each drawing, the same reference numerals are given to the same parts. In consideration of the ease of explanation or understanding of the main points, the embodiments are shown divided into several embodiments for convenience of explanation, but partial replacement or combination of the configurations shown in different embodiments is possible. In the second and subsequent embodiments, the description of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, similar actions and effects due to similar configurations will not be mentioned in each embodiment.

[0012] First Embodiment 1 is a circuit diagram of a transient voltage absorbing circuit 101 according to a first embodiment. This transient voltage absorbing circuit 101 includes a first terminal T1, a second terminal T2, a third terminal T3, and a signal line SL that exists between the first terminal T1 and the second terminal T2. The third terminal T3 is connected to a reference potential such as ground. In addition, a transient voltage absorbing element 11 is connected in shunt between the signal line SL and the third terminal T3 (reference potential).

[0013] The transient voltage absorbing element 11 is a two-terminal element and includes a diode BD between its terminals as a main part. The transient voltage absorbing element 11 includes a first path 1 and a second path 2 that are connected in shunt between the signal line SL and a third terminal T3 (reference potential).

[0014] The first path 1 is a current path through which a surge current flows, and the second path 2 is a current path in the frequency band of a signal propagating through the signal line SL. However, if the signal propagating through the signal line SL is a signal in a low frequency band, the signal flows not only through the second path 2 but also through the first path 1. As the signal frequency becomes higher, the proportion of the signal current flowing through the second path 2 increases. In other words, for a signal, the proportion of the current flowing through the first path 1 and the second path 2 changes depending on the frequency band.

[0015] The first path 1 includes a series circuit of a diode BD including a depletion layer capacitance, a first inductor L1, and a first resistance component R1. The diode BD is composed of multiple diodes whose forward directions are opposite to each other. The second path 2 includes a series circuit of a capacitance C2, a second inductor L2, and a second resistance component R2.

[0016] The capacitance C2 is generated between the wirings that are connected to the diode BD, and will be illustrated later. The first resistance component R1 is the resistance component of the wiring layer and the epitaxial layer (depletion layer), and the second resistance component R2 is the resistance component of the wiring layer in the high-frequency current path.

[0017] The transient voltage absorbing element 11 of this embodiment is characterized in that the resistance value of the first resistance component R1 is higher than the resistance value of the second resistance component R2.

[0018] 2 and 3 are cross-sectional views of the transient voltage absorption element 11. As will be described later, Fig. 2 illustrates the first path 1 and the second path 2 shown in Fig. 1, and Fig. 3 illustrates the depletion layer capacitance of the diode BD and the capacitance C2 shown in Fig. 1.

[0019] The transient voltage absorption element 11 is composed of a semiconductor substrate portion and a rewiring portion. The semiconductor substrate portion includes a semiconductor substrate Sub, an epitaxial layer Epi, a trench TR, an insulator Ins1, and conductors Cond11, Cond12, and Cond13. The rewiring portion includes insulators Ins2, Ins3, Ins4, and Ins5, a conductor Cond2, and a pad Pad. The pad Pad may be composed of a plurality of layers of conductors for forming electrodes. That is, the pad Pad may include, for example, a base layer and a surface layer, and may further include an adhesion layer between the base layer and the surface layer.

[0020] The semiconductor substrate Sub may be made of, for example, Si or GaAs. The insulators Ins1, Ins2, Ins3, Ins4, and Ins5 may be made of, for example, SiO2, SiN, or solder resist depending on the location where they are formed. The conductors Cond11, Cond12, and Cond13 may be made of, for example, Al or Cu. The pads Pad may be made of, for example, Ni, Cr, or an alloy thereof for the underlayer, Ti or W for the adhesion layer, and Au or other precious metals for the surface layer. If adjacent insulators are made of the same material, the boundary between them may be unclear. For example, if the insulators Ins2 and Ins3 are made of the same material, they may appear to be integrated.

[0021] The epitaxial layer Epi is formed on the surface of the semiconductor substrate Sub. A p+ region and an n+ region are formed on the surface of the epitaxial layer Epi. An insulator Ins1 is formed on the surface of the epitaxial layer Epi. Conductors Cond11, Cond12, and Cond13 are formed from the surface of the epitaxial layer Epi to the p+ region and n+ region. In addition, a trench TR is formed from the insulator Ins1 to the semiconductor substrate Sub.

[0022] The rewiring portion has a conductor Cond2 formed therein, which is electrically connected to the conductors Cond11 and Cond13. A pad Pad is formed on the conductor Cond2 in the uppermost layer.

[0023] As shown in Fig. 3, depletion layer capacitances C11 and C12 are formed in the depletion layer at the interface between the epitaxial layer Epi and the p+ region. Furthermore, capacitance C21 is formed between the conductor Cond11 and the conductor Cond12, and capacitance C22 is formed between the conductor Cond12 and the conductor Cond13. Furthermore, capacitance C23 is formed between the conductor and the epitaxial layer Epi, and capacitance C24 is formed between the conductor Cond2 and the epitaxial layer Epi. Furthermore, capacitance C25 is formed between the conductor Cond2 and the conductor Cond2.

[0024] In FIG. 3, capacitance C21 is generated between Cond11 and Cond12, and C22 is generated between Cond12 and Cond13.

[0025] In Fig. 2, a current path CP1 indicated by a dashed line corresponds to a part of the first path 1 in Fig. 1, and a current path CP2 indicated by a dashed line corresponds to a part of the second path 2 in Fig. 1. Thus, the first path 1, which is a current path through which a surge current flows, includes the p+ region, n+ region, and epitaxial layer Epi of the diode. The first path 1 also includes the vias of the conductors Cond11 and Cond12. On the other hand, the second path 2 includes the conductors Cond11 and Cond12 and the capacitances C21 and C22 generated between the conductors Cond11 and Cond12.

[0026] The current path CP1 shown in Fig. 2 passes through the p+ region, n+ region, epitaxial layer Epi, and vias of conductors Cond11 and Cond12 of the diode, so the resistance value of the first resistance component R1 shown in Fig. 1 is higher than the resistance value of the second resistance component R2. Similarly, the inductance of the first inductor L1 shown in Fig. 1 is higher than the inductance of the second inductor L2.

[0027] FIG. 4 is a diagram showing the frequency dependence of the impedance due to the stray capacitance (the combined capacitance of the depletion layer capacitance of diode BD and capacitance C2) of the transient voltage absorption element 11. In FIG. 4, the horizontal axis is frequency and the vertical axis is impedance. Characteristic curve Z1 in FIG. 4 shows the frequency dependence of the impedance of the first path 1 in FIG. 1, and characteristic curve Z2 shows the frequency dependence of the impedance of the second path 2 in FIG. 1. Characteristic curve Z1 / / Z2 shows the frequency dependence of the impedance of the transient voltage absorption element 11. Also, characteristic curve Z0 shows the frequency characteristic of the impedance of a given capacitance.

[0028] In the example of FIG. 4, range A denotes the frequency range from 1 GHz to 5.4 GHz, range B denotes the frequency range from 5.4 GHz to 18 GHz, and range C denotes the frequency range from 18 GHz to 50 GHz.

[0029] If the depletion layer capacitance of the diode BD is represented by C1 and the capacitance of the capacitor C2 is represented by C2, then there is a relationship of C1>C2. In addition, if the first resistance component of the first path 1 is represented by R1 and the second resistance component of the second path 2 is represented by R2, then there is a relationship of R1>R2. In addition, the resonant frequency of the first path 1 and the resonant frequency of the second path 2 are different.

[0030] 4, the impedance (Z1 / / Z2) of the transient voltage absorption element 11 is a composite impedance of the impedance Z1 of the first path 1 and the impedance Z2 of the second path 2 in range A (low frequency band), and is dominated by the impedance Z2 of the second path 2 in range C (high frequency band). The impedance Z1 of the first path 1 is significantly influenced by the first resistance component R1 in the high frequency band, and the frequency dependency becomes small.

[0031] When the first resistance component R1 and the second resistance component R2 are not present, or when the first resistance component R1 and the second resistance component R2 are the same, the impedance Z1 of the first path 1 is in the state shown by Z0 in Fig. 4. When only the first resistance component R1 is absent, the first resistance component R1 is smaller than the second resistance component R2, so that the impedance Z1 / / Z2 of the transient voltage absorption element 11 has some frequency characteristics.

[0032] When the impedance Z1 of the first path 1 includes the first resistance component R1 having a high resistance value, the resistance characteristic due to the impedance of the first resistance component R1 becomes prominent (resistance characteristic appears) in the frequency range C in Fig. 4, and even if the frequency becomes high, the impedance Z1 of the first path 1 does not continue to decrease but remains high. That is, in the frequency range C, the impedance Z1 of the first path 1 acts as a resistance rather than a capacitance.

[0033] On the other hand, the impedance Z2 of the second path 2 remains capacitive even in a high frequency band such as the frequency range C shown in Fig. 4, so that from around the frequency at which the impedance Z2 falls below the impedance Z1 of the first path 1, which remains high, the impedance Z1 / / Z2 of the transient voltage absorbing element 11 becomes prominent in terms of the capacitive characteristic on the impedance Z2 side of the second path 2 (the capacitive characteristic appears). Since the impedance of this capacitance is lower than the impedance of the first resistance component R1, the impedance Z1 / / Z2 of the transient voltage absorbing element 11 becomes almost entirely the capacitance on the impedance Z2 side of the second path 2, resulting in a low capacitance.

[0034] As described above, if the first resistance component R1 is higher, the impedance that remains high becomes higher, and the frequency at which the impedance Z2 of the second path 2 falls below the impedance Z1 of the first path 1 becomes lower. This improves the characteristics of the impedance Z1 / / Z2 of the transient voltage absorption element 11 over a wider frequency range and from lower frequencies.

[0035] In this embodiment, the resistance value of the first resistance component R1 shown in FIG. 1 is higher than the resistance value of the second resistance component R2. Therefore, as described above, the impedance Z1 / / Z2 characteristics of the transient voltage absorption element 11 are improved over a wide frequency range and from lower frequencies (due to the high resistance value of the first resistance component R1).

[0036] According to this embodiment, the first path 1, which is a current path through which the surge current flows, includes a first resistance component R1 with high resistance, so that the amount of the signal propagating through the signal line leaking to the reference potential through the first path 1 is suppressed. Also, since the first path 1 includes a first inductor L1 with high inductance, the amount of the signal propagating through the signal line leaking to the reference potential through the first path 1 is suppressed. Also, since the capacitance C2 of the second path 2 can be made smaller than the depletion layer capacitance of the diode BD, the amount of the signal propagating through the signal line leaking to the reference potential through the second path 2 is also suppressed. As a result, a transient voltage absorption circuit is obtained that suppresses deterioration of the high-frequency passing characteristics of the transmission line in a wide band of usable frequencies.

[0037] In addition, while a method is usually used to reduce the PN junction area of ​​the diode to reduce capacitance and suppress the deterioration of insertion loss in a wide frequency band, it is possible to obtain characteristics equivalent to those of a diode with a low capacitance by simply increasing the first resistance component R1 and the first inductor L1, so there is no need to reduce the PN junction area to reduce capacitance. Therefore, the surge current withstand capability of the diode BD does not deteriorate.

[0038] Furthermore, since the capacitance of the entire transient voltage absorbing element 11 can be reduced in the high frequency band, the deterioration of the insertion loss characteristics in the high frequency band can be suppressed.

[0039] Second Embodiment In the second embodiment, several structures for increasing the resistance value of the first resistance component will be illustrated.

[0040] FIG. 5 is a circuit diagram of a transient voltage absorbing element 12 according to a second embodiment. In FIG. 5, elements corresponding to the first inductor L1, the second inductor L2, the first resistance component R1, the second resistance component R2, and the capacitance C2 shown in FIG. 1 are not shown. This transient voltage absorbing element 12 includes eight diodes whose forward direction is from the first terminal electrode E1 to the second terminal electrode E2, and eight diodes whose forward direction is from the second terminal electrode E2 to the first terminal electrode E1. Note that, in the transient voltage absorbing element 12 shown in FIG. 5, eight diodes are provided in each direction as an example, but the number of diodes is not limited to this.

[0041] Fig. 6 is a plan view showing p+ regions formed on the surface of an epitaxial layer Epi on a semiconductor substrate. Fig. 7(A) and Fig. 7(B) are diagrams showing examples of patterns of conductors Cond11, Cond12, Cond13, and Cond14 connected to each p+ region. Note that n+ regions are not shown in Figs. 6, 7(A), and 7(B).

[0042] 7(A) and 7(B) show different distances (lengths of via portions) between the conductors Cond11, Cond12, Cond13, and Cond14 and the p+ region. In the example shown in FIG. 7(B), the distances (lengths of via portions) between the conductors Cond11, Cond12, Cond13, and Cond14 and the p+ region are shorter than in FIG. 7(A). In this way, by shortening the distances (lengths of via portions) between the conductors Cond11, Cond12, Cond13, and Cond14 and the p+ region, the resistance component (first resistance component) equivalently connected in series to the diode can be increased.

[0043] 8(A) and 8(B) are plan views showing n+ regions formed on the surface of an epitaxial layer Epi on a semiconductor substrate. In the example shown in Fig. 8(A), an n+ region is provided surrounding a p+ region. In the example shown in Fig. 8(B), a rod-shaped n+ region is provided extending along the four p+ regions.

[0044] 9(A) and 9(B) are diagrams showing examples of patterns of conductors Cond11, Cond12, Cond13, and Cond14 connected to each n+ region. In FIG. 9(A) and FIG. 9(B), the distances (lengths of via portions) of the connections between the conductors Cond11, Cond12, Cond13, and Cond14 and the n+ region are different. In the example shown in FIG. 9(A), the conductors are connected to the n+ region by finger-shaped pattern portions, whereas in the example shown in FIG. 9(B), the conductors are connected to the n+ region only by bar-shaped pattern portions. That is, in the example shown in FIG. 9(B), the distances (lengths of via portions) of the connections between the conductors Cond11, Cond12, Cond13, and Cond14 and the n+ region are shorter than in FIG. 9(A). In this way, the value of the first resistance component can be increased by shortening the distances (lengths of via portions) of the connections between the conductors Cond11, Cond12, Cond13, and Cond14 and the n+ region.

[0045] As described above, the value of the first resistance component can be determined by the length of the conductor that conducts electricity to the p+ region, the length of the conductor that conducts electricity to the n+ region, the opposing distance in the surface direction of the n+ region to the p+ region, and a combination of these.

[0046] Third embodiment In the third embodiment, another structure for increasing the resistance value of the first resistance component will be illustrated.

[0047] Fig. 10 is a plan view showing the structure of a portion where a plurality of diodes of a transient voltage absorption element according to a third embodiment are formed. As shown in Fig. 10, a p+ region and an n+ region are formed on the surface of an epitaxial layer Epi. A conductor (such as the conductor Cond11 shown in Fig. 2) is formed on the upper surface of the p+ region, and a conductor (such as the conductor Cond12 shown in Fig. 2) is formed on the upper surface of the n+ region, but the conductors are not shown in Fig. 10. In the example shown in Fig. 10, the n+ regions of the four diodes are patterned to surround each p+ region.

[0048] In Figure 10, the larger the distance between the p+ region and the n+ region, the higher the resistance value in the Epi layer. In other words, the value of the first resistance component R1 shown in Figure 1 can be increased. The distances D1 and D2 between the p+ region and the n+ region are distances that allow a layer of the same concentration as the Epi layer to exist between the end of the p+ region and the end of the opposing n+ region.

[0049] Fourth embodiment In the fourth embodiment, another structure for increasing the resistance value of the first resistance component will be illustrated.

[0050] Fig. 11(A) is a cross-sectional view showing the structure of a portion where a plurality of diodes are formed in a transient voltage absorption element according to a fourth embodiment, and Fig. 11(B) is a plan view showing the structure of the portion where the plurality of diodes are formed. As shown in Fig. 11(A) and Fig. 11(B), a p+ region and an n+ region are formed on the surface of an epitaxial layer Epi. A conductor Cond11 is formed on the upper surface of the p+ region, and another conductor is formed on the upper surface of the n+ region.

[0051] A high resistance portion HRP is formed between the p+ region and the n+ region. This high resistance portion HRP is, for example, a portion having a low impurity doping concentration and a higher resistance than the Epi layer, or an insulator forming portion.

[0052] In Figures 11(A) and 11(B), the arrows indicate the path of current flowing in the forward direction through the diode. In this way, by forming the high resistance portion HRP between the p+ region and the n+ region, the current flowing through the diode formation portion consisting of the Epi layer, p+ region, and n+ region bypasses the high resistance portion HRP in the planar direction and thickness direction. In other words, it bypasses the direction along the surface of the semiconductor substrate Sub and in the thickness direction. This structure makes it possible to increase the first resistance component R1 of the diode shown in Figure 1.

[0053] Fifth embodiment Fig. 12(A) is a cross-sectional view showing the structure of a portion where a plurality of diodes are formed in a transient voltage absorption element according to a fifth embodiment, and Fig. 12(B) is a plan view showing the structure of the portion where a plurality of diodes are formed. As shown in Fig. 12(A) and Fig. 12(B), a p+ region and an n+ region are formed on the surface of an epitaxial layer Epi. A conductor Cond11 is formed on the upper surface of the p+ region, and another conductor is formed on the upper surface of the n+ region.

[0054] A high resistance portion HRP is formed between the p+ region and the n+ region. This high resistance portion HRP is, for example, a portion with a low impurity doping concentration and a higher resistance than the Epi layer, or an insulator forming portion. Unlike the examples shown in Figures 11(A) and 11(B), the high resistance portion HRP reaches the semiconductor substrate Sub.

[0055] In Figures 12(A) and 12(B), the arrows indicate the path of current flowing in the forward direction through the diode. In this way, by forming the high resistance portion HRP between the p+ region and the n+ region, the current flowing through the diode formation portion consisting of the Epi layer, p+ region, and n+ region detours around the high resistance portion HRP in the planar direction. In other words, it detours in the direction along the surface of the semiconductor substrate Sub. This structure makes it possible to increase the first resistance component R1 of the diode shown in Figure 1.

[0056] Finally, the present invention is not limited to the above-described embodiments. Appropriate modifications and changes are possible by those skilled in the art. The scope of the present invention is indicated by the claims, not the above-described embodiments. Furthermore, the scope of the present invention includes modifications and changes from the embodiments within the scope of the claims and the equivalent scope. [Explanation of symbols]

[0057] Cond11,Cond12,Cond13,Cond14,Cond2…Conductor BD: Diode C11,C12…depletion layer capacitance C2…capacity C21,C22,C23,C24,C25…Capacity CP1, CP2…Current path D1,D2…interval E1…1st terminal electrode E2…Second terminal electrode Epi...Epitaxial layer HRP…High resistance part Ins1, Ins2, Ins3, Ins4, Ins5...insulators L1…First inductor L2: Second inductor Pad…Pad R1: First resistance component R2…Second resistance component Sub: Semiconductor substrate SL…Signal line T1: First terminal T2: Second terminal T3: Third terminal TR…Trench 1...First route 2...Second route 11, 12...Transient voltage absorbing element 101...Transient voltage absorption circuit

Claims

1. a transient voltage absorbing element connected in shunt between the signal line and a reference potential; a first path and a second path connected in a shunt between the signal line and the reference potential; the first path is a current path through which a surge current flows, the second path is a current path in a frequency band of a signal propagating through the signal line, the first path includes a series circuit including a diode having a depletion layer capacitance, a first inductor component, and a first resistor component; the second path includes a series circuit including a capacitance, a second inductor component, and a second resistance component; the capacitance is a capacitance generated between wirings that are conductive to the diode, The resistance value of the first resistance component is higher than the resistance value of the second resistance component. Transient voltage absorbing element.

2. a semiconductor substrate; an epitaxial layer formed on a surface of the semiconductor substrate; and a p+ region and an n+ region disposed in the epitaxial layer in a direction along a surface of the semiconductor substrate; the diode is formed by the epitaxial layer, the p+ region, and the n+ region; a distance between the p+ region and the n+ region in a direction along a surface of the semiconductor substrate is such that a layer having the same concentration as an Epi layer is present between an end of the p+ region and an opposite end of the n+ region; 2. The transient voltage absorbing element of claim 1.

3. A semiconductor substrate, an epitaxial layer formed on a surface of the semiconductor substrate, and a p+ region and an n+ region formed in the epitaxial layer, the diode is formed by the epitaxial layer, the p+ region, and the n+ region; an insulating portion or a high resistance portion is provided between the p+ region and the n+ region to divert a current flowing through the epitaxial layer; 2. The transient voltage absorbing element of claim 1.

4. the high resistance portion is formed from the epitaxial layer to the semiconductor substrate. The transient voltage absorbing element according to claim 3 .

5. a semiconductor substrate; an epitaxial layer formed on a surface of the semiconductor substrate; a p+ region and an n+ region formed in the epitaxial layer; and a wiring layer formed on an upper portion of the p+ region and electrically connected to the p+ region; the diode is formed by the epitaxial layer, the p+ region, and the n+ region; the wiring layer has a non-covered region that does not cover a portion of the p+ region; 2. The transient voltage absorbing element of claim 1.

6. a semiconductor substrate; an epitaxial layer formed on a surface of the semiconductor substrate; a p+ region and an n+ region formed in the epitaxial layer; and a wiring layer formed on an upper portion of the n+ region and conducting to the n+ region; the diode is formed by the epitaxial layer, the p+ region, and the n+ region; the wiring layer has a non-covered region that does not cover a portion of the n+ region; 2. The transient voltage absorbing element of claim 1.

7. an insulating layer formed on a surface of the epitaxial layer; a trench in contact with the insulating layer and formed over the epitaxial layer and a portion of the semiconductor substrate; Equipped with 7. The transient voltage absorbing element according to claim 2, 3, 5 or 6.

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