Method and apparatus for inspecting semiconductor device

Abstract

To screen out, with high accuracy, a semiconductor device that potentially has a failure risk.SOLUTION: A control unit 70 applies, to a control terminal G, a voltage that is lower than or equal to the predetermined maximum voltage of electrical characteristic inspection and higher than or equal to the rated voltage of the control terminal G for a period of a reference time, and after flowing a specific current IDS from a first terminal D to a second terminal S, applies to the control terminal G a voltage below the threshold voltage of the control terminal G, then measures a first leakage current ID1 flowing from the first terminal D to the second terminal S while a rated voltage VD is applied to the first terminal D. The control unit 70 assesses using the first leakage current ID1 whether or not there is abnormality in a semiconductor device 10.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a method and apparatus for inspecting a semiconductor device. [Background technology]

[0002] Semiconductor devices having a MOS structure, such as MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) or IGBTs (Insulated Gate Bipolar Transistors), are usually subjected to an electrical characteristics test to determine whether or not they are normal products that can obtain desired characteristics. However, even if a product has characteristics within a range of standard values ​​at the electrical characteristics test stage, the characteristics of the product may deteriorate to the point where they fall outside the range of the standard values ​​during actual use of the product. Products that have such a potential risk of failure need to be selected (screened) by tests other than the electrical characteristics test.

[0003] For example, Japanese Patent Laid-Open Publication No. 2014-70895 (Patent Document 1) discloses an inspection method in which a predetermined voltage is applied to a semiconductor device to drive the semiconductor device for a predetermined period of time, causing only a small number of cells that are potentially at risk of failure to generate heat. In this inspection method, a pass / fail judgment criterion is set for the difference in voltage measurement values ​​when a constant current is applied, measured before and after driving the semiconductor device. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2014-70895 A Summary of the Invention [Problem to be solved by the invention]

[0005] The semiconductor device inspection method disclosed in Patent Document 1 is an inspection method that determines whether a product has a potential risk of failure based on whether there are any cells that generate abnormal heat when stress is applied. However, it is known that in semiconductor devices that have a potential risk of failure, the cells of the semiconductor device may not generate abnormal heat even when stress is applied. Therefore, it is expected that the semiconductor device inspection method disclosed in Patent Document 1 may not be able to screen semiconductor devices that have a potential risk of failure.

[0006] The present disclosure has been made to solve the above-mentioned problems, and has an object to screen semiconductor devices that are potentially at risk of failure with high accuracy. [Means for solving the problem]

[0007] An inspection method according to one aspect of the present disclosure is a method for inspecting a semiconductor device having a control terminal, a first terminal, and a second terminal. The inspection method includes a semiconductor driving step, a first leakage current measuring step, and an abnormality determination step. The semiconductor driving step applies a voltage to the control terminal for a reference time that is equal to or lower than a maximum voltage of a predetermined electrical characteristic test and equal to or higher than a rated voltage of the control terminal, and causes a specific current to flow from the first terminal to the second terminal. The first leakage current measuring step applies a voltage lower than a threshold voltage of the control terminal to the control terminal after the step of causing the specific current to flow, and measures a first leakage current flowing from the first terminal to the second terminal with the specific voltage being applied to the first terminal. The abnormality determination step uses the first leakage current to determine whether or not there is an abnormality in the semiconductor device.

[0008] An inspection device according to another aspect of the present disclosure is an inspection device for inspecting a semiconductor device having a control terminal, a first terminal, and a second terminal. The inspection device includes a first power supply unit, a second power supply unit, and a control unit. The first power supply unit is connected between the control terminal and the second terminal. The second power supply unit is connected between the first terminal and the second terminal. The control unit controls the first power supply unit and the second power supply unit. The control unit applies a voltage to the control terminal that is equal to or lower than a maximum voltage of a predetermined electrical characteristic test and equal to or higher than a rated voltage of the control terminal for a reference time, and then flows a specific current from the first terminal to the second terminal, and applies a voltage that is lower than a threshold voltage of the control terminal to the control terminal, and measures a first leakage current flowing from the first terminal to the second terminal while the specific voltage is being applied to the first terminal. The control unit uses the first leakage current to determine whether or not there is an abnormality in the semiconductor device. Effect of the Invention

[0009] According to the semiconductor device inspection method and inspection apparatus of the present disclosure, the first leakage current is used to determine whether or not there is an abnormality in the semiconductor device, making it possible to screen semiconductor devices that are potentially at risk of failure with high accuracy. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram showing an inspection device for inspecting a semiconductor device according to a first embodiment. [Diagram 2] 2 is a flowchart showing a process flow of a semiconductor device inspection method performed by the inspection apparatus of FIG. 1 for each semiconductor device 10 to be inspected. [Diagram 3] 3 is a timing chart showing changes in the gate and drain of the semiconductor device and changes in the drain current in the inspection method of FIG. 2; [Figure 4] 4 is a diagram showing a relative value of the drain leakage current of a defective product to the drain leakage current of a normal product, measured in the method for inspecting the semiconductor device according to the first embodiment. FIG. [Diagram 5]10 is a flowchart showing a process flow of a semiconductor device inspection method according to a second embodiment. [Figure 6] 6 is a timing chart showing changes in the gate and drain of the semiconductor device and changes in the drain current in the inspection method of FIG. 5; [Figure 7] FIG. 13 is a block diagram showing an inspection device for inspecting a semiconductor device according to a fourth embodiment. [Figure 8] 8 is a flowchart showing a process flow of a semiconductor device inspection method performed by the inspection apparatus of FIG. 7 for each semiconductor device to be inspected. [Figure 9] 9 is a timing chart showing changes in the gate and drain of the semiconductor device and changes in the drain current in the inspection method of FIG. 8; [Figure 10] FIG. 13 is a diagram showing a relative value of the drain leakage current in the fourth embodiment to the drain leakage current in the first embodiment, regarding the drain leakage current measured in the method for inspecting a semiconductor device. [Figure 11] FIG. 13 is a block diagram showing an inspection device for inspecting a semiconductor device according to a sixth embodiment. [Figure 12] 12 is a flowchart showing a process flow of a semiconductor device inspection method performed by the inspection apparatus of FIG. 11 for each semiconductor device to be inspected. [Figure 13] 13 is a timing chart showing changes in the gate and drain of the semiconductor device and changes in the drain current in the inspection method of FIG. 12; [Figure 14] 11 is a diagram showing the correspondence between gate voltage, drain leakage current when the gate voltage increases, and drain leakage current when the gate current decreases. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference characters, and their description will not be repeated in principle.

[0012] Sequential codes are represented using the symbol "~". For example, "S101~S103" means "S101, S102, S103".

[0013] Embodiment 1 A first embodiment will be described with reference to FIGS. 1 to 4. FIG. 1 is a block diagram showing an inspection device 1 for inspecting a semiconductor device 10 according to the first embodiment. The semiconductor device 10, which is an object to be inspected (a specimen), has a gate G (control terminal), a drain D (first terminal), and a source S (third terminal). In the semiconductor device 10, a circuit is formed by a large number of cells formed on a semiconductor chip. The semiconductor device 10 is a switching device that switches on and off according to the voltage of the gate G (gate voltage). Examples of the semiconductor device 10 include a power MOSFET or a transistor having a MOS structure such as an IGBT. FIG. 1 shows an n-channel type power MOSFET having three terminals, a gate G, a drain D, and a source S, as an example of the semiconductor device 10. The built-in diode connected in inverse parallel to the power MOSFET includes a Pn diode that is structurally parasitic between the source S and the drain D in the power MOSFET, or a diode in which a Schottky junction is intentionally formed. The power MOSFET and the built-in diode are collectively referred to as the semiconductor device 10.

[0014] The semiconductor device 10 may be an IGBT having three terminals, a gate G (control terminal), a collector C (first terminal), and an emitter E (second terminal), or may be an RC-IGBT (Reverse Conducting-IGBT) having three terminals, a gate G (control terminal), a collector C (first terminal), and an emitter E (second terminal), in which an IGBT and a diode are integrated into one chip. The semiconductor device 10 may be in a chip state or in a wafer state before dicing. The semiconductor device 10 is usable for both chip testing and wafer testing. The semiconductor device 10 may be a semiconductor module or semiconductor package incorporating a power MOSFET, an IGBT, or an RC-IGBT. The inspection device 1 is usable for both module testing and package testing.

[0015] The inspection device 1 includes a control unit 70, a power supply unit 80 (first power supply unit), a power supply unit 90 (second power supply unit), and an ammeter 40. The power supply unit 80 is connected between a gate G and a source S. The power supply unit 90 is connected between a drain D and a source S. The control unit 70 controls the power supply units 80 and 90. The control unit 70 includes a computer having a processor such as a CPU (Central Processing Unit) and a storage unit. The storage unit stores, for example, an OS (Operating System) program and an inspection program that performs inspection processing on the semiconductor device 10.

[0016] The power supply unit 80 includes a constant voltage power supply 20, a switch 21, and a constant voltage power supply 30. The constant voltage power supply 20 supplies a predetermined voltage V G It outputs the voltage V G is a voltage (gate non-driving voltage) less than a predetermined gate threshold voltage of the gate G. The constant voltage power supply 50 supplies a predetermined gate voltage V GS The gate voltage V GS is a voltage that is equal to or lower than the maximum voltage of a predetermined electrical characteristic test performed on the semiconductor device 10 and is equal to or higher than the rated voltage of the gate G.

[0017] The negative electrode of the constant-voltage power supply 20 is connected to the source S. The negative electrode of the constant-voltage power supply 50 is connected to the source S. The switch 21 is connected between the gate G and the positive electrode of the constant-voltage power supply 20, between the gate G and the source S, and between the gate G and the positive electrode of the constant-voltage power supply 50. The switch 21 switches the connection destination of the gate G between the positive electrode of the constant-voltage power supply 20, the source S, and the positive electrode of the constant-voltage power supply 50 in response to a switching signal Sg1 output from the control unit 70.

[0018] The power supply unit 90 includes a constant voltage power supply 30, a switch 31, a constant current power supply 60, and a switch 61. The constant voltage power supply 30 supplies a predetermined voltage V D The constant current power supply 60 outputs a predetermined drain current I DS (specific current). The switch 61 is connected between the drain D and the constant current power supply 60. The constant current power supply 60 is connected to the source S. The switch 31 is connected between the drain D and the positive electrode of the constant voltage power supply 30. The ammeter 40 is connected between the negative electrode of the constant voltage power supply 30 and the source S.

[0019] The switch 31 switches the connection state between the drain D and the positive electrode of the constant voltage power supply 30 between a conductive state (ON) and a non-conductive state (OFF) in response to a switching signal Sg2a, which is an ON / OFF signal output from the control unit 70. The switch 61 switches the connection state between the drain D and the constant current power supply 60 between a conductive state and a non-conductive state in response to a switching signal Sg2b.

[0020] The control unit 70 includes a drain leakage current measuring means 71, a semiconductor driving means 72, a drain leakage current measuring means 73, and an abnormality determining means 74. The semiconductor driving means 72 switches the switch 21 in response to a switching signal Sg1 from the control unit 70 to control a gate voltage V GS is applied to the gate G from the constant voltage power supply 50. The semiconductor driving means 72 turns on the switch 61 in response to a switching signal Sg2b from the control unit 70, and applies a predetermined drain current I DSThe semiconductor device 10 is driven by passing a predetermined drain current I DS can be set to any value as long as it is equal to or less than the rated current of the semiconductor device 10 and does not change the temperature of the entire semiconductor device 10 in combination with the reference time. GS can be set to any value as long as it is equal to or less than the maximum voltage of a predetermined electrical characteristic test performed on the semiconductor device 10 and is equal to or greater than the rated voltage of the gate G. The maximum voltage of the electrical characteristic test means the maximum voltage applied to the gate G in all electrical characteristic tests performed to guarantee the performance of the semiconductor device 10.

[0021] In general, in a performance test of the semiconductor device 10, static characteristic tests are performed, such as a gate leakage current, a drain leakage current, an on-resistance, a gate threshold voltage, and a gate overvoltage screening. Among these, the gate overvoltage screening is a test in which the voltage and temperature changes are accelerated in order to make defects in the gate oxide film (such as crystal defects or insufficient oxide film thickness) more noticeable. For this reason, a voltage exceeding the rated voltage of the semiconductor device 10 is applied to the gate G in the performance test of the semiconductor device 10.

[0022] The drain leakage current measuring means 71 and 73 are both configured to switch the switch 21 based on a switching signal Sg1 from the control unit 70, and to receive the gate voltage V G is applied to the gate G, and the switch 31 is turned on based on a switching signal Sg2a from the control unit 70 to supply a drain voltage V D is applied to the drain D, the drain leakage current I D2 ,I D1 The drain leakage current measuring means 71 measures the drain leakage current I before the semiconductor device 10 is driven by the semiconductor driving means 72. D2 The drain leakage current measuring means 73 measures the drain leakage current I after the semiconductor device 10 is driven by the semiconductor driving means 72. D1(First drain leakage current) is measured.

[0023] The abnormality determination means 74 detects the drain leakage current I D1 ,I D2 Based on one or both of the drain leakage currents, it is determined whether or not there is an abnormality in the semiconductor device 10. For example, the drain leakage current of a normal semiconductor device 10 (normal product) is measured in advance, and a reference current Ia that clearly indicates the presence or absence of an abnormality is determined in advance based on the drain leakage current. The abnormality determination means 74 measures the drain leakage current I D1 Whether or not there is an abnormality in the semiconductor device 10 is determined based on whether or not the drain leakage current I D1 ,I D2 Difference (I D1 -I D2 It may be possible to determine whether or not there is an abnormality in the semiconductor device 10 by checking whether the current Id is equal to or greater than a reference current Id at which the presence or absence of an abnormality becomes clear. Although not shown in the figure, in practice, the semiconductor device 10 is sorted based on the determination result, and an abnormality is notified (by display, sound, vibration, etc.).

[0024] The constant voltage power supply 20 outputs a voltage that is less than the gate threshold voltage of the gate G. The constant voltage power supply 20 is connected to the gate G of the semiconductor device 10 via a switch 21. The constant voltage power supply 20 applies a gate non-driving voltage, a gate voltage V G to put the semiconductor device 10 into a non-driven state. That is, the constant voltage power supply 20 is a power supply for putting the semiconductor device 10 into an off state. The voltage output by the constant voltage power supply 20 may be any value, as long as it is less than the gate threshold voltage of the gate G, and may be 0 V or a negative voltage (minus voltage).

[0025] The switch 21 is a changeover switch for switching whether the gate G is connected to the constant voltage power supply 20, the constant voltage power supply 50, or the source S.

[0026] The constant voltage power supply 30 is connected to the drain D of the semiconductor device 10 via a switch 31, and a drain voltage V D This is the power supply for applying the drain voltage V D may be any value as long as it is less than the rated voltage of the semiconductor device 10.

[0027] The constant voltage power supply 50 supplies a gate voltage V that is equal to or lower than the maximum voltage applied in the electrical characteristic test of the semiconductor device 10 and is equal to or higher than the rated voltage of the semiconductor device 10. GS The constant voltage power supply 50 is connected to the gate G of the semiconductor device 10 via the switch 21. The constant voltage power supply 50 outputs a gate voltage V G The constant voltage power supply 50 applies a voltage to the semiconductor device 10 to drive the semiconductor device 10. That is, the constant voltage power supply 50 is a power supply for turning on the semiconductor device 10.

[0028] The switch 31 is a change-over switch for connecting the constant voltage power supply 30 to the drain D of the semiconductor device 10 .

[0029] The ammeter 40 is connected in series with the constant voltage power supply 30 and is used to measure the drain leakage current flowing from the drain D to the source S of the semiconductor device 10. In Fig. 1, the ammeter 40 is connected between the source S of the semiconductor device 10 and the negative electrode of the constant voltage power supply 30, but the location where the ammeter 40 is provided is not limited to between the source S of the semiconductor device 10 and the negative electrode side of the constant voltage power supply 30. The ammeter 40 may be provided at any location where the drain leakage current flowing from the drain D to the source S can be measured.

[0030] The constant current power supply 60 is connected to the drain D of the semiconductor device 10 via a switch 61. The constant current power supply 60 supplies a drain current I DS It is a power source that supplies the current.

[0031] The switch 61 is a changeover switch for connecting the constant current power supply 60 to the drain D of the semiconductor device 10. The changeover switches 21, 31, and 61 correspond to mechanical relays or semiconductor switches (IGBT or MOSFET), etc.

[0032] Fig. 2 is a flowchart showing the process flow of a semiconductor device inspection method performed by the inspection device 1 of Fig. 1 for each semiconductor device 10 to be inspected. The inspection device 1 executes the inspection method shown in Fig. 2 to determine whether the semiconductor device 10 is normal or defective. In the following, each step will be simply abbreviated as S.

[0033] 2 correspond to the semiconductor driving means 72 and the semiconductor driving step. S104 to S106 correspond to the drain leakage current measuring means 73 and the first drain leakage current measuring step. S107 to S109 correspond to the abnormality determining means 74 and the abnormality determining step.

[0034] The control unit 70 first drives the semiconductor device 10. Specifically, the control unit 70 switches the switch 21 based on the switching signal Sg1 to supply a predetermined gate voltage V GS is applied to the gate G of the semiconductor device 10, and the switch 61 is turned on based on the switching signal Sg2b to supply a predetermined drain current I DS is passed through the drain D of the semiconductor device 10 to drive the semiconductor device 10 for a reference time (S101). The semiconductor device 10 is driven until the reference time has elapsed during which the entire semiconductor device 10 does not generate heat (NO in S102). When the reference time has elapsed (YES in S102), the control unit 70 switches the switch 21 based on the switching signal Sg1 to connect the gate G of the semiconductor device 10 to the source S, and turns off the switch 61 based on the switching signal Sg2b to stop driving the semiconductor device 10 (S103).

[0035] After driving the semiconductor device 10, the control unit 70 grasps the state of the semiconductor device 10 due to the driving. Specifically, based on the switching signal Sg1, the control unit 70 switches the switch 21 to apply a predetermined voltage V G from the constant voltage power supply 20 to the gate G of the semiconductor device 10, and turns on the switch 31 based on the switching signal Sg2a to apply a predetermined constant voltage V D from the constant voltage power supply 30 to the drain D of the semiconductor device 10 (S104). At this time, the control unit 70 measures the drain leakage current I D1 of the semiconductor device 10 with the ammeter 40 (S105). After measuring the drain leakage current I D1 , based on the switching signal Sg1, the control unit 70 switches the switch 21 to connect the gate G and the source S of the semiconductor device 10, and turns off the switch 31 based on the switching signal Sg2a (S106).

[0036] Thereafter, the control unit 70 determines whether there is an abnormality in the semiconductor device 10. Specifically, the control unit 70 determines whether there is an abnormality in the semiconductor device 10 based on whether the drain leakage current I D1 measured in S105 is equal to or greater than a predetermined reference current Ia (S107). If I D1 ≥ Ia (YES in S107), the control unit 70 determines that there is an abnormality in the semiconductor device 10 (S108) and ends the inspection method. On the other hand, if I D1 < Ia (NO in S107), the control unit 70 determines that there is no abnormality in the semiconductor device 10 and the semiconductor device 10 is normal (S109) and ends the inspection method.

[0037] FIG. 3 is a timing chart showing the changes in each of the gate G and the drain D of the semiconductor device 10 in the inspection method of FIG. 2 and the change in the drain current I DS . In FIG. 3, the voltage Vm is the maximum voltage applied in a predetermined electrical characteristic inspection. The voltage Vr (<Vm) is the rated voltage of the gate G. The voltage Vth (<Vr) is the gate threshold voltage of the gate G. The same applies to FIGS. 6, 9, and 13 described later.

[0038] First, a gate voltage V that is equal to or lower than the maximum voltage Vm applied in the electrical characteristic test and is equal to or higher than the rated voltage Vr of the gate G is applied to the gate G of the semiconductor device 10. GS is applied to the semiconductor device 10 so that the semiconductor device 10 is put into a drive state, and a drain current I flows from the drain D to the source S during a reference time (current application time) Tr1. DS flows, and stress is applied to the semiconductor device 10. Thereafter, the gate G is set to 0 V, and the drain current I DS Then, a predetermined voltage V less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10. G is applied, and a predetermined voltage V D is applied, the drain leakage current I D1 is measured. The drain leakage current I D1 After the measurement, the power supplies applied to the gate G and drain D are turned off.

[0039] From the analysis results of abnormal products caused by pattern defects between the gate electrode and source electrode of semiconductor devices having a MOS structure such as MOSFET, it was found that the drain leakage current of the abnormal product is larger than that of the normal product when the gate voltage is lower than the gate threshold voltage immediately after stress application by HTRB (High Temperature Reverse Bias) or ΔV / Δt test. It was also found that the drain leakage current of both normal and abnormal products attenuates with the passage of time immediately after stress application, and finally becomes several nA order, which is judged to be normal. From these results, it was found that the drain leakage current increases again when a current is passed between the drain D and source S while a voltage (e.g. 33V) exceeding the rated voltage (e.g. ±20V) is applied to the gate G of a semiconductor device with a short TDDB (Time Dependent Dielectric Breakdown) life that has been previously selected by another method.

[0040] 4 is a diagram showing the relative value (ratio) of the drain leakage current of an abnormal product to the drain leakage current of a normal product, measured in the semiconductor device inspection method according to the first embodiment. FIG. 4 shows the ratio of the drain leakage current after stress is applied to an abnormal product with a short TDDB lifetime to the drain leakage current after stress is applied to a normal product. Under the inspection conditions, the gate rated voltage of the semiconductor device 10 to be inspected is ±20V, while under the stress application conditions, the gate voltage V GS is 33V, and the drain current I DS The voltage V is 100mA and the current flow time is 500ms. The measurement conditions for the drain leakage current after stress application are voltage V G is 0V, and the drain voltage V D The drain leakage current of the defective product is about 2.4 times that of the normal product, as shown in FIG.

[0041] In this way, the method for testing a semiconductor device according to the first embodiment is a method for testing a gate voltage V GS A predetermined drain current I flows from the drain D to the source S of the semiconductor device 10. DS A semiconductor driving step (S101 to S103 in FIG. 2) is performed in which a current is passed through the semiconductor device 10 to drive the semiconductor device 10 for a reference time during which the entire semiconductor device 10 does not heat up, thereby applying stress. After the semiconductor driving step, a voltage V less than a gate threshold voltage is applied to the gate G of the semiconductor device 10. G A predetermined drain voltage V is applied between the drain D and source S of the semiconductor device 10. D is applied, and the drain leakage current I D1 A first drain leakage current measurement step (S104 to S106 in FIG. 2) for measuring the drain leakage current I D1and an anomaly determination step (S107 to S109 in FIG. 2) of determining whether or not there is an anomaly in the semiconductor device 10 based on the above (see FIG. 2). With this configuration, an anomaly in the semiconductor device 10 can be made apparent by passing current for a short period of time. As a result, it is possible to screen the semiconductor device 10 for potential failure risks with high accuracy without damaging the semiconductor device 10. In addition, it becomes possible to carry out physical analysis and electrical characteristic testing to find out the cause of the defect in the semiconductor device 10 that shortens the TDDB life.

[0042] Embodiment 2 The second embodiment will be described with reference to Figs. 5 and 6. Fig. 5 is a flowchart showing a process flow of a method for inspecting a semiconductor device according to the second embodiment. A normal product and an abnormal product are distinguished by executing the method for inspecting a semiconductor device shown in Fig. 5. S201 to S203 shown in Fig. 5 correspond to the drain leakage current measuring means 71 and the second drain leakage current measuring step. S204 to S206 correspond to the semiconductor driving means 72 and the semiconductor driving step. S207 to S209 correspond to the drain leakage current measuring means 73 and the first drain leakage current measuring step. S210 to S212 correspond to the anomaly determining means 74 and the anomaly determining step.

[0043] The inspection method shown in FIG. 5 is a method of applying a voltage V V less than a gate threshold voltage to the gate G of the semiconductor device 10 before the semiconductor driving process. G A predetermined drain voltage V is applied between the drain D and source S of the semiconductor device 10. D is applied, and the drain leakage current I D2 The anomaly determination step (S210 to S212 in FIG. 5) includes a second drain leakage current measurement step (S201 to S203 in FIG. 5) for measuring the drain leakage current I D1 ,I D2 Difference (I D1 -I D2 ) is equal to or greater than the reference current Id. G and the drain voltage VD is the voltage V applied in the first drain leakage current measurement step. G and the drain voltage V D are the same as

[0044] FIG. 6 shows the change in the gate G and drain D of the semiconductor device 10 in the inspection method of FIG. 5, and the drain current I DS 5 and 6, the flow of processing of the semiconductor device inspection method according to the second embodiment will be described. In S201 and S202 shown in FIG. 5, a predetermined voltage V less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device. G is applied to the drain D, and a predetermined drain voltage V D is applied, the drain leakage current I D2 Then, in S203, the power supplies applied to the gate G and the drain D are turned off. In S204 and S205, a voltage V that is equal to or lower than the maximum voltage Vm applied in the electrical characteristic test and equal to or higher than the rated voltage Vr is applied to the gate G of the semiconductor device 10. GS is applied to the semiconductor device 10 so that the semiconductor device 10 is put into a drive state, and a drain current I flows from the drain D to the source S during a reference time Tr2. DS flows, and stress is applied to the semiconductor device 10. Thereafter, in S206, the voltage of the gate G is set to 0 V, and the drain current I DS In steps S207 and S208, a predetermined voltage V less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10. G is applied to the drain D, and a predetermined drain voltage V D is applied, the drain leakage current I D1 In S209, the power supplies applied to the gate G and the drain D are turned off.

[0045] Thereafter, it is determined whether or not there is an abnormality in the semiconductor device 10. Specifically, the drain leakage current I measured by the first drain leakage current measurement step and the second drain leakage current measurement step respectively D1 ,I D2 The difference between (I D1 -I D2 ) is compared with the reference current Id to determine whether or not there is an abnormality in the semiconductor device 10 (S210). If I D1 -I D2 ≧Id (YES in S210), it is determined that there is an abnormality in the semiconductor device 10 (S211), and the inspection method ends. On the other hand, if I D1 -I D2 <Id (NO in S210), it is determined that there is no abnormality in the semiconductor device 10 and the semiconductor device 10 is normal (S212), and the inspection method ends. S210 may determine whether the semiconductor device 10 is a normal product or a defective product based on the drain leakage currents I D2 ,I D1 before and after stress application.

[0046] According to this configuration, since an abnormality can be manifested by short-time energization, the semiconductor device 10 can be screened with high precision without damaging the semiconductor device 10, and a semiconductor device 10 having a potential risk of failure can be screened. Further, since the determination is made using the drain leakage currents I D2 ,I D1 before and after stress application, the determination can be made while suppressing fluctuations in the drain leakage current due to manufacturing variations of the semiconductor device 10, and the accuracy of screening abnormal semiconductor devices 10 can be improved. For example, the normal products and the defective products may be discriminated based on the ratio of the drain leakage currents (I D1 :I D2 ).

[0047] Embodiment 3. 1 to 3, an inspection device 1 for inspecting a semiconductor device 10 includes a drain leakage current measuring means 71, a semiconductor driving means 72, a drain leakage current measuring means 73, and an abnormality determining means 74. The semiconductor driving means 72 applies a gate voltage V that is equal to or lower than a maximum voltage Vm applied in a predetermined electrical characteristic inspection and is equal to or higher than a rated voltage Vr. GS is applied to drive the semiconductor device 10 during a reference period Tr1 to generate a predetermined drain current I DS The drain leakage current measuring means 71 applies a voltage V that is less than a predetermined gate threshold voltage Vth to the semiconductor device 10 before the semiconductor device 10 is driven by the semiconductor driving means 72. G is applied to the gate G, and a predetermined voltage V D is applied to the drain D, the drain leakage current I D2 The drain leakage current measuring means 73 measures a voltage V that is less than a predetermined gate threshold voltage Vth in the semiconductor device 10 after the semiconductor device 10 is driven by the semiconductor driving means 72. G is applied to the gate G, and a predetermined voltage V D is applied to the drain D, the drain leakage current I D1 The abnormality determination means 74 measures the measured drain leakage current I D1 ,I D2 is used to determine whether or not there is an abnormality in the semiconductor device 10. According to this configuration, since an abnormality can be made apparent by passing a current for a short period of time, it is possible to screen the semiconductor device 10 for potential failure risks with high accuracy without damaging the semiconductor device 10.

[0048] Embodiment 4 An inspection method for a semiconductor device according to a fourth embodiment will be described with reference to Figs. 7 to 10. Fig. 7 is a block diagram showing an inspection device 4 for inspecting a semiconductor device 10 according to the fourth embodiment. The configuration of the inspection device 4 is such that the control unit 70, power supply unit 80, and power supply unit 90 of the inspection device 1 in Fig. 1 are replaced with a control unit 70a, a voltage variable power supply 81 (first power supply unit), and a CVCC (Constant Voltage Constant Current) power supply 91 (second power supply unit), respectively. Since the rest is the same, the description will not be repeated.

[0049] The configuration of control unit 70a is such that drain leakage current measuring means 71, semiconductor driving means 72, and drain leakage current measuring means 73 in Fig. 2 are replaced with drain leakage current measuring means 71a, semiconductor driving means 72a, and drain leakage current measuring means 73a, respectively. Since the rest is the same, the description will not be repeated.

[0050] The semiconductor driving means 72a outputs a predetermined gate voltage V from a voltage variable power supply 81 based on a voltage setting signal Sg21 from the control unit 70a. GS is applied to the gate G of the semiconductor device 10, and a predetermined drain current I DS is passed through the drain D of the semiconductor device 10 to drive the semiconductor device 10.

[0051] The drain leakage current measuring means 71a and 73a are both configured to receive a predetermined gate non-drive voltage V from a voltage variable power supply 81 based on a voltage setting signal Sg21 from the control unit 70a. G is applied to the gate G of the semiconductor device 10, and a predetermined drain voltage V D is applied to the drain D of the semiconductor device 10, the drain leakage current I D2 ,I D1The drain leakage current measuring means 71a measures the drain leakage current I before the semiconductor device 10 is driven by the semiconductor driving means 72a. D2 The drain leakage current measuring means 73a measures the drain leakage current I after the semiconductor device 10 is driven by the semiconductor driving means 72. D1 Measure.

[0052] The voltage variable power supply 81 is a gate power supply that is connected to the gate G of the semiconductor device 10 and applies a gate voltage between the gate G and source S of the semiconductor device 10 based on a voltage setting signal Sg21 from the control unit 70a to set the state of the semiconductor device 10 to a drive state (on state) or a non-drive state (off state). The voltage for setting the semiconductor device 10 to a drive state may be any value as long as it is equal to or less than the maximum voltage applied in an electrical characteristic test of the semiconductor device 10 and equal to or greater than the rated voltage. The voltage for setting the semiconductor device 10 to a non-drive state may be any value as long as it is less than the gate threshold voltage, and may be 0V or a negative voltage.

[0053] The CVCC power supply 91 is connected to the drain D of the semiconductor device 10, and a drain voltage V D While applying a constant current I from the drain D to the source S, DS The CVCC power supply 91 is a power supply that operates as a constant voltage power supply when the load state is less than the set current, and operates as a constant current power supply when the load state is greater than the set current. Based on the voltage / current setting signal Sg22 from the control unit 70a, the drain voltage V D and the drain current I DS The CVCC power supply 91 outputs a drain current I DS and the drain voltage V DIn other words, the CVCC power supply 91 operates in the constant current mode when the semiconductor device 10 is in the on state, and in the constant voltage mode when the semiconductor device 10 is in the off state.

[0054] Fig. 8 is a flow chart showing the process flow of the semiconductor device inspection method performed by the inspection device 4 of Fig. 7 for each semiconductor device 10 to be inspected. The inspection device 4 executes the inspection method shown in Fig. 8 to determine whether the semiconductor device 10 is normal or abnormal. S401 and S402 shown in Fig. 8 correspond to the drain leakage current measuring means 71a and the second drain leakage current measuring step. S403 and S404 correspond to the semiconductor driving means 72a and the semiconductor driving step. S405 to S407 correspond to the drain leakage current measuring means 73a and the first drain current measuring step. S408 to S410 correspond to the anomaly determining means 74 and the anomaly determining means step.

[0055] The control unit 70a supplies a gate voltage V, which is a gate non-driving voltage less than the gate threshold voltage, from the voltage variable power supply 81 to the gate G of the semiconductor device 10 based on the voltage setting signal Sg21. G Based on the voltage / current setting signal Sg22, a predetermined drain voltage V D At this time, the control unit 70a applies a drain leakage current I D2 The control unit 70a then measures the gate voltage V based on the voltage setting signal Sg21 for a reference time (NO in S404) that is equal to or lower than the maximum voltage applied in the electrical characteristic test of the semiconductor device 10 and is equal to or higher than the rated voltage. GS is output from the voltage variable power supply 81, and a drive voltage is applied between the gate G and source S of the semiconductor device 10, turning on the semiconductor device 10 (S403). As a result, the operation mode of the CVCC power supply 91 automatically switches to the constant current mode, and a constant drain current I flows from the drain D to the source S of the semiconductor device 10. DSflows, and stress is applied to the semiconductor device 10.

[0056] When the reference time has elapsed (YES in S404), the control unit 70a applies, based on the voltage setting signal Sg21, a gate voltage V that is a gate non-driving voltage less than the gate threshold voltage to the gate G of the semiconductor device 10 from the voltage variable power supply 81 to turn off the semiconductor device 10 (S405). As a result, the operation mode of the CVCC power supply 91 is automatically switched to the constant voltage mode, and a predetermined drain voltage V is applied to the drain D of the semiconductor device 10 (S405). That is, S405 is started without stopping the semiconductor device 10 after the time during which the drain current I flows has elapsed the reference time. At this time, the control unit 70a measures the drain leakage current I of the semiconductor device 10 using the ammeter 40 (S406). After measuring the drain leakage current I, the control unit 70a sets the voltage of the voltage variable power supply 81 to 0V based on the voltage setting signal Sg21, and sets the voltage of the CVCC power supply 91 to 0V based on the voltage / current setting signal Sg22 to stop applying voltage to the gate G and the drain D of the semiconductor device 10 (S407). The voltage V and the drain voltage V applied in the second drain leakage current measurement step are the same as the voltage V and the drain voltage V applied in the first drain leakage current measurement step, respectively. G flows, and stress is applied to the semiconductor device 10. D is applied (S405). That is, S405 is started without stopping the semiconductor device 10 after the time during which the drain current I DS flows has elapsed the reference time. At this time, the control unit 70a measures the drain leakage current I D1 of the semiconductor device 10 using the ammeter 40 (S406). After measuring the drain leakage current I D1 , the control unit 70a sets the voltage of the voltage variable power supply 81 to 0V based on the voltage setting signal Sg21, and sets the voltage of the CVCC power supply 91 to 0V based on the voltage / current setting signal Sg22 to stop applying voltage to the gate G and the drain D of the semiconductor device 10 (S407). The voltage V G and the drain voltage V D applied in the second drain leakage current measurement step are the same as the voltage V G and the drain voltage V D applied in the first drain leakage current measurement step, respectively.

[0057] Thereafter, the control unit 70a determines whether there is an abnormality in the semiconductor device 10. Specifically, the control unit 70a determines whether there is an abnormality in the semiconductor device 10 based on whether the difference (I D2 -I D1 ) between the drain leakage current I D1 measured in S402 and the drain leakage current I D2 measured in S406 is equal to or greater than a predetermined reference current Id (S408). I D1 -I D2If it is ≧Id (YES in S408), the control unit 70a determines that there is an abnormality in the semiconductor device 10 (S409) and ends the inspection method. On the other hand, I D1 -I D2 If it is <Id (NO in S408), the control unit 70a determines that the semiconductor device 10 is normal (S410) and ends the inspection method. In S408, based on the drain leakage current I D2 ,I D1 before and after stress application, the normality and abnormality of the semiconductor device 10 may be determined.

[0058] FIG. 9 is a timing chart showing the changes in each of the gate G and the drain D of the semiconductor device 10 in the inspection method of FIG. 8 and the change in the drain current I DS together. First, a gate voltage V G that is a gate non-driving voltage less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10, and a predetermined drain voltage V D is applied between the drain D and the source S of the semiconductor device 10, and the drain leakage current I D2 is measured by the ammeter 40. After the measurement of the drain leakage current I D2 ends, the application of the voltage to the gate G and the drain D continues. Thereafter, a gate voltage V GS that is less than the maximum voltage Vm applied in the electrical characteristic inspection of the semiconductor device 10 and greater than or equal to the rated voltage Vr is applied to the gate G for a reference time Tr4, and the semiconductor device 10 is turned on. As a result, during the reference time Tr4, a constant drain current I DS flows from the drain D to the source S of the semiconductor device 10, and stress is applied to the semiconductor device 10. When a gate voltage V G less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10 from the time when the reference time Tr4 has elapsed, and a predetermined drain voltage V D is applied between the drain D and the source S of the semiconductor device 10, and the drain leakage current I D1 is measured by the ammeter 40. Thereafter, the application of the voltage to the gate G and the drain D of the semiconductor device 10 is stopped.

[0059] FIG. 10 is a diagram showing the relative value of the drain leakage current in the fourth embodiment to the drain leakage current in the first embodiment, with respect to the drain leakage current measured in the semiconductor device inspection method. In FIG. 10, an abnormal semiconductor device with a short TDDB lifetime, which has been selected in advance by a different screening method, is the subject of inspection. The drain leakage current shown in FIG. 10 is the drain leakage current (first drain leakage current) measured after stress is applied to the semiconductor device in both the first and fourth embodiments. Under the inspection conditions, the gate rated voltage of the semiconductor device to be inspected is ±20V, whereas under the stress application conditions, the gate voltage V GS is 33V, and the drain current I DS The drain leakage current measurement conditions after stress application are: gate non-drive voltage V G is 0V, and the drain voltage V D is 10 V. The product ratings of the semiconductor device to be inspected are 3300 V and 47 A.

[0060] 10, the drain leakage current measured by the semiconductor device inspection method according to embodiment 4 is about 1.2 times higher than the drain leakage current measured by the semiconductor device inspection method according to embodiment 1. That is, the screening sensitivity of the semiconductor device inspection method according to embodiment 4 is higher than that of embodiment 1.

[0061] As described above, according to the inspection method of the fourth embodiment, since an abnormality can be made apparent by passing a current for a short time, it is possible to screen the semiconductor device 10 having a potential risk of failure with high accuracy without damaging the semiconductor device. Also, since the determination is performed based on the drain leakage current before and after the application of stress, it is possible to determine the semiconductor device 10 while suppressing the fluctuation of the drain leakage current due to the manufacturing variation of the semiconductor device 10, and the screening accuracy is improved.

[0062] In addition, in FIG. 8 and FIG. 9, the drain leakage current I D2 Immediately after measuring, in step S403, a drive voltage is applied between the gate G and source S of the semiconductor device 10 to generate a constant drain current I DS The drain leakage current I D2 It is not necessary to apply stress to the semiconductor device 10 immediately after the measurement is completed.

[0063] Embodiment 5. 7 to 9, the inspection device 4 for inspecting the semiconductor device 10 includes a drain leakage current measuring means 71a, a semiconductor driving means 72a, a drain leakage current measuring means 73a, and an abnormality determining means 74. The semiconductor driving means 72a applies a gate voltage V that is equal to or lower than a maximum voltage Vm applied in a predetermined electrical characteristic inspection and is equal to or higher than a rated voltage Vr. GS is applied to drive the semiconductor device 10 during a reference period Tr4 to generate a predetermined drain current I DS The drain leakage current measuring means 71a supplies a voltage V that is less than a predetermined gate threshold voltage Vth to the semiconductor device 10 before the semiconductor device 10 is driven by the semiconductor driving means 72a. G is applied to the gate G, and a predetermined voltage V D is applied to the drain D, the drain leakage current I D2 The drain leakage current measuring means 73a measures a voltage V that is less than a predetermined gate threshold voltage Vth in the semiconductor device 10 after the semiconductor device 10 is driven by the semiconductor driving means 72a. G is applied to the gate G, and a predetermined voltage V D is applied to the drain D, the drain leakage current I D1 The abnormality determination means 74 measures the measured drain leakage current I D1 ,I D2 Difference (I D1 -I D2) is equal to or greater than the reference current Id, it is determined whether or not there is an abnormality in the semiconductor device 10. According to this configuration, since an abnormality can be made apparent by passing a current for a short period of time, it is possible to screen the semiconductor device 10 for potential failure risks with high accuracy without damaging the semiconductor device 10.

[0064] Embodiment 6 An inspection method for a semiconductor device according to the sixth embodiment will be described with reference to Figs. 11 to 14. Fig. 11 is a block diagram showing an inspection device 6 for inspecting a semiconductor device 10 according to the sixth embodiment. The configuration of the inspection device 6 is such that the control unit 70a in Fig. 7 is replaced with 70b. As the rest is similar, the description will not be repeated.

[0065] 7 are replaced with drain leakage current measuring means 76, semiconductor driving means 72b, drain leakage current measuring means 77, and abnormality determining means 74b, respectively. Since the rest is similar, description thereof will not be repeated.

[0066] The drain leakage current measuring means 76 detects a predetermined drain voltage V from the CVCC power supply 91 based on a voltage / current setting signal Sg62 from the control unit 70b. D is applied to the drain D of the semiconductor device 10, and a predetermined initial gate voltage V G1 (First voltage) to final gate voltage V Gn The gate voltage is increased stepwise by a predetermined voltage value up to the nth voltage (nth voltage: n is an integer of 2 or more), and the gate voltage is output from the voltage variable power supply 81. The drain leakage current measuring means 76 measures whether the voltage of the gate G is greater than the initial gate voltage V G1 to the final gate voltage V Gn The drain leakage current I DUx(second drain leakage current) is measured using an ammeter 40. That is, the drain leakage current measuring means 76 measures the voltage of the gate G as a voltage V G1 ,V G2 ,…,V Gx ,…,V G(n-1) ,V Gn For example, the voltage of the gate G is increased to voltage V Gx In this case, the drain leakage current measured by the drain leakage current measuring means 76 is the drain leakage current I DUx It is.

[0067] The semiconductor driving means 72b outputs a predetermined gate voltage V from a voltage variable power supply 81 based on a voltage setting signal Sg61 from the control unit 70b. GS is applied to the gate G of the semiconductor device 10, and a predetermined drain current I DS is passed through the drain D of the semiconductor device 10 to drive the semiconductor device 10.

[0068] The drain leakage current measuring means 77 detects a predetermined drain voltage V from the CVCC power supply 91 based on a voltage / current setting signal Sg62 from the control unit 70b. D is applied to the drain D of the semiconductor device 10, and a predetermined final gate voltage V Gn From the initial gate voltage V G1 The gate voltage is gradually decreased by a predetermined voltage value until the gate voltage V is reached, and the gate voltage is output from the voltage variable power supply 81. The drain leakage current measuring means 77 measures whether the voltage of the gate G reaches the final gate voltage V Gn From the initial gate voltage V G1 The drain leakage current I DDx (first drain leakage current) is measured using an ammeter 40. That is, the drain leakage current measuring means 77 measures the voltage of the gate G as a voltage V Gn ,V G(n-1) ,…,V Gx ,…,V G2 ,V G1For example, the voltage at the gate G is V Gx In this case, the drain leakage current measured by the drain leakage current measuring means 77 is the drain leakage current I DDx It is.

[0069] The abnormality determination means 74b detects the drain leakage current I DUx and I DDx For example, the abnormality determination means 74b determines whether or not there is an abnormality in the semiconductor device 10 based on the gate voltage V Gx (xth voltage) drain leakage current difference (for example, I DD1 -I DU1 or I DD2 -I DU2 Whether or not there is an abnormality in the semiconductor device 10 is determined based on whether or not the current Id is equal to or greater than a predetermined reference current Id that clearly indicates the presence or absence of an abnormality.

[0070] Fig. 12 is a flow chart showing the flow of processing of a semiconductor device inspection method performed by the inspection apparatus 6 of Fig. 11 for each semiconductor device 10 to be inspected. The inspection apparatus 6 executes the inspection method shown in Fig. 12 to determine whether the semiconductor device 10 is normal or abnormal. S601 to S605 correspond to the drain leakage current measuring means 76 and the second drain leakage current measuring step. S606 and S607 correspond to the semiconductor driving means 72b and the semiconductor driving step. S608 to S613 correspond to the drain leakage current measuring means 77 and the first drain leakage current measuring step. S614 to S616 correspond to the anomaly determining means 74b and the anomaly determining step.

[0071] First, the control unit 70b applies an initial gate voltage V 1 , which is less than the gate threshold voltage, to the gate G of the semiconductor device 10 from the voltage variable power supply 81 based on the voltage setting signal Sg61. G1 Based on the voltage / current setting signal Sg62, a predetermined drain voltage V DAt this time, the control unit 70b applies a drain leakage current I DU1 is measured using the ammeter 40 (S602).

[0072] Thereafter, the control unit 70b controls the gate voltage V G1 The gate voltage V is increased by a predetermined voltage value. G2 is output from the voltage variable power supply 81 to the gate G, and the voltage of the gate G is set to the gate voltage V G2 The control unit 70b increases the drain leakage current I DU2 After measuring the drain leakage current, the control unit 70b determines whether the voltage applied to the gate G is the final gate voltage V Gn The processes of S603 to S605 are repeated until the gate voltage V Gx While increasing the voltage by a predetermined voltage value, the drain leakage current I DUx Measurements are performed.

[0073] The control unit 70b controls the gate voltage to the final gate voltage V Gn When the gate voltage V reaches the rated voltage (YES in S605), the gate voltage V is set to a value equal to or lower than the maximum voltage applied in the electrical characteristic test of the semiconductor device 10 from the voltage variable power supply 81 and equal to or higher than the rated voltage, based on the voltage setting signal Sg61 from the control unit 70b. GS , and applies a drive voltage between the gate G and source S of the semiconductor device 10 to drive the semiconductor device 10 for the reference time. As a result, the operation mode of the CVCC power supply 91 automatically switches to the constant current mode, and a drain current I flows from the drain D to the source S of the semiconductor device 10. DS When the reference time has elapsed (YES in S607), the control unit 70b applies a final gate voltage V that is less than the gate threshold voltage to the gate G of the semiconductor device 10 from the voltage variable power supply 81 based on the voltage setting signal Sg61. GnAs a result, the operation mode of the CVCC power supply 91 is automatically switched to the constant voltage mode, and a predetermined drain voltage V D is applied (S608). That is, S608 is a drain current I DS After the time during which the current flows has elapsed for a reference time, the current starts without stopping the semiconductor device 10.

[0074] At this time, the control unit 70b detects the drain leakage current I DDn is measured using the ammeter 40 (S609). After that, the control unit 70b adjusts the gate voltage V applied to the gate G of the semiconductor device 10 based on the voltage setting signal Sg61. Gn The gate voltage V is reduced by a predetermined voltage value. Gx is output from the voltage variable power supply 81 to lower the gate voltage (S610). At this time, the control unit 70b controls the drain leakage current I DDx After measuring the drain leakage current, the control unit 70b determines whether the voltage applied to the gate G is equal to the initial gate voltage V G1 The processes of S610 to S612 are repeated until the gate voltage V Gx While decreasing the voltage by a predetermined voltage value, the drain leakage current I DDx Measurements are performed.

[0075] The gate voltage is the initial gate voltage V G1 When this is reached (YES in S612), the control unit 70b sets the voltage output from the voltage variable power supply 81 to 0 V based on the voltage setting signal Sg61, and sets the voltage output from the CVCC power supply 91 to 0 V based on the voltage / current setting signal Sg62 from the control unit 70b, and stops the application of voltage to the gate G and drain D of the semiconductor device 10 (S613).

[0076] Thereafter, the control unit 70b determines whether or not there is an abnormality in the semiconductor device 10. Specifically, the drain leakage current I DUxand the difference in the drain leakage current I measured at S609 and S611 DDx at the same gate voltage (for example, I DD1 -I DU1 , or I DD2 -I DU2 ) determines whether there is an abnormality in the semiconductor device 10 (S614). That is, for each integer x from 1 to n, the determination in S614 is made.

[0077] I DDx -I DUx ≧Id (YES in S614), the control unit 70b determines that there is an abnormality in the semiconductor device 10 (S615) and ends the inspection method. On the other hand, when I DDx -I DUx <Id (NO in S614), the control unit 70b determines that there is no abnormality in the semiconductor device 10 and the semiconductor device 10 is normal (S616) and ends the inspection method.

[0078] In S614, based on the drain leakage current I DUx when the gate voltage rises and the drain leakage current I DDx when the gate voltage falls, normal products and abnormal products may be discriminated. For example, based on the ratio of the drain leakage currents (I DDx :I DUx ) when the gate voltages are the same, normal products and abnormal products may be discriminated.

[0079] FIG. 13 is a timing chart showing the changes in each of the gate G and the drain D of the semiconductor device 10 and the change in the drain current I DS in the inspection method of FIG. 12. FIG. 14 is a diagram showing the correspondence between the gate voltage, the drain leakage current when the gate voltage rises, and the drain leakage current when the gate current falls. In FIGS. 13 and 14, the case where n is 5 is shown.

[0080] First, an initial gate voltage V less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10 G1is applied to the drain D of the semiconductor device 10, and a predetermined drain voltage V D is applied, and the drain leakage current I DU1 is measured. Then, the gate voltage VG1 The gate voltage V G2 is output, the gate voltage rises, and the drain leakage current I DU2 is measured by the ammeter 40. The drain leakage current I DU2 After measuring the final gate voltage V G5 Up to the gate voltage V Gx The drain leakage current is repeatedly measured while the voltage is increased stepwise by a predetermined voltage value. Then, the gate voltage V is increased by a predetermined voltage value, which is equal to or less than the maximum voltage Vm applied in the electrical characteristics test and equal to or more than the rated voltage Vr. GS is output, a drive voltage is applied between the gate G and source S of the semiconductor device 10, and the semiconductor device 10 is put into a drive state. During the reference time Tr6, a constant drain current I DS After the stress is applied to the semiconductor device 10, a final gate voltage V less than the gate threshold voltage Vth is applied to the gate G of the semiconductor device 10. G5 A predetermined drain voltage V is applied to the drain D of the semiconductor device 10 to put the semiconductor device 10 in a non-driven state. D is applied, the drain leakage current I DD5 Then, the gate voltage V applied to the gate G of the semiconductor device 10 is measured. G5 The gate voltage V G4 is output to the gate G, the gate voltage is lowered, and the drain leakage current I DD4 is measured by the ammeter 40. The drain leakage current I DD4 After measuring the initial gate voltage V G1 Up to the gate voltage V Gx The drain leakage current is repeatedly measured while the voltage applied to the gate G and drain D of the semiconductor device 10 is decreased by a predetermined voltage value.

[0081] As described above, according to the inspection method of the sixth embodiment, an abnormality can be detected by applying a current for a short time, and therefore, the semiconductor device 10 can be screened for a semiconductor device 10 that is potentially at risk of failure with high accuracy without damaging the semiconductor device 10. DUx ,I DDx Since the discrimination is performed by this method, the sensitivity for detecting abnormalities is increased, and screening accuracy is improved.

[0082] Embodiment 7 11 to 14, the inspection device 6 for inspecting the semiconductor device 10 includes a drain leakage current measuring means 76, a semiconductor driving means 72b, a drain leakage current measuring means 77, and an abnormality determining means 74b. The drain leakage current measuring means 76 detects a predetermined drain voltage V D At the same time, an initial gate voltage V less than a predetermined gate threshold voltage Vth is applied to the gate G. G1 to the final gate voltage V Gn The drain leakage current I DUx The semiconductor driving means 72b measures a gate voltage V that is equal to or lower than a maximum voltage Vm that is applied in a predetermined electrical characteristic test and is equal to or higher than a rated voltage Vr. GS is applied to drive the semiconductor device 10 during a reference period Tr6 to generate a predetermined drain current I DS The drain leakage current measuring means 77 applies a predetermined drain voltage V D and a final gate voltage V less than a predetermined gate threshold voltage Vth is applied to the gate G. Gn From the initial gate voltage V G1 The drain leakage current I DDx The abnormality determination means 74b measures the drain leakage current I at the same gate voltage measured by the drain leakage current measurement means 76 and the drain leakage current measurement means 77.DUx ,I DDx Difference (I DDx -I DUx ) is equal to or greater than a reference current Id, the semiconductor device 10 being determined to have an abnormality.

[0083] According to this configuration, since an abnormality can be made apparent by passing a current for a short period of time, it is possible to screen semiconductor devices that are potentially at risk of failure with high accuracy without damaging the semiconductor devices.

[0084] In addition, it is possible to freely combine each embodiment, appropriately modify each embodiment, or omit each embodiment. For example, in the present disclosure, an abnormality in a semiconductor device is determined by measuring a drain leakage current after stress application or before and after stress application, but it may be determined by measuring a gate threshold value by a minute current of about several tens of nA to several tens of μA.

[0085] The embodiments disclosed herein are also intended to be combined appropriately within a range that is not inconsistent. The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is indicated by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0086] 1,4,6 inspection apparatus, 10 semiconductor device, 20,30,50 constant voltage power supply, 21,31,61 switch, 40 ammeter, 60 constant current power supply, 70,70a,70b control unit, 71,71a,73,73a,76,77 drain leakage current measuring means, 72,72a,72b semiconductor driving means, 74,74b abnormality determination means, 80,90 power supply unit, 81 voltage variable power supply, 91 CVCC power supply, D drain, G gate, S source.

Claims

1. A method for testing a semiconductor device having a control terminal, a first terminal, and a second terminal, comprising the steps of: a semiconductor driving step of applying a voltage to the control terminal, the voltage being equal to or lower than a maximum voltage of a predetermined electrical characteristic test and equal to or higher than a rated voltage of the control terminal, for a reference time period, to cause a specific current to flow from the first terminal to the second terminal; a first leakage current measurement step of applying a voltage less than a threshold voltage of the control terminal to the control terminal after the step of flowing the specific current, and measuring a first leakage current flowing from the first terminal to the second terminal without passing through the control terminal while applying a specific voltage to the first terminal; and determining whether or not there is an abnormality in the semiconductor device by using the first leakage current.

2. A method for testing a semiconductor device having a control terminal, a first terminal, and a second terminal, comprising the steps of: a semiconductor driving step of applying a voltage to the control terminal, the voltage being equal to or lower than a maximum voltage of a predetermined electrical characteristic test and equal to or higher than a rated voltage of the control terminal, for a reference time period, to cause a specific current to flow from the first terminal to the second terminal; a first leakage current measuring step of applying a voltage less than a threshold voltage of the control terminal to the control terminal after the step of flowing the specific current and measuring a first leakage current flowing from the first terminal to the second terminal in a state where a specific voltage is applied to the first terminal; and determining whether or not there is an abnormality in the semiconductor device by using the first leakage current, a second leakage current measuring step of measuring a second leakage current flowing from the first terminal to the second terminal in a state where a voltage less than the threshold voltage is applied to the control terminal and the specific voltage is applied to the first terminal, prior to the semiconductor driving step; The method for inspecting a semiconductor device, wherein the anomaly determining step determines whether or not the anomaly exists by using the first leakage current and the second leakage current.

3. 3. The method of inspecting a semiconductor device according to claim 2, wherein said anomaly determining step determines that there is an anomaly when a difference between said first leakage current and said second leakage current is larger than a reference current.

4. the second leakage current measuring step includes increasing a voltage of the control terminal stepwise from a first voltage to an n-th voltage (n is an integer of 2 or more) and measuring the second leakage current when the voltage of the control terminal is each of the first voltage to the n-th voltage; 3. The semiconductor device inspection method according to claim 2, wherein the first leakage current measurement step comprises stepping down a voltage of the control terminal from the nth voltage to the first voltage, and measuring the first leakage current when the voltage of the control terminal is each of the nth voltage to the first voltage.

5. 5. The semiconductor device inspection method according to claim 4, wherein the anomaly determination step determines that the anomaly exists when a difference obtained by subtracting the second leakage current corresponding to an xth voltage (x is an integer greater than or equal to 1 and less than or equal to n) from the first leakage current corresponding to the xth voltage is greater than a reference current.

6. The semiconductor device inspection method according to any one of claims 1 to 5, wherein the first leakage current measurement process is started after the time during which the specific current flows from the first terminal to the second terminal has elapsed the reference time, without stopping the semiconductor device.

7. 1. An inspection apparatus for inspecting a semiconductor device having a control terminal, a first terminal, and a second terminal, comprising: a first power supply connected between the control terminal and the second terminal; a second power supply unit connected between the first terminal and the second terminal; a control unit that controls the first power supply unit and the second power supply unit, The control unit is An inspection device for a semiconductor device, comprising: an inspection device for a semiconductor device, which applies to the control terminal a voltage that is equal to or lower than a predetermined maximum voltage of an electrical characteristic inspection and equal to or higher than a rated voltage of the control terminal for a reference time, causes a specific current to flow from the first terminal to the second terminal, and then sets the voltage of the control terminal to zero and applies to the control terminal a voltage that is lower than a threshold voltage of the control terminal, and measures a first leakage current that flows from the first terminal to the second terminal without passing through the control terminal while the specific voltage is applied to the first terminal, and uses the first leakage current to determine whether or not there is an abnormality in the semiconductor device.

8. 1. An inspection apparatus for inspecting a semiconductor device having a control terminal, a first terminal, and a second terminal, comprising: a first power supply connected between the control terminal and the second terminal; a second power supply unit connected between the first terminal and the second terminal; a control unit that controls the first power supply unit and the second power supply unit, The control unit is applying a voltage to the control terminal for a reference time, the voltage being equal to or lower than a predetermined maximum voltage of an electrical characteristic test and equal to or higher than a rated voltage of the control terminal, causing a specific current to flow from the first terminal to the second terminal, applying a voltage lower than a threshold voltage of the control terminal to the control terminal, and measuring a first leakage current flowing from the first terminal to the second terminal while the specific voltage is being applied to the first terminal, and using the first leakage current to determine whether or not there is an abnormality in the semiconductor device; The control unit applies a voltage less than the threshold voltage to the control terminal before passing the specific current, and measures a second leakage current flowing from the first terminal to the second terminal while the specific voltage is being applied to the first terminal, and determines that the abnormality exists if the difference between the first leakage current and the second leakage current is greater than a reference current.

9. 9. The semiconductor device inspection device according to claim 8, wherein the control unit, before flowing the specific current, gradually increases a voltage of the control terminal from a first voltage to an nth voltage (n is an integer equal to or greater than 2) and measures the second leakage current when the voltage of the control terminal is each of the first voltage to the nth voltage, and, after flowing the specific current, gradually decreases the voltage of the control terminal from the nth voltage to the first voltage and measures the first leakage current when the voltage of the control terminal is each of the nth voltage to the first voltage, and determines that the abnormality exists when a difference obtained by subtracting the second leakage current corresponding to the xth voltage (x is an integer equal to or greater than 1 and equal to or less than n) from the first leakage current corresponding to the xth voltage is greater than the reference current.

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