Systems and methods for scalable quantum computing

Abstract

The superconducting circuit includes four superconducting qubits communicatively coupled by a four-qubit even parity stabilizer. The four-qubit even parity stabilizer includes a superconducting stabilizer loop and four inductances, each inductance inductively communicatively coupled to the inductance of a respective one of the four superconducting qubits. The four-qubit even parity stabilizer also includes a parity-enforcing superconducting qubit communicatively coupled to the superconducting loop. The quantum processor includes four Josephson parametric amplifiers communicatively coupled by the four-qubit even parity stabilizer. The Josephson parametric amplifiers include pairs of superconducting microwave resonators communicatively coupled by composite Josephson junctions. The four-qubit even parity stabilizer includes a superconducting loop, four inductances inductively and communicatively coupled to the inductance of a respective one of the four Josephson parametric amplifiers, and a parity-enforcing Josephson parametric amplifier communicatively coupled to the superconducting loop.

Description

[Technical field]

[0001] Field The present disclosure relates generally to systems and methods for scalable quantum computing, and more particularly to circuits for providing control and communicable coupling between devices. [Background technology]

[0002] background Superconducting Processor The computer processor may take the form of an analog processor, e.g., a quantum processor, such as a superconducting quantum processor. A superconducting quantum processor may include a large number of qubits (e.g., two or more superconducting qubits) and associated local bias devices. Further details and embodiments of exemplary quantum processors that may be used in connection with the present systems, methods and apparatus are described in U.S. Pat. No. 7,533,068, U.S. Pat. No. 8,195,596, U.S. Pat. No. 8,190,548, and PCT Patent Application No. US / 2009 / 037984.

[0003] A superconducting processor may be a processor that is not intended for quantum computing, for example a processor that operates according to principles that govern the operation of classical computer processors.

[0004] A computing system may typically include a quantum processor and / or a classical processor. A computing system may be a hybrid system including a quantum processor and a classical processor. In some implementations, at least one of the quantum processor and the classical processor is a superconducting processor.

[0005] Superconducting qubits A superconducting quantum processor may include superconducting qubits, which may be formed in a superconducting material (e.g., aluminum and / or niobium) within a superconducting integrated circuit.

[0006] Superconducting qubits may be classified by the physical property used to encode information in the qubit. For example, superconducting qubits may be classified into charge qubits, flux qubits, and phase qubits. Charge qubits may store and manipulate information in the charge state of the qubit. Flux qubits may store and manipulate information in a variable related to the magnetic flux through a portion of the qubit. Phase qubits may store and manipulate information in a variable related to the difference in superconducting phase between two regions of the qubit. Hybrid devices may use two or more of the charge, flux, and phase degrees of freedom.

[0007] A superconducting qubit typically includes at least one Josephson junction. A Josephson junction is a small interruption in an otherwise continuous superconducting current path, typically realized by a thin insulating barrier sandwiched between two superconducting electrodes. Josephson junctions may be formed as three-layer or "trilayer" structures. Superconducting qubits are further described in, for example, U.S. Patent No. 7,876,248, U.S. Patent No. 8,035,540, and U.S. Patent No. 8,098,179.

[0008] Some implementations of a superconducting flux qubit include a superconducting loop (also referred to in this application as a qubit loop) that is interrupted by at least one Josephson junction. Some implementations include multiple superconducting loops connected in series and / or in parallel with each other. Some implementations include multiple Josephson junctions connected in series or in parallel with each other.

[0009] A pair of Josephson junctions connected in parallel with each other is called a compound Josephson junction (CJJ). It is understood that the behavior of a CJJ can be modeled as a single effective Josephson junction similar to the way that the behavior of multiple resistors connected in parallel with each other can be modeled as a single effective resistor.

[0010] A compound Josephson junction in which at least one of the constituent Josephson junctions is itself a compound Josephson junction is referred to in this application as a compound-compound Josephson junction (CCJJ).

[0011] A Hamiltonian description of quantum processors According to some implementations of the present systems and devices, the quantum processor may be designed to perform adiabatic quantum computing and / or quantum annealing. A general Hamiltonian problem includes a first component proportional to the diagonal single-qubit terms and a second component proportional to the diagonal multi-qubit terms, and may be expressed, for example, as follows:

number

[0012] term σ i z is an example of a diagonal single-qubit term, and the term σ i z σ j z is an example of a diagonal two-qubit term. The Hamiltonian can be physically realized, for example, by implementing superconducting qubits.

[0013] The foregoing examples of the related art and limitations associated therewith are intended to be illustrative and therefore not exhaustive. Other limitations of the related art will become apparent to those of ordinary skill in the art upon reading this specification and studying the accompanying drawings. Summary of the Invention [Means for solving the problem]

[0014] overview The superconducting circuit may be summarized as including a Josephson parametric amplifier, the Josephson parametric amplifier including: a pair of superconducting resonators; a composite composite Josephson junction superconductively and electrically communicably coupled between the pair of superconducting resonators; and a first control circuit communicably coupled to the composite composite Josephson junction.

[0015] In some implementations, the first control circuit is inductively coupled to the compound Josephson junction.

[0016] In some implementations, the first control circuit includes an analog DC current bias communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier; a digital-to-analog converter (DAC) communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier; and a first microwave drive communicatively coupled to a first tunable mutual inductance, the first tunable mutual inductance being communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier. In some implementations, the first tunable mutual inductance of the first control circuit is inductively coupled to the composite Josephson junction of the Josephson parametric amplifier. In some implementations, the analog DC current bias and the DAC of the first control circuit are inductively coupled to the composite Josephson junction of the Josephson parametric amplifier. In some implementations, the first tunable mutual inductance includes a superconducting loop interrupted by the composite Josephson junction.

[0017] In some implementations, the first control circuit is operable to control the strength of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and the time-dependent detuning frequency.

[0018] In some implementations, the superconducting circuit further includes a second control circuit including a second microwave drive communicatively coupled to the second tunable mutual inductance, the second tunable mutual inductance being communicatively coupled to the composite compound Josephson junction of the Josephson parametric amplifier. In some implementations, the second control circuit is inductively coupled to the composite compound Josephson junction. In some implementations, the second tunable mutual inductance of the second control circuit is inductively coupled to the composite compound Josephson junction of the Josephson parametric amplifier. In some implementations, the second tunable mutual inductance includes a superconducting loop interrupted by the compound Josephson junction.

[0019] In some implementations, each resonator of the pair of superconducting resonators is a superconducting microwave resonator. In some implementations, the superconducting microwave resonator is a coaxial transmission line resonator. In some implementations, the superconducting microwave resonator is a ladder circuit including multiple LC circuits electrically coupled in series with each other.

[0020] A method of operating a hybrid computing system may be summarized as including a digital processor, a superconducting circuit including at least one Josephson parametric amplifier, a resonant drive, and a parametric drive, the method including setting, by the digital processor, a first angular frequency of the resonant drive, setting, by the digital processor, a second angular frequency of the parametric drive, the second angular frequency being equal to the difference between twice the first angular frequency and a detuning frequency, and controlling, by the digital processor, the strengths of the X and Z terms of the effective Hamiltonian of the superconducting circuit by varying the detuning frequency.

[0021] The superconducting circuit may be summarized as including first, second, third, and fourth superconducting qubits, the first, second, third, and fourth qubits communicatively coupled by a four-qubit even-parity stabilizer. In some implementations, the four-qubit even parity stabilizer includes a superconducting stabilizer loop comprising a material that is superconducting below a first critical temperature; a first inductance of the superconducting stabilizer loop, the first inductance inductively coupled to an inductance of the first superconducting qubit; a second inductance of the superconducting stabilizer loop, the second inductance inductively coupled to an inductance of the second superconducting qubit; a third inductance of the superconducting stabilizer loop, the third inductance inductively coupled to the inductance of the third superconducting qubit; a fourth inductance of the superconducting stabilizer loop, the fourth inductance inductively coupled to the inductance of the fourth superconducting qubit; and a parity-enforcing superconducting qubit, the parity-enforcing qubit being communicatively coupled to the superconducting loop.

[0022] In some implementations, each of the first, second, third, fourth, and parity-enforcing superconducting qubits is a superconducting flux qubit. In some implementations, each of the first, second, third, and fourth superconducting flux qubits includes a respective compounded compound Josephson junction. In some implementations, each of the first, second, third, and fourth superconducting flux qubits includes a respective superconducting qubit loop, each superconducting qubit loop including a material that is superconducting at or below a second critical temperature; each superconducting qubit loop includes a respective intersection. In some implementations, the parity-enforcing superconducting flux qubit is communicatively coupled to the superconducting loop by a fully electrochemical CJJ coupling device.

[0023] The quantum processor may be summarized as including first, second, third, and fourth Josephson parametric amplifiers, the first, second, third, and fourth parametric amplifiers communicatively coupled to one another by a four-qubit even parity stabilizer. In some implementations, each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective pair of superconducting microwave resonators, each superconducting microwave resonator of each pair of superconducting microwave resonators communicatively coupled to one another by a composite compound Josephson junction. In some implementations, the four-qubit even parity stabilizer includes a superconducting loop including a material that is superconducting below a critical temperature; the superconducting loop including a crossover; first, second, third, and fourth inductances of the superconducting loop, each inductively coupled to an inductance of a respective Josephson parametric amplifier; and a parity enforcing Josephson parametric amplifier, the parity enforcing Josephson parametric amplifier being communicatively coupled to the superconducting loop. In some implementations, each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective composite Josephson junction and a respective first control circuit communicatively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each respective first control circuit may be inductively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.Each respective first control circuit may include an analog DC current bias communicatively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, a digital-to-analog converter (DAC) communicatively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers, and a respective first microwave drive communicatively coupled to a respective first tunable mutual inductance communicatively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. The respective first tunable mutual inductance of each first control circuit of each respective first control circuit may be inductively communicatively coupled to the respective composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers. Each of the analog DC current biases and each of the DACs of the respective first control circuits may be inductively coupled to a compound Josephson junction of each of the first, second, third, and fourth Josephson parametric amplifiers. Each of the respective first tunable mutual inductances may include a superconducting loop interrupted by a compound Josephson junction. Each respective first control circuit may be operable to control the strength of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and a time-dependent detuning frequency. Each of the first, second, third, and fourth Josephson parametric amplifiers may further include a respective second control circuit, each respective second control circuit including a respective second microwave drive communicatively coupled to a respective second tunable mutual inductance, each respective second tunable mutual inductance communicatively coupled to a respective combined composite Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.Each respective second control circuit may be inductively coupled to a combined composite Josephson junction of each of the first, second, third, and fourth Josephson parametric amplifiers. Each respective second tunable mutual inductance of each second control circuit may be inductively coupled to a combined composite Josephson junction of each of the first, second, third, and fourth Josephson parametric amplifiers. Each respective second tunable mutual inductance may include a superconducting loop interrupted by a composite Josephson junction. Each resonator of the superconducting resonators of each pair of the first, second, third, and fourth Josephson parametric amplifiers may be a superconducting microwave resonator. Each superconducting microwave resonator in the superconducting resonators of each pair of the first, second, third, and fourth Josephson parametric amplifiers may be a coaxial transmission line resonator. Each superconducting microwave resonator in each pair of superconducting resonators of the first, second, third, and fourth Josephson parametric amplifiers may be a ladder circuit including a plurality of LC circuits electrically and communicably coupled to each other in series.

[0024] Brief description of some figures of the drawing In the accompanying drawings, like reference numbers identify similar elements or acts. The dimensions and relative positions of elements in the accompanying drawings are not necessarily drawn to scale. For example, the shapes and angles of various elements are not necessarily drawn to scale, and some of these elements may be arbitrarily enlarged and positioned to improve drawing readability. Furthermore, the particular shapes of the elements as depicted are not necessarily intended to convey any information regarding the actual shape of the particular elements, but may be selected solely for ease of recognition in the accompanying drawings. [Brief description of the drawings]

[0025] [Figure 1A] FIG. 1 is a schematic diagram of an example implementation of a 4-qubit even parity stabilizer. [Figure 1B] FIG. 13 is a schematic diagram of another exemplary implementation of a four-qubit even parity stabilizer. [Diagram 2]FIG. 1C is a schematic diagram of an example implementation of a circuit including the four-qubit stabilizer of FIG. [Diagram 3] FIG. 1 is a schematic diagram of an example implementation of a Josephson parametric amplifier (JPA). [Figure 4] FIG. 1 is a schematic diagram of an example implementation of building blocks that can be used to construct a quantum annealing platform. [Diagram 5] FIG. 1 is a schematic diagram of another example implementation of building blocks that can be used to construct a quantum annealing platform. [Figure 6] FIG. 1 is a schematic diagram of an example implementation of a circuit including a scalable JPA with scalable control bias. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Detailed Description In the following description, some specific details are set forth to provide a thorough understanding of various disclosed implementations. However, those skilled in the art will recognize that an implementation may be realized without one or more of these specific details, or with other methods, components, materials, etc. In other instances, well-known structures related to computer systems, server computers, and / or communication networks have not been shown or described in order to avoid unnecessarily obscuring the description of the implementations.

[0027] Unless the context otherwise requires, throughout the following specification and claims, the term "comprising" is synonymous with "including" and is inclusive or open-ended (i.e., does not exclude additional, unrecited elements or method acts).

[0028] References throughout this specification to "one implementation" or "an implementation" mean that a particular feature, structure, or characteristic described in connection with that implementation is included in at least one implementation. Thus, the appearances of the phrases "in one implementation" or "in an implementation" in various places throughout this specification do not necessarily all refer to the same implementation. Furthermore, particular features, structures, or characteristics may be combined in any suitable manner in one or more implementations.

[0029] As used in this specification and the appended claims, the singular and indefinite articles include plural references unless the context clearly dictates otherwise. It should also be noted that the term "or" is generally employed in its sense including "and / or" unless the context clearly dictates otherwise.

[0030] The titles and abstracts of the disclosure provided herein are for convenience only and do not interpret the scope or meaning of the implementations.

[0031] Scalable Joins The multi-qubit interaction may include 2-local interactions. The multi-qubit interaction may also include k-local interactions, where k>2.

[0032] One architecture suitable for quantum annealing is described, for example, in Lechner W. et al., A QUANTUM ANNEALING ARCHITECTURE WITH ALL-TO-ALL CONNECTIVITY FROM LOCAL INTERACTIONS, Sci. Adv. 2015;1:e1500838 (variously referred to in this application as the LHZ architecture and the LHZ scheme). Direct implementation of four local coupling devices (e.g., nonlinear coupling devices providing communicable coupling between four logical qubits) can be challenging. For example, the act of tuning qubit interactions by using four local coupling devices can prove difficult, and the magnitude of achievable interaction energy may in practice be weaker than desired.

[0033] One approach to implementing a four-qubit even-parity stabilizer is to use one or more ancillary qubits. A search over the space of discretized two-local couplings and one-local biases can reveal configurations that yield eight possible even-parity logical qubit states that are degenerate basis states.

[0034] 1A is a schematic diagram of an example implementation of a four-qubit even-parity stabilizer 100a. Stabilizer 100a is an example configuration of a six-qubit implementation of a four-qubit even-parity stabilizer.

[0035] The stabilizer 100a includes four logical qubits 102, 104, 106, 108. In some implementations, a logical qubit (e.g., one of the logical qubits 102, 104, 106, 108) includes two or more physical qubits and at least one communicable coupling device between the physical qubits.

[0036] The stabilizer 100a includes two ancillary qubits 110, 112. The ancillary qubits 110, 112 may contribute to enforcing even parity.

[0037] The stabilizer 100a may be implemented by using two local interactions that are either +1 or -1. The energy spacing between the eight-fold degenerate ground state and the first excited state may take the value 2, for example.

[0038] In FIG. 1A, ferromagnetic coupling between qubits is indicated by solid lines, and antiferromagnetic coupling between qubits is indicated by dotted lines.

[0039] Stabilizer 100a includes ferromagnetic (FM) couplings 114 between logical qubits 102, 104, anti-ferromagnetic (AFM) couplings 116 between logical qubits 104, 106, anti-ferromagnetic (AFM) couplings 118 between logical qubits 106, 108, and FM couplings 120 between logical qubits 108, 102. Stabilizer 100a includes FM couplings 122 between ancillary qubit 112 and logical qubit 102, and AFM couplings 124, 126, 128 between ancillary qubit 112 and each of the logical qubits 104, 106, 108. Stabilizer 100a includes an FM coupling 130 between ancillary qubit 110 and logical qubit 102, and AFM couplings 132, 134, 136 between ancillary qubit 110 and each of the logical qubits 104, 106, 108. Stabilizer 100a also includes an FM coupling 138 between ancillary qubits 110, 112. Stabilizer 100a also includes an FM coupling 140 between the logical qubits 102, 106.

[0040] 1B is a schematic diagram of another exemplary implementation of a four-qubit even-parity stabilizer 100b. Stabilizer 100b includes four logical qubits 142, 144, 146, and 148. Stabilizer 100b is a simpler implementation of stabilizer 100a of FIG. 1A. In stabilizer 100b, ancillary qubits 110 and 112 of FIG. 1A are replaced by a single ancillary qubit 150.

[0041] In FIG. 1B, ferromagnetic coupling between qubits is indicated by solid lines, and antiferromagnetic coupling between qubits is indicated by dashed lines.

[0042] Stabilizer 100b includes ferromagnetic (FM) coupling 152 between logical qubits 142, 144, antiferromagnetic (AFM) couplings 154 and 156 between logical qubits 144, 146 and 146, 148, respectively, and FM coupling 158 between logical qubits 148, 142. Stabilizer 100b includes AFM coupling 160 between logical qubits 144, 148 and FM coupling 162 between logical qubits 142, 146.

[0043] Stabilizer 100b includes FM coupling 164 between ancillary qubit 150 and logical qubit 142, and AFM couplings 166, 168, 170 between ancillary qubit 150 and logical qubits 144, 146, 148, respectively.

[0044] In the exemplary implementation shown in FIG. 1B, the strengths of the couplings 164, 166, 168, 170 between the ancillary qubit 150 and each of the logical qubits 142, 144, 146, 148 are twice as strong as the couplings between each of the ancillary qubits 110, 112 and the logical qubits 102, 104, 106, 108 in FIG. 1A, and twice as strong as the couplings 152, 154, 156, 158, 160, 162 between each pair of logical qubits 142, 144, 146, 148.

[0045] The strength of the bonds is indicated in Figure 1B by the thickness of the lines representing the bonds. For example, the line representing bond 164 is twice as thick as the line representing bond 152.

[0046] The interaction Hamiltonian for the stabilizer 100b of FIG. 1B can be expressed as follows:

number

[0047] Circuits with qubits and four-qubit stabilizers A drawback of the LHZ architecture is that a practical implementation of the architecture may require high connectivity between logical qubits. For example, in a two-dimensional square lattice of logical qubits with a four-qubit stabilizer (such as stabilizer 100b of FIG. 1B), each logical qubit may be communicatively coupled to four nearest neighbor qubits, four next nearest neighbor qubits, and four ancillary qubits, for a total of 12 couplings per logical qubit.

[0048] There are several ways to reduce the required connectivity between logical qubits. With reference to Figure 1B, the couplings between logical qubits 142, 144, 146, 148 and between ancillary qubit 150 and logical qubits 142, 144, 146, 148 may be symmetric in magnitude. If so, logical qubits 142, 144, 146, 148 and ancillary qubit 150 may be communicatively coupled by a single linear coupling device to achieve pairwise coupling.

[0049] Figure 2 is a schematic diagram of an example implementation of a circuit 200 including the four-qubit stabilizer 100b of Figure 1B. In the circuit 200, four logical qubits 202, 204, 206, 208 and an ancillary qubit 210 are communicatively coupled by a single linear coupling device 212 to provide pairwise coupling.

[0050] Each of the logical qubits 202, 204, 206, 208 includes a respective superconducting loop 214, 216, 218, 220. Each of the superconducting loops 214, 216, 218, 220 includes a material that is superconducting below a critical temperature.

[0051] Each of the superconducting loops 214, 216, 218, 220 includes a respective crossover 222, 224, 226, 228. In the crossover arrangement of circuit 200, crossovers 222, 224, 226, 228 may change the sign of the interaction with logical qubit 202 relative to the sign of the interaction between logical qubits 204, 206, 208 and ancillary qubit 210.

[0052] A superconducting loop that is topologically formed by a 180° out-of-plane rotation of a portion of a superconducting loop is referred to in this application as a superconducting loop with a crossover. Current through the superconducting loop on one side of the crossover flows in a clockwise direction around the loop, and current through the superconducting loop on the other side of the crossover flows in a counterclockwise direction around the loop. The two segments of the superconducting loop that cross each other are electrochemically isolated from each other at the crossover.

[0053] The Hamiltonian interactions of the system can be expressed as:

number

number

number

number

number

[0054] Referring again to FIG. 2, each of the superconducting loops 214, 216, 218, 220 is interrupted by a composite compound Josephson junction (CCJJ) 230, 232, 234, 236, respectively.

[0055] 2, ancillary qubit 210 (also referred to in this application as a parity-enforcing qubit) is communicatively coupled to coupling device 212 by a fully electrochemical CJJ coupling device. In other implementations, ancillary qubit 210 is a different type of qubit. In other implementations, ancillary qubit 210 has a different type of communicative coupling with coupling device 212.

[0056] See, e.g., U.S. Patent No. 10,068,180 for a description of probe qubits, and see, e.g., International PCT Publication No. WO2019126396A1 for a description of electrochemical CJJ coupling devices.

[0057] Circuit 200 can be tiled to create an LHZ architecture with only four (4) couplings per logical qubit.

[0058] A circuit using a 4-bit parity enforcer (such as circuit 200 of FIG. 2) may have advantages over circuits using conventional 4-local interactions. For example, a 4-bit parity enforcer may be implemented by using a set of 2-local interactions configured to have an effective 4-local interaction that is stronger than a conventional 4-local interaction.

[0059] Josephson parametric amplifier Parametric amplifiers, devices that amplify high-frequency input signals, for example by sinusoidally varying the reactance of the circuit, are commonly used in the art. Degenerate parametric amplifiers are phase-sensitive amplifiers that can (at least in principle) amplify one of the in-phase and quadrature components of a signal without introducing excess noise. Parametric amplifiers may be based on the nonlinear inductance of Josephson junctions. Applications of parametric amplifiers may include quantum-limited amplification in the field of quantum information processing using superconducting circuits.

[0060] A Josephson parametric amplifier may include a superconducting transmission line resonator terminated by a DC SQUID (Superconducting Quantum Interference Device).

[0061] In one approach, the pump (also called the drive in this application) is used to directly modulate the current through the Josephson junction. In another approach (see, e.g., T. Yamamoto et al., FLUX-DRIVEN JOSEPHSON PARAMETRIC AMPLIFIER, arXiv: 0808.1386v), the pump is used to modulate the magnetic flux through a DC SQUID. The resonant frequency of the superconducting transmission line resonator can be controlled by a DC magnetic flux that is also applied to the DC SQUID. The pump and input signals are applied to the various ports, and since the pump frequency is twice the resonant frequency, it can be very simple to separate the output signal from the pump.

[0062] 3 is a schematic diagram of an example implementation of a Josephson parametric amplifier 300. The JPA 300 includes a superconducting transmission line resonator 302 terminated by a DC SQUID 304. A pump 306 is used to modulate the current through the DC SQUID 304.

[0063] An input signal 308 may be applied to a port 310 of the superconducting transmission line resonator 302. An output signal 312 may be provided at the port 310 of the superconducting transmission line resonator 302. The superconducting transmission line resonator 302 includes inductances 314a, 314b, 314c and capacitances 316a, 316b, 316c, where each pair of inductance and capacitance (e.g., the pair formed by inductance 314a and capacitance 316a) forms an LC circuit. The superconducting transmission line resonator 302 may include additional LC circuits (not shown in FIG. 3) in series.

[0064] The DC SQUID 304 includes a compound Josephson junction (CJJ) 318 (shown in FIG. 3 using a dotted line). The CJJ 318 includes Josephson junctions 320a, 320b. Each of the Josephson junctions 320a, 320b may have a respective intrinsic capacitance (as shown in FIG. 3, but not mentioned in FIG. 3 for clarity).

[0065] The superconducting transmission line resonator 302 further includes a coupling capacitance 322 .

[0066] Quantum annealing platform using JPA The Ising problem can be encoded in a network of two-photon-driven Kerr nonlinear resonators (also referred to as KNRs in this application): a single Ising spin can be mapped into two coherent states with opposite phases that can constitute the two-fold degenerate eigenspace of the two-photon-driven KNRs in a frame rotating at the driving frequency.

[0067] In one circuit quantum electrodynamics (QED) implementation of the quantum annealer, the KNR is realized as a superconducting microwave resonator terminated by a flux-pumped SQUID (superconducting quantum interference device). The nonlinear inductance of the flux-pumped SQUID can induce Kerr nonlinearity, and two-photon drive can be generated by flux-pumping the flux-pumped SQUID at twice the resonant frequency of the superconducting microwave resonator.

[0068] In this context, the KNR may be considered equivalent to a Josephson parametric amplifier (JPA), since the JPA may similarly be realized as a superconducting microwave resonator terminated by a flux-pumped SQUID. In one implementation, the SQUID loop of the JPA is driven by a flux pump with tunable amplitude and frequency.

[0069] In some circuit implementations, KNR networks can be constructed by using pairwise linear combinations, while still requiring only single-site drives.

[0070] Some optimization problems of interest can be represented using controllable long-range interactions between multiple Ising spins, but this can be challenging to realize in a hardware implementation. Long-range interactions refer to interactions between non-adjacent nodes of the problem graph in this application. One approach is to use a scheme (called the LHZ scheme in this application) that can map the Ising problem onto a graph with only local interactions. See, for example, Lechner W. et al., A QUANTUM ANNEALING ARCHITECTURE WITH ALL-TO-ALL CONNECTIVITY FROM LOCAL INTERACTIONS, Sci. Adv. 2015;1:e1500838 for a description of the LHZ scheme.

[0071] The LHZ scheme can be implemented, for example, by embedding the physical spins in the eigenbasis of a two-photon-driven KNR (an eigenbasis is a basis of a vector space consisting of eigenvectors). As mentioned above, the KNR can be realized as a superconducting microwave resonator terminated by a flux-pumped SQUID.

[0072] S. Puri et al., QUANTUM ANNEALING WITH ALL-TO-ALL CONNECTED NONLINEAR OSCILLATORS, Nature Communications (2017) describes an example physical realization involving four JPAs coupled by Josephson junctions (JJs). The nonlinearity of the JJs can induce four-body coupling between the four JPAs.

[0073] A quantum annealing platform may be constructed, for example, from a group of four JPAs interacting through a single Josephson junction (JJ). Each JPA in a group may have a different resonant frequency relative to the other three JPAs in the group. Each group of four JPAs and coupled JJs is referred to as a building block in this application.

[0074] 4 is a schematic diagram of an example implementation of a building block 400 that may be used to construct a quantum annealing platform. The building block 400 includes four JPAs 402, 404, 406, 408 communicatively coupled by JJs 410.

[0075] JPA 402 includes two coupling capacitances 412, 414 and two resonators 416, 418 communicatively coupled by a compound Josephson junction (CJJ) 420. JPA 404 includes two coupling capacitances 422, 424 and two resonators 426, 428 communicatively coupled by a CJJ 430. JPA 406 includes two coupling capacitances 432, 434 and two resonators 436, 438 communicatively coupled by a CJJ 440. JPA 408 includes two coupling capacitances 442, 444 and two resonators 446, 448 communicatively coupled by a CJJ 450.

[0076] Circuit with JPA and four qubit stabilizer Although circuit 200 of FIG. 2 shows an implementation of the LHZ architecture using superconducting flux qubits, a JPA may be used in place of a superconducting flux qubit.

[0077] 5 is a schematic diagram of another exemplary implementation of a building block 500 that can be used to build a quantum annealing platform. The building block 500 includes four JPAs 502, 504, 506, 508, and an auxiliary JPA 510 communicatively coupled by a single linear coupling device 512 to achieve pairwise coupling. The coupling device 512 includes a superconducting loop 514. The superconducting loop 514 includes a material that is superconducting below a critical temperature. The superconducting loop 514 includes a crossover 516.

[0078] JPA 502 includes two resonators 518, 520 communicatively coupled by a composite Josephson junction (CCJJ) 522. JPA 504 includes two resonators 524, 526 communicatively coupled by a CCJJ 528. JPA 506 includes two resonators 530, 532 communicatively coupled by a CCJJ 534. JPA 508 includes two resonators 536, 538 communicatively coupled by a CCJJ 540.

[0079] The coupling device 512 includes four inductive interfaces 542, 544, 546, 548, each inductively coupled to a respective one of the four JPAs. The inductive interfaces 542, 544, 546, 548 are shown as transformers in the exemplary implementation of FIG. 5. Each transformer includes a pair of inductances (i.e., one inductance that breaks the superconducting loop 514, and another inductance that is electrically coupled between one of the resonators of the JPA (e.g., resonator 520 of JPA 502) and one of the CCJJs of the JPA (e.g., CCJJ 522 of JPA 502). It may be beneficial to have the inductive coupling between the coupling device 512 and each JPA in a location that is generally near the center of the JPA within the JPA (where the respective current profiles are strongest or at least stronger).

[0080] In another embodiment, the inductive interfaces 542, 544, 546, 548 include one inductance breaking the superconducting loop 514 and another inductance in the inner conductor of the coaxial transmission line of one of the resonators (e.g., resonator 520 of JPA 502).

[0081] The auxiliary JPA 510 includes two resonators 550, 552 that are communicatively coupled by a composite compound Josephson junction (CCJJ) 554. In the exemplary implementation of Figure 5, the auxiliary JPA 510 (also referred to in this application as a parity-enforcing JPA) is communicatively coupled to the coupling device 512 by an inductive interface 556. In other implementations, the auxiliary JPA 510 has a different form of communicatively coupling with the coupling device 512.

[0082] Scalable JPA Control To realize a large-scale quantum annealing platform, it may be beneficial to implement a scalable JPA with a scalable controlled bias as described herein. The systems and methods described herein may also advantageously include replacing a single Josephson junction (e.g., JJ 410 in FIG. 4) coupling the JPA with a compound Josephson junction (CJJ) or a compound compound Josephson junction (CCJJ) (comprising a pair of CJJs arranged parallel to each other).

[0083] The CCJJs may be more robust in the presence of fabrication variations and may be tuned to introduce junction asymmetry between the constituent CJJs as needed. Each CJJ of the CCJJ may be biased, for example, by a combination of an analog DC current bias and a bias provided by a DAC (digital-to-analog converter).

[0084] The resonant frequency of the JPA's superconducting microwave resonator can be tuned by using a combination of an analog DC current bias and a bias supplied by a DAC.

[0085] The systems and methods described in this application include a) circuitry operable to control the strength of the X and Z terms in the effective Hamiltonian, and b) circuitry operable to facilitate spectroscopic measurements of the JPA, for example during calibration.

[0086] The systems and methods described in this application include scalable bindings of JPA.

[0087] 6 is a schematic diagram of an example implementation of a circuit 600 including a scalable JPA with scalable control bias. The circuit 600 includes coupling capacitances 602, 604. The locations of coupling capacitances 602, 604 within the circuit 600 also dictate where other devices and / or circuits can be communicatively coupled to the circuit 600.

[0088] The circuit 600 includes a JPA 606. The JPA 606 includes resonators 608, 610 and a composite Josephson junction (CCJJ) 612. The resonators 608, 610 are both communicatively coupled to the CCJJ 612. Each of the resonators 608, 610 includes two or more respective LC circuits (e.g., LC circuits 614, only one of which is mentioned in FIG. 6 for clarity) that are electrically coupled in series with each other. The LC circuit 614 includes an inductance 616 and a capacitor 618 that is electrically coupled to a ground terminal 620.

[0089] The circuit 600 includes a control circuit 622 (also referred to in this application as CNTL-XZ622). The CNTL-XZ622 controls the angular frequency ω p =2ω r -δ0(t) and ω r It can be used to control the strength of the X and Z terms of the effective Hamiltonian via parametric and resonant drives, respectively. The function δ(t) is referred to in this application as a detuning function and can be a function of time. The detuning function can take the resonator "off-resonance". For example, the resonator can be brought into resonance during annealing. The detuning function can define the annealing schedule. The detuning function can be a monotonic or non-monotonic function.

[0090] The CJJ 220 of the JPA 202 of Figure 2 is advantageously replaced by a CCJJ 612 in the circuit 600 of Figure 6. The CCJJ 612 may be used a) to compensate for fabrication variations in the constituent Josephson junctions, and b) to intentionally introduce junction asymmetries as needed for operation and / or calibration of the circuit 600.

[0091] The CCJJ 612 may be tuned by a combination of an analog DC current bias 624 via a first pair of inductive interfaces 626,628 and a digital-to-analog converter (DAC) 630 via a second pair of inductive interfaces 632,634.

[0092] The microwave drive 636 is communicatively coupled to the CCJJ 612 via a tunable mutual inductance 638. The tunable mutual inductance 638 includes a superconducting loop 640 that is interrupted by a CJJ 642. The tunable mutual inductance 638 has an inductive interface 644 to the microwave drive 636 and a third pair of inductive interfaces 646, 648 to the CCJJ 612.

[0093] In some implementations, each pair of the first pair of inductive interfaces 626, 628, the second pair of inductive interfaces 632, 634, and the third pair of inductive interfaces 646, 648 may be replaced by a respective single inductive interface (also referred to as a transformer in this application). An advantage of having a pair of inductive interfaces rather than a single inductive interface is that the pair of inductive interfaces may be a mirror image of the CCJJ 612.

[0094] In some implementations, at least one of the first pair of inductive interfaces 626, 628, the second pair of inductive interfaces 632, 634, and the third pair of inductive interfaces 646, 648 are mirror symmetric with respect to the CCJJ 612. The mirror symmetry of the inductive interfaces in a pair of inductive interfaces may eliminate or at least reduce the magnitude of unbalanced phase and / or unintended bias.

[0095] The function of the tunable mutual inductance 638 is to facilitate per-device adjustment of the coupling strength between the microwave drive 636 and the target device. Per-device adjustment may be advantageously used to compensate for variations in fabrication and / or impedance mismatch. The tunable mutual inductance 638 may have a combination of an analog current bias applied to the CJJ 642 and a bias provided by a DAC (not shown in FIG. 6).

[0096] Circuit 600 includes a control circuit 650 (also referred to in this application as CNTL-X). CNTL-X includes a microwave drive 652 inductively coupled via interface 654 to a tunable mutual inductance 656, which is inductively coupled to a CCJJ 612 via interface 658. Tunable mutual inductance 656 includes a CJJ 660. Tunable mutual inductance 656 may have a combination of an analog current bias applied to the CJJ 660 and a bias provided by a DAC (not shown in FIG. 6 ).

[0097] The methods, processes, or techniques described above may be implemented by a series of processor-readable instructions stored on one or more non-transitory processor-readable media. Some examples of the methods, processes, or techniques described above are performed in part by a specialized device (e.g., a computer including at least one digital processor), such as an adiabatic quantum computer or quantum annealer or system that programs or otherwise controls its operation. While the methods, processes, or techniques described above may include various acts, those skilled in the art will recognize that some acts may be omitted and / or additional acts may be added in alternative examples. Those skilled in the art will recognize that the depicted order of acts is shown for illustrative purposes only and may vary in alternative examples. Some of the exemplary acts or operations of the methods, processes, or techniques described above are performed iteratively. Some of the methods, processes, or techniques described above may be performed during each iteration, after multiple iterations, or at the end of all iterations.

[0098] The above description of illustrated implementations, including those described in the Abstract, are not intended to be exhaustive or to limit the implementations to the precise forms disclosed. While specific implementations and examples are described herein for illustrative purposes, various equivalent modifications can be made without departing from the spirit and scope of the disclosure, as will be recognized by those skilled in the art. The teachings provided herein of various implementations may be applied to other systems, methods of quantum computing, but not necessarily to the exemplary methods of quantum computing generally described above.

[0099] The various implementations described above may be combined to provide further implementations. All commonly assigned U.S. patent application publications, U.S. patent applications, foreign patents, and foreign patent applications referenced herein and / or listed within the Application Data Sheets, including but not limited to U.S. Patent Application Publication No. 63 / 001,014, filed March 27, 2020, are hereby incorporated by reference in their entirety.

[0100] These and other changes can be made to the above implementations in light of the above detailed description. Generally, in the following claims, the terms used should not be construed to limit the claims to the specific implementations disclosed in the specification and claims, but should be construed to include all possible implementations along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by this disclosure.

Claims

1. 1. A superconducting circuit including a Josephson parametric amplifier, the Josephson parametric amplifier comprising: A pair of superconducting resonators; a composite Josephson junction coupled between the pair of superconducting resonators so as to be capable of superconductive electrical communication; and a first control circuit communicatively coupled to the compound Josephson junction, the first control circuit comprising: an analog DC current bias communicably coupled to the composite Josephson junction of the Josephson parametric amplifier; a digital-to-analog converter (DAC) communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier; and a first microwave drive communicatively coupled to the first tunable mutual inductance; The first tunable mutual inductance is communicably coupled to the composite Josephson junction of the Josephson parametric amplifier.

2. 2. The superconducting circuit of claim 1, wherein the first tunable mutual inductance of the first control circuit is inductively coupled to the composite Josephson junction of the Josephson parametric amplifier, and the analog DC current bias and the DAC of the first control circuit are inductively coupled to the composite Josephson junction of the Josephson parametric amplifier.

3. 2. The superconducting circuit of claim 1, wherein the first control circuit is operable to control the strength of the X and Z terms of an effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and a time-dependent detuning frequency.

4. 2. The superconducting circuit of claim 1, wherein the superconducting circuit further comprises a second control circuit, the second control circuit comprising a second microwave drive communicatively coupled to a second tunable mutual inductance, the second tunable mutual inductance communicatively coupled to the composite Josephson junction of the Josephson parametric amplifier.

5. 5. The superconducting circuit of claim 4, wherein the second tunable mutual inductance of the second control circuit is inductively communicably coupled to the compound Josephson junction of the Josephson parametric amplifier.

6. 5. The superconducting circuit of claim 4, wherein the first and second tunable mutual inductances include a superconducting loop interrupted by a compound Josephson junction.

7. 2. The superconducting circuit of claim 1, wherein each resonator of the pair of superconducting resonators is one of a coaxial transmission line resonator and a ladder circuit including a plurality of LC circuits electrically and communicably coupled to each other in series.

8. a superconducting circuit including first, second, third, and fourth superconducting qubits, the first, second, third, and fourth qubits being communicatively coupled by a four-qubit even-parity stabilizer; The 4-qubit even parity stabilizer comprises: a superconducting stabilizer loop comprising a material that is superconducting below a first critical temperature; a first inductance of the superconducting stabilizer loop, the first inductance inductively coupled to an inductance of the first superconducting qubit; a second inductance of the superconducting stabilizer loop, the second inductance inductively coupled to an inductance of the second superconducting qubit; a third inductance of the superconducting stabilizer loop, the third inductance inductively coupled to an inductance of the third superconducting qubit; a fourth inductance of the superconducting stabilizer loop, the fourth inductance inductively coupled to an inductance of the fourth superconducting qubit; and A superconducting circuit comprising a parity-enforcing superconducting qubit communicably coupled to the superconducting loop.

9. 9. The superconducting circuit of claim 8, wherein each of the first, second, third, fourth, and parity-enforcing superconducting qubits is a superconducting flux qubit, and each of the first, second, third, and fourth superconducting flux qubits includes a respective compounded composite Josephson junction.

10. 10. The superconducting circuit of claim 9, wherein each of the first, second, third, and fourth superconducting flux qubits includes a respective superconducting qubit loop, the respective superconducting qubit loop including a material that is superconducting at or below a second critical temperature, and each superconducting qubit loop includes a respective crossover.

11. 10. The superconducting circuit of claim 9, wherein the parity-enforcing superconducting flux qubit is communicatively coupled to the superconducting loop by a fully electrochemical CJJ coupling device.

12. a quantum processor including first, second, third, and fourth Josephson parametric amplifiers, the first, second, third, and fourth parametric amplifiers communicatively coupled to one another by a four-qubit even-parity stabilizer; The 4-qubit even parity stabilizer comprises: a superconducting loop including a material that is superconducting below a critical temperature, the superconducting loop including a crossover; first, second, third, and fourth inductances of the superconducting loop, each of which is inductively coupled to an inductance of a respective Josephson parametric amplifier; and Includes a parity-enforcing Josephson parametric amplifier, The parity-enforcing Josephson parametric amplifier is communicatively coupled to the superconducting loop.

13. 13. The quantum processor of claim 12, wherein each of the first, second, third, and fourth Josephson parametric amplifiers includes a respective pair of superconducting microwave resonators, each superconducting microwave resonator of the respective pair being communicatively coupled to one another by a combined composite Josephson junction.

14. Each of the first, second, third, and fourth Josephson parametric amplifiers comprises: Each of the composite Josephson junctions; and a respective first control circuit communicatively coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers, each respective first control circuit comprising: an analog DC current bias communicably coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers; a digital-to-analog converter (DAC) communicatively coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers; and a respective first microwave drive communicatively coupled to a respective first tunable mutual inductance; 14. The quantum processor of claim 13, wherein the respective first tunable mutual inductances are communicably coupled to the respective composite compound Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers.

15. 15. The quantum processor of claim 14, wherein the respective first tunable mutual inductances of each first control circuit of the respective first control circuits are inductively coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers, and each of the analog DC current biases and each of the DACs of the respective first control circuits are inductively coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers.

16. 15. The quantum processor of claim 14, wherein each respective first control circuit is operable to control the strength of the X and Z terms of the effective Hamiltonian via a resonant drive at a first angular frequency and via a parametric drive at a second angular frequency, the second angular frequency being equal to the difference between twice the first angular frequency and a time-dependent detuning frequency.

17. each of the first, second, third, and fourth Josephson parametric amplifiers further includes a respective second control circuit; each respective second control circuit includes a respective second microwave drive communicatively coupled to a respective second tunable mutual inductance; 15. The quantum processor of claim 14, wherein each respective second tunable mutual inductance is communicably coupled to the respective composite compound Josephson junction of the first, second, third, and fourth Josephson parametric amplifiers.

18. 18. The quantum processor of claim 17, wherein each respective second tunable mutual inductance of the respective second control circuits is inductively communicably coupled to the respective composite Josephson junctions of the first, second, third, and fourth Josephson parametric amplifiers.

19. 20. The quantum processor of claim 17, wherein each respective first and second tunable mutual inductance comprises a superconducting loop interrupted by a compound Josephson junction.

20. 14. The quantum processor of claim 13, wherein each of the superconducting microwave resonators of the respective pairs of the first, second, third, and fourth Josephson parametric amplifiers is one of a coaxial transmission line resonator and a ladder circuit including a plurality of LC circuits electrically and communicatively coupled to one another in series.

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