Time synchronization device, time synchronization method, and program
The time synchronization device addresses the challenge of identifying abnormal host devices by calculating and analyzing offsets between itself and multiple high-level devices, thereby enabling swift system restoration and reducing failure risks.
Patent Information
- Application Number
- JP2024516060
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-04-22
- Publication Date
- 2025-04-09
- Estimated Expiration
- 2042-04-22
AI Technical Summary
Existing time synchronization systems using PTP protocol struggle to quickly determine which of multiple host devices is causing an abnormality, leading to delays in system restoration and potential failures.
A time synchronization device that calculates multiple offsets between itself and multiple high-level devices, determines if these offsets are within or beyond a threshold, and identifies abnormalities by detecting variations in these offsets over time.
Enables rapid identification of abnormality-causing devices, facilitating quicker system restoration and reducing the risk of failures in time synchronization systems.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a time synchronization device, a time synchronization method, and a program. [Background technology]
[0002] PTP (Precision Time Protocol) defined in the IEEE-1588 standard is a protocol for synchronizing the times of computers on a LAN (Local Area Network) with high precision (see Non-Patent Document 1). Fig. 9 is a diagram showing an example of the configuration of a time synchronization system 900 that uses the PTP protocol to synchronize the times of devices communicating with each other via a network.
[0003] A time synchronization system 900 shown in Fig. 9 includes a plurality of grand master clocks 2 (a first grand master clock 21 and a second grand master clock 22 in the example of Fig. 9), a conventional boundary clock 9, and a client device 3. The first grand master clock 21 and the boundary clock 9 can communicate with each other via a network such as a LAN, and the second grand master clock 22 and the boundary clock 9 can communicate with each other via a network such as a LAN. In addition, the boundary clock 9 and the client device 3 can communicate with each other via a network such as a LAN.
[0004] Each of the first grandmaster clock 21 and the second grandmaster clock 22 includes a GNSS antenna that receives signals (GNSS signals) from satellites of a Global Navigation Satellite System (GNSS) such as the Global Positioning System (GPS). Each of the first grandmaster clock 21 and the second grandmaster clock 22 receives the GNSS signals via the GNSS antenna and acquires Universal Time Coordinated (UTC) from the received GNSS signals. Each of the first grandmaster clock 21 and the second grandmaster clock 22 includes a master function that distributes the acquired UTC as a reference time via a network.
[0005] The boundary clock 9 functions as a device with a slave function for synchronizing the time of the device itself with the time distributed from the higher-level device with the master function. The boundary clock 9 also functions as a device with a master function for a lower-level device with the slave function. In the time synchronization system 900 shown in FIG. 9, the boundary clock 9 functions as a device with a slave function for each of the first grandmaster clock 21 and the second grandmaster clock 22. Specifically, at one time, the boundary clock 9 is in a slave state with respect to one of the first grandmaster clock 21 and the second grandmaster clock 22, and is in a passive state with respect to the other grandmaster clock 2. At another time, the boundary clock 9 is in a passive state with respect to one of the first grandmaster clock 21 and the second grandmaster clock 22, and is in a slave state with respect to the other grandmaster clock 2. The boundary clock 9 also functions as a device with a master function with respect to the client device 3.
[0006] The boundary clock 9 uses PTP to calculate an offset using a timestamp in communication with the grandmaster clock 2 connected to the boundary clock 9, thereby synchronizing the boundary clock 9 with the grandmaster clock 2. The timestamp is time information indicating the time of transmission and reception of a PTP packet in the boundary clock 9 and the grandmaster clock 2. The offset is the difference between the time of a device having a master function and the time of a device having a slave function, and in this example, is the difference between the time of the grandmaster clock 2 and the time of the boundary clock 9.
[0007] Furthermore, the boundary clock 9 transmits a PTP packet including a timestamp indicating the time of transmission and reception in the own device to the client device 3. As a result, the client device 3 calculates an offset using the timestamp in communication with the boundary clock 9 connected to the own device, and uses the offset to synchronize with the boundary clock 9. The client device 3 is, for example, a base station device in a mobile phone network.
[0008] Furthermore, the boundary clock 9 selects one grandmaster clock 2 from the multiple grandmaster clocks 2 using a Best Master Clock Algorithm (BMCA), and synchronizes with the selected grandmaster clock 2.
[0009] Here, the process of selecting one of a plurality of higher-level devices described in Non-Patent Document 2 will be described with reference to Fig. 10. Fig. 10 is a diagram described in ITU-T G.8275.1 / Y.1369.1 Annex G, and "T-BC2" and "T-BC3" shown in Fig. 10 each correspond to a higher-level device of "T-BC4".
[0010] When a PTP port in a passive state in the device "T-BC4" (indicated by the symbol "P" in the block of T-BC4 in FIG. 10) receives a PTP packet from a PTP port in a master state in the upper device "T-BC2" (indicated by the symbol "M" in the block of T-BC2 in FIG. 10), it transmits a Delay_Req message with the alternate Master Flag set to "FALSE" to the upper device "T-BC2". When the PTP port of the upper device "T-BC2" that received the Delay_Req message is in a master state, it responds with a Delay_Resp message with the alternate Master Flag value set to "FALSE". The device "T-BC4" calculates an offset with the upper device "T-BC2" using the timestamp in such communication. The alternate Master Flag is a flag used to exchange PTP messages with a port in a passive state, and information on the characteristics of the transmission path is transmitted by setting this flag in the Delay_Req message.
[0011] In addition, the PTP port in slave state in the device "T-BC4" (indicated by the symbol "S" in the block of T-BC4 in FIG. 10) receives a Sync message and a Delay_Resp message from a PTP port in master state in another higher-level device "T-BC3" (indicated by the symbol "M" in the block of T-BC3 in FIG. 10). The device "T-BC4" uses the timestamp in such communication to calculate an offset with the higher-level device "T-BC3".
[0012] When the difference between the offset calculated in this way with the upper device "T-BC2" and the offset with the upper device "T-BC3" exceeds the threshold, the device "T-BC4" generates an alarm indicating an abnormality in the upper device. This alarm is used as a PTP monitor, but does not trigger the BMCA. In addition, the threshold must be set appropriately to avoid inappropriate alarm generation.
[0013] In this way, in the technology described in Non-Patent Document 2, the device "T-BC4" receives PTP packets from each of two higher-level devices having master functions (in the example of Figure 10, higher-level devices "T-BC2" and "T-BC3"), and detects that an abnormality has occurred when the difference in offset with each of the two higher-level devices exceeds a threshold value. [Prior art documents] [Non-patent literature]
[0014] [Non-Patent Document 1] IEEE Std 1588TM-2008, “IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems” [Non-Patent Document 2] ITU-T G.8275.1 / Y.1369.1, “Precision time protocol telecom profile for phase / time synchronization with full timing support from the network” Summary of the Invention [Problem to be solved by the invention]
[0015] However, the technology described in Non-Patent Document 2 can detect the occurrence of an abnormality based on the offset between each of the multiple host devices and the device itself, but cannot determine which of the multiple host devices the abnormality is occurring in. For this reason, it takes time to restore a system including multiple host devices.
[0016] In such a case, abnormalities may also occur in the time of the lower-level device synchronized with the device itself and in the time of the user's device synchronized with the lower-level device, which may result in system failure, communication failure, etc.
[0017] The object of the present disclosure, made in consideration of the above-mentioned problems, is to provide a time synchronization device, a time synchronization method, and a program that can determine which of multiple higher-level devices has an abnormality. [Means for solving the problem]
[0018] In order to solve the above problem, the time synchronization device disclosed herein is a time synchronization device that synchronizes with any one of multiple higher-level devices, and includes an upper-level packet transceiver unit that transmits and receives packets with each of the multiple higher-level devices, an offset calculation unit that calculates multiple offsets that are the differences between the time of each of the multiple higher-level devices and the time of its own device based on the time at which the upper-level packet transceiver unit transmits and receives the packet with each of the multiple higher-level devices, an offset pattern determination unit that determines whether each of the absolute values of the multiple offsets is less than or equal to a threshold value, and an abnormal device determination unit that, when it is determined that the absolute values of the multiple offsets include an absolute value of an offset that is less than or equal to the threshold value and an absolute value of an offset that is greater than the threshold value, determines in which of the multiple higher-level devices an abnormality has occurred in the time of the multiple higher-level devices based on the presence or absence of a change from one offset to a next offset of the one offset in at least one of the multiple higher-level devices.
[0019] In addition, in order to solve the above problem, the time synchronization method disclosed herein is a time synchronization method for a time synchronization device that has an upper packet transceiver unit that transmits and receives packets with each of a plurality of higher-level devices, and synchronizes with any one of the plurality of higher-level devices, and includes the steps of: calculating multiple offsets that are differences between the time of each of the plurality of higher-level devices and the time of the device itself, based on the time at which the upper packet transceiver unit transmits and receives the packet with each of the plurality of higher-level devices; determining whether each of the absolute values of the multiple offsets is less than or equal to a threshold; and when it is determined that the absolute values of the multiple offsets include an absolute value of an offset that is less than or equal to the threshold and an absolute value of an offset that is greater than the threshold, determining which of the plurality of higher-level devices has an abnormality in its time, based on the presence or absence of a change from one offset to a next offset of the one offset in at least one of the plurality of higher-level devices.
[0020] In order to solve the above problem, a program according to the present disclosure causes a computer to operate as the above-mentioned time synchronization device. Effect of the Invention
[0021] According to the time synchronization device, the time synchronization method, and the program disclosed herein, it is possible to determine which of a plurality of higher-level devices has experienced an abnormality. [Brief description of the drawings]
[0022] [Figure 1] 1 is a diagram illustrating a configuration example of a time synchronization system according to a first embodiment of the present disclosure. [Figure 2A] FIG. 13 is a diagram for explaining an offset between a first grandmaster clock and a boundary clock. [Figure 2B] FIG. 13 is a diagram for explaining an offset between the second grandmaster clock and the boundary clock. [Figure 3A]This is a sequence diagram showing the transmission and reception of messages between a first grandmaster clock and a boundary clock when an abnormality occurs in the time of a first grandmaster clock, which is the time source, but no abnormality occurs in the time of a second groundmaster clock, which is not the time source. [Figure 3B] This is a sequence diagram showing the transmission and reception of messages between a second grandmaster clock and a boundary clock when an abnormality occurs in the time of a first grandmaster clock, which is the time source, but no abnormality occurs in the time of a second groundmaster clock, which is not the time source. [Figure 4A] This is a sequence diagram showing the transmission and reception of messages between a first grandmaster clock and a boundary clock when no abnormality occurs in the time of a first grandmaster clock, which is the time source, and an abnormality occurs in the time of a second groundmaster clock, which is not the time source. [Figure 4B] This is a sequence diagram showing the transmission and reception of messages between a second grandmaster clock and a boundary clock when no abnormality occurs in the time of a first grandmaster clock, which is the time source, and an abnormality occurs in the time of a second groundmaster clock, which is not the time source. [Figure 5A] 2 is a flowchart showing an example of an operation of the boundary clock shown in FIG. 1. [Figure 5B] 2 is a flowchart showing an example of an operation of the boundary clock shown in FIG. 1. [Figure 6] FIG. 11 is a diagram illustrating a configuration example of a time synchronization system according to a second embodiment of the present disclosure. [Figure 7A] 7 is a flowchart showing an example of an operation of the boundary clock shown in FIG. 6. [Figure 7B] 7 is a flowchart showing an example of an operation of the boundary clock shown in FIG. 6. [Figure 8] 7 is a diagram illustrating an example of a hardware configuration of the boundary clock illustrated in FIGS. 1 and 6. FIG. [Figure 9] FIG. 1 is a diagram illustrating an example of the configuration of a conventional time synchronization system. [Figure 10] FIG. 1 is a diagram for explaining communications with two higher-level devices in a conventional time synchronization device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] <<First embodiment>> Hereinafter, a first embodiment of the present disclosure will be described with reference to the drawings.
[0024] 1 shows a time synchronization system 100 according to an embodiment of the present disclosure, which includes multiple grandmaster clocks 2 (in the example of FIG. 1, a first grandmaster clock 21 and a second grandmaster clock 22), a boundary clock 1 as a time synchronization device, and a client device 3. In the first embodiment, each of the multiple grandmaster clocks 2 corresponds to a higher-level device of the boundary clock 1, and the client device 3 corresponds to a lower-level device of the boundary clock 1.
[0025] <Grandmaster clock configuration> Each of the multiple grandmaster clocks 2 transmits and receives packets to and from the boundary clock 1. At this time, each of the multiple grandmaster clocks 2 transmits to the boundary clock 1 a timestamp indicating the time at which the grandmaster clock 2 transmits or receives the packet. Specifically, the first grandmaster clock 21 transmits to the boundary clock 1 a timestamp indicating the time at which the first grandmaster clock 21 transmits or receives the packet. In addition, the second grandmaster clock 22 transmits to the boundary clock 1 a timestamp indicating the time at which the second grandmaster clock 22 transmits or receives the packet. The grandmaster clock 2 may transmit the timestamp to the boundary clock 1 by transmitting a packet including the timestamp to the boundary clock 1.
[0026] <Boundary clock configuration> The boundary clock 1 is synchronized with any one of a plurality of grandmaster clocks 2. In addition, the client device 3 may be synchronized with the boundary clock 1.
[0027] As shown in FIG. 1, the boundary clock 1 according to the first embodiment includes a plurality of upper packet transmitting / receiving units 101 (in the example of FIG. 1, a first upper packet transmitting / receiving unit 101a and a second upper packet transmitting / receiving unit 101b), an offset calculation unit 102, a threshold memory unit 103, an offset pattern determination unit 104, an abnormal device determination unit 105, a time source switching unit 106, a time synchronization processing unit 107, a clock class rewriting unit 108, a lower packet transmitting / receiving unit 109, and a fault alert issuing unit 110.
[0028] The upper packet transmitting / receiving units 101 and the lower packet transmitting / receiving unit 109 are configured by a communication interface. The offset calculation unit 102, the offset pattern determination unit 104, the abnormal device determination unit 105, the time source switching unit 106, the time synchronization processing unit 107, the clock class rewriting unit 108, and the fault alert issuing unit 110 are configured by a controller. The controller may be configured by dedicated hardware such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field-Programmable Gate Array), or may be configured by a processor, or may be configured to include both. The threshold storage unit 103 is configured by memories such as an HDD (Hard Disk Drive), an SSD (Solid State Drive), an EEPROM (Electrically Erasable Programmable Read-Only Memory), a ROM (Read-Only Memory), and a RAM (Random Access Memory).
[0029] The upper packet transmitting / receiving unit 101 transmits and receives packets to and from each of the multiple grandmaster clocks 2. The upper packet transmitting / receiving unit 101 also outputs timestamps included in packets received from the grandmaster clock 2 to the offset calculation unit 102. The timestamps are information indicating the time when the grandmaster clock 2 transmits a Sync message, the time when the upper packet transmitting / receiving unit 101 receives the Sync message, the time when the upper packet transmitting / receiving unit 101 transmits a Delay_Req message, and the time when the grandmaster clock 2 transmits the Delay_Req message. The timestamps indicating the time when the grandmaster clock 2 transmits the Sync message and the time when the grandmaster clock 2 receives the Delay_Req message are included in the packets transmitted from the grandmaster clock 2.
[0030] In the example shown in FIG. 1, the first higher-level packet transmitting / receiving unit 101a transmits and receives packets to and from the first grandmaster clock 21. The first higher-level packet transmitting / receiving unit 101a outputs timestamps indicating the times at which the above-mentioned Sync message and Delay_Req message are transmitted and received to the offset calculation unit 102. The second higher-level packet transmitting / receiving unit 101b transmits and receives packets to and from the second grandmaster clock 22. The second higher-level packet transmitting / receiving unit 101b outputs timestamps indicating the times at which the above-mentioned Sync message and Delay_Req message are transmitted and received to the offset calculation unit 102.
[0031] The offset calculation unit 102 calculates multiple offsets, which are the differences between the time of each of multiple higher-level devices and the time of its own device, based on each of multiple grandmaster clocks 2 and the time when the higher-level packet transmission / reception unit 101 transmitted and received a packet.
[0032] Specifically, the offset calculation unit 102 acquires a timestamp in packet transmission and reception between the first upper packet transmission / reception unit 101a and the first grandmaster clock 21. Based on the acquired timestamp, the offset calculation unit 102 calculates an offset between the time of the first grandmaster clock 21 and the time of the boundary clock 1 (hereinafter referred to as a "first offset Os1").
[0033] 2A, the first grandmaster clock 21 transmits a Sync message to the first upper packet transmitting / receiving unit 101a. At this time, the Sync message includes a time stamp indicating the time T1 at which the Sync message is transmitted by the grandmaster clock 2.
[0034] The first upper packet transmitting / receiving unit 101a receives a Sync message transmitted from the first grandmaster clock 21 at time T2, and transmits a Delay_Req message to the grandmaster clock 2 at time T3.
[0035] The first grandmaster clock 21 receives the Delay_Req message transmitted from the first upper packet transmitting / receiving unit 101a at time T4. Then, the first grandmaster clock 21 transmits a Delay_Resp message (delay response message) to the first upper packet transmitting / receiving unit 101a. At this time, the Delay_Resp message includes a timestamp indicating the time T4 at which the first grandmaster clock 21 received the Delay_Req message.
[0036] The offset calculation unit 102 acquires from the first upper packet transmitting / receiving unit 101a the following timestamps included in the Sync message, the timestamp indicating the time T1 when the first grandmaster clock 21 transmitted the Sync message, the timestamp indicating the time T2 when the first upper packet transmitting / receiving unit 101a received the Sync message, the timestamp indicating the time T3 when the first upper packet transmitting / receiving unit 101a transmitted the Delay_Req message, and the timestamp included in the Delay_Resp message, the timestamp indicating the time T4 when the grandmaster clock 2 transmitted the Delay_Req message. Then, the offset calculation unit 102 calculates a first offset Os1 as shown in the following formula 1. Os1=((T2-T1)-(T4-T3)) / 2 (Equation 1)
[0037] The first offset Os1 includes one offset (e.g., the first offset for the first time) Os11 and the next offset of the one offset (e.g., the first offset for the second time) Os12. Here, the "one offset" is an offset calculated based on the transmission and reception times of one set of messages (e.g., transmission and reception at times T1 to T4). The "next offset" is an offset calculated based on the transmission and reception times of the next set of messages of the one set of messages (e.g., transmission and reception at times T5 to T8).
[0038] Similarly, the offset calculation unit 102 acquires a timestamp for packet transmission and reception between the second upper packet transceiver unit 101b and the second grandmaster clock 22, and calculates the offset between the time of the second grandmaster clock 22 and the time of the boundary clock 1 (hereinafter referred to as the "second offset Os2") based on the acquired timestamp.
[0039] 2B, the second grandmaster clock 22 transmits a Sync message to the second upper packet transmitting / receiving unit 101b. At this time, the Sync message includes a time stamp indicating the time T9 at which the Sync message is transmitted by the grandmaster clock 2.
[0040] The second higher-level packet transmitting / receiving unit 101b receives a Sync message transmitted from the second grandmaster clock 22 at time T10, and transmits a Delay_Req message to the grandmaster clock 2 at time T11.
[0041] When the second grandmaster clock 22 receives the Delay_Req message transmitted from the second upper packet transmitting / receiving unit 101b at time T12, it transmits a Delay_Resp message to the second upper packet transmitting / receiving unit 101b. At this time, the Delay_Resp message includes a timestamp indicating the time T12 at which the second grandmaster clock 22 received the Delay_Req message.
[0042] The offset calculation unit 102 acquires from the second upper packet transmitting / receiving unit 101b the following timestamps included in the Sync message, the timestamp indicating the time T9 when the second grandmaster clock 22 transmitted the Sync message, the timestamp indicating the time T10 when the second upper packet transmitting / receiving unit 101b received the Sync message, the timestamp indicating the time T11 when the second upper packet transmitting / receiving unit 101b transmitted the Delay_Req message, and the timestamp included in the Delay_Resp message, the timestamp indicating the time T12 when the grandmaster clock 2 transmitted the Delay_Req message. Then, the offset calculation unit 102 calculates a second offset Os2 as shown in the following formula 2. Os2=((T10-T9)-(T12-T11)) / 2 (Equation 2)
[0043] The second offset Os2 includes one offset (e.g., the first second offset) Os21 and the next offset of the one offset (e.g., the second second offset) Os22. Here, the "one offset" is an offset calculated based on the transmission and reception times of one set of messages (e.g., transmission and reception between times T9 and T12). The "next offset" is an offset calculated based on the transmission and reception times of the next set of messages of the one set of messages (e.g., transmission and reception between times T13 and T16).
[0044] The threshold storage unit 103 stores a threshold TH used by the offset pattern determination unit 104 described later to determine the offset pattern. The threshold may be a predetermined fixed value (e.g., 1 ms). The threshold may also be an average value of offsets (at least one of the first offset Os1 and the second offset Os2) in a certain period. The threshold may be an average value of multiple (e.g., 60) offsets calculated for each of multiple (e.g., 60) pieces of data transmitted and received periodically (e.g., every second) during a certain period (e.g., one minute) after the start of communication using the PTP protocol.
[0045] The offset pattern determination unit 104 determines whether the absolute values of the multiple offsets calculated by the offset calculation unit 102 are equal to or less than a threshold value TH. If all of the absolute values of the multiple offsets are equal to or less than the threshold value, the offset pattern determination unit 104 determines that no abnormality has occurred in any of the times of the boundary clock 1 and the multiple grand master clocks 2. If all of the absolute values of the multiple offsets are greater than the threshold value, the offset pattern determination unit 104 determines that an abnormality has occurred in the time of its own device (boundary clock 1).
[0046] Specifically, the offset pattern determination unit 104 determines whether the absolute value of the first offset Os1 is equal to or less than a threshold value TH, and determines whether the absolute value of the second offset Os2 is equal to or less than a threshold value TH. Here, the target of the determination by the offset pattern determination unit 104 is the first offset Os1 (the second first offset Os12 based on times T5 to T8) after the boundary clock 1 is synchronized with the grandmaster clock 2 which is the time source. Also, the target of the determination by the offset pattern determination unit 104 is the second offset Os2 (the second second offset Os22 based on times T13 to T16) after the boundary clock 1 is synchronized with the grandmaster clock 2 which is the time source.
[0047] If the offset pattern determination unit 104 determines that the absolute value of the first offset Os1 is equal to or less than the threshold value TH and that the absolute value of the second offset Os2 is equal to or less than the threshold value TH, it determines that no abnormality has occurred in the time of either the grand master clock 2 or the boundary clock 1.
[0048] Furthermore, when the offset pattern determination unit 104 determines that the absolute value of the offset based on the timestamp in communication with the grandmaster clock 2 that is the time source is less than or equal to the threshold value TH and that the absolute value of the offset based on the timestamp in communication with the grandmaster clock 2 that is not the time source is greater than the threshold value TH, it determines that either the time of the first grandmaster clock 21 or the second grandmaster clock 22 is abnormal.
[0049] Specifically, when the first grandmaster clock 21 is the time source and the second grandmaster clock 22 is not the time source, if the offset pattern determination unit 104 determines that an abnormality has occurred in either the time of the first grandmaster clock 21 or the second grandmaster clock 22 when it determines that the absolute value of the first offset Os1 is less than or equal to the threshold value TH and the absolute value of the second offset Os2 is greater than the threshold value TH.
[0050] In addition, when the first grandmaster clock 21 is not the time source and the second grandmaster clock 22 is the time source, if the offset pattern determination unit 104 determines that an abnormality has occurred in either the time of the first grandmaster clock 21 or the second grandmaster clock 22 when it determines that the absolute value of the first offset Os1 is greater than the threshold value TH and the absolute value of the second offset Os2 is less than or equal to the threshold value TH.
[0051] Furthermore, if it is determined that the absolute value of the first offset Os1 is greater than the threshold value TH and the absolute value of the second offset Os2 is greater than the threshold value TH, the offset pattern determination unit 104 determines that an abnormality has occurred in the time of its own device (boundary clock 1).
[0052] Further, offset pattern determination unit 104 controls clock class rewriting unit 108 to rewrite the clock class based on whether an abnormality occurs in the time of its own device. Specifically, when offset pattern determination unit 104 determines that an abnormality occurs in the time of its own device, it controls clock class rewriting unit 108 to rewrite the clock class to one indicating that an abnormality occurs in the time of its own device.
[0053] When it is determined that the absolute values of the multiple offsets include an absolute value of an offset that is less than or equal to the threshold value TH and an absolute value of an offset that is greater than the threshold value TH, the abnormal device determination unit 105 determines at which of the multiple grandmaster clocks 2 an abnormality has occurred, based on the presence or absence of a change from one offset to the next offset in at least one of the multiple grandmaster clocks 2.
[0054] In addition, if the above-mentioned fluctuation occurs, the abnormal device determination unit 105 determines that an abnormality has occurred in the time of the grandmaster clock 2 that is the time source among the multiple grandmaster clocks 2, and if the above-mentioned fluctuation does not occur, it determines that an abnormality has occurred in the time of the grandmaster clock 2 that is not the time source among the multiple grandmaster clocks 2.
[0055] Specifically, the abnormal device determination unit 105 may determine whether or not one offset (first first offset Os11) in communication with the first grandmaster clock 21 when the time source is the first grandmaster clock 21 is "offset present". In this configuration, the abnormal device determination unit 105 determines whether or not the next offset (second first offset Os12) of the one offset is "offset present". Then, when the result of the determination regarding the first first offset Os11 differs from the result of the determination regarding the second first offset Os12, the abnormal device determination unit 105 determines that an abnormality has occurred in the time of the first grandmaster clock 21, which is the time source. For example, when the first first offset Os11 is "offset present" and the second first offset Os12 is "no offset", the abnormal device determination unit 105 determines that an abnormality has occurred in the time of the first grandmaster clock 21, which is the time source.
[0056] Furthermore, the abnormal device determination unit 105 may determine whether or not one offset (first second offset Os21) in communication with the second grandmaster clock 22 when the time source is the first grandmaster clock 21 is "offset present" and determine whether or not the next offset (second second offset Os22) of the one offset is "offset present". When the result of the determination regarding the first second offset Os21 differs from the result of the determination regarding the second second offset Os22, the abnormal device determination unit 105 determines that an abnormality has occurred in the time of the first grandmaster clock 21. Specifically, when the first second offset Os21 is "offset absent" and the second second offset Os22 is "offset present", the abnormal device determination unit 105 determines that an abnormality has occurred in the time of the first grandmaster clock 21, which is the time source.
[0057] Here, referring to the example shown in FIG. 3A and FIG. 3B, the processing of the offset calculation unit 102, the offset pattern determination unit 104, and the abnormal device determination unit 105 in an example where an abnormality occurs in the time of the first grandmaster clock 21 and an abnormality does not occur in the time of the second grandmaster clock 22 will be described in more detail. FIG. 3A is a sequence diagram showing the transmission and reception of messages between the first grandmaster clock 21, in which an abnormality occurs in the time, and the boundary clock 1. FIG. 3B is a sequence diagram showing the transmission and reception of messages between the second grandmaster clock 22, in which an abnormality does not occur in the time, and the boundary clock 1. In this example, the transmission delay time in the communication between the first grandmaster clock 21 and the second grandmaster clock 22, and the boundary clock 1 is "1". Also, in this example, the first grandmaster clock 21 is the time source of the boundary clock 1, and the second grandmaster clock 22 is not the time source of the boundary clock 1. 3A and 3B, the numbers outside the parentheses corresponding to TX (X is an integer from 1 to 16) are the times indicated by the clocks of the respective devices. If the clocks of the respective devices are out of sync, the correct time is indicated in the parentheses corresponding to TX.
[0058] As shown in FIG. 3A, the first grandmaster clock 21 transmits the first set of Sync messages to the boundary clock 1 at the correct time "6". In this example, as described above, an abnormality occurs in the time of the first grandmaster clock 21, causing it to deviate from the correct time. As a result, the clock of the first grandmaster clock 21 indicates time "9" instead of the correct time "6". Therefore, the Sync message transmitted by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating time T1="9" as the transmission time of the Sync message.
[0059] The boundary clock 1 receives the Sync message transmitted from the first grandmaster clock 21 at the correct time T2 of its own device, which is "7". Then, the boundary clock 1 transmits a Delay_Req message to the first grandmaster clock 21 at the correct time T3 of its own device, which is "8".
[0060] When the first grandmaster clock 21 receives the Delay_Req message sent from the boundary clock 1 at the correct time "9", it sends a Delay_Resp message to the boundary clock 1. As described above, an abnormality has occurred in the time of the first grandmaster clock 21, causing it to deviate from the correct time. As a result, at this time, the clock of the first grandmaster clock 21 indicates time T4="12" instead of the correct time "9". Therefore, the Delay_Resp message sent by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating time T4="12" as the reception time of the Delay_Req message.
[0061] The offset calculation unit 102 calculates a first offset Os11 of the first set as shown in Equation 3 below. Os11=((T2-T1)-(T4-T3)) / 2 =((7-9)-(12-8)) / 2 =-3 (formula 3)
[0062] Here, the time synchronization processing unit 107 , which will be described in detail later, synchronizes the boundary clock 1 with the first grandmaster clock 21 by using the first set of first offsets Os 1 calculated by the offset calculation unit 102 .
[0063] Next, the first grandmaster clock 21 transmits a second set of Sync messages to the boundary clock 1 at the correct time "15". In this example, as described above, an abnormality occurs in the time of the first grandmaster clock 21, causing it to deviate from the correct time. As a result, the clock of the first grandmaster clock 21 indicates the time "18" instead of the correct time "15". Therefore, the Sync message transmitted by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating the time T5="18" as the transmission time of the Sync message.
[0064] The boundary clock 1 receives the second set of Sync messages transmitted from the first grandmaster clock 21 at the correct time "16". As described above, the boundary clock 1 is synchronized with the first grandmaster clock 21, which is off from the correct time, so the time of the boundary clock 1 is off from the correct time. Therefore, when the second set of Sync messages is received, the clock of the boundary clock 1 indicates time T6="19" instead of the correct time "16". Then, the boundary clock 1 transmits a Delay_Req message to the grandmaster clock 2 at the correct time "17". At this time, the time of the first grandmaster clock 21 is off from the correct time, so when the second set of Delay_Req messages is transmitted, the clock of the boundary clock 1 indicates time T7="20".
[0065] When the first grandmaster clock 21 receives the Delay_Req message sent from the boundary clock 1 at the correct time "18", it sends a Delay_Resp message to the boundary clock 1. As described above, an abnormality has occurred in the time of the first grandmaster clock 21, causing it to deviate from the correct time. As a result, when the Delay_Req message is received, the clock of the first grandmaster clock 21 indicates time T8="21" rather than the correct time "18". For this reason, the Delay_Resp message sent by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating time T8="21" as the reception time of the Delay_Req message.
[0066] The offset calculation unit 102 calculates the second set of first offsets Os12 as shown in the following equation 4. Os12=((T6-T5)-(T8-T7)) / 2 =((19-18)-(21-20)) / 2 =0 (Formula 4)
[0067] Here, the abnormal device determination unit 105 determines whether the first offset Os11 in the communication using the first grandmaster clock 21 as the time source is "with offset" and determines whether the second first offset Os12 is "with offset." In this example, the first first offset Os11 is "-3 (with offset)" and the second first offset Os12 is "0 (no offset)." Therefore, the abnormal device determination unit 105 determines that the first offset Os1 has changed from "with offset" to "no offset."
[0068] 3B, the second grandmaster clock 22 transmits the first set of Sync messages to the boundary clock 1 at the correct time "6". In this example, the time of the second grandmaster clock 22 is normal (no abnormality has occurred), and at this time, the clock of the second grandmaster clock 22 indicates the correct time T9="6". Therefore, the Sync message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T9="6" as the transmission time of the Sync message.
[0069] The boundary clock 1 receives the Sync message transmitted from the second grandmaster clock 22 at its own correct time T10="7". Then, the boundary clock 1 transmits a Delay_Req message to the grandmaster clock 2 at its own correct time T11="8".
[0070] When the second grandmaster clock 22 receives the Delay_Req message transmitted from the boundary clock 1 at the correct time "9", it transmits a Delay_Resp message to the boundary clock 1. As described above, in this example, the time of the second grandmaster clock 22 is normal, and the clock of the second grandmaster clock 22 indicates the correct time T12="9" when the Delay_Req message is received. Therefore, the Delay_Resp message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T12="9" as the reception time of the Delay_Req message.
[0071] The offset calculation unit 102 calculates the first set of second offsets Os21 as shown in Equation 5 below. Os21=((T10-T9)-(T12-T11)) / 2 =((7-6)-(9-8)) / 2 =0 (Formula 5)
[0072] Here, as described above, the boundary clock 1 is synchronized with the first grandmaster clock 21. On the other hand, the boundary clock 1 is not synchronized with the second grandmaster clock 22 because the second grandmaster clock 22 is not a time source.
[0073] Next, the second grandmaster clock 22 transmits a second set of Sync messages to the boundary clock 1 at the correct time "15". In this example, the time of the second grandmaster clock 22 is normal, and at this time, the clock of the second grandmaster clock 22 indicates the correct time T13="15". Therefore, the Sync message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T13="15" as the transmission time of the Sync message.
[0074] The boundary clock 1 receives the second set of Sync messages transmitted from the first grandmaster clock 21 at the correct time "16". As described above, the time of the boundary clock 1 is synchronized with the first grandmaster clock 21, and the time of the first grandmaster clock 21 is deviated from the correct time. As a result, when the second set of Sync messages is received, the time of the boundary clock 1 indicates T14="19". Then, the boundary clock 1 transmits a Delay_Req message to the grandmaster clock 2 at the correct time "17". The time of the boundary clock 1 is synchronized with the first grandmaster clock 21, and the time of the first grandmaster clock 21 is deviated from the correct time, so when the second set of Delay_Req messages is transmitted, the time of the boundary clock 1 indicates T15="20".
[0075] When the second grandmaster clock 22 receives the Delay_Req message transmitted from the boundary clock 1 at the correct time "18", it transmits a Delay_Resp message to the boundary clock 1. As described above, in this example, the time of the second grandmaster clock 22 is normal, and the clock of the second grandmaster clock 22 indicates the correct time T16="18" when the Delay_Req message is received. Therefore, the Delay_Resp message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T16="18" as the reception time of the Delay_Req message.
[0076] The offset calculation unit 102 calculates the second offset Os22 of the second set as shown in the following equation 6. Os22=((T14-T13)-(T16-T15)) / 2 =((19-15)-(18-20)) / 2 =3 (Equation 6)
[0077] Here, the abnormal device determination unit 105 determines whether the first second offset Os21 in the communication using the first grandmaster clock 21 as the time source is "with offset" and determines whether the second offset Os22 in the second communication is "with offset." In this example, the first second offset Os21 is "0 (without offset)" and the second second offset Os22 is "3 (with offset)." Therefore, the abnormal device determination unit 105 determines that the second offset has changed from "without offset" to "with offset."
[0078] In this way, the abnormal device determination unit 105 may determine that an abnormality has occurred in the time of the grandmaster clock 2 (in this example, the first grandmaster clock 21) which is the time source, based on the determination that the first offset has changed from "with offset" to "without offset". The abnormal device determination unit 105 may also determine that an abnormality has occurred in the time of the grandmaster clock 2 (in this example, the first grandmaster clock 21) which is the time source, based on the determination that the second offset has changed from "without offset" to "with offset".
[0079] Next, referring to the examples shown in Fig. 4A and Fig. 4B, the processing of the offset calculation unit 102, the offset pattern determination unit 104, and the abnormal device determination unit 105 in the case where no abnormality occurs in the time of the first grandmaster clock 21 and an abnormality occurs in the time of the second grandmaster clock 22 will be described in more detail. Fig. 4A is a sequence diagram showing the transmission and reception of messages between the first grandmaster clock 21, in which no abnormality occurs in the time, and the boundary clock 1. Fig. 4B is a sequence diagram showing the transmission and reception of messages between the second grandmaster clock 22, in which an abnormality occurs in the time, and the boundary clock 1. In this example, the transmission delay time in the communication between the first grandmaster clock 21 and the second grandmaster clock 22, and the boundary clock 1 is "1". Also, in this example, the first grandmaster clock 21 is the time source of the boundary clock 1, and the second grandmaster clock 22 is not the time source of the boundary clock 1. In addition, in Figures 4A and 4B, the numbers outside the parentheses written corresponding to TX are the times shown by the clocks of the respective devices. If the clocks of the respective devices are out of sync, the correct times are shown in the parentheses written corresponding to TX.
[0080] As shown in Fig. 4A, the first grandmaster clock 21 transmits the first set of Sync messages to the boundary clock 1 at the correct time "6". In this example, the time of the first grandmaster clock 21 is normal, and the clock indicates the correct time T1="6". Therefore, the Sync message transmitted by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating T1="6" as the transmission time of the Sync message.
[0081] The boundary clock 1 receives the Sync message transmitted from the first grandmaster clock 21 at its own correct time T2="7". Then, the boundary clock 1 transmits a Delay_Req message to the grandmaster clock 2 at its own correct time T3="8".
[0082] When the first grandmaster clock 21 receives the Delay_Req message sent from the boundary clock 1 at the correct time "9", it sends a Delay_Resp message to the boundary clock 1. In this example, the time of the second grandmaster clock 22 is normal, and the clock indicates the correct time T4="9" when the Delay_Req message is received. Therefore, the Delay_Resp message sent by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T4="9" as the reception time of the Delay_Req message.
[0083] The offset calculation unit 102 calculates the first offset Os11 of the first set as shown in Equation 7 below. Os11=((T2-T1)-(T4-T3)) / 2 =((7-6)-(9-8)) / 2 =0 (formula 7)
[0084] Here, the time synchronization processing unit 107, which will be described in detail later, synchronizes the time of the boundary clock 1 with the first grandmaster clock 21 using the first set of first offsets Os11 calculated by the offset calculation unit 102. At this time, the boundary clock 1 is not changed because it is already synchronized with the first grandmaster clock 21 (the first offset Os11 is "0").
[0085] Next, the first grandmaster clock 21 transmits the second set of Sync messages to the boundary clock 1 at the correct time "15". As described above, in this example, the time of the first grandmaster clock 21 is normal, and the clock indicates the correct time T5="15". Therefore, the Sync message transmitted by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating the time T5="15" as the transmission time of the Sync message.
[0086] The boundary clock 1 receives the Sync message transmitted from the first grandmaster clock 21 at its own correct time T6="16". Then, the boundary clock 1 transmits a Delay_Req message to the first grandmaster clock 21 at its own correct time T7="17".
[0087] When the first grandmaster clock 21 receives the Delay_Req message sent from the boundary clock 1 at the correct time "18", it sends a Delay_Resp message to the boundary clock 1. As described above, in this example, the time of the first grandmaster clock 21 is normal, and the clock indicates the correct time T8="18" when the Delay_Req message is received. Therefore, the Delay_Resp message sent by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating the time T8="18" as the reception time of the Delay_Req message.
[0088] The offset calculation unit 102 calculates the second set of first offsets Os12 as shown in the following equation 8. Os12=((T6-T5)-(T8-T7)) / 2 =((16-15)-(18-17)) / 2 =0 (formula 8)
[0089] Here, the abnormal device determination unit 105 determines whether the first offset Os11 in the communication using the first grandmaster clock 21 as the time source is "with offset" and determines whether the second first offset Os12 is "with offset." In this example, the first first offset Os11 is "0 (no offset)" and the second first offset Os12 is "0 (no offset)." Therefore, the abnormal device determination unit 105 determines that the first offset Os1 has not changed.
[0090] As shown in FIG. 4B, the second grandmaster clock 22 transmits the first set of Sync messages to the boundary clock 1 at the correct time "6". In this example, an abnormality occurs in the time of the second grandmaster clock 22, causing it to deviate from the correct time. As a result, the clock of the second grandmaster clock 22 indicates time "9" instead of the correct time "6". Therefore, the Sync message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating time T9="9" as the transmission time of the Sync message.
[0091] The boundary clock 1 receives the Sync message sent from the second grandmaster clock 22 at the correct time T10 of its own device, which is "7". Then, the boundary clock 1 sends a Delay_Req message to the grandmaster clock 2 at the correct time T11 of its own device, which is "8".
[0092] When the second grandmaster clock 22 receives the Delay_Req message sent from the boundary clock 1 at the correct time "9", it sends a Delay_Resp message to the boundary clock 1. As described above, an abnormality has occurred in the time of the second grandmaster clock 22, causing it to deviate from the correct time. As a result, when the Delay_Req message is received, the clock of the second grandmaster clock 22 indicates time T12="12" instead of the correct time "9". Therefore, the Delay_Resp message sent by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating time T12="12" as the reception time of the Delay_Req message.
[0093] The offset calculation unit 102 calculates the first set of second offsets Os21 as shown in the following equation 9. Os21=((T10-T9)-(T12-T11)) / 2 =((7-9)-(12-8)) / 2 =-3 (Equation 9)
[0094] As described above, here, the boundary clock 1 is synchronized with the first grandmaster clock 21, which is the time source. On the other hand, the boundary clock 1 is not synchronized with the second grandmaster clock 22, which is not the time source.
[0095] Next, the second grandmaster clock 22 transmits a second set of Sync messages to the boundary clock 1 at the correct time "15". In this example, an abnormality has occurred in the time of the second grandmaster clock 22, causing it to deviate from the correct time. As a result, the clock of the second grandmaster clock 22 indicates time T13="18" instead of the correct time "15". Therefore, the Sync message transmitted by the second grandmaster clock 22 to the boundary clock 1 includes a timestamp indicating time T13="18" as the transmission time of the Sync message.
[0096] The boundary clock 1 receives the Sync message transmitted from the second grandmaster clock 22 at its own correct time T14="16". Then, the boundary clock 1 transmits a Delay_Req message to the grandmaster clock 2 at its own correct time T15="17".
[0097] When the second grandmaster clock 22 receives the Delay_Req message sent from the boundary clock 1 at the correct time "18", it sends a Delay_Resp message to the boundary clock 1. As described above, an abnormality has occurred in the time of the second grandmaster clock 22, causing it to deviate from the correct time. As a result, when the Delay_Req message is received, the clock of the second grandmaster clock 22 indicates time T16="21" instead of the correct time "18". For this reason, the Delay_Resp message sent by the first grandmaster clock 21 to the boundary clock 1 includes a timestamp indicating time T16="21" as the reception time of the Delay_Req message.
[0098] The offset calculation unit 102 calculates the second offset Os22 of the second set as shown in the following equation 10. Os22=((T14-T13)-(T16-T15)) / 2 =((16-18)-(21-17)) / 2 =-3 (Equation 10)
[0099] Here, the abnormal device determination unit 105 determines whether the second offset Os21 in the first communication in which the boundary clock 1 uses the first grandmaster clock 21 as the time source is "with offset" and determines whether the second offset Os22 in the second communication is "with offset." In this example, the second offset Os21 in the first communication is "-3 (with offset)" and the second offset Os22 in the second communication is "-3 (with offset)." Therefore, the abnormal device determination unit 105 determines that the second offset has not changed.
[0100] In this way, the abnormal device determination unit 105 may determine that an abnormality has occurred in the time of the grandmaster clock 2 that is not the time source (in this example, the second grandmaster clock 22) by determining that the first offset has not fluctuated. Also, the abnormal device determination unit 105 may determine that an abnormality has occurred in the time of the grandmaster clock 2 that is not the time source (in this example, the second grandmaster clock 22) by determining that the second offset has not fluctuated.
[0101] When it is determined that an abnormality has occurred in the time of the grandmaster clock 2 that is the time source of the own device among the multiple grandmaster clocks 2, the time source switching unit 106 switches to a grandmaster clock 2 that has not been the time source, different from the grandmaster clock 2 that is the time source of the own device, as the time source. Specifically, when the first grandmaster clock 21 is the time source, if it is determined that an abnormality has occurred in the time of the first grandmaster clock 21, the time source switching unit 106 switches to the second grandmaster clock 22 as the time source. Also, when the second grandmaster clock 22 is the time source, if it is determined that an abnormality has occurred in the time of the second grandmaster clock 22, the time source switching unit 106 switches to the first grandmaster clock 21 as the time source.
[0102] The time synchronization processing unit 107 synchronizes the device with the grandmaster clock 2 serving as the time source, based on the offset between the device and the grandmaster clock 2 serving as the time source, calculated by the offset calculation unit 102. The grandmaster clock 2 serving as the time source is the grandmaster clock 2 switched by the time source switching unit 106.
[0103] The clock class rewrite unit 108 rewrites the clock class when it is determined that an abnormality has occurred at the time of the boundary clock 1. Specifically, when it is determined that an abnormality has occurred at the time of the boundary clock 1, the clock class rewrite unit 108 rewrites the clock class to indicate that an abnormality has occurred in the boundary clock 1.
[0104] The lower-level packet transmitting / receiving unit 109 transmits and receives packets to and from the client device 3. Furthermore, the packet transmitted from the lower-level packet transmitting / receiving unit 109 to the client device 3 may include a timestamp indicating the time when the boundary clock 1 transmitted or received the packet. Furthermore, the lower-level packet transmitting / receiving unit 109 may transmit a clock class to the client device 3. For example, the packet transmitted from the lower-level packet transmitting / receiving unit 109 to the client device 3 may further include the clock class output by the clock class rewriting unit 108.
[0105] When the grandmaster clock 2 having an abnormality in time is determined, the fault alert issuing unit 110 may issue an alert indicating that an abnormality has occurred in the time of the grandmaster clock 2. Furthermore, when the fault alert issuing unit 110 determines that all of the absolute values of the multiple offsets are greater than a threshold, it may issue an alert indicating that an abnormality has occurred in the time of its own device. The fault alert issuing unit 110 may transmit the alert to another device via a communication network, may display the alert on a display, or may output the alert by voice, for example.
[0106] Moreover, if the offset pattern determination unit 104 determines that both the times of the grandmaster clock 2 and the boundary clock 1 are normal, the fault alert issuing unit 110 does not issue an alert. In this case, no special work is performed on the time synchronization system 100, and the operation of the time synchronization system 100 continues.
[0107] <Client device configuration> The client device 3 transmits and receives packets to and from the lower-level packet transmitting / receiving unit 109 .
[0108] In a configuration in which a packet transmitted from the lower-level packet transceiver unit 109 to the client device 3 includes a timestamp indicating the time when the boundary clock 1 transmitted or received the packet, the client device 3 may synchronize itself to the boundary clock 1.
[0109] In a configuration in which the packet transmitted from the lower-level packet transmitting / receiving unit 109 to the client device 3 further includes the clock class output by the clock class rewriting unit 108, if the clock class indicates that an abnormality has occurred in the time of the client device 3, the client device 3 stops synchronizing with the boundary clock 1 that transmitted the clock class. Furthermore, the client device 3 may start synchronizing the time with a boundary clock different from the boundary clock 1 that transmitted the clock class.
[0110] <Boundary clock operation> Here, the operation of the boundary clock 1 according to the first embodiment will be described with reference to Figs. 5A and 5B. Figs. 5A and 5B are flowcharts showing an example of the operation of the boundary clock 1 according to the first embodiment. The operation of the boundary clock 1 described with reference to Figs. 5A and 5B corresponds to an example of a time synchronization method of the boundary clock 1 (time synchronization device) according to the first embodiment, which includes a higher-level packet transmission / reception unit 101 that transmits and receives packets to and from each of a plurality of grandmaster clocks 2, and synchronizes with any one of the plurality of grandmaster clocks 2. In this example, the first grandmaster clock 21 is the time source, and the second grandmaster clock 22 is not the time source.
[0111] In step S11, the offset calculation unit 102 acquires timestamps from the upper layer packet transmitting and receiving unit 101. Specifically, the offset calculation unit 102 acquires timestamps (T1 to T8 shown in FIG. 2A) from the first upper layer packet transmitting and receiving unit 101a. The offset calculation unit 102 also acquires timestamps (T9 to T16 shown in FIG. 2B) from the second upper layer packet transmitting and receiving unit 101b.
[0112] In step S12, the offset calculation unit 102 calculates multiple offsets, which are the differences between the time of each of the multiple grandmaster clocks 2 and the time of its own device, based on the time when each of the multiple grandmaster clocks 2 and the upper packet transceiver unit 101 transmitted and received a packet.
[0113] Specifically, the offset calculation unit 102 calculates a first offset Os11 for the first set based on times T1 to T4 indicated by the time stamps of the messages in the first set acquired from the first upper packet transmitting / receiving unit 101a. The offset calculation unit 102 also calculates a second offset Os21 for the first set based on times T9 to T12 indicated by the time stamps of the messages in the first set acquired from the second upper packet transmitting / receiving unit 101b. The offset calculation unit 102 also calculates a first offset Os12 for the second set based on times T5 to T8 indicated by the time stamps of the messages in the second set acquired from the first upper packet transmitting / receiving unit 101a. The offset calculation unit 102 also calculates a second offset Os22 for the second set based on times T13 to T16 indicated by the time stamps of the messages in the second set acquired from the second upper packet transmitting / receiving unit 101b.
[0114] In step S13, the offset pattern determination unit 104 compares the absolute values of the first offset Os12 and the second offset Os22 of the second set with a threshold value TH. Specifically, the offset pattern determination unit 104 first determines whether the absolute values of the multiple offsets are equal to or smaller than a threshold value.
[0115] If in step S13 it is determined that the absolute value of the first offset Os12 of the second set is less than or equal to the threshold value TH and the absolute value of the second offset Os22 of the second set is less than or equal to the threshold value TH (pattern A), in step S14 the offset pattern determination unit 104 determines that no abnormality has occurred in either the time of the grandmaster clock 2 or the boundary clock 1.
[0116] If in step S13 it is determined that the absolute value of the second set of first offsets Os12 is less than or equal to the threshold value TH and the absolute value of the second set of second offsets Os22 is greater than the threshold value TH (pattern B or C), in step S15 the offset pattern determination unit 104 determines that an abnormality has occurred in the time of the first grandmaster clock 21 or the second grandmaster clock 22.
[0117] Then, in steps S16 to S21, when the abnormal device determination unit 105 determines that the absolute values of the multiple offsets (first offset Os1 and second offset Os2) include an absolute value of an offset that is equal to or less than the threshold value TH and an absolute value of an offset that is greater than the threshold value TH, the abnormal device determination unit 105 determines at which of the multiple grandmaster clocks 2 the abnormality occurs, based on the presence or absence of a change from one offset (e.g., the first offset Os11 of the first time) to the next offset (e.g., the first offset Os12 of the second time) in at least one of the multiple grandmaster clocks 2. Here, the processing of steps S16 to S21 will be described in detail.
[0118] In step S16, the abnormal device determination unit 105 determines whether there is a change in the offset between the grandmaster clock 2 and the device itself. In this example, the abnormal device determination unit 105 determines whether there is a change in the offset between the grandmaster clock 2 that is the time source and the device itself. The abnormal device determination unit 105 may also determine whether there is a change in the offset between the grandmaster clock 2 that is not the time source and the device itself. The abnormal device determination unit 105 may also determine whether there is a change in the offset between the grandmaster clock 2 that is the time source and the device itself, and between the grandmaster clock 2 that is not the time source and the device itself.
[0119] If it is determined in step S16 that there is a fluctuation in the offset (Yes in S16), then in step S17, the abnormal device determiner 105 determines that an abnormality has occurred in the time of the grand master clock 2, which is the time source (Pattern B).
[0120] In step S18, the fault alert issuing unit 110 issues an alert indicating that an abnormality has occurred in the time of the grandmaster clock 2, which is the time source.
[0121] In step S19, the time source switching unit 106 switches the time source to the grandmaster clock 2, which was not the time source.
[0122] If it is determined in step S16 that there is no variation in the offset (No in S16), then in step S20, the abnormal device determiner 105 determines that an abnormality has occurred in the time of the grandmaster clock 2 which is not the time source (Pattern C).
[0123] In step S21, the fault alert issuing unit 110 issues an alert indicating that an abnormality has occurred in the time of the grandmaster clock 2 which is not the time source.
[0124] Furthermore, if in step S13 it is determined that the absolute value of the second first offset Os1 is greater than the threshold value TH and the absolute value of the second second offset Os2 is greater than the threshold value TH (pattern D), in step S22 the offset pattern determination unit 104 determines that an abnormality has occurred in the time of its own device (boundary clock 1).
[0125] In step S23, the fault alert issuing unit 110 issues an alert indicating that an abnormality has occurred at the time of the boundary clock 1.
[0126] In step S24, the clock class is rewritten to indicate that an abnormality has occurred at the time of the boundary clock 1.
[0127] 5A and 5B, the first grandmaster clock 21 is the time source, and the second grandmaster clock 22 is not the time source, as described above, but the present invention is not limited to this. For example, the first grandmaster clock 21 may not be the time source, and the second grandmaster clock 22 may be the time source. In such an example, if it is determined in step S13 that the absolute value of the first offset Os1 is greater than the threshold value TH and the absolute value of the second offset Os2 is equal to or less than the threshold value TH (pattern B or C), the offset pattern determination unit 104 determines in step S15 that an abnormality has occurred in either the time of the first grandmaster clock 21 or the time of the second grandmaster clock 22.
[0128] As described above, the boundary clock 1 as a time synchronization device according to the first embodiment includes a higher-level packet transmission / reception unit 101 that transmits and receives packets to and from a plurality of grandmaster clocks 2, an offset calculation unit 102 that calculates a plurality of offsets, which are differences between the time of each of the plurality of grandmaster clocks 2 and the time of the device itself, based on the time at which the higher-level packet transmission / reception unit 101 transmits and receives packets to and from each of the plurality of grandmaster clocks 2, an offset pattern determination unit 104 that determines whether or not the absolute values of the plurality of offsets are equal to or less than a threshold, and an abnormal device determination unit 105 that determines, for each of the plurality of higher-level devices, whether an abnormality has occurred in the time of any of the plurality of grandmaster clocks 2, based on the presence or absence of a change from one offset to the next offset of the one offset, when it is determined that one of the plurality of offsets is equal to or less than the threshold and the other offset is greater than the threshold. This allows the boundary clock 1 to determine whether an abnormality has occurred in the time of the device itself or the plurality of grandmaster clocks 2. Therefore, when it is recognized that a fault has occurred in the time synchronization system 100, it is possible to quickly isolate the fault and quickly restore normal operation. Furthermore, a maintenance manager or the like can determine the device causing the failure in the time synchronization system 100 without visiting the sites where the multiple grandmaster clocks 2 and boundary clocks 1 are installed.
[0129] Moreover, the boundary clock 1 as the time synchronization device according to the first embodiment further includes a time source switching unit 106 that switches the time source to a second grandmaster clock 22 different from the first grandmaster clock 21 when it is determined that an abnormality has occurred in the time of the first grandmaster clock 21, which is the time source of the device, among the multiple grandmaster clocks 2. As a result, even if an abnormality has occurred in the time of the grandmaster clock 2, which is the time source, the normal grandmaster clock 2, which was not the time source, is set as the time source, and the boundary clock 1 can synchronize with the normal time source.
[0130] Moreover, the boundary clock 1 as the time synchronization device according to the first embodiment further includes a fault alert issuing unit 110 that, when it is determined that a grandmaster clock 2 having a time abnormality is detected, issues an alert indicating that an abnormality has occurred in the time of the grandmaster clock 2. This allows the maintenance manager of the time synchronization system 100 to quickly recognize which grandmaster clock 2 has an abnormality in its time, and therefore allows the grandmaster clock 2 having the time abnormality to be quickly restored.
[0131] Moreover, the boundary clock 1 as the time synchronization device according to the first embodiment further includes a fault alert issuing unit 110 that issues an alert indicating that an abnormality has occurred in the time of the device itself when it is determined that all of the absolute values of the multiple offsets are greater than the threshold value. This allows the maintenance manager of the time synchronization system 100 to quickly recognize that an abnormality has occurred in the time of the boundary clock 1, and therefore allows the boundary clock 1 to be quickly restored.
[0132] Moreover, the boundary clock 1 as the time synchronization device according to the first embodiment further includes a clock class rewriting unit 108 that rewrites the clock class when it is determined that an abnormality has occurred in the time of its own device, and a lower-level packet transmitting / receiving unit 109 that transmits the clock class to the client device 3. This allows the client device 3 to change the settings so that the client device 3 synchronizes with a boundary clock whose time is normal, different from the boundary clock 1 to which a clock class indicating that an abnormality has occurred in the time has been transmitted. This makes it possible to avoid problems occurring in the client device 3 and in the user's device connected to the client device 3.
[0133] In the example shown in the first embodiment, the offset pattern determination unit 104 determines that there is "no offset" when the absolute value of the offset is "0", but this is not limited to the above. For example, the offset pattern determination unit 104 may determine that there is "no offset" when the absolute value of the offset is less than a predetermined value, and may determine that there is "offset" when the absolute value of the offset is equal to or greater than the predetermined value. The predetermined value is a value that is operationally acceptable as an offset error that occurs due to an offset in communication between a normal grandmaster clock 2 and a normal boundary clock 1 that is synchronized with the grandmaster clock 2.
[0134] In the example shown in the first embodiment, the multiple grandmaster clocks 2 include the first grandmaster clock 21 and the second grandmaster clock 22, but are not limited to this. The multiple grandmaster clocks 2 may include three or more grandmaster clocks 2.
[0135] <<Second embodiment>> Hereinafter, a second embodiment of the present disclosure will be described with reference to the drawings.
[0136] As shown in Fig. 6, a time synchronization system 100-1 according to the second embodiment of the present disclosure includes multiple grandmaster clocks 2 (in the example of Fig. 6, a first grandmaster clock 21 and a second grandmaster clock 22), a boundary clock 1-1 as a time synchronization device, and a client device 3. In the second embodiment, the multiple grandmaster clocks 2 each correspond to a higher-level device of the boundary clock 1-1, and the client device 3 corresponds to a lower-level device of the boundary clock 1-1. In the second embodiment, the same reference numerals are used for functional units that are the same as those in the first embodiment, and descriptions thereof will be omitted.
[0137] <Boundary clock configuration> As shown in Fig. 6, the boundary clock 1-1 according to the second embodiment includes a plurality of upper packet transmitting / receiving units 101 (a first upper packet transmitting / receiving unit 101a and a second upper packet transmitting / receiving unit 101b in the example of Fig. 6), an offset calculation unit 102, a threshold storage unit 103, an offset pattern determination unit 104, an abnormal device determination unit 105, a time source switching unit 106, a time synchronization processing unit 107, a clock class rewriting unit 108, a lower packet transmitting / receiving unit 109, a fault alert issuing unit 110, and a time selection unit 111. The time selection unit 111 is configured by a controller.
[0138] The time selection unit 111 executes a process for selecting a grandmaster clock 2 with which the time of the own device is to be synchronized from among a plurality of grandmaster clocks 2 with which the boundary clock 1-1 can communicate. The time selection unit 111 selects a grandmaster clock 2 (a target of time synchronization) with which the time of the own device is to be synchronized from among the plurality of grandmaster clocks 2, for example, in accordance with the BMCA defined in IEEE Std 1588TM-2008.
[0139] <Boundary clock operation> Here, the operation of the boundary clock 1-1 according to the second embodiment will be described with reference to Figs. 7A and 7B. Figs. 7A and 7B are flowcharts showing an example of the operation of the boundary clock 1-1 according to the second embodiment. The operation of the boundary clock 1-1 described with reference to Figs. 7A and 7B corresponds to an example of a time synchronization method of the boundary clock 1-1 as a time synchronization device according to the second embodiment. In Figs. 7A and 7B, the two grandmaster clocks A and B correspond to the first grandmaster clock 21 and the second grandmaster clock 22 shown in Fig. 6, respectively.
[0140] First, as shown in FIG. 7A, in step S31, the time selection unit 111 acquires packets including the following parameters for the grandmaster clock A and the grandmaster clock B from the first upper packet transmission / reception units 101a and 101b, respectively: Identification code (GM (Grandmaster) Identity): A unique identification code for each Grandmaster clock A and B GM priority 1: The first priority for each Grandmaster clock A and B set by the administrator. GM class: A value indicating the traceability (traceability to UTC (an index showing the reliability of time)) of each Grandmaster Clock A and B. GM clock accuracy: (GM accuracy value): A value indicating the accuracy of the time for each Grand Master Clock A and B GM clock stability (GM offsetScaledLogVariance): A value indicating the stability of each Grandmaster clock A and B GM priority 2: The second priority for each Grandmaster clock A and B set by the administrator.
[0141] In step S32, the time selection unit 111 judges whether the identification codes of the grandmaster clock A and the grandmaster clock B are the same.
[0142] If it is determined in step S32 that the identification codes of the grandmaster clock A and the grandmaster clock B are the same (Yes in step S32), in step S33, the time selection unit 111 selects the target for time synchronization by comparing the number of connection stages from each grandmaster clock to the boundary clock 1-1, the upstream port number, the port number of the receiving side, and the port number of the receiving side of the same data set. The process of step S33 is described in IEEE Std 1588TM-2008, etc., so a description thereof will be omitted here.
[0143] In step S32, when it is determined that the identification codes of the grandmaster clock A and the grandmaster clock B are not the same (No in step S32), in step S34, the time selection unit 111 compares the priority 1 of the grandmaster clock A and the grandmaster clock B.
[0144] In step S34, when it is determined that the priority 1 of the grandmaster clock A is less than the priority 1 of the grandmaster clock B (A < B in step S34), the time selection unit 111 selects the grandmaster clock A as the target for time synchronization (step S35).
[0145] In step S34, when it is determined that the priority 1 of the grandmaster clock B is less than the priority 1 of the grandmaster clock A (B < A in step S34), the time selection unit 111 selects the grandmaster clock B as the target for time synchronization (step S36).
[0146] In step S34, when it is determined that the priority 1 of the grandmaster clock A and the grandmaster clock B are the same (A = B in step S34), in step S37, the time selection unit 111 compares the GM classes of the grandmaster clock A and the grandmaster clock B.
[0147] In step S37, when it is determined that the GM class of the grandmaster clock A is less than the GM class of the grandmaster clock B (A < B in step S37), the time selection unit 111 selects the grandmaster clock A as the target for time synchronization (step S35).
[0148] In step S37, when it is determined that the GM class of the grandmaster clock B is less than the GM class of the grandmaster clock A (B < A in step S37), the time selection unit 111 selects the grandmaster clock B as the target for time synchronization (step S36).
[0149] In step S37, when it is determined that the GM classes of the grandmaster clock A and the grandmaster clock B are the same (A = B in step S37), in step S38, the time selection unit 111 compares the GM clock accuracies of the grandmaster clock A and the grandmaster clock B.
[0150] In step S38, when it is determined that the GM clock accuracy of the grandmaster clock A is less than that of the grandmaster clock B (A < B in step S38), the time selection unit 111 selects the grandmaster clock A as the object of time synchronization (step S35).
[0151] In step S38, when it is determined that the GM clock accuracy of the grandmaster clock B is less than that of the grandmaster clock A (B < A in step S38), the time selection unit 111 selects the grandmaster clock B as the object of time synchronization (step S36).
[0152] In step S38, when it is determined that the GM clock accuracies of the grandmaster clock A and the grandmaster clock B are the same (A = B in step S38), in step S39, the time selection unit 111 compares the GM clock stabilities of the grandmaster clock A and the grandmaster clock B.
[0153] In step S39, when it is determined that the GM clock stability of the grandmaster clock A is less than that of the grandmaster clock B (A < B in step S39), the time selection unit 111 selects the grandmaster clock A as the object of time synchronization (step S35).
[0154] In step S39, when it is determined that the GM clock stability of the grandmaster clock B is less than that of the grandmaster clock A (B < A in step S39), the time selection unit 111 selects the grandmaster clock B as the object of time synchronization (step S36).
[0155] If it is determined in step S39 that the GM clock stability of the grandmaster clock A and the grandmaster clock B is the same (A=B in step S39), in step S40 of FIG. 7B, the offset pattern determination unit 104 determines whether or not an abnormality occurs at the time of the boundary clock 1-1. The process of step S40 corresponds to the processes of steps S11 to S13 and S22 of the flowchart shown in FIG. 6 described in the first embodiment. As described with reference to FIG. 6, the offset pattern determination unit 104 calculates the first offset Os1 and the second offset Os2, and compares the absolute values of the first offset Os12 and the second offset Os22 with the threshold value TH.
[0156] Then, when it is determined that the absolute value of the first offset Os12 is greater than the threshold value TH and the absolute value of the second offset Os22 is greater than the threshold value TH (pattern D), the offset pattern determination unit 104 determines that an abnormality occurs at the time of the boundary clock 1-1 (step S22 in FIG. 5A). Returning to FIG. 7B, when it is determined that an abnormality occurs at the time of the boundary clock 1-1 (Yes in step S40), the boundary clock 1-1 ends the process.
[0157] If it is determined that no abnormality occurs at the time of the boundary clock 1-1 (No in step S40), the offset pattern determination unit 104 and the abnormal device determination unit 105 determine whether an abnormality occurs at the time of the grand master clock A or the grand master clock B (step S41). The process of step S41 corresponds to the processes of steps S13 to S17 and S21 in the flowchart shown in FIG. 6, which has been described in the first embodiment.
[0158] As described with reference to FIG. 5A, when the absolute value of the first offset is equal to or less than the threshold value and the absolute value of the second offset is equal to or less than the threshold value, the offset pattern determination unit 104 determines that no abnormality has occurred at the time of either device (pattern A of S13 in FIG. 5A (corresponding to “no abnormality” of S41 in FIG. 7B)).
[0159] Then, the abnormal device determination unit 105 determines whether there is a variation in the offset between the grandmaster clock 2 and its own device (boundary clock 1) (step S16 in FIG. 5B). When the abnormal device determination unit 105 determines that there is a variation in the offset, it determines that an abnormality has occurred in the time of the grandmaster clock 2 which is the time source (step S17 in FIG. 5B (corresponding to "abnormality in A" in step S41 of FIG. 7B)). Then, the time selection unit 111 selects the grandmaster clock B as the target for time synchronization (step S36). Also, when the abnormal device determination unit 105 determines that there is no variation in the offset, it determines that an abnormality has occurred in the time of the grandmaster clock 2 which is not the time source (step S20 in FIG. 5B (corresponding to "abnormality in B" in step S41 of FIG. 7B)). Then, the time selection unit 111 selects the grandmaster clock A as the target for time synchronization (step S35).
[0160] In step S42 shown in FIG. 7B, the time selection unit 111 compares the priority 2 of the grandmaster clock A and the grandmaster clock B.
[0161] In step S42, when it is determined that the priority 2 of the grandmaster clock A is smaller than the priority 2 of the grandmaster clock B (A < B in step S42), the time selection unit 111 selects the grandmaster clock A as the target for time synchronization (step S35).
[0162] In step S42, when it is determined that the priority 2 of the grandmaster clock B is smaller than the priority 2 of the grandmaster clock A (B < A in step S42), the time selection unit 111 selects the grandmaster clock B as the target for time synchronization (step S36).
[0163] In step S42, when it is determined that the priorities 2 of the grandmaster clock A and the grandmaster clock B are the same (A = B in step S42), in step S42, the time selection unit 111 compares the identification codes of the grandmaster clock A and the grandmaster clock B.
[0164] In step S42, when it is determined that the identification code of the grandmaster clock A is smaller than the identification code of the grandmaster clock B (A < B), the time selection unit 111 selects the grandmaster clock A as the target for time synchronization (step S35).
[0165] In step S43, when it is determined that the identification code of the grandmaster clock B is smaller than the identification code of the grandmaster clock A (B < A), the time selection unit 111 selects the grandmaster clock B as the target for time synchronization (step S36).
[0166] As described above, the boundary clock 1-1 according to the second embodiment judges whether or not an abnormality occurs at the time of the boundary clock 1-1 when it is determined in the BMCA that the priority 1, GM class, GM clock accuracy, and GM clock stability of the first grandmaster clock 21 (grandmaster clock A) and the second grandmaster clock 22 (grandmaster clock B) are the same. Then, when it is determined that no abnormality occurs at the time of the boundary clock 1-1, the boundary clock 1-1 judges whether an abnormality occurs at the time of the first grandmaster clock 21 or the time of the second grandmaster clock 22. Also, when it is determined that no abnormality occurs at the time of either the boundary clock 1-1 or the grandmaster clock 2, the boundary clock 1-1 compares the priority 2 of the grandmaster clock A and the grandmaster clock B in the BMCA. As a result, the boundary clock 1-1 according to the second embodiment can avoid selecting the grandmaster clock 2 having a time abnormality as the time source when the priority 1, GM class, GM clock accuracy, and GM clock stability are determined to be the same in the selection of the time source by the BMCA. Therefore, the boundary clock 1-1 can select the grandmaster clock 2 more appropriately than the conventional BMCA.
[0167] In the above-mentioned first embodiment, the boundary clock 1 is a time synchronization device, each of the multiple grandmaster clocks 2 is a higher-level device, and the client device 3 is a lower-level device, but this is not limited to the above. The client device 3 capable of communicating with the multiple boundary clocks 1 may be a time synchronization device, and each of the multiple boundary clocks 1 may be a higher-level device. Similarly, in the above-mentioned second embodiment, the client device 3 capable of communicating with the multiple boundary clocks 1-1 may be a time synchronization device, and each of the multiple boundary clocks 1-1 may be a higher-level device.
[0168] In such a configuration, the client device 3 includes a higher-order packet transmitting / receiving unit 101 (for example, a first higher-order packet transmitting / receiving unit 101a and a second higher-order packet transmitting / receiving unit 101b), an offset calculating unit 102, a time synchronization processing unit 107, a threshold storage unit 103, an offset pattern determining unit 104, an abnormal device determining unit 105, a time source switching unit 106, a clock class rewriting unit 108, a lower-order packet transmitting / receiving unit 109, and a fault alert issuing unit 110. The client device 3 may further include a time selecting unit 111.
[0169] Next, the hardware configuration of the boundary clocks 1 and 1-1 as the time synchronization devices according to the first and second embodiments will be described.
[0170] Fig. 8 is a diagram showing an example of the hardware configuration of the boundary clocks 1 and 1-1 as the time synchronization device according to the first and second embodiments. Fig. 8 shows an example of the hardware configuration of the boundary clocks 1 and 1-1 when the boundary clocks 1 and 1-1 are configured by a computer capable of executing program instructions. Here, the computer may be a general-purpose computer, a dedicated computer, a workstation, a PC (Personal computer), an electronic notepad, etc. The program instructions may be program code, code segments, etc. for performing necessary tasks.
[0171] 8, the boundary clocks 1 and 1-1 have a processor 11, a ROM (Read Only Memory) 12, a RAM (Random Access Memory) 13, a storage 14, an input unit 15, a display unit 16, and a communication interface (I / F) 17. Each component is connected to each other so as to be able to communicate with each other via a bus 19. The processor 11 is specifically a CPU (Central Processing Unit), an MPU (Micro Processing Unit), a GPU (Graphics Processing Unit), a DSP (Digital Signal Processor), a SoC (System on a Chip), etc., and may be composed of multiple processors of the same type or different types.
[0172] The processor 11 is a controller that controls each component and executes various arithmetic processing. That is, the processor 11 reads a program from a memory, which is the ROM 12 or the storage 14, and executes the program using the RAM 13 as a working area. The processor 11 controls each component and executes various arithmetic processing according to the program stored in the ROM 12 or the storage 14. In the first and second embodiments, the ROM 12 or the storage 14 stores a program for causing a computer to function as the boundary clocks 1 and 1-1 according to the present disclosure. The program is read and executed by the processor 11, thereby realizing each component of the boundary clocks 1 and 1-1.
[0173] The program may be provided in a form stored in a non-transitory storage medium such as a CD-ROM (Compact Disk Read Only Memory), a DVD-ROM (Digital Versatile Disk Read Only Memory), a USB (Universal Serial Bus) memory, etc. The program may also be provided in a form downloaded from an external device via a network.
[0174] The ROM 12 stores various programs and various data. The RAM 13 temporarily stores programs or data as a working area. The storage 14 is configured with an HDD (Hard Disk Drive) or an SSD (Solid State Drive) and stores various programs including an operating system and various data.
[0175] The input unit 15 includes a pointing device such as a mouse, and a keyboard, and is used to perform various input operations.
[0176] The display unit 16 is, for example, a liquid crystal display, and displays various information. The display unit 16 may function as the input unit 15 by adopting a touch panel system.
[0177] The communication interface 17 is an interface for communicating with other devices (e.g., the grandmaster clock 2 and the client device 3), and is, for example, an interface for a LAN. The communication interface 17 realizes a plurality of upper packet transmitting / receiving units 101 (in the examples of FIG. 1 and FIG. 6, a first upper packet transmitting / receiving unit 101a and a second upper packet transmitting / receiving unit 101b) and a lower packet transmitting / receiving unit 109.
[0178] A computer can be suitably used to function as each part of the boundary clocks 1 and 1-1 described above. Such a computer can be realized by storing a program describing the processing contents for realizing the functions of each part of the boundary clocks 1 and 1-1 in a storage unit of the computer, and reading and executing this program by the processor of the computer. In other words, the program can cause the computer to function as the boundary clocks 1 and 1-1 described above. The program can also be recorded on a non-transitory storage medium. The program can also be provided via a network.
[0179] The following supplementary notes are further disclosed regarding the above embodiment. [Additional note 1] A time synchronization device that synchronizes with any one of a plurality of higher level devices, a communication interface for transmitting and receiving packets to and from each of the plurality of higher level devices; A controller, The controller: calculating a plurality of offsets which are differences between the time of each of the plurality of higher-level devices and the time of the own device, based on the time when the packet transmitting / receiving unit transmitted / received the packet with each of the plurality of higher-level devices; determining whether each of the absolute values of the plurality of offsets is equal to or less than a threshold; When it is determined that the absolute values of the multiple offsets include an absolute value of an offset that is less than or equal to the threshold value and an absolute value of an offset that is greater than the threshold value, a time synchronization device determines which of the multiple higher-level devices has an abnormality in its time based on whether or not there is a change from one offset to a next offset in at least one of the multiple higher-level devices. [Additional note 2] The time synchronization device described in Appendix 1, wherein, if the fluctuation occurs, the controller determines that an abnormality has occurred in the time of a higher-level device that is a time source among the multiple higher-level devices, and if the fluctuation does not occur, the controller determines that an abnormality has occurred in the time of a higher-level device that is not a time source among the multiple higher-level devices. [Additional note 3] The time synchronization device described in appendix 1 or 2, wherein the controller determines that no abnormality has occurred in the time of the device itself or the multiple higher-level devices when all of the absolute values of the multiple offsets are below a threshold value, and determines that an abnormality has occurred in the time of the device itself when all of the absolute values of the multiple offsets are greater than a threshold value. [Additional note 4] The time synchronization device described in appendix 1 or 2, wherein when it is determined that an abnormality has occurred in the time of a higher-level device that is the time source of the device among the multiple higher-level devices, the controller switches to a higher-level device that is not the time source of the higher-level device and that has not been the time source of the device itself as the time source. [Additional note 5] The time synchronization device described in appendix 1 or 2, wherein when the controller determines that an abnormality has occurred in the time of a higher-level device, it issues an alert indicating that an abnormality has occurred in the time of the higher-level device, or when it determines that all of the absolute values of the multiple offsets are greater than a threshold value, it issues an alert indicating that an abnormality has occurred in the time of its own device. [Additional note 5] The time synchronization device described in appendix 1 or 2, wherein when the controller determines that an abnormality has occurred in the time of a higher-level device, it issues an alert indicating that an abnormality has occurred in the time of the higher-level device, or when it determines that all of the absolute values of the multiple offsets are greater than a threshold value, it issues an alert indicating that an abnormality has occurred in the time of its own device. [Additional note 6] The controller rewrites a clock class when it is determined that an abnormality has occurred in the time of the device itself; 3. The time synchronization device according to claim 1, wherein the communication interface transmits the clock class to a lower device. [Additional note 7] A time synchronization method for a time synchronization device that includes a communication interface for transmitting and receiving packets to and from each of the plurality of higher-level devices and synchronizes with any one of the plurality of higher-level devices, comprising: calculating a plurality of offsets which are differences between the time of each of the plurality of higher level devices and the time of the own device, based on the time when each of the plurality of higher level devices and the communication interface transmitted and received the packet; determining whether each of the absolute values of the offsets is equal to or less than a threshold; when it is determined that the absolute values of the plurality of offsets include an absolute value of an offset equal to or less than the threshold value and an absolute value of an offset greater than the threshold value, determining at which of the plurality of higher-level devices an abnormality has occurred based on the presence or absence of a change from one offset to a next offset in at least one of the plurality of higher-level devices; A time synchronization method including: [Additional note 7] A non-transitory storage medium storing a program executable by a computer, the non-transitory storage medium storing the program causing the computer to operate as the time synchronization device according to claim 1 or 2.
[0180] Although the above-mentioned embodiment has been described as a representative example, it is obvious to those skilled in the art that many modifications and substitutions can be made within the spirit and scope of the present disclosure. Therefore, the present invention should not be interpreted as being limited by the above-mentioned embodiment, and various modifications or changes can be made without departing from the scope of the claims. For example, it is possible to combine multiple building blocks shown in the configuration diagram of the embodiment into one, or to divide one building block. [Explanation of symbols]
[0181] 1, 1-1 Boundary clock (time synchronization device) 2 Grandmaster clock (higher-level device) 3 Client device (lower device) 11 Processors 12 ROM 13 RAM 14. Storage 15 Input section 16 Display 17 Communication I / F 19 Bus 21 First Grandmaster Clock (Higher-level device) 22 Second Grandmaster Clock (Higher-level device) 100, 100-1 Time Synchronization System 101 Upper packet transmission / reception unit 101a First upper packet transmission / reception unit 101b Second upper packet transmission / reception unit 102 Offset Calculation Unit 103 Threshold memory unit 104 Offset pattern determination unit 105 Abnormal device determination section 106 Time source switching unit 107 Time Synchronization Processing Unit 108 Clock Class Rewrite Unit 109 Lower packet transmission / reception unit 110 Fault Alert Issuer 111 Time selection section
Claims
1. A time synchronization device that synchronizes with any one of a plurality of higher-level devices, a higher-level packet transmitting / receiving unit for transmitting / receiving packets to / from each of the plurality of higher-level devices; an offset calculation unit that calculates a plurality of offsets that are differences between the time of each of the plurality of higher-level devices and the time of its own device, based on a time when the higher-level devices and the higher-level packet transmission / reception unit transmitted / received the packet; an offset pattern determination unit that determines whether or not each of the absolute values of the plurality of offsets is equal to or smaller than a threshold; an abnormal device determination unit that, when it is determined that the absolute values of the plurality of offsets include an absolute value of an offset equal to or less than the threshold value and an absolute value of an offset greater than the threshold value, determines at which of the plurality of higher-level devices an abnormality has occurred based on the presence or absence of a change from one offset to a next offset in at least one of the plurality of higher-level devices; A time synchronization device comprising:
2. The time synchronization device of claim 1, wherein the abnormal device determination unit determines that an abnormality has occurred in the time of a higher-level device that is a time source among the multiple higher-level devices if the fluctuation occurs, and determines that an abnormality has occurred in the time of a higher-level device that is not a time source among the multiple higher-level devices if the fluctuation does not occur.
3. The time synchronization device according to claim 1 or 2, wherein the offset pattern determination unit determines that no abnormality has occurred in the time of the device itself or the multiple higher-level devices when the absolute values of the multiple offsets are all below a threshold value, and determines that an abnormality has occurred in the time of the device itself when the absolute values of the multiple offsets are all greater than a threshold value.
4. The time synchronization device according to claim 1 or 2, further comprising a time source switching unit that, when it is determined that an abnormality has occurred in the time of a higher-level device that is the time source of the device itself among the multiple higher-level devices, switches the time source to a higher-level device that is not the time source of the higher-level device.
5. The time synchronization device according to claim 1 or 2, further comprising a fault alert issuing unit that, if a higher-level device is determined to have an abnormality in its time, issues an alert indicating that an abnormality has occurred in the time of the higher-level device, or, if it is determined that all of the absolute values of the multiple offsets are greater than a threshold value, issues an alert indicating that an abnormality has occurred in the time of the device itself.
6. a clock class rewriting unit that rewrites a clock class when it is determined that an abnormality has occurred in the time of the own device; a lower-level packet transceiver for transmitting the clock class to a lower-level device; The time synchronization device according to claim 1 or 2, further comprising:
7. A time synchronization method for a time synchronization device that includes a high-order packet transmission / reception unit that transmits and receives packets to and from each of a plurality of high-order devices and synchronizes with any one of the plurality of high-order devices, comprising: calculating a plurality of offsets which are differences between the time of each of the plurality of higher-level devices and the time of the own device, based on a time when the higher-level devices and the higher-level packet transmitting / receiving unit transmitted / received the packet; determining whether each of the absolute values of the offsets is equal to or less than a threshold; when it is determined that the absolute values of the plurality of offsets include an absolute value of an offset equal to or less than the threshold value and an absolute value of an offset greater than the threshold value, determining at which of the plurality of higher-level devices an abnormality has occurred based on the presence or absence of a change from one offset to a next offset in at least one of the plurality of higher-level devices; A time synchronization method including:
8. A program for causing a computer to function as the time synchronization device according to claim 1 or 2.
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