Semiconductor device manufacturing method

Abstract

The present invention comprises, on a substrate (101) that is formed of a semi-insulating compound semiconductor, a first optical element (141), a second optical element (142), and an optical waveguide (143) that optically connects the first optical element (141) and the second optical element (142) to each other. The first optical element (141) is formed in a first element region (151) of the substrate (101). The second optical element (142) is formed in a second element region (152) of the substrate (101). The optical waveguide (143) is formed in an isolation region (153) between the first element region (151) and the second element region (152) of the substrate (101). The optical waveguide (143) is composed of a cladding (107) that is formed of the semi-insulating compound semiconductor, of which the substrate (101) is formed, and a core (106) that is formed of a compound semiconductor and is buried in the cladding (107).

Description

[Technical field]

[0001] The present invention relates to a semiconductor device. Place It relates to a manufacturing method. [Background technology]

[0002] With the use of cloud technology and the diversification of IP services such as online business, communication traffic is steadily increasing. In order to meet these demands, development of optical communication devices that support communication traffic is progressing more than ever before, aiming to improve performance by increasing capacity, reducing power consumption, and making modules smaller and denser.

[0003] Since the transmission distance of optical communications varies depending on the application, the optical communications devices used are classified. For applications of 10 km or less, such as between racks in a data center or between centers, devices that monolithically integrate a directly modulated laser (DML) or an electroabsorption optical modulator integrated laser (EA optical modulator integrated laser) on the same substrate are used. EA optical modulator integrated lasers are also used for access communications with transmission distances of 80 km or less.

[0004] The basic components of such monolithic integrated devices are a semiconductor laser that generates light as a carrier wave, an EA optical modulator to modulate the carrier wave, and an optical amplifier to amplify the intensity of the modulated light. Conventional monolithic integrated devices are fabricated using conductive substrates (mainly n-polar InP substrates). For this reason, the potential of the substrate polarity cannot be changed for each integrated device and is common. Due to these constraints, the optical modulator has been driven by a method using a single-phase modulation signal.

[0005] Conventional semiconductor device integration technology mainly uses conductive substrates, and integrates each functional unit (optical element) with the potential of the conductive substrate as a common potential. In this configuration, one of the two conductive polarities (p-polarity, n-polarity) of the semiconductor device is operated as a common potential, so it is impossible to realize differential modulation drive of the optical modulator. This point will be explained in detail.

[0006] 3 shows the configuration of a conventional monolithic integrated device. A first active layer 302, a second active layer 303, a high resistance p-polarity layer 305, a low resistance first p-polarity layer 306, and a second p-polarity layer 307 of a first functional unit 321 and a second functional unit 322 are provided on an n-polarity semiconductor substrate 301. In addition, an electrical isolation unit 323 has a core 304 on the semiconductor substrate 301. In the electrical isolation unit 323, an optical waveguide is formed with the p-polarity layer 305 around the core 304 as a cladding. By removing the low resistance p-polarity layer of the electrical isolation unit 323, electrical isolation of the p-polarity side of the first functional unit 321 and the second functional unit 322 is realized.

[0007] However, since the n-polarity side is connected via the semiconductor substrate 301, it is not possible to achieve electrical isolation between the first functional unit 321 and the second functional unit 322. Differential modulation driving that modulates the p-polarity and n-polarity potentials cannot be achieved with this configuration.

[0008] However, to maximize the performance of the optical modulator, it is desirable to realize differential modulation drive, because it can improve the efficiency of using the modulation voltage and improve the S / N ratio of the optical waveform by suppressing common-mode noise. Summary of the Invention [Problem to be solved by the invention]

[0009] To realize differential modulation drive, a technique for fabricating a device on a semi-insulating (SI) substrate can be considered. However, this configuration has the following problems. Figures 4A, 4B, 4C, 4D, and 4E show the problems involved in implementing electrode separation on an SI substrate 401 by a butt joint process. The butt joint process forms different semiconductor layers on the same substrate, but as will be described below, there is a problem that the flatness of the semiconductor layers is impaired.

[0010] As shown in FIG. 4A, FIG. 4B, and FIG. 4C, a p-type semiconductor layer 411 is formed on an SI substrate 401, and the p-type semiconductor layer 411 is separated to form a first p-type semiconductor layer 402 and a second p-type semiconductor layer 403, and an SI semiconductor layer 404 is grown between them. When the SI semiconductor layer 404, which is different from the first p-type semiconductor layer 402 and the second p-type semiconductor layer 403, is crystal-grown, the flatness of the SI semiconductor layer 404 near the connection portion is impaired. An active layer is grown on these layers, but if the active layer is grown in a state where the flatness of the lower layer of the active layer is impaired, the flatness of the active layer grown on the upper layer is also impaired, and the in-plane uniformity is deteriorated. Deterioration of the crystal quality of the active layer (deterioration of PL intensity and shift of band gap wavelength) also occurs. When the active layer is considered as an optical waveguide, a waveguide loss occurs.

[0011] 4D and 4E, a case will be considered in which a p-type semiconductor layer 411 is formed on an SI substrate 401, an active layer 415 is formed on the p-type semiconductor layer 411, these are separated, a first p-type semiconductor layer 402, a second p-type semiconductor layer 403, a first active layer 412, a second active layer 413 are formed, and an SI semiconductor layer 404 and a core 414 are grown between these. In this way, when the two upper and lower layers are butt-jointed together, a problem of height misalignment occurs between the active layer of the functional section and the core of the electrical isolation section, resulting in waveguide loss.

[0012] The present invention has been made to solve the above-mentioned problems, and has an object to achieve electrical isolation between two optical elements without generating waveguide loss between the two optical elements. [Means for solving the problem]

[0013] halfThe semiconductor device comprises a substrate made of a semi-insulating compound semiconductor, a first optical element of a waveguide type formed in a first element region of the substrate, a second optical element of a waveguide type formed in a second element region of the substrate, and an optical waveguide formed in a separation region between the first element region and the second element region of the substrate for optically connecting the first optical element and the second optical element. The first optical element comprises a first semiconductor layer made of a compound semiconductor of a first conductivity type formed on the substrate, a first active layer made of a compound semiconductor formed on the first semiconductor layer, and a second semiconductor layer made of a compound semiconductor of a second conductivity type formed on the first active layer. The second optical element comprises a third semiconductor layer made of a compound semiconductor of the first conductivity type formed on the substrate, a second active layer made of a compound semiconductor formed on the third semiconductor layer, and a fourth semiconductor layer made of a compound semiconductor of the second conductivity type formed on the second active layer. The optical waveguide comprises a cladding made of a semi-insulating compound semiconductor formed on the substrate, and a core made of a compound semiconductor embedded in the cladding.

[0014] A method for a semiconductor device according to the present invention is a method for manufacturing a semiconductor device including a substrate made of a semi-insulating compound semiconductor, a first optical element of a waveguide type formed in a first element region of the substrate, a second optical element of a waveguide type formed in a second element region of the substrate, and an optical waveguide formed in an isolation region between the first element region and the second element region of the substrate for optically connecting the first optical element and the second optical element, the method including the steps of: a first step of forming a first conductive type layer made of a compound semiconductor of a first conductive type on the substrate; a second step of forming an active layer made of a compound semiconductor in the first element region and the second element region on the first conductive type layer and forming a core layer made of a compound semiconductor in the isolation region on the first conductive type layer; a third step of forming a second conductive type layer made of a compound semiconductor of a second conductive type on the active layer and the core layer; and a fourth step of etching the second conductive type layer, the active layer, and the core layer so as to penetrate in a thickness direction. the first conductivity type layer is etched partway through to process it into a ridge shape; a first optical element is formed in the first element region, the first optical element having a first semiconductor layer made of a compound semiconductor of the first conductivity type, a first active layer made of a compound semiconductor formed on the first semiconductor layer, and a second semiconductor layer made of a compound semiconductor of a second conductivity type formed on the first active layer; and a second optical element is formed in the second element region, the second optical element having a third semiconductor layer made of a compound semiconductor of the first conductivity type, a second active layer made of a compound semiconductor formed on the third semiconductor layer, and a fourth semiconductor layer made of a compound semiconductor of the second conductivity type formed on the second active layer; and the method includes a fourth step of forming a core made of a compound semiconductor in the separation region, a fifth step of removing the second conductivity type layer and the first conductivity type layer in the separation region, and a sixth step of forming a cladding made of a semi-insulating compound semiconductor in which the core in the separation region is embedded, to form an optical waveguide. Effect of the Invention

[0015] As described above, according to the present invention, a first optical element and a second optical element are formed on a substrate made of a semi-insulating compound semiconductor, and the clad of the optical waveguide connecting them is made of a semi-insulating compound semiconductor. Therefore, electrical isolation between the two optical elements can be achieved without generating waveguide loss between the two optical elements. [Brief description of the drawings]

[0016] [Figure 1A] FIG. 1A is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention. [Figure 1B] FIG. 1B is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention. [Figure 1C] FIG. 1C is a cross-sectional view showing a configuration of a semiconductor device according to an embodiment of the present invention. [Figure 2A] FIG. 2A is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2B] FIG. 2B is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2C] FIG. 2C is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2D] FIG. 2D is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2E] FIG. 2E is a cross-sectional view showing a state of the semiconductor device in the middle of a process for illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2F] FIG. 2F is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2G] FIG. 2G is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2H] FIG. 2H is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2I] FIG. 2I is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2J]FIG. 2J is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2K] FIG. 2K is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2L] FIG. 2L is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 2M] FIG. 2M is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. [Diagram 3] FIG. 3 is a cross-sectional view showing the configuration of the semiconductor device. [Figure 4A] FIG. 4A is a cross-sectional view showing a state of a semiconductor device in the middle of a process for explaining a method of manufacturing the semiconductor device. [Figure 4B] FIG. 4B is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing the semiconductor device. [Figure 4C] FIG. 4C is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing the semiconductor device. [Figure 4D] FIG. 4D is a cross-sectional view showing a state of the semiconductor device in the middle of a process for explaining a method of manufacturing the semiconductor device. [Figure 4E] FIG. 4E is a cross-sectional view showing a state of the semiconductor device in the middle of a process for illustrating a method for manufacturing the semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] A semiconductor device according to an embodiment of the present invention will be described below with reference to Figures 1A, 1B, and 1C. Figures 1A and 1C show cross sections perpendicular to the waveguide direction. Figure 1B shows a cross section parallel to the waveguide direction.

[0018] This semiconductor device includes a substrate 101 made of a semi-insulating compound semiconductor, a waveguide-type first optical element 141, a waveguide-type second optical element 142, and an optical waveguide 143 that optically connects the first optical element 141 and the second optical element 142. The first optical element 141 is formed in a first element region 151 of the substrate 101. The second optical element 142 is formed in a second element region 152 of the substrate 101. The optical waveguide 143 is formed in a separation region 153 between the first element region 151 and the second element region 152 of the substrate 101.

[0019] The first optical element 141 also includes a first semiconductor layer 102a made of a first conductivity type compound semiconductor formed on the substrate 101, a first active layer 103a made of a compound semiconductor formed on the first semiconductor layer 102a, and a second semiconductor layer 104a made of a second conductivity type compound semiconductor formed on the first active layer 103a.

[0020] Similarly, the second optical element 142 includes a third semiconductor layer 102b made of a first conductivity type compound semiconductor formed on the substrate 101, a second active layer 103b made of a compound semiconductor formed on the third semiconductor layer 102b, and a fourth semiconductor layer 104b made of a second conductivity type compound semiconductor formed on the second active layer 103b.

[0021] Moreover, the optical waveguide 143 is composed of a clad 107 made of a semi-insulating compound semiconductor formed on the substrate 101, and a core 106 made of a compound semiconductor embedded in the clad 107. For example, the first active layer 103a, the core 106, and the second active layer 103b are arranged so that their bottom surfaces (lower surfaces) are at the same height.

[0022] Here, in the embodiment, a fifth semiconductor layer 110 made of a semi-insulating compound semiconductor is provided on the substrate 101, and the above-mentioned layers are formed on the fifth semiconductor layer 110. A sixth semiconductor layer 105a made of a second conductive type compound semiconductor with a higher concentration of impurities is formed on the second semiconductor layer 104a. A seventh semiconductor layer 105b made of a second conductive type compound semiconductor with a higher concentration of impurities is formed on the fourth semiconductor layer 104b.

[0023] In the first optical element 141, the sixth semiconductor layer 105a, the second semiconductor layer 104a, the first active layer 103a, and the first semiconductor layer 102a are formed in a ridge-like cross section perpendicular to the waveguide direction. This ridge is formed halfway through the first semiconductor layer 102a in the thickness direction. The lower layer portion of the second semiconductor layer 104a extending to the side of this ridge is where an n-electrode is formed, as described later.

[0024] Similarly, in the second optical element 142, the seventh semiconductor layer 105b, the fourth semiconductor layer 104b, the second active layer 103b, and the third semiconductor layer 102b have a ridge-shaped cross section perpendicular to the waveguide direction. This ridge is formed halfway through the third semiconductor layer 102b in the thickness direction. The lower portion of the third semiconductor layer 102b extending to the side of this ridge is where an n-electrode is formed.

[0025] In this example, a first burying layer 108a made of a semi-insulating compound semiconductor and a second burying layer 108b made of a semi-insulating compound semiconductor are provided. The first burying layer 108a is formed so as to fill the waveguide direction side surface of the first optical element 141. Similarly, the second burying layer 108b is formed so as to fill the waveguide direction side surface of the second optical element 142.

[0026] Here, the upper surface of the optical waveguide 143 is formed lower than the upper surfaces of the first buried layer 108a and the second buried layer 108b. The height difference between the optical waveguide 143 and the first buried layer 108a and the second buried layer 108b is, for example, h. The difference h corresponds to, for example, the thickness of the lower layer of the second semiconductor layer 104a and the lower layer of the third semiconductor layer 102b where the n-electrode is formed. In addition, the first buried layer 108a, the second buried layer 108b, and the cladding 107 can be made of the same compound semiconductor and formed integrally and continuously in the waveguiding direction.

[0027] The substrate 101 may be made of, for example, semi-insulating InP. The fifth semiconductor layer 110 may be made of, for example, semi-insulating InGaAsP or semi-insulating InGaAs. The first semiconductor layer 102a and the third semiconductor layer 102b may be made of, for example, n-type InP. The second semiconductor layer 104a and the fourth semiconductor layer 104b may be made of, for example, p-type InP. In this case, the first conductivity type is n-type, and the second conductivity type is p-type.

[0028] The first active layer 103a and the second active layer 103b may be made of, for example, InGaAsP, InGaAs, InGaAlAs, etc. The core 106 may be made of, for example, InGaAsP, InGaAs, etc.

[0029] The first buried layer 108a and the second buried layer 108b may be made of, for example, semi-insulating InP, and the cladding 107 may be made of, for example, semi-insulating InP.

[0030] 1C, the first optical element 141 may include a first p-electrode 111a formed on the sixth semiconductor layer 105a and in ohmic contact with the sixth semiconductor layer 105a. The sixth semiconductor layer 105a functions as a contact layer. The first optical element 141 may include a first n-electrode 112a in ohmic contact with the upper surface of the first semiconductor layer 102a on the side of the first buried layer 108a. The same is true for the second optical element 142, although not shown.

[0031] Next, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to Figs. 2A to 2M. This manufacturing method is a method for manufacturing a semiconductor device including first optical element 141, second optical element 142, and optical waveguide 143 on substrate 101 as described above. Figs. 2A, 2C, 2E, 2G, 2H, 2J, 2K, 2L, and 2M show cross sections perpendicular to the waveguiding direction. Figs. 2B, 2D, 2F, and 2I show cross sections parallel to the waveguiding direction.

[0032] First, as shown in FIGS. 2A and 2B, a fifth semiconductor layer 110 made of, for example, a semi-insulating compound semiconductor is formed (crystal growth) over the entire area of ​​the substrate 101 including the first element region 151, the second element region 152, and the separation region 153. Then, a first conductivity type layer 121 made of a first conductivity type compound semiconductor is formed (crystal growth) on the fifth semiconductor layer 110 (first step). The fifth semiconductor layer 110 can be made of, for example, undoped InGaAsP (band gap wavelength 1.1 μm). The first conductivity type layer 121 can be made of, for example, n-InP doped with Si as an n-type impurity (Si doping amount 1E18 [cm -3 ]).

[0033] Next, as shown in FIG. 2C and FIG. 2D, an active layer 122a for forming a semiconductor laser is formed on the first conductive type layer 121 of the first element region 151. The active layer 122a can be made of, for example, InGaAsP. Also, an active layer 122b for forming an EA optical modulator is formed on the first conductive type layer 121 of the second element region 152. The active layer 122b can be made of, for example, InGaAlAs. Also, a core layer 123 is formed on the first conductive type layer 121 of the separation region 15. The core layer 123 can be made of InGaAsP. The active layer 122a, the core layer 123, and the active layer 122b can be formed in this order using a so-called butt joint process (second step). The length of the active layer 122a (active layer 122b) in the waveguiding direction and the length of the core layer 123 in the waveguiding direction can be freely determined. For example, the active layer 122a (active layer 122b) may have a length of 300 μm in the waveguiding direction, and the core layer 123 may have a length of 200 μm in the waveguiding direction.

[0034] 2E, a second conductive type layer 124 made of a second conductive type compound semiconductor is formed (crystal grown) on the active layer 122a, the active layer 122b, and the core layer 123 (third step). The second conductive type layer 124 is, for example, p-InP doped with Zn as a p-type impurity (Zn doping amount 1E18 [cm -3 ])

[0035] 2F, a semiconductor layer 125 made of a second conductive type compound semiconductor is formed (crystal grown) on the second conductive type layer 124. The semiconductor layer 125 can be made of, for example, p-type InGaAsP or p-type InGaAs.

[0036] Next, the semiconductor layer 125, the second conductive type layer 124, the active layer 122a, the active layer 122b, and the core layer 123 are etched in the thickness direction, and the first conductive type layer 121 is etched halfway to process it into a ridge shape, so that the first optical element 141 is formed in the first element region 151, the second optical element 142 is formed in the second element region 152, and the core 106 is formed in the separation region 153 (fourth step) as shown in FIG. 2G. Here, the etching is stopped halfway through the first conductive type layer 121 to perform the above-mentioned ridge shape processing. Through this processing, the second semiconductor layer 104a and the fourth semiconductor layer 104b are formed into a core shape with the same waveguiding direction.

[0037] The first optical element 141 includes a first semiconductor layer 102a made of a first conductive type compound semiconductor, a first active layer 103a made of a compound semiconductor formed on the first semiconductor layer 102a, and a second semiconductor layer 104a made of a second conductive type compound semiconductor formed on the first active layer 103a. The second optical element 142 includes a third semiconductor layer 102b made of a first conductive type compound semiconductor, a second active layer 103b made of a compound semiconductor formed on the third semiconductor layer 102b, and a fourth semiconductor layer 104b made of a second conductive type compound semiconductor formed on the second active layer 103b.

[0038] Also, at this stage, in the separation region 153, a core 106 is formed on the first conductive type layer 102c that is continuous with the first semiconductor layer 102a and the third semiconductor layer 102b. Also, a second conductive type layer 104c that is continuous with the second semiconductor layer 104a and the fourth semiconductor layer 104b is formed on the core 106, and a semiconductor layer 105c that is continuous with the sixth semiconductor layer 105a and the seventh semiconductor layer 105b is formed on the second conductive type layer 104c.

[0039] Next, the second conductive type layer 104c and the first conductive type layer 102c in the separation region 153 are removed to expose the peripheral surfaces (upper, lower and side surfaces) of the core 106 in the separation region 153 as shown in FIGS. 2H and 2I (fifth step). This step is achieved by performing etching with a chemical solution that removes only InP. In the separation region 153, the upper surface of the fifth semiconductor layer 110 is exposed, and a space 131 is formed around the core 106.

[0040] Next, a semi-insulating compound semiconductor is regrown on the upper surfaces of the layers exposed at this point, forming a regrown layer 126, as shown in Fig. 2J. The regrown layer 126 is first formed on the upper surfaces of the first active layer 103a formed as a ridge and the first semiconductor layer 102a exposed on the sides of a portion of the first semiconductor layer 102a in the thickness direction. The regrown layer 126 is also formed on the upper surfaces of the second active layer 103b formed as a ridge and the third semiconductor layer 102b exposed on the sides of a portion of the third semiconductor layer 102b in the thickness direction.

[0041] Moreover, the regrown layer 126 is formed on the fifth semiconductor layer 110 exposed in the separation region 153 and on the core 106. Here, in the separation region 153, the regrown layer 126 is formed on the fifth semiconductor layer 110 in a state of reaching the lower surface of the core 106. Moreover, the regrown layer 126 is formed so as to fill the space between the core 106 and the semiconductor layer 105c.

[0042] Subsequently, the semi-insulating compound semiconductor is regrown to form the first buried layer 108a, the second buried layer 108b, and the clad 107 as shown in FIG. 2K (sixth and seventh steps). The core 106 and the clad 107 in which the core 106 is buried form an optical waveguide 143. Here, the second conductive type layer 104c and the first conductive type layer 102c in the separation region 153 are removed to form a space 131 around the core 106, and then the first buried layer 108a, the second buried layer 108b, and the clad 107 are formed. Therefore, at the butt joint between the first active layer 103a and the core 106, and at the butt joint between the second active layer 103b and the core 106, there is no problem of optical axis misalignment between them.

[0043] In this example, the sixth and seventh steps are performed simultaneously, and the first buried layer 108a, the second buried layer 108b, and the cladding 107 are made of the same compound semiconductor and are formed continuously and integrally in the waveguide direction. By checking that the cladding 107 is formed lower than the first buried layer 108a and the second buried layer 108b, it can be confirmed that the second conductive type layer 104c in the separation region 153 has been removed.

[0044] The semi-insulating compound semiconductor to be regrown can be Fe-doped InP (References 1 and 2). Here, Fe-doped InP is grown while adding a chlorine-based gas. For example, the crystal growth temperature is set to 600°C, and Fe-doped InP is grown while adding CH3Cl. The Fe doping amount is 5E15 [cm -3 The addition of CH3Cl gas promotes the growth of the

[0001] plane.

[0045] Next, as shown in Fig. 2L, a first p electrode 111a is formed in ohmic contact with the sixth semiconductor layer 105a of the first optical element 141, and a first n electrode 112a is formed in ohmic contact with the upper surface of the first semiconductor layer 102a. Similarly, as shown in Fig. 2M, a second p electrode 111b is formed in ohmic contact with the seventh semiconductor layer 105b of the second optical element 142, and a second n electrode 112b is formed in ohmic contact with the upper surface of the third semiconductor layer 102b.

[0046] When forming the first n-electrode 112a, the first buried layer 108a on the first semiconductor layer 102a at a corresponding location is removed to expose the upper surface of the first semiconductor layer 102a. The first semiconductor layer 102a at a location where the first n-electrode 112a contacts functions as a contact layer. Similarly, when forming the second n-electrode 112b, the second buried layer 108b on the third semiconductor layer 102b at a corresponding location is removed to expose the upper surface of the third semiconductor layer 102b. The third semiconductor layer 102b at a location where the second n-electrode 112b contacts functions as a contact layer.

[0047] Here, in the formation of the first burying layer 108a, the second burying layer 108b, and the cladding 107 by regrowth (burying growth) described with reference to Figures 2J and 2K, it is possible to control the growing plane orientation by changing the crystal growth temperature during the burying step (Reference 3). Also, in the growth of the first burying layer 108a, the second burying layer 108b, and the cladding 107, it is possible to realize growth that depends only on a specific plane orientation by adding carbon tetrachloride gas during crystal growth (Reference 4).

[0048] In the semiconductor device manufactured by the above-mentioned manufacturing method, the electrical resistance between the first p electrode 111a of the first optical element 141 which becomes a semiconductor laser and the second p electrode 111b of the second optical element 142 which becomes an EA optical modulator is 100 kΩ or more. In addition, the electrical resistance between the first n electrode 112a of the first optical element 141 and the second n electrode 112b of the second optical element 142 is also 100 kΩ or more. This can achieve a significant improvement over the electrical resistance between the p electrodes of the two optical elements in the conventional semiconductor device. When the actually manufactured semiconductor device was used and a differential modulation signal was applied to the second optical element 142 which becomes an EA optical modulator to operate it, the stable operation of the first optical element 141 which becomes a semiconductor laser and the clear waveform aperture of the second optical element 142 were confirmed, reflecting the high electrical resistance described above.

[0049] In the above description, the first active layer 103a, the second active layer 103b, and the core 106 are made of InGaAsP, but this is not limited to the above, and the first active layer 103a and the second active layer 103b can be made of InGaAlAs, InGaAs, etc.

[0050] As described above, according to the present invention, a first optical element and a second optical element are formed on a substrate made of a semi-insulating compound semiconductor, and the clad of the optical waveguide connecting them is made of a semi-insulating compound semiconductor. This makes it possible to achieve electrical isolation between the two optical elements without generating waveguide loss between the two optical elements.

[0051] According to the present invention, it is possible to realize differential modulation driving of optical elements in a semiconductor device that monolithically integrates optical elements. This has the effect of halving the modulation amplitude voltage and improving the S / N ratio of the optical signal by reducing common mode noise (Reference 5).

[0052] It should be noted that the present invention is not limited to the above-described embodiments, and it is apparent that many modifications and combinations can be made by a person having ordinary knowledge in the art within the technical concept of the present invention.

[0053] [References] [References 1] Masayuki Uchida et al., "Semi-insulating InP single crystals," Journal of the Japanese Society for Crystal Growth, Vol. 28, No. 1, pp. 37-44, 2001. [Reference 2] H. Yoshinaga et al., "Iron (Fe) concentration dependence of photoluminescence spectra in InP", 1993 (5th) International Conference on Indium Phosphide and Related Materials, 4863850, pp. 317-320, 1993. [Reference 3] N. Nordell et al., "MOVPE growth of InP around reactive ion etched mesas", Journal of Crystal Growth, vol. 114, pp. 92-98, 1991. [Reference 4] N. Nordell et al., "Infuence of MOVPE growth condition and CCl4 addition on InP crystal shapes", Journal of Crystal Growth, vol. 125, pp. 597-611, 1992. [Reference 5] W. Kobayashi et al., "Design and Fabrication of Wide Wavelength Range 25.8-Gb / S, 1.3-μM, Push-Pull-Driven DMLs", Journal of Lightwave Technology, vol. 32, no. 1, pp. 3-9, 2014. [Explanation of symbols]

[0054] 101...substrate, 102a...first semiconductor layer, 102b...third semiconductor layer, 103a...first active layer, 103b...second active layer, 104a...second semiconductor layer, 104b...fourth semiconductor layer, 105a...sixth semiconductor layer, 105b...seventh semiconductor layer, 106...core, 107...clad, 108a...first buried layer, 108b...second buried layer, 110...fifth semiconductor layer, 141...first optical element, 142...second optical element, 143...optical waveguide, 151...first element region, 152...second element region, 153...separation region.

Claims

1. A substrate made of a semi-insulating compound semiconductor; a first optical element of a waveguide type formed in a first element region of the substrate; a waveguide-type second optical element formed in a second element region of the substrate; an optical waveguide that is formed in an isolation region between a first element region and a second element region of the substrate, and that optically connects the first optical element and the second optical element; A method for manufacturing a semiconductor device comprising: a first step of forming a first conductivity type layer made of a first conductivity type compound semiconductor on the substrate; a second step of forming an active layer made of a compound semiconductor in the first element region and the second element region on the first conductive type layer, and forming a core layer made of a compound semiconductor in the isolation region on the first conductive type layer; a third step of forming a second conductivity type layer made of a second conductivity type compound semiconductor on the active layer and the core layer; the second conductive type layer, the active layer, and the core layer are etched in a thickness direction, and the first conductive type layer is etched partway through the thickness direction to form a ridge shape; forming a first optical element in the first element region, the first optical element including a first semiconductor layer made of a first conductive type compound semiconductor, a first active layer made of a compound semiconductor formed on the first semiconductor layer, and a second semiconductor layer made of a second conductive type compound semiconductor formed on the first active layer; forming the second optical element in the second element region, the second optical element including a third semiconductor layer made of a first conductive type compound semiconductor, a second active layer made of a compound semiconductor formed on the third semiconductor layer, and a fourth semiconductor layer made of a second conductive type compound semiconductor formed on the second active layer; a fourth step of forming a core made of a compound semiconductor in the isolation region; a fifth step of removing the second conductive type layer and the first conductive type layer in the isolation region; a sixth step of forming a clad made of a semi-insulating compound semiconductor in which the core in the separation region is embedded to form the optical waveguide; A method for manufacturing a semiconductor device comprising the steps of:

2. 2. The method of manufacturing a semiconductor device according to claim 1, a seventh step of forming a first burying layer made of a semi-insulating compound semiconductor that fills a waveguide direction side surface of the first optical element, and a second burying layer made of a semi-insulating compound semiconductor that fills a waveguide direction side surface of the second optical element.

3. 3. The method of manufacturing a semiconductor device according to claim 2, The sixth step and the seventh step are carried out simultaneously, and the first buried layer, the second buried layer, and the clad are made of the same compound semiconductor and are formed continuously and integrally in the waveguiding direction.

4. A method for manufacturing a semiconductor device comprising the steps of:

Images