Edge-emitting semiconductor laser and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, and discloses an edge-emitting semiconductor laser and a preparation method thereof, and the preparation method comprises the steps: forming a current injection region and a passivation layer at the side part of the current injection region on the surface of one side, opposite to an upper limiting layer, of a P-surface contact layer of a laser wafer; the laser wafer is divided into a plurality of laser chips in the vertical direction through a plurality of first cleavage channels and a plurality of second cleavage channels; forming a first P-type metal layer on the surface of the laser chip, the surface of the first cleavage channel and the surface of the first region of the second cleavage channel; forming a second P-type metal layer on the surface of one side of the first P-type metal layer of the laser chip through an electroplating process; the first P-type metal layer in the first region is used for communicating the surfaces of the plurality of laser chips; the laser wafer is cleaved into a plurality of edge-emitting semiconductor lasers. Compared with the prior art, the reliability and the yield of the edge-emitting high-power laser can be improved, and the cost of a preparation process is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to an edge-emitting semiconductor laser and a preparation method thereof. Background Art

[0002] Edge-emitting semiconductor lasers have the characteristics of small volume, wide output wavelength range, large output power, low price, etc., and are widely used in the fields of medical treatment, industry, automobiles, etc. The production process of traditional high-power edge-emitting semiconductor lasers is as follows: ridge waveguide etching, passivation protection etching of the current injection area, preparation of the P-side electrode heat dissipation layer, polishing and thinning, preparation of the N-side electrode, and cleavage into bar or single-chip lasers.

[0003] When a high-power edge-emitting laser works, it will generate more heat. Effective heat dissipation is extremely important for ensuring the performance of a high-power semiconductor laser. Therefore, the chip often needs to be packaged on a heat sink to work normally. A relatively thick gold layer needs to be prepared on the P-side electrode for packaging. The ordinary deposition method for forming a thick electrode layer is not very practical. A 3μm or thicker gold layer is suitable for electroplating process operations. Using the electroplating process requires a conductive metal layer to cover the entire surface of the wafer as a seed metal film layer. Since there is also a metal film layer in the cleavage area, the metal film layer is not easily broken during the cleavage process, remains on the P-side, short-circuits the PN junction, and may also cause the entire surface of the metal to be pulled off, resulting in a loss of product yield, thereby reducing the reliability and yield of high-power edge-emitting lasers. In addition, the metal film layer in the cleavage area will also increase the consumption of cleavage knives, thereby increasing the process cost. Summary of the Invention

[0004] In view of this, the present invention provides an edge-emitting semiconductor laser and a preparation method thereof to solve the problems in the related art that when electroplating a thick electrode layer on a high-power edge-emitting laser, due to the existence of a seed metal film layer in the cleavage area, the metal film layer is not easily broken during the cleavage process, remains on the P-side, short-circuits the PN junction, and the entire surface of the metal is pulled off, resulting in relatively low reliability and yield of high-power edge-emitting lasers, and relatively high preparation process costs.

[0005] In a first aspect, the present invention provides a preparation method of an edge-emitting semiconductor laser, and the preparation method includes:

[0006] Providing a laser wafer, the laser wafer sequentially includes from bottom to top: a substrate layer, a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper confinement layer, and a P-side contact layer;

[0007] On one side surface of the P-side contact layer facing away from the confinement layer, a current injection region and a passivation layer on the side of the current injection region are formed; the laser wafer is vertically divided into a plurality of laser chips, and each laser chip includes a current injection region; the plurality of laser chips are separated by a plurality of first cleavage channels and a plurality of second cleavage channels, and the first cleavage channels and the second cleavage channels are perpendicular to each other;

[0008] A first P-type metal layer is formed on one side surface of the passivation layer and the current injection region of the laser chip, one side surface of the passivation layer of the first cleavage channel, and one side surface of the passivation layer of the first region of the second cleavage channel; the first region is located at both edge portions of the second cleavage channel on the side of each laser chip; the remaining portion of the second cleavage channel outside the first region is the second region;

[0009] A second P-type metal layer is formed on one side surface of the first P-type metal layer of the laser chip by an electroplating process; the first P-type metal layer in the first region is used to connect the surfaces of the plurality of laser chips;

[0010] The laser wafer is cleaved into a plurality of bars along the first cleavage channel;

[0011] The bars are cleaved into a plurality of edge-emitting semiconductor lasers along the second cleavage channel.

[0012] For the method for preparing an edge-emitting semiconductor laser provided by the present invention, on the one hand, by not providing a first P-type metal layer on the surface of the passivation layer in the second region, there is only a small amount of the first P-type metal layer on the surface of the first region in the second cleavage channel, which can avoid problems such as the first P-type metal layer being not easily broken in the cleavage process, remaining on the P surface, short circuit of the PN junction, and the entire surface metal being pulled off, can reduce the difficulty of the cleavage process, improve the cleavage yield, improve the reliability and yield of the high-power edge-emitting laser, and at the same time can also reduce the consumption of the cleavage knife, thereby reducing the process cost. On the other hand, a first P-type metal layer is formed on one side surface of the passivation layer and the current injection region of the laser chip, one side surface of the passivation layer of the first cleavage channel, and one side surface of the passivation layer of the first region of the second cleavage channel, so that in the process of forming the second P-type metal layer by an electroplating process, the first P-type metal layer in the first region can connect the surfaces of the plurality of laser chips, providing a current channel, so that a second P-type metal layer can be formed on one side surface of the first P-type metal layer of each laser chip, which can improve the uniformity, coverage rate and electroplating efficiency of the second P-type metal layer, thereby improving the reliability and yield of the high-power edge-emitting laser. Therefore, the method for preparing an edge-emitting semiconductor laser provided by the present invention can improve the reliability and yield of the high-power edge-emitting laser and reduce the cost of the preparation process.

[0013] In an alternative embodiment, the step of forming the first P-type metal layer includes:

[0014] Form a first patterned photoresist on the surface of the laser wafer. The first patterned photoresist covers the surface of the second region of the second cleavage channel and exposes the surface of the laser chip, the surface of the first cleavage channel, and the surface of the first region of the second cleavage channel.

[0015] Form a first P-type metal layer on the surface of the laser wafer.

[0016] Remove the first patterned photoresist and its corresponding first P-type metal layer. The remaining first P-type metal layer covers the surface of the laser chip, the surface of the first cleavage channel, and the surface of the first region of the second cleavage channel.

[0017] In the method for preparing an edge-emitting semiconductor laser provided by the present invention, on the one hand, by covering the surface of the second region of the second cleavage channel with the first patterned photoresist and forming a first P-type metal layer on the surface of the passivation layer and the surface of the electron injection region in other regions, it can not only ensure that there is no metal layer on the surface of the second region, but also ensure that the first P-type metal layer in the first region serves as a current channel for the electroplating process, improving the efficiency of the cleavage process, enhancing the reliability and yield of the edge-emitting high-power laser, and at the same time reducing the consumption of the cleavage knife, thereby reducing the process cost. On the other hand, this solution only requires adding one more photolithography process and can also reduce the usage of metal consumables. It can reduce the situation that the metal film layer in the adjacent chip cleavage channel is not easily broken and pulled off at a very low cost, reduce the difficulty of the cleavage process, improve the cleavage yield, increase the product output yield, and the process flow is simple, and it can be stably applied to large-scale manufacturing processes.

[0018] In an alternative embodiment, the laser chip is rectangular.

[0019] The first cleavage channel is located in the width direction of the laser chip, and the second cleavage channel is located in the length direction of the laser chip.

[0020] For each laser chip, the length of the first region on both sides of the second cleavage channel is 3.5% - 5% of the length of the second cleavage channel, and the length of the second cleavage channel is 3.5% - 5% of the length of the laser chip.

[0021] In the method for preparing an edge-emitting semiconductor laser provided by the present invention, for each laser chip, the length of the first region on both sides of the second cleavage channel is 3.5% - 5% of the length of the second cleavage channel, and the length of the middle second region is 90% - 93% of the length of the laser chip. This can reduce the difficulty of the cleavage process, improve the cleavage yield, enhance the reliability and yield of the edge-emitting high-power laser, and at the same time can significantly reduce the usage of metal consumables and the consumption of the cleavage knife, reducing the process cost.

[0022] In an alternative embodiment, the length of the laser chip is 5000μm - 5500μm, and the width is 500μm - 530μm.

[0023] The length of the first region on both sides of the second cleavage channel corresponding to each laser chip is 200 μm to 250 μm;

[0024] The width of the second cleavage channel is 30 μm to 50 μm.

[0025] In an optional embodiment, the step of forming the second P-type metal layer on one side surface of the first P-type metal layer of the laser chip by electroplating includes:

[0026] Form a second patterned photoresist on one side surface of the first P-type metal layer of the first cleavage channel and one side surface of the first P-type metal layer of the second cleavage channel, and the second patterned photoresist exposes one side surface of the first P-type metal layer of the laser chip;

[0027] Take the first P-type metal layer as the current channel of the electroplating process, and form the second P-type metal layer on one side surface of the first P-type metal layer of the laser chip by electroplating.

[0028] In the method for preparing an edge-emitting semiconductor laser provided by the present invention, the first P-type metal layer is used as the current channel of the electroplating process, and the second P-type metal layer is formed on one side surface of the first P-type metal layer of the laser chip by electroplating. Moreover, the first P-type metal layer of the first region can connect the surfaces of multiple laser chips to provide a current channel, so that the second P-type metal layer can be formed on one side surface of the first P-type metal layer of each laser chip, which can improve the uniformity, coverage rate and electroplating efficiency of the second P-type metal layer, thereby improving the reliability and yield of the edge-emitting high-power laser.

[0029] In an optional embodiment, the material of the second P-type metal layer is Au; the thickness of the second P-type metal layer is greater than 3 μm;

[0030] In the electroplating process, the temperature of the electroplating solution is 60 °C to 70 °C, and the current density is 0.2 A / m 2 ~0.7 A / m 2 .

[0031] In an optional embodiment, the step of forming a current injection region and a passivation layer on the side of the P-side contact layer facing away from the upper confinement layer includes:

[0032] Form a plurality of grooves on the side of the P-side contact layer facing away from the upper confinement layer, and the grooves penetrate through the P-side contact layer and part of the upper confinement layer; each laser chip includes two parallel grooves, and the region between the two grooves includes a current injection region;

[0033] Form a passivation layer on the inner wall of the groove and on the side surface of the P-side contact layer facing away from the upper confinement layer;

[0034] Remove the passivation layer corresponding to the current injection region.

[0035] In an alternative embodiment, before the step of cleaving the laser wafer into multiple bars along the first cleavage channel, the method further includes:

[0036] Performing a thinning process on the substrate layer;

[0037] Forming an N-type metal layer on one side surface of the substrate layer facing away from the lower confinement layer;

[0038] After the step of cleaving the laser wafer into multiple bars along the first cleavage channel, the method further includes:

[0039] Forming an antireflection film and a high-reflection film on two side surfaces of the bar corresponding to the first cleavage channel, respectively.

[0040] In a second aspect, the present invention provides an edge-emitting semiconductor laser, which includes:

[0041] A substrate layer, a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper confinement layer, and a P-side contact layer stacked in sequence;

[0042] A passivation layer, which is located on one side surface of the P-side contact layer facing away from the upper confinement layer and exposes the P-side contact layer on the surface of the current injection region; the four peripheral edges of the passivation layer in the vertical direction include a first cleavage channel and a second cleavage channel; the first cleavage channel and the second cleavage channel are perpendicular to each other; the region between the first cleavage channel and the second cleavage channel is the laser chip;

[0043] A first P-type metal layer, which is located on one side surface of the passivation layer of the laser chip and the current injection region, one side surface of the passivation layer of the first cleavage channel, and one side surface of the passivation layer in the first region of the second cleavage channel; the first region is located on both side edge portions corresponding to each laser chip of the second cleavage channel; the remaining portion of the second cleavage channel outside the first region is the second region;

[0044] A second P-type metal layer, which is located on one side surface of the first P-type metal layer of the laser chip.

[0045] For the edge-emitting semiconductor laser provided by the present invention, through the first P-type metal layer on one side surface of the passivation layer in the first region of the second cleavage channel, the uniformity and interface bonding degree of the second P-type metal layer can be improved. By not providing the first P-type metal layer on the surface of the passivation layer in the second region, it is possible to avoid the metal layer from peeling off during the cleavage process, improve the bonding property between the metal layer and the passivation layer of the edge-emitting semiconductor laser, make the metal layer not easily peel off on the passivation layer, and thus improve the reliability and yield of the edge-emitting high-power laser.

[0046] In an alternative embodiment, the edge-emitting semiconductor laser further includes:

[0047] Two grooves are located on the side of the P - surface contact layer facing away from the upper confinement layer, and the grooves penetrate through the P - surface contact layer and part of the upper confinement layer; the current injection region is located in the area between the two grooves; a passivation layer, a first P - type metal layer, and a second P - type metal layer are sequentially stacked on the inner walls of the grooves;

[0048] The N - type metal layer is located on the surface of the substrate layer on the side facing away from the lower confinement layer;

[0049] The antireflection film and the high - reflection film are respectively located on the two side surfaces of the edge - emitting semiconductor laser corresponding to the first cleavage channel. Brief Description of the Drawings

[0050] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the related art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the related art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0051] Figure 1 is a schematic flowchart of a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0052] Figure 2 is a schematic structural diagram of forming a groove in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0053] Figure 3 is a schematic structural diagram of forming a passivation layer and a current injection region in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0054] Figure 4 is a top - view schematic diagram of the division method of the first cleavage channel and the second cleavage channel in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0055] Figure 5 is a schematic structural diagram of forming a first P - type metal layer in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0056] Figure 6 is a schematic structural diagram of forming a second P - type metal layer in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0057] Figure 7 is a schematic structural diagram of forming an N - type metal layer in a method for manufacturing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0058] Figure 8It is a top - view schematic diagram of a laser wafer before cleavage in a method for preparing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0059] Figure 9 It is a top - view schematic diagram of a bar - stripe in a method for preparing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0060] Figure 10 It is a top - view schematic diagram of an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0061] Figure 11 It is a schematic flow chart of a method for preparing an edge - emitting semiconductor laser according to an embodiment of the present invention.

[0062] Reference numerals:

[0063] 10. Substrate layer; 11. Lower confinement layer; 12. Lower waveguide layer; 13. Active layer; 14. Upper waveguide layer; 15. Upper confinement layer; 16. P - side contact layer; 20. Groove; 30. Passivation layer; 40. First P - type metal layer; 50. Second P - type metal layer; 60. N - type metal layer; 100. Laser chip; 200. First cleavage channel; 300. Second cleavage channel; 310. First region; 320. Second region; 400. Current injection region. Detailed implementation manners

[0064] The present invention will be further described in detail below with reference to the drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of description, only parts related to the present invention are shown in the drawings, rather than all structures.

[0065] In the following description, the description of well - known structures and technologies is omitted to avoid unnecessarily confusing the concepts of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the drawings. These figures are not drawn to scale. For the purpose of clear expression, some details are enlarged, and some details may be omitted. The shapes of various regions and layers shown in the figures, as well as their relative sizes and positional relationships, are only exemplary. In practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art can design regions / layers with different shapes, sizes, and relative positions according to actual needs. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element can be directly on the other layer / element, or there can be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element can be "under" the other layer / element.

[0066] Edge-emitting semiconductor lasers are characterized by small size, wide output wavelength range, high output power, and low price, and are widely used in medical, industrial, automotive and other fields. The production process of traditional high-power edge-emitting semiconductor lasers is as follows: ridge waveguide etching, passivation protection of the etched current injection region, preparation of the P-side electrode heat dissipation layer, polishing and thinning, preparation of the N-side electrode, and cleavage into bar or single-chip lasers.

[0067] When high-power edge-emitting lasers work, they generate a lot of heat. Effective heat dissipation is extremely important for ensuring the performance of high-power semiconductor lasers. Therefore, the chips often need to be packaged on heat sinks to work properly. A relatively thick gold layer needs to be prepared on the P-side electrode for packaging. Ordinary deposition methods for forming thick electrode layers are not very practical. A 3μm or thicker gold layer is suitable for electroplating processes. When using the electroplating process, the entire surface of the wafer needs to be covered with a conductive metal layer as the seed metal film layer. Since there is also a metal film layer in the cleavage region, the metal film layer is not easily broken during the cleavage process and remains on the P-side, short-circuiting the PN junction, and may also cause the entire surface of the metal to be pulled off, resulting in a loss of product yield and thus reducing the reliability and yield of high-power edge-emitting lasers. In addition, the metal film layer in the cleavage region will also increase the consumption of cleavage knives, thereby increasing the process cost.

[0068] In traditional high-power edge-emitting semiconductor lasers, the first P-type metal layer between adjacent laser chips needs to be retained as the current channel for electroplating the second P-type metal layer and cannot be removed. During the cutting process, the first P-type metal layer is pulled, resulting in an irregular shape that cannot be broken or detached. The first P-type metal layer extends down to the active layer, causing device failure.

[0069] There is a solution in the related art. First, a separated first P-type metal layer is evaporated, and then TiW / Au is sputtered as the electroplating seed layer for wafer surface circuit conduction. After the thick gold pattern of the electroplated second P-type metal layer is completed, a wet etching process is used to remove the excess electroplating seed layer TiW / Au. This introduces a new metal layer that needs to be removed separately, resulting in complex processes and high costs.

[0070] As Figure 1 shown, this embodiment provides a method for preparing an edge-emitting semiconductor laser, which includes but is not limited to steps S101 to S106.

[0071] Step S101: Provide a laser wafer, which sequentially includes from bottom to top: a substrate layer 10, a lower confinement layer 11, a lower waveguide layer 12, an active layer 13, an upper waveguide layer 14, an upper confinement layer 15, and a P-side contact layer 16.

[0072] Step S102: Form a current injection region 400 and a passivation layer 30 on the side surface of the P-side contact layer 16 facing away from the confinement layer 15, as Figure 2 and Figure 3 shown; the laser wafer is vertically divided into multiple laser chips 100, and each laser chip 100 includes a current injection region 400; the multiple laser chips 100 are separated by multiple first cleavage channels 200 and multiple second cleavage channels 300, and the first cleavage channels 200 and the second cleavage channels 300 are perpendicular to each other, as Figure 4 shown.

[0073] Step S103: Form a first P-type metal layer 40 on the side surface of the passivation layer 30 and the current injection region 400 of the laser chip 100, on the side surface of the passivation layer 30 of the first cleavage channel 200, and on the side surface of the passivation layer 30 of the first region 310 of the second cleavage channel 300, as Figure 5 and Figure 7 shown; the first region 310 is located at both edge portions of the second cleavage channel 300 on the side of each laser chip 100; the remaining portion of the second cleavage channel 300 outside the first region 310 is the second region 320.

[0074] In specific implementation, only the side surface of the passivation layer 30 in the second region 320 does not form the first P-type metal layer 40, and the surfaces of the passivation layer 30 in other regions are covered with the first P-type metal layer 40. The function of the first P-type metal layer 40 is to form an ohmic contact and at the same time serve as a current channel for the subsequent electroplating process. The first P-type metal layer 40 can be formed by processes such as evaporation and sputtering.

[0075] Step S104: Form a second P-type metal layer 50 on the side surface of the first P-type metal layer 40 of the laser chip 100 through an electroplating process; the first P-type metal layer 40 in the first region 310 is used to connect the surfaces of the multiple laser chips 100, as Figure 6 and Figure 7 shown.

[0076] Step S105: Cleave the laser wafer into multiple bars along the first cleavage channel 200, as Figure 9 shown.

[0077] Step S106: Cleave the bars into multiple edge-emitting semiconductor lasers along the second cleavage channel 300, as Figure 10 shown.

[0078] The preparation method of the edge-emitting semiconductor laser provided by this embodiment, on the one hand, by not providing the first P-type metal layer on the surface of the passivation layer in the second region, there is only a small amount of the first P-type metal layer on the surface of the first region in the second cleavage channel, which can avoid problems such as the first P-type metal layer being not easily broken in the cleavage process, remaining on the P surface, short-circuiting of the PN junction, and the entire surface metal being pulled off, etc. It can reduce the difficulty of the cleavage process, improve the cleavage yield, enhance the reliability and yield of the edge-emitting high-power laser, and at the same time can also reduce the consumption of the cleavage knife, thereby reducing the process cost. On the other hand, a first P-type metal layer is formed on the surface of the passivation layer and the current injection region side of the laser chip, on the surface of the passivation layer side of the first cleavage channel, and on the surface of the passivation layer side of the first region of the second cleavage channel. In the process of forming the second P-type metal layer by electroplating process, the first P-type metal layer in the first region can connect the surfaces of multiple laser chips to provide a current channel, so that the second P-type metal layer can be formed on the surface of one side of the first P-type metal layer of each laser chip, which can improve the uniformity, coverage rate and electroplating efficiency of the second P-type metal layer, thereby enhancing the reliability and yield of the edge-emitting high-power laser. Therefore, the preparation method of the edge-emitting semiconductor laser provided by the present invention can improve the reliability and yield of the edge-emitting high-power laser and reduce the cost of the preparation process.

[0079] It should be noted that: the above "the laser wafer is divided into multiple laser chips 100 in the vertical direction" and "multiple said laser chips 100 are separated by multiple first cleavage channels 200 and multiple second cleavage channels 300" specifically mean that: the laser substrate is divided into three regions in the vertical direction, namely the first cleavage channel 200, the second cleavage channel 300 and the laser chip 100, and the first cleavage channel 200 and the second cleavage channel 300 separate multiple laser chips 100. The first cleavage channel 200, the second cleavage channel 300 and the laser chip 100 all include all the film layer structures of the wafer in the vertical direction, and other structures processed in the film layer and on the film layer.

[0080] In some optional embodiments, the step of forming the first P-type metal layer 40 includes:

[0081] Form a first patterned photoresist on the surface of the laser wafer, the first patterned photoresist covers the surface of the second region 320 of the second cleavage channel 300, and exposes the surface of the laser chip 100, the surface of the first cleavage channel 200, and the surface of the first region 310 of the second cleavage channel 300;

[0082] Form a first P-type metal layer 40 on the surface of the laser wafer;

[0083] Remove the first patterned photoresist and its corresponding first P-type metal layer 40. The remaining first P-type metal layer 40 covers the surface of the laser chip 100, the surface of the first cleavage channel 200, and the surface of the first region 310 of the second cleavage channel 300.

[0084] For the method for preparing an edge-emitting semiconductor laser provided in this embodiment, on the one hand, by covering the surface of the second region of the second cleavage channel with the first patterned photoresist and forming the first P-type metal layer on the surface of the passivation layer and the surface of the electron injection region in other regions, it can not only ensure that there is no metal layer on the surface of the second region, but also ensure that the first P-type metal layer in the first region serves as the current channel for the electroplating process, improving the efficiency of the cleavage process, the reliability and yield of the edge-emitting high-power laser, and at the same time reducing the consumption of the cleavage knife, thereby reducing the process cost; on the other hand, this solution only needs to add one more photolithography process and can also reduce the consumption of metal consumables. It can reduce the situation that the metal film layer in the adjacent chip cleavage channel is not easily broken and pulled off at a very low cost, reduce the difficulty of the cleavage process, improve the cleavage yield, improve the product output yield, and the process flow is simple, and it can be stably applied to large-scale manufacturing procedures.

[0085] In some optional implementation manners, the laser chip 100 is rectangular;

[0086] The first cleavage channel 200 is located in the width direction of the laser chip 100, and the second cleavage channel 300 is located in the length direction of the laser chip 100;

[0087] For each laser chip 100, the length of the first region 310 on both sides of the second cleavage channel 300 is 3.5% - 45% of the length of the second cleavage channel 300, which is the length of the laser chip 100.

[0088] During specific implementation, the first regions 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 should be as short as possible to reduce the metal area, release stress, and at the same time, there is less metal in contact with the cleavage channel, reducing the chip cutting and cleavage difficulty, greatly reducing the situation where the metal adhesion cannot be broken, and at the same time reducing the loss of the cleavage knife. However, if it is too short, it cannot ensure the electroplating uniformity, which will result in a thinner thickness and poorer uniformity at the edge part of the second P-type metal layer 50.

[0089] Therefore, when the length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is 3.5% - 5% of the length of the second cleavage channel 300, which is the length of the laser chip 100, it can effectively reduce the difficulty of the cleavage process, improve the cleavage yield, enhance the reliability and yield of the edge-emitting high-power laser, and ensure that the uniformity of the second P-type metal layer 50 formed by the electroplating process is greater than 90%, as well as a high coverage rate and electroplating efficiency. If the length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is less than 3.5% of the length of the laser chip, it will result in an incomplete current channel in the electroplating process, unable to ensure the formation of a uniform second P-type metal layer 50 on one side surface of the first P-type metal layer 40 of each laser chip 100, and cause the thickness of the second P-type metal layer 50 at the edge position near the second region 320 to be too thin, with non-uniformity greater than 10%. If the length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is greater than 5% of the length of the laser chip 100, it will lead to too large a metal layer area in the second cleavage channel 300, an increase in the stress of the metal layer, an increase in the difficulty of the cleavage process, problems such as the metal layer being pulled during the cleavage process, unable to break or fall off with irregular shapes, and also cause the P-side metal to extend down to the active layer 13, resulting in device failure.

[0090] In the method for preparing an edge-emitting semiconductor laser provided in this embodiment, the length of the first region on both sides of the second cleavage channel corresponding to each laser chip is 3.5% - 5% of the length of the second cleavage channel, which is the length of the laser chip, and the length of the middle second region is 90% - 93% of the length of the laser chip, which can reduce the difficulty of the cleavage process, improve the cleavage yield, enhance the reliability and yield of the edge-emitting high-power laser, and at the same time can also significantly reduce the consumption of metal consumables and the consumption of cleavage knives, reducing the process cost.

[0091] In some optional embodiments, the length of the laser chip 100 is 5000μm - 5500μm, and the width is 500μm - 530μm;

[0092] The length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is 200μm - 250μm;

[0093] The width of the second cleavage channel 300 is 30μm - 50μm.

[0094] In some optional embodiments, the step of forming the second P-type metal layer 50 on one side surface of the first P-type metal layer 40 of the laser chip 100 by electroplating process includes:

[0095] A second patterned photoresist is formed on one side surface of the first P-type metal layer 40 of the first cleavage channel 200 and one side surface of the first P-type metal layer 40 of the second cleavage channel 300, and the second patterned photoresist exposes one side surface of the first P-type metal layer 40 of the laser chip 100.

[0096] Taking the first P-type metal layer 40 as the current channel of the electroplating process, a second P-type metal layer 50 is formed on one side surface of the first P-type metal layer 40 of the laser chip 100 through the electroplating process.

[0097] In specific implementation, due to the presence of the second patterned photoresist, the second P-type metal layer 50 will not be formed on the surface of the first P-type metal layer 40 in the first region 310 of the first cleavage channel 200 and the second cleavage channel 300. And since there is no first P-type metal layer 40 in the second region 320 of the second cleavage channel 300, it cannot provide the current channel for electroplating, so the second P-type metal layer 50 will not be formed either. Therefore, finally, the second P-type metal layer 50 is only formed on one side surface of the first P-type metal layer 40 of the laser chip 100, and there is no second P-type metal layer 50 at the positions of the first cleavage channel 200 and the second cleavage channel 300.

[0098] In the preparation method of the edge-emitting semiconductor laser provided in this embodiment, taking the first P-type metal layer as the current channel of the electroplating process, a second P-type metal layer is formed on one side surface of the first P-type metal layer of the laser chip through the electroplating process, and the first P-type metal layer in the first region can connect the surfaces of multiple laser chips to provide a current channel, so that the second P-type metal layer can be formed on one side surface of the first P-type metal layer of each laser chip, which can improve the uniformity, coverage rate and electroplating efficiency of the second P-type metal layer, thereby improving the reliability and yield of the high-power edge-emitting laser.

[0099] In some optional implementation manners, the material of the second P-type metal layer 50 is Au; the thickness of the second P-type metal layer 50 is greater than 3 μm;

[0100] In the electroplating process, the temperature of the electroplating solution is 60 °C to 70 °C, and the current density is 0.2 A / m 2 ~0.7 A / m 2 .

[0101] In some optional implementation manners, the steps of forming the current injection region 400 and the passivation layer 30 on the side of the current injection region 400 on one side surface of the P-side contact layer 16 facing away from the upper confinement layer 15 include:

[0102] A plurality of grooves 20 are formed on one side of the P-side contact layer 16 facing away from the upper confinement layer 15, and the grooves 20 penetrate through the P-side contact layer 16 and part of the upper confinement layer 15; each laser chip 100 includes two grooves 20, and the region between the two grooves 20 includes the current injection region 400;

[0103] A passivation layer 30 is formed on the inner wall of the groove 20 and on the side surface of the P-side contact layer 16 facing away from the upper confinement layer 15;

[0104] Remove the passivation layer 30 corresponding to the current injection region 400.

[0105] Specifically, the groove 20 is a ridge waveguide etching groove.

[0106] In some alternative embodiments, before the step of cleaving the laser wafer into multiple bars along the first cleavage channel 200, it further includes:

[0107] Performing a thinning process on the substrate layer 10;

[0108] An N-type metal layer 60 is formed on the side surface of the substrate layer 10 facing away from the lower confinement layer 11;

[0109] After the step of cleaving the laser wafer into multiple bars along the first cleavage channel 200, it further includes:

[0110] An antireflection film and a high-reflection film are respectively formed on two side surfaces of the bar corresponding to the first cleavage channel 200.

[0111] In some alternative embodiments, the material of the substrate layer 10 is GaAs, the material of the lower confinement layer 11 is AlGaAs, the material of the lower waveguide layer 12 is AlGaAs, the active layer 13 is a strained quantum well structure, the material of the upper waveguide layer 14 is AlGaAs, the material of the upper confinement layer 15 is AlGaAs, and the material of the P-side contact layer 16 is GaAs;

[0112] The material of the passivation layer 30 is SiN x ;

[0113] The material of the first P-type metal layer 40 is a Ti / Pt / Au composite layer;

[0114] The material of the second P-type metal layer 50 is Au;

[0115] The material of the N-type metal layer 60 is a Ti / Pt / Au composite layer or a Pd / Ge / Ti / Pt / Au composite layer.

[0116] In some alternative embodiments, the thickness of the first P-type metal layer 40 is 200 nm to 300 nm, and the thickness of the second P-type metal layer 50 is 3 μm to 4 μm.

[0117] As Figure 11 shown, the present invention also provides a specific process schematic diagram of a method for manufacturing an edge-emitting semiconductor laser, which is used to manufacture a high-power edge-emitting semiconductor laser, including but not limited to steps S201 to S212.

[0118] Step S201: Provide a laser wafer, which sequentially includes, from bottom to top: a substrate layer 10, a lower confinement layer 11, a lower waveguide layer 12, an active layer 13, an upper waveguide layer 14, an upper confinement layer 15, and a P-side contact layer 16.

[0119] In specific implementation, the material of the substrate layer 10 is GaAs, the material of the lower confinement layer 11 is AlGaAs, the material of the lower waveguide layer 12 is AlGaAs, the active layer 13 is a strained quantum well structure, the material of the upper waveguide layer 14 is AlGaAs, the material of the upper confinement layer 15 is AlGaAs, and the material of the P-side contact layer 16 is GaAs.

[0120] Step S202: Form a plurality of grooves 20 on the side of the P-side contact layer 16 facing away from the upper confinement layer 15. The grooves 20 penetrate through the P-side contact layer 16 and part of the upper confinement layer 15; each laser chip 100 includes two grooves 20, and the region between the two grooves 20 is a current injection region 400, as Figure 2 shown.

[0121] In specific implementation, first form a third patterned photoresist on the side of the P-side contact layer 16 facing away from the upper confinement layer 15. The third patterned photoresist exposes the P-side contact layer 16 corresponding to the positions of the grooves 20. Then, perform a wet etching process on the laser wafer to etch out two grooves 20 and a ridge waveguide. The etching depth does not exceed the upper confinement layer 15 to form an optical confinement and current confinement effect. The region between the two grooves 20 is a current injection region 400, as Figure 8 shown. In one example, the material of the P-side contact layer is GaAs, the thickness of the P-side contact layer is 0.2 μm to 0.25 μm; the material of the upper confinement layer is AlGaAs, the thickness of the upper confinement layer is 0.5 μm to 0.7 μm, and the etching depth of the groove is 0.5 μm to 0.7 μm.

[0122] Step S203: Form a passivation layer 30 on the inner walls of the grooves 20 and the surface of the side of the P-side contact layer 16 facing away from the upper confinement layer 15; remove the passivation layer 30 corresponding to the current injection region 400, as Figure 3 shown; the laser wafer is vertically divided into a plurality of laser chips 100, and each laser chip 100 includes a current injection region 400; the plurality of laser chips 100 are separated by a plurality of first cleavage channels 200 and a plurality of second cleavage channels 300. The first cleavage channels 200 and the second cleavage channels 300 are perpendicular to each other, as Figure 4 shown.

[0123] In specific implementation, the material of the passivation layer 30 is SiN x, the stress of the passivation layer 30 is ±50 Mpa, serving as the passivation protection layer of the edge-emitting semiconductor laser. The method for removing the passivation layer 30 corresponding to the current injection region 400 is to remove the SiN above the current injection region 400 through photolithography and dry etching processes. x The passivation layer 30 is thus removed to control the injection current path and improve the electro-optical conversion efficiency.

[0124] Step S204: Form a first patterned photoresist on the surface of the laser wafer. The first patterned photoresist covers the surface of the second region 320 of the second cleavage channel 300 and exposes the surface of the laser chip 100, the surface of the first cleavage channel 200, and the surface of the first region 310 of the second cleavage channel 300. The first region 310 is located at both edge portions of the second cleavage channel 300 on the side of each laser chip 100. The remaining portion of the second cleavage channel 300 outside the first region 310 is the second region 320.

[0125] In specific implementation, a negative photoresist is coated on the surface of the laser wafer, and a first patterned photoresist is formed such that there is no photoresist on the surface of the first region 310 of the second cleavage channel 300, and the photoresist on the surface of the second region 320 of the second cleavage channel 300 is retained.

[0126] Step S205: Form a first P-type metal layer 40 on the surface of the laser wafer.

[0127] In specific implementation, a metal thin film is deposited on the surface of the laser wafer by electron beam evaporation to form the first P-type metal layer 40. The material of the first P-type metal layer 40 is a Ti / Pt / Au composite layer or other metal layer combinations. In one example, the material of the first P-type metal layer 40 is a Ti / Pt / Au composite layer, and the thickness of the first P-type metal layer 40 is 200 nm to 300 nm.

[0128] Step S206: Remove the first patterned photoresist and the corresponding first P-type metal layer 40 thereon. The remaining first P-type metal layer 40 covers the surface of the laser chip 100, the surface of the first cleavage channel 200, and the surface of the first region 310 of the second cleavage channel 300, as Figure 5 and Figure 7 shown.

[0129] In specific implementation, after evaporation, the laser wafer is subjected to a metal stripping and degluing process to remove the first patterned photoresist, and the first P-type metal layer 40 on the first patterned photoresist is also removed. The remaining first P-type metal layer 40 covers the surface of the laser chip 100, the surface of the first cleavage channel 200, and the surface of the first region 310 of the second cleavage channel 300. Finally, there is no first P-type metal layer 40 on the surface of the second region 320 of the formed second cleavage channel 300, while there is a first P-type metal layer 40 in other regions of the laser wafer.

[0130] In one example, the length of the laser chip 100 is 5500 μm and the width is 530 μm. To achieve the plating uniformity of the subsequent second P-type metal layer 50, the lengths of the first regions 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 are 200 μm to 250 μm; the width of the second cleavage channel 300 is 30 μm to 50 μm.

[0131] Step S207, form a second patterned photoresist on the surface of the first P-type metal layer 40 on one side of the first cleavage channel 200 and the surface of the first P-type metal layer 40 on one side of the second cleavage channel 300, and the second patterned photoresist exposes the surface of the first P-type metal layer 40 on one side of the laser chip 100.

[0132] Step S208, use the first P-type metal layer 40 as the current channel of the electroplating process, and form a second P-type metal layer 50 on the surface of the first P-type metal layer 40 on one side of the laser chip 100 through the electroplating process; the first P-type metal layer 40 in the first region 310 is used to connect the surfaces of multiple laser chips 100, as Figure 6 and Figure 7 shown.

[0133] Specifically, the material of the second P-type metal layer 50 is Au; the thickness of the second P-type metal layer 50 is 3 μm to 4 μm; the temperature of the electroplating solution in the electroplating process is 60 °C to 70 °C, and the current density is 0.2 A / m 2 ~0.7 A / m 2 . The second P-type metal layer 50 can greatly improve the heat dissipation ability of the laser electrode.

[0134] Step S209, perform a thinning process on the substrate layer 10; form an N-type metal layer 60 on the surface of the substrate layer 10 on the side facing away from the lower confinement layer 11, as Figure 8 shown.

[0135] Specifically, use an electron beam evaporation process to evaporate and deposit an N-type metal layer 60 on the surface of the substrate layer 10 on the side facing away from the lower confinement layer 11. The material of the N-type metal layer 60 is a Ti / Pt / Au composite layer, a Ti / Ni / Au composite layer, or other metal layer combinations. In one example, the thickness of the thinned wafer is 130 μm to 150 μm, the material of the N-type metal layer 60 is a Ti / Pt / Au composite layer, and the thickness of the N-type metal layer 60 is 200 nm to 300 nm.

[0136] Step S210, cleave the laser wafer into multiple bars along the first cleavage channel 200, as Figure 9 shown; form an antireflection film and a high-reflection film on the two side surfaces of the bar corresponding to the first cleavage channel 200.

[0137] In specific implementation, dicing and cleaving are performed along the midline of the first cleavage channel 200 to cleave the laser wafer into multiple bars; then, an antireflection film and an enhanced reflection film are respectively formed on two side surfaces of the bar corresponding to the first cleavage channel 200, and the side with the enhanced reflection film is the light-emitting surface of the edge-emitting semiconductor laser.

[0138] Step S211, cleave the bar into multiple edge-emitting semiconductor lasers along the second cleavage channel 300, as Figure 10 shown.

[0139] In specific implementation, dicing and cleaving are performed along the midline of the second cleavage channel 300 between adjacent laser chips 100 in the bar to cleave the bar into multiple edge-emitting semiconductor lasers, obtaining the Figure 10 edge-emitting semiconductor lasers shown. Since there is no metal layer in most areas (the second area 320) of the second cleavage channel 300, during cleavage, the metal layer will not have the situation of being unable to break or being pulled off, which can effectively improve the cleavage efficiency and the reliability of the edge-emitting semiconductor laser, and further improve the chip yield of the wafer.

[0140] This embodiment also provides an edge-emitting semiconductor laser, as Figure 10 shown, the edge-emitting semiconductor laser includes:

[0141] A substrate layer 10, a lower confinement layer 11, a lower waveguide layer 12, an active layer 13, an upper waveguide layer 14, an upper confinement layer 15, and a P-side contact layer 16 stacked in sequence;

[0142] A passivation layer 30, located on the surface of the P-side contact layer 16 facing away from the upper confinement layer 15 and exposing the P-side contact layer 16 on the surface of the current injection region 400; the four peripheral edges of the passivation layer 30 in the vertical direction include a first cleavage channel 200 and a second cleavage channel 300; the first cleavage channel 200 and the second cleavage channel 300 are perpendicular to each other; the region between the first cleavage channel 200 and the second cleavage channel 300 is the laser chip 100;

[0143] A first P-type metal layer 40, located on the surface of the passivation layer 30 of the laser chip 100 and on one side of the current injection region 400, on the surface of the passivation layer 30 on one side of the first cleavage channel 200, and on the surface of the passivation layer 30 in the first region 310 of the second cleavage channel 300; the first region 310 is located on both side edge parts of the second cleavage channel 300 corresponding to each laser chip 100; the remaining part of the second cleavage channel 300 outside the first region 310 is the second region 320;

[0144] A second P-type metal layer 50, located on the surface of the first P-type metal layer 40 of the laser chip 100.

[0145] For the edge-emitting semiconductor laser provided in this embodiment, the first P-type metal layer on the side surface of the passivation layer in the first region of the second cleavage channel can improve the uniformity and interface bonding degree of the second P-type metal layer. By not providing the first P-type metal layer on the surface of the passivation layer in the second region, it is possible to avoid the metal layer from peeling off during the cleavage process, improve the bonding between the metal layer and the passivation layer of the edge-emitting semiconductor laser, make the metal layer not easily peel off on the passivation layer, thereby improving the reliability and yield of the high-power edge-emitting laser.

[0146] In some alternative embodiments, the edge-emitting semiconductor laser further includes:

[0147] Two grooves 20, located on the side of the P-face contact layer 16 facing away from the upper confinement layer 15, and the grooves 20 penetrate through the P-face contact layer 16 and a part of the upper confinement layer 15; the current injection region 400 is the region between the two grooves 20; on the inner wall of the grooves 20, there are sequentially stacked a passivation layer 30, a first P-type metal layer 40, and a second P-type metal layer 50;

[0148] An N-type metal layer 60, located on the side surface of the substrate layer 10 facing away from the lower confinement layer 11;

[0149] An antireflection film and a high-reflection film, respectively located on two side surfaces of the edge-emitting semiconductor laser corresponding to the first cleavage channel 200.

[0150] In some alternative embodiments, the laser chip 100 is rectangular;

[0151] The first cleavage channel 200 is located in the width direction of the laser chip 100, and the second cleavage channel 300 is located in the length direction of the laser chip 100;

[0152] The length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is 3.5% - 5% of the length of the second cleavage channel 300, which is the length of the laser chip 100.

[0153] In some alternative embodiments, the length of the laser chip 100 is 5500 μm, and the width is 530 μm;

[0154] The length of the first region 310 on both sides of the second cleavage channel 300 corresponding to each laser chip 100 is 200 μm - 250 μm.

[0155] In some alternative embodiments, the material of the substrate layer 10 is GaAs, the material of the lower confinement layer 11 is AlGaAs, the material of the lower waveguide layer 12 is AlGaAs, the active layer 13 is a strained quantum well structure, the material of the upper waveguide layer 14 is AlGaAs, the material of the upper confinement layer 15 is AlGaAs, the material of the P-face contact layer 16 is GaAs; the material of the passivation layer 30 is SiNx The material of the first P-type metal layer 40 is a Ti / Pt / Au composite layer, and the material of the second P-type metal layer 50 is Au.

[0156] In some alternative embodiments, the thickness of the second P-type metal layer 50 is greater than 3 μm.

[0157] In some alternative embodiments, the thickness of the first P-type metal layer 40 is 200 nm to 300 nm, and the thickness of the second P-type metal layer 50 is 3 μm to 4 μm.

[0158] In the description of this specification, the description with reference to terms such as "this embodiment", "one embodiment", "some embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" can explicitly or implicitly include at least one of such features. In the description of the present invention, "a plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0159] In the above description, technical details such as the layout and etching of each layer are not elaborated in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of the required shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not exactly the same as the methods described above. In addition, although the above embodiments are described separately, this does not mean that the measures in each embodiment cannot be used advantageously in combination.

[0160] The above are only the preferred embodiments of the present invention and the technical principles applied. Those skilled in the art will understand that the present invention is not limited to the above specific embodiments, and various obvious changes, re-adjustments, combinations with each other, and substitutions can be made by those skilled in the art without departing from the protection scope of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments only. Without departing from the concept of the present invention, more other equivalent embodiments can also be included, and the protection scope of the present invention is determined by the scope of the appended claims.

Claims

1. A method for preparing an edge-emitting semiconductor laser, characterized in that, Including: Providing a laser wafer, which sequentially includes, from bottom to top: a substrate layer, a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper confinement layer, and a P-side contact layer; Forming a current injection region and a passivation layer on the side of the P-side contact layer facing away from the upper confinement layer; the laser wafer is vertically divided into a plurality of laser chips, and each laser chip includes a current injection region; the plurality of laser chips are separated by a plurality of first cleavage channels and a plurality of second cleavage channels, and the first cleavage channels and the second cleavage channels are perpendicular to each other; Forming a first P-type metal layer on the side surface of the passivation layer and the current injection region of the laser chip, the side surface of the passivation layer of the first cleavage channel, and the side surface of the passivation layer of the first region of the second cleavage channel; the first region is located at both edge portions of the second cleavage channel on the side of each laser chip; the remaining portion of the second cleavage channel outside the first region is the second region; Forming a second P-type metal layer on the side surface of the first P-type metal layer of the laser chip by an electroplating process; the first P-type metal layer in the first region is used to connect the surfaces of a plurality of laser chips; Cleaving the laser wafer into a plurality of bars along the first cleavage channel; Cleaving the bars into a plurality of edge-emitting semiconductor lasers along the second cleavage channel.

2. The method for preparing an edge-emitting semiconductor laser according to claim 1, wherein: The step of forming the first P-type metal layer includes: Forming a first patterned photoresist on the surface of the laser wafer, the first patterned photoresist covering the surface of the second region of the second cleavage channel and exposing the surfaces of the laser chips, the first cleavage channels, and the first regions of the second cleavage channels; Forming the first P-type metal layer on the surface of the laser wafer; Removing the first patterned photoresist and its corresponding first P-type metal layer, and the remaining first P-type metal layer covers the surfaces of the laser chips, the first cleavage channels, and the first regions of the second cleavage channels.

3. The method for preparing an edge-emitting semiconductor laser according to claim 2, wherein: The laser chip is rectangular; The first cleavage channel is located in the width direction of the laser chip, and the second cleavage channel is located in the length direction of the laser chip; The length of the first regions on both sides of the second cleavage channel corresponding to each laser chip is 3.5% - 5% of the length of the second cleavage channel, which is the length of the laser chip.

4. The method for preparing an edge-emitting semiconductor laser according to claim 3, wherein: The length of the laser chip is 5000μm - 5500μm, and the width is 500μm - 530μm; The length of the first regions on both sides of the second cleavage channel corresponding to each laser chip is 200μm - 250μm; The width of the second cleavage channel is 30μm - 50μm.

5. The preparation method of the edge-emitting semiconductor laser according to claim 1, characterized in that The step of forming the second P-type metal layer on one side surface of the first P-type metal layer of the laser chip by electroplating process includes: Form a second patterned photoresist on one side surface of the first P-type metal layer of the first cleavage channel and one side surface of the first P-type metal layer of the second cleavage channel, and the second patterned photoresist exposes one side surface of the first P-type metal layer of the laser chip; Take the first P-type metal layer as the current channel of the electroplating process, and form a second P-type metal layer on one side surface of the first P-type metal layer of the laser chip by electroplating process.

6. The preparation method of the edge-emitting semiconductor laser according to claim 5, characterized in that The material of the second P-type metal layer is Au; the thickness of the second P-type metal layer is greater than 3 μm; The temperature of the electroplating solution in the electroplating process is 60°C to 70°C, and the current density is 0.2 A / m 2 ~0.7 A / m 2 .

7. The preparation method of the edge-emitting semiconductor laser according to claim 1, characterized in that The step of forming a current injection region and a passivation layer on the side of the P-side contact layer facing away from the upper confinement layer includes: Form a plurality of grooves on the side of the P-side contact layer facing away from the upper confinement layer, and the grooves penetrate through the P-side contact layer and part of the upper confinement layer; each laser chip includes two parallel grooves, and the region between the two grooves includes a current injection region; Form a passivation layer on the inner wall of the groove and on the side surface of the P-side contact layer facing away from the upper confinement layer; Remove the passivation layer corresponding to the current injection region.

8. The preparation method of the edge-emitting semiconductor laser according to claim 1, characterized in that Before the step of cleaving the laser wafer into a plurality of bars along the first cleavage channel, it further includes: Perform a thinning process on the substrate layer; Form an N-type metal layer on the side surface of the substrate layer facing away from the lower confinement layer; After the step of cleaving the laser wafer into a plurality of bars along the first cleavage channel, it further includes: Form an antireflection film and a high-reflection film on two side surfaces of the bar corresponding to the first cleavage channel respectively.

9. An edge-emitting semiconductor laser, characterized in that, Including: A substrate layer, a lower confinement layer, a lower waveguide layer, an active layer, an upper waveguide layer, an upper confinement layer, and a P-side contact layer stacked in sequence; A passivation layer, located on the side surface of the P-side contact layer facing away from the upper confinement layer and exposing the P-side contact layer on the surface of the current injection region; the four peripheral edges of the passivation layer in the vertical direction include a first cleavage channel and a second cleavage channel; the first cleavage channel and the second cleavage channel are perpendicular to each other; the region between the first cleavage channel and the second cleavage channel is the laser chip; A first P-type metal layer, located on one side surface of the passivation layer and the current injection region of the laser chip, one side surface of the passivation layer of the first cleavage channel, and one side surface of the passivation layer of the first region of the second cleavage channel; the first region is located on both side edge parts of the second cleavage channel corresponding to each laser chip; the remaining part of the second cleavage channel outside the first region is the second region; A second P-type metal layer, located on one side surface of the first P-type metal layer of the laser chip.

10. The edge-emitting semiconductor laser according to claim 9, wherein the edge-emitting semiconductor laser further comprises: Two grooves, located on the side of the P-face contact layer facing away from the upper confinement layer, the grooves penetrating through the P-face contact layer and part of the upper confinement layer; the current injection region is located between the two grooves; a passivation layer, a first P-type metal layer, and a second P-type metal layer are sequentially stacked on the inner walls of the grooves; An N-type metal layer, located on one side surface of the substrate layer facing away from the lower confinement layer; An antireflection film and a high-reflection film, respectively located on two side surfaces of the edge-emitting semiconductor laser corresponding to the first cleavage channel.

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