Wafer-level uniformity control in remote plasma film deposition

JP7668865B2Active Publication Date: 2025-04-25LAM RES CORP
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Patent Information

Application Number
JP2023213550
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2017-03-03
Filing Date
2023-12-19
Publication Date
2025-04-25
Estimated Expiration
2038-03-02

AI Technical Summary

Technical Problem

Current pedestal configurations in remote plasma processing systems result in non-uniform film deposition and degradation over time, particularly at the wafer edge, due to azimuthal non-uniformity and edge drop effects, which are not addressed by standard PECVD designs.

Method used

A specially designed pedestal assembly with controlled geometry, surface conditions, and material composition near the wafer edge, including a focus ring and pedestal step, to optimize gas flow and material interaction, minimizing radical depletion and film accumulation.

Benefits of technology

Achieves uniform film deposition to less than 1% variation and maintains stable deposition patterns over time, reducing the need for frequent maintenance and improving overall film performance.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To provide an assembly for controlling wafer level uniformity in remote plasma film deposition.SOLUTION: A pedestal assembly used in a processing chamber for depositing a film on a wafer 290 includes a pedestal 140' having a pedestal upper surface extending from a central axis to an outer edge 221. A pedestal upper surface 220 includes a plurality of wafer supports 206 for supporting a wafer. A pedestal step 230 includes a step surface 232 that extends from a step inner diameter toward an outer edge of the pedestal. A focus ring 200 rests on the step surface and includes a mesa 212 that extends from an outer diameter of the focus ring to a mesa inner diameter. A shelf 240 drops down from a mesa surface at the mesa inner diameter and extends between the mesa inner diameter and an inner diameter of the focus ring. The shelf supports at least part of a wafer bottom surface at processing temperature.SELECTED DRAWING: Figure 2B
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Description

[Technical field]

[0001] The present disclosure relates to semiconductor substrate processing methods and equipment tools, and more particularly to a series of engineered pedestal configuration geometries for controlling deposition uniformity. [Background technology]

[0002] In plasma enhanced chemical vapor deposition (PECVD) and plasma enhanced atomic layer deposition (ALD) techniques, improving film uniformity is important. The chamber systems performing PECVD and ALD are associated with hardware features that contribute to non-uniform film deposition. For example, hardware features can be associated with chamber asymmetry and pedestal asymmetry. Furthermore, many processes suffer from azimuthal non-uniformity from various causes. In particular, multi-station modules performing PECVD and ALD feature large open reactors that can contribute to azimuthal non-uniformity and edge drop effects. Also, even single-station modules have non-uniformity due to non-uniform chamber physical geometry, such as due to assembly and component fabrication tolerances. As customers move the die closer to the wafer edge, this azimuthal non-uniformity contributes more numerically to the overall non-uniformity. Despite best efforts to minimize damage and / or non-uniform deposition profiles, traditional PECVD and plasma-enhanced ALD processes still require improvement.

[0003] Remote plasma processes are used to deposit carbide films (e.g., striker carbide) on wafers. The plasma is placed relatively far from the wafer surface. The radicals are then transported into the chamber and react with gases. Once distributed, these gases deposit a unique carbide film on the wafer. Current technology uses a standard pedestal designed for PECVD applications as a tightly capacitively coupled plasma showerhead for remote plasma processes.

[0004] However, standard pedestal configurations do not provide the desired flow profile and / or material conditions near the edge of the wafer for remote plasma processing. Current configurations using PECVD hardware near the wafer result in poor edge deposition profiles. Furthermore, uniformity degrades over time, primarily at the wafer edge, which is the location most sensitive to flow profiles and local conditions, creating the need to maintain stable edge conditions at all times. Specifically, PECVD technology was designed under ideal conditions including direct / in-situ capacitively coupled plasma processing between the showerhead and the pedestal, which results in non-uniformity when applied to remote plasma processes. For example, the design of the wafer ring and pedestal pocket was based on ideal conditions for PECVD production with direct / in-situ capacitively coupled plasma processing between the showerhead and the pedestal. The features and materials chosen reflect the local plasma requirements. These current features were specifically designed with the intent of controlling the effects of in-situ plasma at the wafer edge, such as enhanced deposition, suppression of harmful discharges, and reduced particle formation. While these concerns are not relevant to remote plasma processing (e.g., striker carbide formation does not require local plasma fine-tuning), the geometries and materials created by PECVD will adversely affect wafer performance (e.g., uniformity) for remote plasma processing. In brief, the use of these standard PECVD techniques, including basic reactors using standard PECVD pedestal configurations for remote plasma CVD processes (e.g., to deposit conformal carbide films), results in significant non-uniformities, especially near the outer wafer edges, ranging from 2.5% to 10%. As an example, striker carbide formation will not occur.

[0005] It is in this context that the present disclosure is recalled. Summary of the Invention

[0006] The embodiments of the present disclosure relate to the use of remote plasma CVD (RPCVD) to deposit conformal carbide films (e.g., striker carbide). Wafer uniformity control knobs are disclosed that optimize conformal carbide film performance by reducing non-uniform film deposition and reducing degradation of film performance (including uniformity and other film properties) over time. These non-uniformities are primarily, but not exclusively, due to edge drop effects, where nearby geometries, materials, and material conditions most likely affect film performance on the wafer due to radical depletion, film buildup, misaligned surface conditions, and flow profiles near the wafer edge. Specifically, in embodiments, wafer-level knobs are characterized by locally adjusting wafer-to-wafer geometry, material composition, and surface conditions near the wafer. Control of these factors allows for the elimination of detrimental film growth and maintains consistent flow of gases and radicals (e.g., especially over the edge of the wafer) to promote uniform film growth on the wafer.

[0007] In one embodiment, an assembly is described for use in a processing chamber to deposit a film on a wafer. The assembly includes a pedestal having a pedestal top surface extending from a central axis to an outer edge. The pedestal top surface includes a plurality of wafer supports configured to support a wafer at a wafer support level above the pedestal top surface. The assembly includes a pedestal step of the pedestal. The pedestal step is defined by a step inner diameter and includes a step surface extending from the step inner diameter toward the outer edge of the pedestal. The assembly includes a focus ring configured to rest on the step surface. The focus ring includes a mesa extending from the focus ring outer diameter to a mesa inner diameter. The focus ring includes a shelf depending downwardly from the mesa surface at the mesa inner diameter. The shelf extends between the mesa inner diameter and an inner diameter of the focus ring and is configured to support at least a portion of a bottom wafer surface of the wafer at a processing temperature.

[0008] In another embodiment, another assembly is disclosed for use in a processing chamber to deposit a film on a wafer. The assembly includes a pedestal having a pedestal top surface extending from a central axis to an outer edge. The pedestal top surface includes a plurality of wafer supports configured to support a wafer at a wafer support level above the pedestal top surface. The assembly includes a pedestal step of the pedestal. The pedestal step is defined by a step inner diameter and includes a step surface extending from the step inner diameter toward the outer edge of the pedestal. The pedestal step is defined by a step height extending downwardly from the step top surface. The assembly includes a focus ring configured to rest on the step surface. The focus ring includes a mesa extending from the focus ring outer diameter to a mesa inner diameter. The focus ring includes a shelf depending downwardly from a mesa surface at the mesa inner diameter, the shelf extending between the mesa inner diameter and the focus ring inner diameter. The shelf height relative to the bottom of the ring ranges from 0.143 inches (0.36322 centimeters) to 0.188 inches (0.47752 centimeters).

[0009] In yet another embodiment, an assembly for use in a processing chamber to deposit a film on a wafer is disclosed. The assembly includes a pedestal having an upper pedestal surface extending from a central axis. The upper pedestal surface includes a plurality of wafer supports configured to support a wafer at a wafer support level above the upper pedestal surface. The assembly includes a raised annular lip configured on an outer edge of the upper pedestal surface, the lip configured to inhibit lateral movement of a wafer resting on the pedestal. The raised annular lip includes a mesa surface that is raised above the upper pedestal surface. The raised annular lip and the upper pedestal surface form a pocket configured to receive the wafer. An angled surface is defined on the raised annular lip, the angled surface extending from an inner diameter of the raised annular lip to an outer diameter of the pocket on the upper pedestal surface. Specifically, the inclined surface is inclined at an angle of less than 90 degrees relative to the top surface of the base, and therefore, in one embodiment, the inclined surface may be a straight wall at 90 degrees or may be defined as a sloped transition (e.g., less than 90 degrees).

[0010] Other aspects of the disclosure will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the disclosure. [Brief description of the drawings]

[0011] The disclosure will be best understood by reference to the following description taken in conjunction with the accompanying drawings.

[0012] [Figure 1A] FIG. 1 is a simplified cross-sectional view of a plasma generator system according to one embodiment of the present disclosure.

[0013] [Figure 1B] FIG. 1 is a cross-sectional view of a plasma generator system showing a showerhead having multiple nozzles configured to inject precursors into a chamber according to one embodiment of the present disclosure.

[0014] [Figure 2A] FIG. 1 is a cross-sectional view of a pedestal assembly including a pedestal, where the edge of the pedestal and focus ring have a geometry that promotes improved film deposition uniformity and stability of performance over time, in accordance with one embodiment of the present disclosure.

[0015] [Figure 2B] FIG. 2B is a close-up view of an edge of the pedestal and focus ring of the pedestal assembly of FIG. 2A in accordance with an embodiment of the present disclosure.

[0016] [Figure 2C] FIG. 2B is a close-up view of an edge of the pedestal and focus ring of the pedestal assembly of FIG. 2A, including an extension configured within the focus ring, in accordance with one embodiment of the present disclosure.

[0017] [Figure 2D]FIG. 2B is a close-up view of the pedestal and focus ring edges of the pedestal assembly of FIG. 2A , illustrating suggested geometric dimensions that promote improved film deposition uniformity and performance stability over time, and also illustrating the relative alignment of the focus ring shelf and the top surface of the pedestal, in accordance with one embodiment of the present disclosure.

[0018] [Figure 2D-1] FIG. 2E illustrates key dimensions of the pedestal shown in FIG. 2D at different temperatures, according to one embodiment of the present disclosure.

[0019] [Figure 2E] FIG. 2B is a close-up view of the pedestal and focus ring edges of the pedestal assembly of FIG. 2A , illustrating proposed geometric dimensions that promote improved film deposition uniformity and performance stability over time, with the focus ring shelf approximately at the same level as the top surface of the pedestal, in accordance with one embodiment of the present disclosure.

[0020] [Figure 2F] FIG. 2B is a close-up view of the pedestal and focus ring edges of the pedestal assembly of FIG. 2A showing proposed geometric dimensions that promote improved film deposition uniformity and performance stability over time, with the focus ring shelf at a level above the top surface of the pedestal, in accordance with one embodiment of the present disclosure.

[0021] [Figure 3A] FIG. 1 is a perspective view of a substrate processing system including a lift pad-pedestal configuration, where the lift pad is smaller than the wafer, according to one embodiment of the present disclosure.

[0022] [Figure 3B] FIG. 3B is a cross-sectional view of the substrate processing system of FIG. 3A including a lift pad-pedestal configuration, where the lift pad is smaller than the wafer, according to one embodiment of the present disclosure.

[0023] [Figure 3C]FIG. 13 illustrates a pattern of MCAs on a lift pad-pedestal configuration according to one embodiment of the present disclosure.

[0024] [Figure 4A] FIG. 4 is a view of an outer region of the pedestal of the lift pad-pedestal configuration of FIGS. 3A-3B, including a sloped surface of the raised annular edge of the pedestal, according to one embodiment of the present disclosure.

[0025] [Figure 4B] FIG. 4 is a close-up view of the pedestal edge of the lift pad-pedestal configuration of FIGS. 3A-3B, illustrating the angular range for the sloped surface of the raised annular lip of the pedestal, in accordance with one embodiment of the present disclosure.

[0026] [Figure 4C] 1 is a diagram of the interface between a beveled surface of a raised annular edge of a pedestal and a wafer according to one embodiment of the present disclosure. [Figure 4D] 1 is a diagram of the interface between a beveled surface of a raised annular edge of a pedestal and a wafer according to one embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Although the following detailed description includes many specific details for purposes of illustration, one of ordinary skill in the art will appreciate that many variations and substitutions to the following details are within the scope of the present disclosure. Accordingly, the aspects of the present disclosure described below are presented without any loss of generality to and without imposing limitations on the scope of the claims that follow this description.

[0028] In general, various embodiments of the present disclosure describe a pedestal assembly for use in remote plasma processing that implements a new wafer uniformity control knob that includes a set of custom designed geometries, surface conditions, and material compositions near the wafer edge to further control uniformity to less than 1% and provide a stable deposition pattern over time. Significant benefits of implementing the design (to include using geometry, gas flow, and temperature to control the pedestal surface near the wafer edge) include significant performance improvements of novel films and enhanced performance stability in remote plasma film deposition. These improvements allow the pedestal assembly to be used for longer before scheduled maintenance is performed. Furthermore, these improvements eliminate the need to replace the entire pedestal assembly at each scheduled maintenance interval.

[0029] Given the above general understanding of various embodiments, detailed examples of the embodiments will now be described with reference to various drawing figures.

[0030] Figure 1A is a simplified cross-sectional view of a plasma generator system 100 in accordance with an exemplary embodiment of the present invention. Although Figure 1A illustrates one embodiment of a plasma generator system 100 including certain components, it is understood that additional components, or components of different shapes than those illustrated in Figure 1A, may be substituted.

[0031] The plasma generator system 100 is configured to generate a plasma that may be used to deposit or remove material from a substrate 290 (sometimes referred to as a "wafer" throughout this document). For example, the plasma generator system 100 may be used in conjunction with systems or components used in various plasma processing techniques, such as remote plasma processing, plasma enhanced chemical vapor deposition, plasma etching, plasma stripping or ashing, sputtering, plasma spraying, and the like. Thus, the substrate 290 may be a substrate that undergoes one or more of the above processes. For example, the substrate 290, in one embodiment, may be made of relatively pure silicon, germanium, gallium arsenide, or other semiconductor materials commonly used in the semiconductor industry, or may be a silicon substrate mixed with one or more additional elements, such as germanium or carbon. In another embodiment, the substrate 290 may be a semiconductor substrate that has layers deposited thereon during a conventional semiconductor fabrication process. In yet another embodiment, the substrate 290 may be a component, such as a sheet of glass, ceramic, or metal, that may undergo plasma processing.

[0032] The plasma generator system 100 may be a separate remote device or an in-situ module integrated into a processing system. The plasma generator system 100 shown in FIG. 1A is an example of a remote device. According to an exemplary embodiment of the present invention, the plasma generator system 100 includes a vessel 104, a coil 108, an energy source 110, a gas flow distribution reservoir 106, and a showerhead 112. An in-situ module may not be configured the same as the embodiment shown in FIG. 1A, but may include similar components.

[0033] The vessel 104 is configured to receive a process gas that can be ionized and converted into a plasma by an electric field, the plasma containing species such as electrons, ions, and reactive radicals for depositing material on or removing material from the substrate 290. In an exemplary embodiment, the vessel 104 is made of a material capable of enhancing an electric field. For example, the vessel 104 may be made of a dielectric material, including but not limited to quartz, aluminum / sapphire, and ceramic. To contain the plasma therein, the vessel 104 has a sidewall 116 that defines a plasma chamber 118. The sidewall 116 has any thickness suitable for containing the plasma within the vessel 104 and that does not interfere with the electric field generated by the coil 108.

[0034] The sidewall 116, and thus the plasma chamber 118, is shaped to allow the plasma to be directed toward the substrate 290. In an exemplary embodiment, the sidewall 116 has a shape that varies along its axial length, as shown in Figure 1A. For example, the sidewall 116 may include a neck portion 120 extending from an inlet end 122 of the plasma containing portion 124 and a tube portion 126 extending from an outlet end 128 of the plasma containing portion 124.

[0035] In either case, the plasma containing portion 124 includes an inlet 148 to the plasma chamber 118. According to a preferred embodiment, the plasma containing portion 124 may be conical and may have an outlet end diameter (indicated by dashed line 115) that is larger than the inlet end diameter (indicated by dashed line 117). In an exemplary embodiment, the outlet end diameter 115 is also larger than the diameter 113 of the neck portion 120.

[0036] According to another exemplary embodiment of the present invention, the tube portion 126 has a substantially uniform diameter (indicated by dashed line 119) that is substantially equal (e.g., ±0.5 mm) to the exit end diameter 115 of the plasma containing portion 124. In another exemplary embodiment, the diameter 119 of the tube portion 126 is larger than the exit end diameter 115 of the plasma containing portion 124. The tube portion 126 includes an exit 138 from the plasma chamber 118, the diameter of which (indicated by dashed line 121) may be at least as large as the diameter of the substrate 290.

[0037] According to an exemplary embodiment of the present invention, the neck portion 120, the plasma containing portion 124, and the tube portion 126 have axial lengths that are significantly different from one another. In an exemplary embodiment, the neck portion 120 has an axial length that is sufficient to stabilize the gas flow distribution reservoir 104 within the vessel 106, but not so long as to obstruct gas flow into the plasma chamber 118, as described below. In such a case, the axial length of the neck portion 120 is less than the axial length of the plasma containing portion 124, and less than the axial length of the tube portion 126.

[0038] The coil 108 surrounds at least a portion of the vessel 104 to provide an electric field across the plasma chamber 118. In one exemplary embodiment, the coil 108 is a single piece made of a conductive material, such as copper. According to another exemplary embodiment, the coil 108 has a first end 136 and a second end 137 between which at least two turns 141, 142 are formed around the vessel 104. The first end 136 is electrically coupled to the energy source 110. The first turn 141 extends from the first end 136 and completes a turn around the vessel 104. The second turn 142 is integral with the first turn 141, completes a turn around the vessel 104, and terminates at the second end 137. The second end 137 is electronically coupled to a capacitor 158 and an electrical ground 159.

[0039] The specific location of the first turn 141 relative to the second turn 142 may depend on the desired location of the donut-shaped zone or "plasma zone" 176 within the vessel 104 where the maximum plasma density exists. In particular, the plasma zone 176 is typically formed in the portion of the plasma chamber 118 closest to the first turn 141 because the first turn 141 disperses more energy from the energy source 110 into the process gas than any other portion of the coil 108. As a result, the current received by the first turn 141 produces a higher voltage than any other portion of the coil 108. Thus, if the desired location of the plasma zone 176 is located at a particular axial distance from the substrate 290, the first turn 141 is positioned accordingly along the axial length of the vessel 104. According to one exemplary embodiment, at least two turns 141, 142 are included. In particular, the first turn 141 ensures that at least two closed loops are formed, thereby generating a more stable plasma within the plasma chamber 118, and the inclusion of the second turn 142 increases the uniformity of the plasma within the plasma chamber 118. In other embodiments, additional turns may be included, but this is not necessary as the generation or quality of the plasma within the plasma zone 176 is not adversely affected or significantly improved by the inclusion of the additional turns.

[0040] To form the plasma zone 176, the energy source 110 is electrically coupled directly to the first end 136 of the coil 108 to form a circuit. The energy source 110 may be a radio frequency (RF) voltage source or other energy source capable of energizing the coil 108 to form an electric field. In an exemplary embodiment, the energy source 110 includes an RF generator 152 selected to operate at a desired frequency to provide a signal to the coil 108. For example, the RF generator 152 may be selected to operate within a frequency range of about 0.2 MHz to about 20.0 MHz. In an exemplary embodiment, the RF generator 152 may operate at 13.56 MHz. In an exemplary embodiment, the energy source 110 may include a matching network 154 disposed between the RF generator 152 and the coil 108. The matching network 154 may be an impedance matching network configured to match the impedance of the RF generator 152 to the impedance of the coil 108. In this regard, it will be appreciated that matching network 154 may be made up of a combination of components such as a phase angle detector and a control motor, however, in other embodiments, other components may also be included.

[0041] In another exemplary embodiment of the circuit 200, the capacitor 158 is included to limit the voltage flow through the coil 108. In this regard, the capacitor 158 is selected to have a capacitance that limits the peak-to-peak voltage flow through the coil 108 to a threshold voltage. According to an exemplary embodiment of the present invention, the threshold voltage may depend on the impedance values ​​of the coil 108 and the RF generator 152. According to another exemplary embodiment of the present invention, the capacitor 158 is selected for its ability to enhance the impedance matching function of the matching network 154, which matches the impedance of the RF generator 152 to the impedance of the coil 108. In either case, the capacitor 158 is electrically coupled to the second end 137 of the coil 108 between the coil 108 and an electrical ground 159.

[0042] To maximize the operability of the system, the coil 108 is positioned at an optimal location around the vessel 104 that minimizes the volume in the plasma chamber 118 occupied by the plasma zone 176 and maximizes the density of the plasma in the plasma zone 176. Additionally, each turn 141, 142 is positioned at an appropriate and substantially uniform distance from the vessel 104 surface such that the plasma zone 176 is formed in the plasma chamber 118 adjacent the vessel 104 inner surface 163. In this manner, the vessel inner surface 163 will direct reactive radicals toward the chamber outlet 138 during processing. For example, in one exemplary embodiment, the coil 108 may be in the range of 10 mm to 30 mm from the vessel.

[0043] The process gas may be dispersed prior to injection into the plasma chamber 118 to distribute the gas substantially uniformly to the plasma zone 176. In this regard, in one exemplary embodiment, the gas flow distribution reservoir 106 is disposed within the plasma chamber inlet 148 and has any of a number of shapes depending on the location of the plasma zone 176 within the vessel 104. According to one exemplary embodiment, the gas flow distribution reservoir 106 includes a cup member 150 and is made of a non-conductive material that is resistant to corrosion when exposed to the process gas. Suitable materials include, for example, a dielectric material such as quartz.

[0044] The cup member 150 may include a cylindrical portion 156 and a rounded portion 160. The cylindrical portion 156 may define a portion of a receiving cavity 164 having an open end 161. A gas injection opening 182 is included in the rounded portion 160 and adapted to provide flow communication between the receiving cavity 164 and the plasma chamber 118. To control the manner in which process gas is injected into the plasma chamber 118, the gas injection opening 182 may be shaped and positioned to allow process gas to flow along a predetermined gas injection path. The gas injection path generally allows gas to flow axially from a first location in the receiving cavity 164, through the opening 182, to a second location substantially adjacent to or above the plasma zone 176 (e.g., within ±0.5 mm).

[0045] The number of apertures 182, the size of the apertures 182, and the orientation of the apertures 182 relative to the outer surface 169 of the reservoir 106 may further be selected to control the manner in which the gas is injected. For example, 30 to 40 apertures 182 may be included to distribute the process gas substantially evenly within the plasma chamber 118. In one specific example, 24 apertures 182 may be included. In other embodiments, more or fewer apertures 182 may be included. In one exemplary embodiment, the apertures 182 are symmetrically disposed about the longitudinal axis 171 and are substantially equally spaced around the circumference of the rounded portion 160 to form a ring. In another exemplary embodiment, the apertures 182 are not evenly spaced around the circumference of the rounded portion 160. For example, two or more apertures may be formed near each other in pairs, with each pair being equally spaced along the longitudinal axis 171. In either case, the openings 182 are spaced so that the process bath can be injected substantially evenly into the plasma chamber 118 .

[0046] When the energy source 110 energizes the coil 108, an electric field is formed in a selected portion of the plasma chamber 118 to ionize the process gas, and the process gas may flow through the electric field to form an ionized gas. As used herein, "ionized gas" includes, but is not limited to, ions, electrons, neutral species, excited species, reactive radicals, dissociated radicals, and any other species that may be generated when the process gas flows through an electric field. To control the distribution of the ionized gas across the workpiece 290, the showerhead 112 may be disposed at the plasma chamber outlet 138. In an exemplary embodiment, the showerhead 112 includes a plate 184. The plate 184 may be made of any suitable material that is relatively inert to the plasma, such as aluminum or ceramic. In general, the plate 184 is sized to enable the distribution of the gas across the substrate 290, and therefore has a correspondingly suitable diameter.

[0047] The plate 184 is relatively porous to allow gas to pass therethrough. Specifically, the plate 184 includes through-holes 186 that are appropriately sized and spaced to distribute the ionized gas substantially uniformly over the workpiece 290. Additionally, the through-holes 186 are provided in a substantially uniform pattern on the showerhead 112 in one exemplary embodiment, although in another exemplary embodiment the through-holes 186 are provided in a non-uniform pattern.

[0048] 1A . For example, the showerhead 112 may include a sidewall 188 that extends axially from the plate 184 and is coupled to the vessel 104 through bolts, fasteners, adhesive, or other fastening mechanisms. In another embodiment, the showerhead 112 may be integral with the vessel 104. The sidewall 188 may be used to provide additional distance between the plasma zone 176 and the substrate 290 and may therefore be configured accordingly.

[0049] FIG. 1B is a simplified cross-sectional view of a plasma generator system 100B configured for a remote plasma deposition process according to an embodiment of the present disclosure. The plasma generator system 100B is similar in configuration to the plasma generator system 100 of FIG. 1A, and similar components are represented by similar reference numerals. For example, the plasma generator system 100B includes a vessel 104, a coil 108, an energy source 110, a gas flow distribution reservoir 106, and a showerhead 112′. The plasma generator system 100B shows a close-up view of the showerhead 112′. In particular, the showerhead 112′ of the plasma generator system 100B may be configured in a plasma chamber 118 such that remote plasma deposition can be performed in the chamber when the pedestal 140 is moved into position within the plasma chamber 118. Both the plasma generator systems 100A and 110B may be used for PECVD processes, ALD processes, or remote ALD processes.

[0050] For example, the plasma generator system 100B may deposit one or more films to perform an ALD process, also known as atomic layer chemical vapor deposition (ALCVD). ALD produces very thin films that are highly conformal, smooth, and exhibit excellent physical properties. ALD uses volatile gases, solids, or vapors that are sequentially introduced (pulsed) onto a heated substrate. In one ALD cycle, a film is formed by alternating self-limiting chemical surface reactions that result in the formation of a thin conformal film, and four operations are performed that can be defined as an APBP sequence. In stage A, a first precursor is introduced as a gas, which is absorbed (i.e., adsorbed) into the substrate. Immediately following stage A, in stage P, the reactor chamber is purged of the gaseous precursor. In stage B, a second precursor is introduced as a gas, which reacts with the adsorbed precursor to form a monolayer of the desired material. Immediately following stage B, in stage P, the reactor chamber is again purged of the gaseous second precursor. By controlling this APBP sequence, films produced by ALD are deposited a monolayer at a time by repeatedly switching between flowing two or more reactive gases over a substrate, and the thickness of the film may thus be controlled depending on the number of cycles of the APBP sequence performed.

[0051] Furthermore, the plasma generator system 100B may perform a remote plasma-enhanced ALD deposition process, where the second precursor includes radicals formed through plasma generation in the APBP sequence described above. Specifically, the plasma does not directly contact the substrate 290. In other words, the substrate 290 is placed far away from the plasma source (e.g., the plasma-containing portion 124 near the turns 141-142). The plasma flowing into the chamber 118 produces radicals and energetic ions, which act as the second non-metallic precursor. Because the radicals react with the precursors very quickly, plasma-enhanced, i.e., plasma-assisted, ALD allows deposition at significantly lower temperatures and typically with better film properties. Also, because the plasma is far away from the substrate 290, bombardment of the substrate 290 with energetic ions and electrons is minimized or eliminated, thus preventing damage and contamination of the substrate surface through dissociation of by-products (e.g., formed through decomposition of the precursors) or adsorbed precursors.

[0052] The showerhead 112' includes a number of nozzles 191 configured to inject a first precursor into the chamber 118. A layer of the first precursor is adsorbed onto a wafer 290 that rests on a pedestal 140 located within the confines of the chamber 118. After the first precursor is purged from the chamber 118, radicals formed from the plasma drop through the through-holes 195 and migrate onto the wafer 290.

[0053] FIG. 2A is a cross-sectional view of a pedestal assembly 280 including pedestal 140, in accordance with one embodiment of the present disclosure, where the edges of the pedestal and focus ring 200 have geometries that promote uniform film deposition and stability of deposition performance over multiple process cycles, particularly when performing remote plasma processing. Specifically, the pedestal assembly 280 is shown as having a series of specifically designed geometries to promote uniform film deposition over a wafer 290, including the wafer edge. An embodiment of the present invention controls the surface condition of the pedestal assembly 280 near the edge of the wafer during processing through specific geometries to minimize the formation of contaminants due to flows / materials in the affected areas. For example, the novel configuration of the pedestal assembly 280 minimizes the interaction of flows / materials with the bottom of the wafer by suppressing the movement of flows / materials at the near edge of the focus ring 200. In this manner, the surface conditions of the pedestal assembly 280 near the edge of the wafer 290 are optimized for flow / material interactions, which promotes stable pedestal assembly 280 surface conditions over multiple deposition process cycles. In this manner, the time between required maintenance on the plasma chamber may be increased because the performance characteristics of the plasma chamber are maintained for a longer period of time due to reduced deposition degradation.

[0054] Specifically, FIG 2A illustrates a cross-sectional view of pedestal 140, with an expanded outer region 270 of pedestal assembly 280. As shown, wafer 290 rests on pedestal 140, extending to near what is referred to as outer edge 221, FIG 2B, of pedestal 140. Focus ring 200 sits within outer region 270, and more specifically, sits on pedestal step 230 near outer region 145 of pedestal 140. As will be further described in connection with FIG 2C, extension 203 in focus ring 200 prevents movement of focus ring 200 during processing.

[0055] FIGURE 2B illustrates further details of outer region 270 of pedestal 140' and focus ring 200 of pedestal assembly 280 of FIGURE 2A, in accordance with one embodiment of the present disclosure. In particular, FIGURE 2B illustrates the geometry of pedestal 140' and focus ring 200 that promotes uniform film deposition during remote plasma processing, where pedestal 140' is configured to cooperatively mate with focus ring 200 during remote plasma processing, and the optimized geometry provides stable deposition performance over multiple process cycles during remote plasma processing.

[0056] The pedestal assembly 280 includes a pedestal 140' having a pedestal top surface 220. As shown, the pedestal top surface 220 and the pedestal 140' extend from a central axis 311 of the pedestal 140' to an outer edge 221 of the pedestal. Although not shown in FIGS. 2A-2F, a lift pin assembly may be configured within the pedestal assembly 280 to support a wafer protruding from the pedestal 140' (e.g., as the pedestal 140' rises relative to the fixed lift pins) when the wafer is introduced into and removed from the plasma chamber 118. Specifically, the lift pin assembly includes a plurality of lift pins extending through a plurality of pedestal shafts configured within the pedestal 140'.

[0057] The pedestal top surface 220 also includes a plurality of wafer supports 206 configured to support a wafer 290 at a wafer support level 208 above the pedestal top surface. The wafer supports 206 each seat in a hole 205 drilled in the top surface 220. Each wafer support 206 may further rest on a flexible spacer 207 seated at the bottom of the hole 205. The flexible spacer 207 is configured to prevent the wafer support 206 (e.g., made of sapphire) from cracking when the wafer 290 is placed on the wafer support 206 and / or for height adjustment. In one embodiment, the configuration of the wafer support 206 within the pedestal 140' is important to optimize the performance of the pedestal assembly 280 when implemented for remote plasma processing, such as improved film deposition uniformity and improved deposition performance stability. The placement of the wafer support 206 within the hole 205 is configured to minimize the distance of the wafer support level 208 (dimension "D1", which ranges from approximately 5 mils to 15 mils).

[0058] The pedestal 140' includes a pedestal step 230 defined by a step rise 231 and a step surface 232. The step rise 231 is located at a step inner diameter 233 of the pedestal 140' and rises from the step surface 232 at the step inner diameter 233. And, the step surface 232 flares from the step inner diameter 233 towards the outer edge 221 of the pedestal. In the cross section of the pedestal 140' shown in FIG. 2B, the engagement location 213 is configured at the outer edge 221 such that the step surface 232 stops at the engagement location 213. In other cross sections of the pedestal 140', the step surface 232 flares all the way to the outer edge 221 of the pedestal 140', such as the right side of the pedestal assembly 280 shown in FIG. 2A.

[0059] Pedestal assembly 280 includes focus ring 200 configured to rest on stepped surface 232. As shown, bottom surface 202 of focus ring 200 rests on stepped surface 232. In particular, focus ring 200 includes inner diameter 241 and outer diameter 247, such that focus ring 200 may form an annular ring having a thickness between inner diameter 241 and outer diameter 247. Focus ring 200 also includes mesa 212 that extends from outer diameter 247 to mesa inner diameter 211. Mesa 212 includes mesa surface 210.

[0060] Focus ring 200 includes a shelf 240 configured to step down from mesa surface 210 at mesa inner diameter 211. The shelf spans between mesa inner diameter 211 and focus ring inner diameter 241. As will be described in more detail below, shelf 240 is configured to support at least a portion of bottom wafer surface 291 of wafer 290 at processing temperatures. In other words, shelf 240 is configured to support at least a portion of bottom wafer surface 291 of wafer 290 during processing. Wafer 290 may form a corrugated shape at an outer edge of wafer 290 such that edge 292 assumes a thin potato chip-like shape. As such, one or more contact points and / or areas of edge 292 contact shelf 240.

[0061] The reduced spacing between edge 292 of wafer 290 and bottom surface 291 of wafer 290 prevents flow / material (e.g., precursors and / or radicals) from forming and / or occupying the area near the junction where wafer 290, ring shelf 240, and pedestal step 230 meet. In essence, focus ring substantially touches bottom surface 291 of wafer 290 during processing. In this manner, the reduced spacing prevents lingering precursors and / or radicals present within the described spacing from being deposited on focus ring 200 near shelf 240 and / or on pedestal 140′ near step 230, thus limiting the deposition of precursor and / or radical contaminants. Thus, contamination of wafer top surface 291 that leads to non-uniformity of wafer deposition near edge 292 of the wafer is also reduced. In conventional pedestal assemblies, focus ring 200 does not touch wafer 290 during processing, and therefore deposition of precursors and radicals occurs on focus ring 200 and on outer region 145 of the pedestal near the junction where wafer 290, ring ledge 240, and pedestal step 230 meet, which can lead to contamination of focus ring and pedestal 140′, resulting in poor performance stability over multiple deposition cycles and non-uniformity of film deposition.

[0062] 2C is a close-up view of outer region 270 of pedestal 140' of pedestal assembly 280 of FIG. 2A, which includes one or more extensions 203 configured to prevent movement of focus ring 200 during processing, in accordance with one embodiment of the present disclosure. In particular, focus ring 200 includes a plurality of extensions 203 configured to secure focus ring 200 to pedestal 140. Extensions 203 are configured to prevent focus ring 200 from shifting during processing. Extensions 203 are configured to seat in engagement positions 213 as shown in FIG. 2B.

[0063] Also shown is focus ring support configuration 245. In summary, pedestal 140' includes one or more focus ring support configurations 245 appropriately distributed to evenly support the focus ring above step 230 of pedestal 140'. Focus ring support configurations 245 may be adjusted, for example, to achieve a desired height 204 of mesa surface 210 above pedestal top surface 220. Focus ring support configurations 245 may also be adjusted to achieve a desired separation between bottom surface 202 of focus ring 200 and step surface 232 of pedestal 140'.

[0064] FIGURE 2D is an enlarged view of outer region 270 of pedestal assembly 280 of FIGURE 2A, illustrating key dimensions for a geometry that promotes improved film deposition uniformity and performance stability over time, in accordance with one embodiment of the present disclosure, and illustrates the relative positioning of shelf 240 of focus ring 200 and upper surface 220 of pedestal 140'.

[0065] In one embodiment, the geometric features of the standard pedestal bulk material, be it aluminum or ceramic (aluminum oxide), are designed to define the flow profile and accumulation zone relative to the wafer edge 292 (e.g., near the outer region 270 of the pedestal assembly 280). Specifically, these geometries are selected to offset and minimize the effects of nearby materials (e.g., precursors, radicals, contaminants, etc.) that, while not eliminating, may by their very nature affect the depletion of radicals. Altering the geometry includes adjusting the wafer height into the pocket, mesa height, wall slope angle, wall distance to the wafer edge, and mesa (inner and outer) diameter. Also, in another embodiment, sealing and contacting the wafer edge (e.g., with the pedestal 140' or focus ring 200) is achieved in combination with side and / or backside gas purges to further help maintain a stable flow profile, depletion and accumulation, and / or surface conditions at the wafer edge 292. For example, in an embodiment, the dimensions shown in the figures are suggested to be smaller than those shown in the figures.

[0066] 2D illustrates basic dimensions of pedestal 140'. For example, outer edge 221 of pedestal 140' is shown as having a diameter of approximately 13.81 inches (35.0774 centimeters), which is larger than the diameter of wafer 290. Pedestal shelf 230, configured to support focus ring 200, is also defined as having an inner diameter 233 (dimension "D3" which is approximately 11.375 inches (28.8925 centimeters)). Shelf 230 extends from inner diameter 233 to outer edge 221. Height 222 of step 230 of pedestal 140' (dimension "D10" which is approximately 0.155 inches (0.3937 centimeters)) is also illustrated.

[0067] FIG. 2D also shows an exemplary MCA 206 disposed within the pedestal 140′. In one embodiment, the placement of one or more MCAs 206 patterned within the pedestal 140′ is specifically designed to introduce bowing of the wafer 290 such that the wafer edge 292 is lower than the center of the wafer 290 during processing. The center of the wafer 290 may be located approximately at the central axis 311. Bowing may occur even at room temperature. For example, the wafer 290 may assume a slightly domed shape with the center of the wafer higher than at least a portion of the wafer edge 292. The placement of the MCA 206 may be closer to the center of the wafer to introduce bowing. In the opposite configuration, the MCA may be appropriately sized as needed to form a bowl shape with the wafer edge and focus ring step contacting above the top surface of the MCA.

[0068] Also shown are reference dimensions for focus ring 200. For example, focus ring 200 has inner diameter 241 (dimension "D4" which is approximately 11.53 inches (29.2862 centimeters)) and outer diameter 247 (dimension "D2" which is approximately 13.91 inches (35.3314 centimeters)). Focus ring 200 includes mesa 212, which is defined by mesa inner diameter 211 (dimension "D3" which is approximately 11.87 inches (30.1498 centimeters)). Shelf 240 is defined within focus ring 200 between inner diameter 211 of mesa 212 and inner diameter 241 of focus ring 200 (approximately 11.53 inches (29.2862 centimeters)).

[0069] In one embodiment, the relative positioning of shelf 240 of focus ring 200 and top surface 220 of pedestal 140' is adjusted to promote sealing, such as promoting contact of wafer edge 292 with pedestal 140' and / or focus ring 200. For example, the distance of shelf bottom 248 from bottom ring surface 202 is adjusted so that the shelf bottom can be positioned at a level below top surface 220 of pedestal 140', at the same level as top surface 220 of pedestal 140', or at a level above top surface 220 of pedestal 140'. For example, a distance 242 (dimension "D5" approximately ranging from 0.148 inches (0.37592 centimeters) to 0.188 inches (0.47752 centimeters)) of bottom surface 248 of shelf 240 from bottom surface 202 of focus ring 200 is shown. In another embodiment, the height of riser 246 may be adjusted to achieve the same effect. 2D , distance 242 is less than the height of rise 231 of pedestal step 230, and thus shelf bottom 248 sits below upper surface 220 of pedestal 140′. For example, the height of rise 246 is shown (dimension “D6” which is greater than 0.033 inches (0.08382 centimeters)), or stated another way, the difference between height 204 of focus ring 200 (from ring bottom surface 202 to mesa surface 210) and the distance from ring bottom surface 202 to shelf bottom 248. Adjustment of shelf 240 is reflected in distance 243 between shelf bottom 248 and upper surface 220 of pedestal 140′ (dimension “D7” which ranges from 0 inches to 0.012 inches (0.03048 centimeters)) when shelf bottom surface 248 sits below upper surface 220.

[0070] FIG. 2D-1 illustrates reference dimensions of pedestal 140' shown in FIG. 2D at a temperature (e.g., 400 degrees Celsius) in one embodiment. For example, outer edge 221 diameter of pedestal 140' is illustrated (dimension "D8" is approximately 13.873 inches (35.23742 centimeters)), which has a diameter larger than the diameter of wafer 290. Pedestal shelf 230 configured to support focus ring 200 is also defined as having inner diameter 233 (dimension "D9" is approximately 11.427 inches (29.02458 centimeters)). Shelf 230 extends from inner diameter 233 to outer edge 221. Height 222 of step 230 of pedestal 140' is also illustrated (dimension "D10" is approximately 0.156 inches (0.39624 centimeters)). Other dimensions are also shown (e.g., "D2'" which is approximately 13.91 inches (35.3314 centimeters), "D6a" which is approximately greater than 0.033 inches (0.08382 centimeters), "D7'" which is approximately 0.012 inches (0.03048 centimeters), "D10'" which is approximately 0.156 inches (0.39624 centimeters), "D12'" which is approximately 0.062 inches (0.15748 centimeters), "D3'" which is approximately 11.89 inches (30.2006 centimeters), and "D4'" which is approximately 11.55 inches (29.337 centimeters)).

[0071] In other embodiments, the bottom surface 248 of the shelf 240 may be disposed at or above the top surface 220 of the pedestal 140'. For example, FIG. 2E shows the outer region 270 of the pedestal assembly 280 shown in FIG. 2A, where the rise height 246' (dimension "D6b", which is approximately 0.033 inches (0.08382 centimeters)) is defined such that the bottom surface 248 is approximately at the level of the top surface 220 of the pedestal 140'. In essence, the distance 242 is approximately equal to the height of the rise 231 of the pedestal step 230. FIG. 2F also illustrates the outer region 270 of the pedestal assembly 280 illustrated in FIG. 2A, where the rise height 246″ (dimension “D6c”, which ranges from approximately 0.0 inches to 0.033 inches (approximately 0.08382 centimeters)) is defined such that the bottom surface 248 is positioned higher than the top surface 220 of the pedestal 140′. In essence, the distance 242 is greater than the height of the rise 231 of the pedestal step 230.

[0072] The gap 244 (dimension "D11", which is 0.033 inches (0.08382 centimeters)) between mesa surface 210 and upper surface 220 of pedestal 140' is shown. In an embodiment, height 204 of focus ring 200 is lowered (e.g., to less than D11) to facilitate sealing of wafer edge 292, such as to facilitate contact with pedestal 140' and / or focus ring 200.

[0073] In one embodiment, spacing 239 between focus ring 200 and pedestal riser 231 is adjusted to facilitate sealing of wafer edge 292, such as to facilitate contact with pedestal 140′ and / or focus ring 200. Specifically, spacing 239 (dimension “D12”, which is approximately 0.078 inches (0.19812 centimeters)) is defined as the distance between inner diameter 241 of focus ring 200 and inner diameter 233 of pedestal step 230.

[0074] In another embodiment, mesa inner diameter 211 is adjusted to facilitate sealing of wafer edge 292, such as to facilitate contact with pedestal 140′ and / or focus ring 200. Although inner diameter 211 is shown (dimension “D3” being approximately 11.87 inches (30.1498 centimeters)), it may be made smaller to reduce the spacing between rise 246 and edge 292 of wafer 290 during processing.

[0075] In yet another embodiment, a treatment is applied to components of pedestal 140′ and / or focus ring 200 in an outer region 270 of pedestal assembly 280 to promote sealing of wafer edge 292, such as promoting contact with pedestal 140′ and / or focus ring 200. The treatment promotes stable flow profiles and surface conditions over multiple deposition cycles while also reducing depletion and buildup near wafer edge 292. In one embodiment, O3 passivation is performed in this outer region 270. In other embodiments, an ALD coating is overlaid in this outer region 270. For example, the coating may be yttria, ALN, ALO, or other suitable metals. x , ALON, SiC, and glass.

[0076] In yet another embodiment, region 145 of pedestal 140' includes an alternative material. For example, region 145 may include yttria, ALN, ALO, or the like. x Region 145 may include materials such as ALN, ALON, SiC, and glass. Region 145 has an optimized geometry and alternative materials (such as ALN, ALO) that are less conducive to radical recombination and film growth that are suspected to contribute to uniformity degradation over time. xA pedestal ring may be formed with a pedestal material such as a SiO2, ALON, SiC, or glass. In theory, as deposition occurs on the wafer, adjacent areas will experience similar film growth. Unlike the wafer, which is removed, films on other surfaces (e.g., pedestal 140' and focus ring 200 in outer region 270) are then subjected to cleaning processes and other gases during idle. These alternative materials reduce the effects of recombination and film growth by adjusting or influencing the rates at which films grow, change, and recombine with radicals.

[0077] In yet another embodiment, focus ring 200 may comprise a consumable material (e.g., quartz or aluminum). Focus ring 200 may be replaced during scheduled maintenance intervals to mitigate localized film growth near the wafer edge. The replaceable material of focus ring 200 allows for decoupling of the effects of film deposition and trends from cleaning process steps by introducing fresh material during PM intervals. Decoupling may also be achieved by having focus ring 200 of a material that is close in composition and temperature to either wafer 290 (e.g., quartz) or pedestal 140′ (aluminum).

[0078] FIG. 3A is a perspective view of a lift pad-pedestal arrangement 300 of a substrate processing system configured to perform remote plasma processing, in which the lift pad 390 is smaller than the wafer 290 disposed thereon, according to one embodiment of the present disclosure. The geometric features of the standard pedestal bulk material, be it aluminum or ceramic (aluminum oxide), are designed to define the flow profile and accumulation zone relative to the wafer edge 292 (e.g., near the annular lip 320 of the pedestal 140″). Specifically, these geometries are selected to offset and minimize the effects of nearby materials (e.g., precursors, radicals, contaminants, etc.) that, while not eliminating, by their very nature affect the depletion of radicals. Altering the geometry includes adjusting the wafer height into the pocket, the mesa height of the annular lip 320, the slope angle of the walls, the distance of the walls to the wafer edge, and the mesa (inner and outer) diameter. Also, in another embodiment, sealing and contact of the wafer edge (e.g., with the pedestal 140″) is achieved in combination with side and / or backside gas purges to further help maintain a stable flow profile, depletion and accumulation, and / or surface conditions at the wafer edge 292.

[0079] A pedestal-lift pad actuator 305 controls the movement of the central shaft 310'. The pedestal 140" is coupled to the central shaft 310' such that movement of the central shaft 310' is transferred to the pedestal 140". The pedestal-lift pad actuator 305 also controls the movement of the pad shaft 330. The lift pads 390 are coupled to the pad shaft 330 such that movement of the pad shaft 330 is transferred to the lift pads 390.

[0080] The pedestal 140" of the lift pad-pedestal configuration 300 includes a pedestal upper surface 325 extending from a central axis 311 of the pedestal 140". A plurality of wafer supports 206 (e.g., MCAs) are disposed on the upper surface 325. For example, FIG. 3C illustrates an example pattern of MCAs 206 on the pedestal 140", according to one embodiment. Additionally, an outer region of the pedestal upper surface 325 includes a raised edge 320 configured to inhibit lateral movement of a wafer 290 placed on the pedestal 140".

[0081] FIG. 3B is a cross-sectional view of the lift pad-pedestal configuration 300 of FIG. 3A, where the lift pad 390 is smaller than the wafer 390 disposed thereon, in accordance with one embodiment of the present disclosure. For illustrative purposes only, the pedestal 140″ and lift pad 630 are shown in positions and / or levels that permit wafer processing.

[0082] The pedestal 140″ includes a pedestal upper surface 325 extending from a central axis 311 of the pedestal 140″. The pedestal upper surface 325 is configured to support a wafer when placed thereon. The upper surface 325 may include one or more recesses to provide an interface between the pedestal 140″ and the lift pad 390, such as a recess 340 configured to facilitate coupling between the pad shaft 330 and the lift pad 390. For example, the pedestal 140″ includes a recess 340 centered on the pedestal upper surface 325 and extending from the central axis 311 to a recess diameter 391. In essence, the recess 340 is located above a central portion of the pedestal upper surface 325. The upper surface 325 may also form a pocket 350 defined by the raised annular lip 320. Although the pedestal 140" may be described as having a generally circular shape when viewed from above, the footprint of the pedestal 140" may vary from a circle to accommodate different features such as carrier ring support, focus ring, and end effector access.

[0083] As shown in the figure, the base 140" is connected to an actuator 305 configured to control the movement of the base 140". Specifically, a central shaft 310' is coupled to the actuator 305 and the base 140" such that the central shaft 310' extends between the actuator 305 and the base 140". The central shaft 310' is configured to move the base 140" along a central axis 311. Thus, movement of the actuator 305 translates into movement of the central shaft 310' which in turn translates into movement of the base 140".

[0084] In one embodiment, the pedestal upper surface 325 includes a plurality of wafer supports 206 (e.g., shown in FIG. 3A ) defined thereon that are configured to support a wafer 290 at a wafer support level above the pedestal upper surface 325. The wafer supports provide a uniform and small gap between the pedestal 140″ and any wafer 290 disposed thereon.

[0085] Additionally, base 140" is shown as having two portions 140a and 140b for illustrative purposes only. For example, base 140" may be formed in two portions to accommodate the formation of multiple heating and / or cooling elements 359 during manufacture. As previously discussed, it is understood that base 140" is considered to be a single element.

[0086] In lift pad-pedestal configuration 300, lift pad 390 includes an upper pad surface 392 that extends from a central axis 470′ to a pad diameter. Lift pad 390 is configured to rest within recess 340, which is configured to receive lift pad 390. Specifically, lift pad upper surface 392 is below wafer 290 when wafer 290 is seated on wafer support 206 of pedestal 140″, such as in a process position (e.g., when performing plasma processing, treatment, and / or film deposition). Additionally, lift pad 390 is configured to move with pedestal 140″.

[0087] As shown in the figure, the lift pads 390 are connected to an actuator 305' configured to control the movement of the lift pads 390. Specifically, a pad shaft 330 is coupled to the actuator 305 and the pedestal 140" such that the pad shaft 330 extends between the actuator 305 and the pedestal 140". The pad shaft 330 is configured within a central axis 310' that is connected to the pedestal 140". Specifically, the pad shaft 330 is configured to move the lift pads 390 along the central axis 311. As such, movement of the actuator 305 translates to movement of the pad shaft 330, which in turn translates to movement of the lift pads 390. In one embodiment, the actuator 305 controls the movement of both the lift pads 390 and the pedestal 140".

[0088] Specifically, pad shaft 330 is configured to move lift pad 390 away from pedestal 140" for lift pad rotation, e.g., during processing. In short, lift pad 390 is configured to move upward along central axis 311 relative to pedestal upper surface 325 when pedestal 140" such that a process rotational displacement intended to rotate lift pad 390 moves lift pad 390 away from pedestal upper surface 325. Thus, wafer 290 disposed on wrist pad 390 is also moved away from pedestal 140". Pad shaft 330 is also configured to lower lift pad 390 onto pedestal 140".

[0089] In particular, the lift pad 390 is configured to rotate relative to the pedestal top surface 325 between at least a first and a second angular orientation (e.g., between 0 degrees and 180 degrees) when the lift pad 390 is moved away from the pedestal 140″, or may rotate constantly during processing. This rotation reduces the effect of pedestal hardware features during processing and also reduces the effect of chamber hardware features during processing.

[0090] In other embodiments, the lift pads 390 provide a lift pin function to raise or lower the wafer during wafer delivery and processing. Specifically, the lift pads 390 are configured to move upward relative to the central pedestal top surface 325 when in their bottom-out position such that the lift pads 390 are clear of the pedestal top surface 325 with a displacement large enough to allow entry of the end effector arm.

[0091] As shown in FIG. 3B, the pedestal 140″ of the lift pad-pedestal configuration 300 includes a raised lip 320 on an outer region of the pedestal upper surface 720 (e.g., near the outer edge 221′ of the pedestal 140″) that is configured to prevent lateral movement of a wafer 290 placed on the pedestal 140″. In essence, the lip 320 is a step above the pedestal upper surface 325 that is high enough to prevent movement of the wafer.

[0092] The lift pad-pedestal configuration 300 includes a lift pin assembly that includes one or more lift pins 308. For purposes of illustration, the pedestal 140" and lift pad 390 are shown at a level that allows extension of the lift pins 308 for wafer delivery purposes in accordance with one embodiment of the present disclosure. Specifically, the lift pins 308 extend from the lift pad 390 through corresponding pedestal shafts 318 disposed within the pedestal 140" in a manner that allows an end effector arm (not shown) carrying a wafer 290 (with or without a carrier ring) to assume a position to deliver a wafer to or receive a wafer from the lift pins 308. A corresponding pedestal shaft 318 is aligned with a corresponding lift pin 308 and configured to receive the corresponding lift pin 308 as the pedestal 140" moves relative to the lift pin 308. It will be appreciated that one or more lift pin shafts and corresponding lift pins may be configured in a lift pin assembly to lift and place or remove the wafer 290 during wafer delivery. As shown in the figure, each lift pin 308 is coupled to a corresponding lift pin support 307 to effect movement. The lift pin support The lift pin support 307 is coupled to a lift pin actuator 306. The lift pin support 307 may be of any shape (e.g., an annular ring washer, an arm extending from an annular base, etc.). Specifically, during operation of the lift pin assembly, the lift pins 308 are attached to the lift pin support 307 and positioned to move within the lift pin shaft relative to the pedestal 140″ to raise the wafer 290 above the pedestal upper surface 325 and / or lower the wafer 290 onto the pedestal upper surface 325 during wafer delivery and processing.

[0093] 4A-4D illustrate an outer region 145' of the pedestal 140" of the lift pad-pedestal configuration 300 of FIGS. 3A-3B, including a sloped surface 326 of the raised annular edge 320 of the pedestal 140", in accordance with one embodiment of the present disclosure. As shown, the lift pad-pedestal configuration 300 includes a pedestal 140" having a pedestal upper surface 325 that extends from a central axis 311 of the pedestal 140". As shown, FIG. 4A illustrates the relative positioning of the raised annular edge 320 with respect to a wafer disposed on the upper surface 325 of the pedestal 140", which provides a constraint against the movement of the wafer 290 and promotes improved film deposition uniformity and stability of historical performance.

[0094] In one embodiment, the geometric features of the standard pedestal bulk material, be it aluminum or ceramic (aluminum oxide), are designed to define and control the flow profile and accumulation zone relative to the wafer edge 292 when placed on the pedestal 140″. Specifically, these geometries are selected to offset and minimize the effects of nearby materials (e.g., precursors, radicals, contaminants, etc.) that, while not eliminating, by their very nature affect the depletion of radicals. The geometry modifications include adjusting the wafer height D16 into the pocket, the pocket height 351, the wall slope angle 327, the wall distance 326 to the wafer edge, and the pocket (inner D15 and outer 221) diameter. Also, in another embodiment, sealing and contact of the wafer edge (e.g., with the pedestal 140″) is achieved in combination with side and / or backside gas purges to further help maintain a stable flow profile, depletion and accumulation, and / or surface conditions at the wafer edge 292.

[0095] The pedestal 140" includes a raised annular lip 320 configured on the outer edge 221' that forms a pocket 350 defined by a pocket outer diameter 352 (dimension "D15" that is approximately 11.968 inches (30.339872 centimeters)) and a top surface 325 of the pedestal 140". The pocket 350 is configured to receive the wafer 290 and has a height 351 (dimension "D13" that is approximately 0.35 inches (0.889 centimeters)). The raised annular lip 320 is configured to prevent lateral movement of the wafer 290 resting on the pedestal 140". The annular lip 320 also includes a mesa surface 322 that is raised above the pedestal top surface 325. In one embodiment, the height 351 is adjusted to facilitate sealing of the wafer edge 292 to the pedestal 140". For example, height 351 may be lowered so that the level of wafer 290 is approximately even with mesa surface 322 .

[0096] The annular lip 320 includes an inclined surface 326, where the angle of inclination is optimized to facilitate sealing and forming contact (e.g., with the pedestal 140'') with the wafer edge. In particular, FIG. 4B illustrates the outer region 145' of the pedestal 140'' of the lift pad-pedestal configuration 300 of FIG. 4A, and more particularly shows the inclined surface 326 located approximately at the outer diameter 352 of the pocket 350. The inclined surface 326 is inclined relative to the upper surface 325 of the pedestal 140'', as indicated by angle 327 (dimension D14 ranging from 0 degrees to 90 degrees).

[0097] As shown in FIG. 4C , the angled surface 326 of the annular lip 320 extends from an inner diameter 358 of the raised annular lip 320 to an outer diameter 352 of the pocket 350 on the pedestal upper surface 325, where the angled surface is inclined at an angle 327 (dimension D14 approximately equal to 90 degrees) relative to the pedestal upper surface 325. The outer diameter 352 (dimension "D15" which is approximately 11.968 inches (30.39872 centimeters)) is shown. In one embodiment, the outer diameter 352 may have a minimum dimension D15 which in one embodiment is approximately 11.841 inches (30.07614 centimeters) at room temperature. In an embodiment, the dimensions of the outer diameter 352 are adjusted to facilitate sealing of the wafer edge 292. In essence, the outer diameter 352 is adjusted to bring the angled surface 326 closer to the edge 292 of the wafer 290 to facilitate sealing of the wafer edge 292 to the pedestal 140″ during processing. Additionally, the inner diameter 358 may be adjusted similarly (dimension “D17” being approximately less than 11.968 inches (30.39872 centimeters)). In this manner, the effects of nearby materials (e.g., precursors, radicals, contaminants, etc.) that cannot be eliminated are reduced near the wafer edge 292.

[0098] As also shown in the figure, an exemplary MCA 206 is disposed within the pedestal 140″. Briefly, the pedestal upper surface 325 includes one or more wafer supports 206 configured to support a wafer 290 at a wafer support level above the pedestal upper surface 325. The wafer supports 206 each seat within a hole 205 drilled in the upper surface 220. Each wafer support 206 may further rest on a flexible spacer 207 that seats at the bottom of the hole 205. The flexible spacer 207 is configured to prevent the wafer support 206 (e.g., formed of sapphire) from cracking when the wafer 290 is placed on the wafer support 206. In one embodiment, the placement of the wafer support 206 within the hole 205 is configured to minimize the distance of the wafer support level 208 (dimension “D16”, which may range from approximately 5 mm to 15 mm). Additionally, the placement of one or more MCAs 206 patterned within pedestal 140″ is designed to induce bowing of wafer 290, as described above, particularly such that wafer edge 292 drops below the center of wafer 290 during processing. The placement of MCAs 206 may be closer to the center of the wafer to induce bowing.

[0099] More specifically, FIGS. 4C-D are illustrations of an interface between the wafer 290 and the beveled surface 326 of the raised annular lip 320, according to one embodiment of the present disclosure. As shown in FIG. 4C, the edge 292 of the wafer 290 has a curved shape. For example, the shape may be arcuate or approximately semicircular. During processing, at least a portion of the edge 292 contacts the beveled surface 326 at a contact point 329 to facilitate edge sealing of the wafer 290 to the pedestal 140″. In conventional configurations, no contact is achieved between the edge 292 and the pedestal 140″. As shown in FIG. 4C, the beveled surface is inclined at approximately 60 degrees, such that a lower portion of the edge 292 contacts the beveled surface 326. It can be seen that the greater the angle 327 of the beveled surface 326, the more likely the contact point 329 will contact other portions of the edge 292, such as near the center of the semicircle forming the edge 292. For example, as shown in FIG. 4D, the angled surface 296 is nearly perpendicular to the pedestal upper surface 325 , so that the outer diameter 352 of the pocket 350 is approximately equal to the inner diameter 326 of the raised annular lip 320 .

[0100] In yet another embodiment, an outer region 145′ of the pedestal 140″ is treated to promote a stable flow profile and surface conditions over multiple deposition cycles while also reducing depletion and accumulation near the wafer edge 292. In one embodiment, an O3 passivation is performed on this outer region 145′. In other embodiments, an ALD coating is layered in this outer region 145′. For example, the coating may be yttria, ALN, ALO, or other suitable coatings. x , ALON, SiC, and glass.

[0101] In yet another embodiment, region 145' is constructed with optimized geometry and alternative materials (ALN, ALO) that are less conducive to radical recombination and film growth that are suspected to contribute to uniformity degradation over time. xA pedestal ring may be formed with a pedestal material (such as ALON, SiC, glass) on the wafer. In theory, as deposition occurs on the wafer, adjacent areas will experience similar film growth. Films on other surfaces (e.g., of pedestal 140" in outer region 145') other than the wafer that is removed are then subjected to cleaning processes and other gases during idle. These alternative materials reduce the effects of recombination and film growth by adjusting or influencing the rates at which films grow, change, and recombine with radicals.

[0102] Although specific embodiments have been provided for a pedestal assembly for use in remote plasma processing that provides new wafer uniformity control knobs that include a series of specifically designed geometries, surface conditions, and material compositions near the wafer edge to further control uniformity and provide a stable deposition pattern over time, these are described by way of example and not by way of limitation, and those skilled in the art upon reading this disclosure will recognize additional embodiments that fall within the spirit and scope of the present disclosure.

[0103] It should be understood that the various embodiments defined herein may be combined or assembled into specific implementations using various features disclosed herein. Thus, the examples provided are only some of the possible examples and do not set limits on the various implementations possible by combining various elements to define further implementations. In some examples, some implementations may include fewer elements without departing from the spirit of the disclosed or equivalent implementations.

[0104] Embodiments of the present disclosure may be practiced with a variety of computer system configurations, including handheld devices, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, etc. Embodiments of the present disclosure may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through wire-based or wireless networks.

[0105] With the above embodiments in mind, it should be understood that the embodiments of the present disclosure can employ various computer-implemented operations involving data stored in computer systems. These operations are operations requiring physical manipulation of physical quantities. The operations described herein and forming part of the embodiments of the present disclosure are useful machine operations. The embodiments of the present invention also relate to instruments or apparatus for performing these operations. The apparatus may be specially constructed for the required purposes or the apparatus may be a general-purpose computer selectively activated or configured by a computer program stored in the computer. In particular, various general-purpose machines can be used with computer programs written in accordance with the teachings herein, or it may be convenient to construct more specialized apparatus to perform the required operations.

[0106] The present disclosure can also be implemented as computer readable code on a computer readable medium. The computer readable medium is any data storage hardware unit that can store data that can be subsequently read by a computer system. Examples of computer readable media include hard drives, network attached storage (NAS), read only memory, random access memory, CD-ROM, CD-R, CD-RW, magnetic tape, and other optical and non-optical data storage devices. In some embodiments, the computer readable medium can include a tangible computer readable medium distributed across network-coupled computer systems such that the computer readable code is stored and executed in a distributed fashion.

[0107] It should be understood that although the operations of the method are presented in a particular order, in various embodiments these operations may be coordinated to occur at slightly different times, with other housekeeping operations being performed between them, or the operations may be distributed within a system that allows processing operations to occur at various time intervals associated with the processing, so long as the processing of the overlay operation is performed in a desired manner.

[0108] Although the above embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of the appended claims. Therefore, these embodiments are to be considered as illustrative and not restrictive, and the embodiments of the present disclosure are not to be limited to the details given herein, but may be modified within the scope of the appended claims and their equivalents.

Claims

1. 1. An assembly for use in a process chamber to deposit a film on a wafer, comprising: a pedestal having a top pedestal surface extending from a central axis to an outer edge of the pedestal, the top pedestal surface having a plurality of wafer supports configured to support a wafer at a wafer support level above the top pedestal surface; a pedestal step of the pedestal having a step inner diameter and a step surface that extends from the step inner diameter toward the outer edge of the pedestal; a focus ring configured to rest on the stepped surface, the focus ring having a mesa extending from an outer diameter of the focus ring to an inner mesa diameter, the mesa having a shelf depending downwardly from a mesa surface at the inner mesa diameter, the shelf extending between the inner mesa diameter and an inner diameter of the focus ring; Equipped with The assembly, wherein the shelf is configured to support at least a portion of a bottom wafer surface of the wafer during processing.

2. 2. The assembly of claim 1, an assembly in which a shelf height from a bottom surface of the ring is less than a step height of the pedestal step;

3. 2. The assembly of claim 1, an assembly in which the shelf height from the bottom of the ring is approximately equal to the step height of said pedestal step;

4. 2. The assembly of claim 1, an assembly, the shelf height from the bottom surface of the ring being greater than a step height of said pedestal step;

5. 2. The assembly of claim 1, wherein the difference between a height of the focus ring from a ring bottom to a surface of the mesa and a shelf height from the ring bottom is less than or equal to 0.033 inches (0.08382 centimeters).

6. 2. The assembly of claim 1, wherein the difference between the inner diameter of the focus ring and the inner step diameter is less than 0.078 inches (0.19812 centimeters).

7. 2. The assembly of claim 1, The wafer support level ranges from 0.005 inches (0.0127 centimeters) to 0.015 inches (0.0381 centimeters).

8. 10. The assembly of claim 1 further comprising: An assembly comprising: a lift pin assembly including a plurality of lift pins passing through a plurality of pedestal shafts configured within the pedestal.

9. 2. The assembly of claim 1, The outer ring of the pedestal from the step inner diameter to the outer edge of the pedestal and the focus ring are both essentially made of yttria, AlN, ALO, x , ALON, SiC, and glass.

10. 1. An assembly for use in a process chamber to deposit a film on a wafer, comprising: a pedestal having a top pedestal surface extending from a central axis to an outer edge of the pedestal, the top pedestal surface having a plurality of wafer supports configured to support a wafer at a wafer support level above the top pedestal surface; a pedestal step of the pedestal having a step inner diameter and a step surface that extends from the step inner diameter toward the outer edge of the pedestal and has a step height that extends downward from the pedestal top surface; a focus ring configured to rest on the stepped surface, the focus ring having a mesa extending from an outer diameter of the focus ring to an inner mesa diameter, the mesa having a shelf depending downwardly from a mesa surface at the inner mesa diameter, the shelf extending between the inner mesa diameter and an inner diameter of the focus ring; Equipped with The shelf height from the bottom of the ring ranges from 0.143 inches (0.36322 centimeters) to 0.188 inches (0.47752 centimeters).

11. 11. The assembly of claim 10, The shelf height is approximately 0.155 inches (0.3937 centimeters), assembly.

12. 11. The assembly of claim 10, wherein the difference between a height of the focus ring from a ring bottom to a surface of the mesa and a shelf height from the ring bottom is less than or equal to 0.033 inches (0.08382 centimeters).

13. 11. The assembly of claim 10, wherein the difference between the inner diameter of the focus ring and the inner step diameter is less than 0.078 inches (0.19812 centimeters).

14. 11. The assembly of claim 10, The wafer support level ranges from 0.005 inches (0.0127 centimeters) to 0.015 inches (0.0381 centimeters).

15. 11. The assembly of claim 10, further comprising: An assembly comprising: a lift pin assembly including a plurality of lift pins passing through a plurality of pedestal shafts configured within the pedestal.

16. 11. The assembly of claim 10, The outer ring of the pedestal from the step inner diameter to the outer edge of the pedestal and the focus ring are both essentially made of yttria, AlN, ALO, x , ALON, SiC, and glass.

17. 1. An assembly for use in a process chamber to deposit a film on a wafer, comprising: a pedestal having a top pedestal surface extending from a central axis to an outer edge of the pedestal, the top pedestal surface having a plurality of wafer supports configured to support a wafer at a wafer support level above the top pedestal surface; a raised annular edge configured on the outer edge of the pedestal upper surface and configured to inhibit lateral movement of the wafer resting on the pedestal, the raised annular edge having a mesa surface raised above the pedestal upper surface, the raised annular edge and the pedestal upper surface forming a pocket configured to receive the wafer; a sloped surface extending from an inner diameter of the raised annular lip to an outer diameter of the pocket on the upper surface of the base, the sloped surface being inclined at an angle of less than 90 degrees relative to the upper surface of the base; An assembly comprising:

18. 18. The assembly of claim 17, the inclined surface being close to perpendicular to the pedestal top surface.

19. 18. The assembly of claim 17, The wafer support level ranges from 0.005 inches (0.0127 centimeters) to 0.015 inches (0.0381 centimeters).

20. 18. The assembly of claim 17, an inner diameter of the raised annular lip being less than 11.968 inches (30.39872 centimeters);

21. 18. The assembly of claim 17, further comprising: An assembly comprising: a lift pin assembly including a plurality of lift pins passing through a plurality of pedestal shafts configured within the pedestal.

22. 18. The assembly of claim 17, The outer ring of the base forming the raised annular edge is essentially made of yttria, ALN, ALO. x , ALON, SiC, and glass.