Method and apparatus for fast short detection for shorts in gate-controlled power switches - Patents.com
By measuring the floating inductor voltage drop in the gate-controlled power switch and comparing it with the reference voltage, short-circuit detection signal is generated, and the problems of complex and temperature dependence of detection of SiC MOSFETs or GaN MOSFETs in the prior art are solved, and fast and non-influent short-circuit detection is achieved.
Patent Information
- Application Number
- JP2023560447
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-03-31
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2041-03-31
AI Technical Summary
The prior art has complexity and temperature dependence when detecting short circuits of SiC MOSFETs or GaN MOSFETs, making it difficult to efficiently handle high-guided short circuits.
By measuring the voltage drop of the floating inductor in the gate-controlled power switch, a measurement signal is generated, and when the gate control power switch is turned on, the measurement signal is compared with the reference voltage to generate a short-circuit detection signal.
It realizes fast and complex short-circuit detection, can detect short-circuits within the nanosecond level, and does not affect the normal operation of the gate-controlled power switch.
Smart Images

Figure 0007671860000001 
Figure 0007671860000002 
Figure 0007671860000003
Abstract
Description
[Technical field]
[0001] The present invention relates to a method and apparatus for detecting short circuits in gate-controlled power switches, particularly in SiC (Silicon Carbide) MOSFETs or GaN (Gallium Nitride) MOSFETs. [Background technology]
[0002] Various detection methods are known in the art for detecting short circuits in gate-controlled power switches.
[0003] [overview] In the conventional saturation detection method, the drain-source voltage between the drain and source terminals of the MOSFET is detected through a diode. If the detected drain voltage does not drop to the saturation voltage during the on-transition, an abnormality is detected. This detection method requires a relatively careful design and is highly temperature dependent. Furthermore, a saturated state is required for MOSFETs and a non-saturated state for IGBTs.
[0004] Highly inductive short circuits are difficult to deal with successfully using this saturation detection method.
[0005] According to other conventional saturation detection methods, the gate charge of the gate terminal of a gate-controlled power switch is compared with the gate-source voltage between the gate and source terminals to detect a short circuit. To determine the gate charge, for example, the gate current needs to be detected using a current mirror circuit or the voltage drop across the gate resistor needs to be detected. This detection method also requires calibration and is quite difficult to implement.
[0006] Yet another method for detecting short circuits is to directly measure the current flowing through the circuit, which is not easy to implement since it affects the power loop, and this method for detecting short circuits is bulky and expensive to implement.
[0007] SUMMARY OF THE PRESENT EMBODIMENTS In this context, the present invention aims to provide a method and apparatus that allows fast detection of shorts in gate-controlled power switches without requiring complex implementation.
[0008] This object is achieved according to a first aspect of the invention in that a fast short-circuit detection device for detecting shorts in gate-controlled power switches has the features of claim 1.
[0009] According to a first aspect of the present invention, a short circuit detection device for detecting a short circuit in a gate-controlled power switch includes: a measurement circuit configured to generate a measurement signal in response to a voltage drop across a stray inductance of the gated power switch; a short detection signal generating circuit configured to generate a short detection signal when the measurement signal exceeds a reference voltage and the gate-controlled power switch is in an on state; Equipped with.
[0010] In one embodiment of the short detection device according to the second aspect of the present invention, a measurement circuit is connected to a gate-controlled power switch integrated in a package having a Kelvin source pin, and the Kelvin source pin is used to obtain a voltage drop across a stray inductance of the gate-controlled power switch from between the Kelvin source pin and a source pin by the measurement circuit of the short detection device.
[0011] As another embodiment, a short circuit detection device according to the second aspect of the present invention is configured to detect a short circuit in a gate-controlled power switch made of a MOSFET, particularly a SiC-MOSFET or a GaN-MOSFET.
[0012] As yet another embodiment, in the short detection device according to the second aspect of the present invention, the comparator circuit compares the measurement signal generated by the measurement circuit with a self-generated reference voltage to generate a comparison output signal.
[0013] As still another embodiment, in the short detection device according to the second aspect of the present invention, the short detection signal generating circuit a voltage divider circuit configured to measure an output voltage of a gate control signal output from a gate driver circuit and supplied to a gate terminal of a gate-controlled power switch to generate an actual gate voltage; a signal delay circuit configured to delay the measured gate voltage by a delay time to generate a short detection enable signal; A logic gate; Equipped with If the logic gate is enabled by the short detection enable signal output by the signal delay circuit, the comparison output signal output by the comparison circuit is supplied to the input terminal of the gate driver circuit as a short detection signal via the logic gate.
[0014] According to another aspect of the present invention, a fast short detection method for detecting a short in a gate controlled power switch includes the steps of: generating a measurement signal in response to a voltage drop across a stray inductance of a gated power switch; generating a short detection signal when the generated measurement signal exceeds a reference voltage and the gate-controlled power switch is in an on state; Equipped with.
[0015] The invention does not require a complex implementation. In particular it does not require complex analog or digital circuits such as an FPGA. The method and device according to the invention allow very fast detection of possible short circuit currents. They work in a variety of short circuit current situations and are easy and cheap to implement. They also do not require waiting for desaturation of the gate controlled power switch. The method and device according to the invention allow normal operation of the gate controlled power switch without disturbing or affecting it. Short circuits can be detected very fast, within nanoseconds. The output voltage of the gate driver can be used to operate the detection method according to the first aspect of the invention. The method and device according to the invention detects short circuit currents in the gate controlled power switch by measuring the voltage drop across the stray inductance of the gate controlled power switch.
[0016] In one embodiment, the stray inductance of the gated power switch used for short circuit detection is the stray inductance between the source terminal and the Kelvin source terminal of the gated power switch.
[0017] In one embodiment, the measurement signal is generated by a measurement circuit that includes a comparison circuit that compares the measurement signal with a reference signal to generate a comparison output signal.
[0018] In one embodiment of the method according to the first aspect of the present invention, the generated short detection signal is supplied to an input terminal of a gate driver circuit, thereby causing the gate driver circuit to automatically turn off the gate-controlled power switch during an off-period.
[0019] As one embodiment of the method according to the first aspect of the present invention, an actual gate voltage of the gate driver circuit is generated by measuring, with a voltage divider circuit, an output voltage of a gate control signal which is output from a gate driver circuit and input to a gate terminal of a gate-controlled power switch via a gate resistor.
[0020] In one embodiment of the method according to the first aspect of the present invention, the short detection enable signal is generated by delaying the measured gate voltage of the gate driver circuit by a delay time in a signal delay circuit.
[0021] In another embodiment of the method according to the first aspect of the present invention, if the logic gate is enabled by the short detection enable signal output by the signal delay circuit, the comparison output signal is supplied as a short detection signal via the logic gate to an input terminal of the gate driver circuit.
[0022] In another embodiment of the method according to the first aspect of the present invention, the gate control signal input by the gate driver circuit to the gate terminal of the gate-controlled power switch is a signal output by a microcontroller.
[0023] This signal may be a modulated signal, in particular a pulse width modulated signal, or may be one or more signal pulses.
[0024] In a further embodiment of the method according to the first aspect of the invention, the reference voltage is an internal reference voltage derived from the steady state voltage of the measurement signal.
[0025] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Several embodiments according to various aspects of the present invention will be described in detail below with reference to the drawings. [Brief description of the drawings]
[0026] [Figure 1] FIG. 1 is a block diagram showing an exemplary embodiment of a short detection device according to an aspect of the present invention. [Diagram 2] FIG. 2 is a flowchart conceptually illustrating an exemplary embodiment of a high-speed short detection method according to another aspect of the present invention. [Figure 3A] 3A and 3B respectively show different types of short circuits in a power supply system and illustrate the operation of the fast short circuit detection method according to the present invention. [Figure 3B]3A and 3B respectively show different types of short circuits in a power supply system and illustrate the operation of the fast short circuit detection method according to the present invention. [Figure 4] FIG. 4 is a diagram illustrating one embodiment of the method and apparatus according to the present invention. [Diagram 5] FIG. 5 is a waveform diagram illustrating the method and apparatus according to the present invention. [Figure 6] FIG. 6 is another waveform diagram illustrating the method and apparatus according to the present invention. [Figure 7] FIG. 7 is another waveform diagram illustrating an exemplary embodiment of the method and apparatus according to the present invention. [Figure 8] FIG. 8 is another waveform diagram for explaining an exemplary embodiment of the method and apparatus according to the present invention when a first type of short occurs. [Figure 9] FIG. 9 is another waveform diagram for explaining the operation of the method and apparatus according to the present invention when a second type of short occurs. [Figure 10] FIG. 10 is a circuit diagram for explaining an exemplary embodiment of the device according to the present invention. [Figure 11] FIG. 11 is a waveform diagram illustrating an exemplary embodiment of the method and apparatus according to the present invention. [Figure 12A] FIG. 12A is a waveform diagram showing the results of an experiment when a short circuit occurs, for explaining the operation of the method and apparatus according to the present invention. [Figure 12B] FIG. 12B is a waveform diagram showing the results of an experiment when a short circuit occurs, for explaining the operation of the method and apparatus according to the present invention. [Figure 12C] FIG. 12C is a waveform diagram showing the results of an experiment when a short circuit occurs, for explaining the operation of the method and apparatus according to the present invention. [Figure 13A] FIG. 13A is another waveform diagram showing the experimental results when another short circuit occurs, for explaining the operation of the method and apparatus according to the present invention. [Figure 13B] FIG. 13B is another waveform diagram showing the experimental results when another short circuit occurs, for explaining the operation of the method and apparatus according to the present invention. [Figure 14] Figure 14 is a waveform diagram showing a double pulse test in normal operation of a gate-controlled power switch.
[0027] [Detailed Description] As shown in the schematic block diagram of Fig. 1, a short detection device 1 according to one aspect of the present invention includes a measurement circuit 2 and a short detection signal generation circuit 3 in the illustrated exemplary embodiment. The short detection device 1 shown in the block diagram of Fig. 1 can be used to detect a short in a gate-controlled power switch such as a MOSFET. The measurement circuit 2 of the short detection device 1 measures the stray inductance L S Voltage drop ΔV at LS Depending on the measurement signal V LS,m The short detection signal generating circuit 3 of the short detection device 1 is configured to generate a measurement signal V LS,m is the reference voltage V ref When the short circuit detection signal V SC The measurement circuit 2 of the short circuit detection device 1 may be connected to a gate-controlled power switch 4 integrated in a package having a Kelvin source pin S' in one embodiment. The Kelvin source pin S' is connected to a stray inductance L between the Kelvin source pin and the source pin of the gate-controlled power switch 4. S Voltage drop ΔV at LS is used to obtain the measured current by the measuring circuit 2 of the short detection device 1. The gate-controlled power switch 4 monitored by the measuring circuit 2 is a MOSFET, particularly a SiC-MOSFET, a GaN-MOSFET, or a GaN-HEMT. The gate-controlled power switch 4 may be, for example, an IGBT.
[0028] 2 is a flow chart illustrating an exemplary embodiment of a fast short detection method for detecting a short in a gate-controlled power switch according to another aspect of the present invention. In the exemplary embodiment shown, the fast short detection method comprises two main steps.
[0029] In the first step S1, the stray inductance L of the gate-controlled power switch 4 such as a MOSFET is S Voltage drop ΔV at LS Depending on the measurement signal V LS,m is generated.
[0030] In the subsequent second step S2, the generated measurement signal V LS,m is the reference voltage V ref If it exceeds this limit and the gate-controlled power switch 4 is in the on state, the short-circuit detection signal V SC In one embodiment, a stray inductance L that causes a voltage drop is automatically generated. S is the stray inductance at the source terminal S of the gate-controlled power switch 4. As an embodiment, as shown in FIG. 4, the generated short detection signal V SC to the input terminal of the gate driver circuit 5, the gate driver circuit 5 may automatically turn off the gate-controlled power switch 4 within a predetermined off period. Most gate drivers are equipped with a short-circuit detection input terminal.
[0031] 3A and 3B respectively show examples of different types of short circuits that can occur in a power supply system.
[0032] The gate-controlled power switch 4 can be made of various materials. Various materials for power devices, such as silicon carbide (SiC) and gallium nitride (GaN), can be used to provide the gate-controlled power switch 4 with high-speed switching performance, thereby reducing power loss and improving efficiency. However, when a short circuit occurs, the current density of the current flowing through the gate-controlled power switch 4 can become extremely high, which may lead to a rapid increase in junction temperature. This places a strong stress on the gate-controlled power switch 4, reducing its short-circuit resistance. The reduction in the short-circuit resistance of the gate-controlled power switch 4 reduces the reliability of the entire power supply system. According to the high-speed short-circuit detection method of the present invention, high-speed detection of a short SC in the gate-controlled power switch 4 is possible within a predetermined reaction time, for example, less than 300 nanoseconds. The high-speed short-circuit detection method of the present invention can be implemented with a simple circuit configuration and improves the reliability of the power supply system. The implementation of the high-speed short-circuit detection method of the present invention enables the use of high-performance gate-controlled power switches such as silicon carbide (SiC) power switches and gallium nitride (GaN) power switches.
[0033] There are two common types of short circuits that can occur in power systems. The first type of short circuit SC1 is a hard switch fault HSF. In this situation, the device is turned on by an existing short circuit SC, as shown in Figure 3A. The power device is driven by a driver circuit that is provided with, for example, a PWM signal from a microcontroller. The second type of short circuit is a fault under load FUL. In this situation, a short circuit SC occurs when the power device is in a conducting state, as shown in Figure 3A. In the situation shown in Figure 3B, two gate-controlled power switches 4 are provided with complementary PWM signals from a driver circuit. A fault under load FUL occurs when one of the two gate-controlled power switches 4 is in an on-state (conducting state) and a short circuit occurs in the load of the other gate-controlled power switch 4.
[0034] The high-speed short circuit detection method according to the present invention detects a short circuit SC in a gate-controlled power switch 4 as shown in, for example, FIG. 3A and FIG. 3B by detecting a stray inductance L S Voltage drop ΔV at LS In one embodiment, the voltage drop ΔV LS is preferably measured between the source pin and the driver source pin. In one embodiment, the short detection is performed using the output voltage of a gate driver connected to the gate terminal of the gate controlled power switch 4. In this embodiment, the short detection device 1 according to the present invention is only operated when the gate controlled power switch 4 is in the on state.
[0035] FIG. 4 is a circuit diagram showing an exemplary embodiment of the short detection device 1 according to the present invention. In this embodiment, the short detection device 1 according to the present invention is used to detect a short circuit in a gate-controlled power switch 4. In the illustrated embodiment, the gate-controlled power switch 4 may be a MOSFET as shown in FIG. 4. The gate-controlled power switch 4 may be any other device, in particular a power switch such as an IGBT, GaN (HEMT), SiCMOS, etc., integrated into various packages as a discrete or integrated power module. In the illustrated embodiment, the gate-controlled power switch 4 is integrated into a package with a number of connection pins. The gate-controlled power switch 4 has a gate G, a drain D, and a source S. As shown in FIG. 4, the gate-controlled power switch 4 integrated into the package may further include a stray inductance L of the source S of the gate-controlled power switch 4. S The stray inductance L of the gate-controlled power switch 4 is S Voltage drop ΔV at LS As shown in FIG. 4, the input terminal of the measurement circuit 2 of the short detection device 1 is supplied with the stray inductance L S Voltage drop ΔV at LSand the measurement signal V LS,m The short detection signal generating circuit 3 connected to the measurement circuit 2 generates the measurement signal V LS,m is the reference voltage V ref When the short circuit detection signal V SC The measurement circuit 2 may be connected to a gate-controlled power switch 4 integrated in a package with a Kelvin source pin S'. The Kelvin source pin S' is connected to the stray inductance L S Voltage drop ΔV at LS is used to obtain the measurement circuit 2.
[0036] In the embodiment shown in Fig. 4, the short detection signal generating circuit 3 consists of two main circuit elements: a comparison circuit 3A and a short detection enabling circuit 3B. As shown in Fig. 4, the measurement signal V generated by the measurement circuit 2 LS,m is the reference voltage V ref is compared with the comparison output signal V LS,C As shown in FIG. 4, this comparison output signal V LS,C is input to the short detection enabling circuit 3B.
[0037] An implementation example of the short detection enable circuit 3B is shown in the circuit diagram of Fig. 10. In the embodiment shown in Fig. 10, the short detection enable circuit 3B included in the short detection signal generation circuit 3 is made up of a voltage divider circuit 31, a signal delay circuit 32, and a logic gate 33. As shown in the circuit diagram of Fig. 10, the voltage divider circuit 31 provided in the short detection enable circuit 3B includes, for example, two resistors R9 and R10, and receives a gate control signal V G Measure the output voltage of the gate voltage V G,m The signal delay circuit 32 included in the short detection enabling circuit 3B is configured to generate the measured gate voltage V G,mA predetermined delay time t del Delay the short detection enable signal V SC,en The short detection enable circuit 3B may include a logic gate 33. The comparison output signal V LS,C The logic gate 33 receives the short detection enable signal V SC,en When the short circuit detection signal V SC to the input terminal SC of the gate driver circuit 5 as
[0038] FIG. 4 shows the short detection signal V SC The short detection signal V generated by the short detection signal generating circuit 3 is shown. SC By supplying the gate control signal V to the input terminal SC of the gate driver circuit 5, the gate driver circuit 5 automatically turns off the gate controlled power switch 4 within a predetermined off period. As shown in FIG. 4, the gate control signal V G is supplied to the gate terminal G of the gate-controlled power switch 4. In one embodiment, the gate control signal V G Resistance R Gext to the gate terminal G of the gate-controlled power switch 4 via
[0039] In one embodiment, the gate control signal V G The measured gate control signal V may be measured by a voltage divider circuit 31 of the short detection enabling circuit 3B as shown in the circuit diagram of FIG. G is delayed by a predetermined delay time t del The short detection enable signal V is delayed by a comparator as shown in FIG. SC,en The comparison output signal V output by the comparison circuit 3A is LS,C The logic gate 33 receives the short detection enable signal V SC,enWhen the short circuit detection signal V SC As an embodiment, the logic gate 33 is, for example, an AND gate, and this AND gate receives as a first input the comparison output signal V LS,C , and outputs a short detection enable signal V SC,en The output of the AND gate 33 is connected to the input terminal SC of the gate driver circuit 5, and a short detection signal V SC Communicate.
[0040] In one embodiment, the gate driver circuit 5 supplies a gate control signal V to the gate terminal G of the gate-controlled power switch 4. G may be any modulated pulse or signal, in particular a pulse width modulated (PMW) signal, output by a signal source, in particular a microcontroller as shown in FIG. 4. The gate driver circuit 5 may generate the fault indication signal FLT when the gate driver circuit 5 performs an automatic turn-off of the gate controlled power switch 4. In the embodiment shown in FIG. 4, the reference voltage V supplied to the comparison circuit 3A is ref For example, the measurement signal V LS,m Alternatively, the reference voltage V ref may be generated by another reference voltage source.
[0041] The gate-controlled power switch 4 may have a driver source pin, such as the power source pin S shown in FIG. 4. The stray inductance L between the two pins S is due to the mechanical connection and is, for example, on the order of a few nanohenries. The current I D changes at high speed on the order of nanoseconds, resulting in a stray inductance L between pins S and S'. S The voltage drop ΔV is as follows:LS This occurs. V ls =L S ×dID / dt
[0042] Measurement signal V LS,m By measuring the drain current I D If the current changes slowly, the measurement signal V LS,m is close to 0 V. Figure 5 shows an example of the waveform at the on transition of the gate-controlled power switch 4. Between time t0 and time t1, the current I D increases from 0 to the nominal value (dI / dt>>0), which typically takes a few nanoseconds. LS,m increases according to the formula above. Between time t1 and time t2, the current I D decreases (dI / dt<<0), and the measurement signal V LS,m The polarity of changes from positive to negative. In the normal operation state of the gate-controlled power switch 4, the switching period (t1-t0) is limited and known. When the gate-controlled power switch 4 is in the on state (t>t2), the current I D increases slowly depending on the load, and dID / dt is close to zero. As a result, the measurement signal V LS,m is close to 0 as shown in Figure 5.
[0043] In the event of a short circuit as shown in Figure 3A, the current I D The switching period (t1-t0) of the LS This is reflected in the transition time of V LS,m A long transient time (longer than normal) of can be used as an indication that the first switching situation, i.e., the type of short SC1, is a hard-switched fault HSF as outlined in Figure 3A. In the case of the second switching situation, i.e., fault under load FUL, as shown in Figure 3B, the device has already gone through a switching period (t>t2) and therefore the measurement signal V LS,m If the current I Dincreases rapidly (dI / dt>>0). In the period t>t2, V LS,m Any increase in the measurement signal V can be used as an indicator of this type of anomaly. LS,m The transition time can be used to detect either the short type SC1 or the short type SC2 shown in FIGS. 3A and 3B.
[0044] In one embodiment, the measurement signal V LS,m may be measured and regulated using a simple circuit arrangement such as that implemented in block 2 shown in the circuit diagram of FIG. LS,m As shown in Figure 4, the reference voltage V LS,ref It is better to compare it with the reference voltage V LS,ref The value of is the measurement signal V LS,m The output signal of the comparator 3A, i.e., the comparison output signal V LS,C , is the measurement signal V LS,m is proportional to the transition time of D In this embodiment, the comparison output signal V LS,C can be used as an indicator of a short SC. An example of such behavior during the on transition is shown in the waveform diagram of Figure 6.
[0045] In a preferred embodiment, the short detection method operates only when the target gate-controlled power switch 4 is in the on-state. Therefore, the short detection signal V SC is the generated measurement signal V LS,m is the reference voltage V LS,ref 4. Thus, in one embodiment, the short detection method according to the present invention operates only when the gate controlled power switch 4 is in the ON state. In one embodiment, the method is based on the output signal of the gate driver circuit 5, i.e., the gate control signal V G , this voltage V G Measure the short detection enable signal V SC,enThe gate control signal V G By setting the gate control signal V high several nanoseconds after the rising edge of V, false detection of the rising edge during the ON transition can be avoided. G The delay time t between the rising edge of del may be adjustable and depend on the switching period of the gate controlled power switch 4 during normal operation. Thus, according to a preferred embodiment, the short circuit detection based on the method according to the invention is enabled after the time required for a normal switching transition of the gate controlled power switch 4 has elapsed.
[0046] 7 shows waveforms in an operation for enabling short detection at the on transition of the gate-controlled power switch 4. In the illustrated example, the gate-controlled power switch 4 is driven by the gate control signal V G is the on-voltage VG on If it is, it is on. If it is off, the signal is at the voltage VG off If it is, it is turned off. Delay time t del is defined as the period between time t0 and time t4 shown in Fig. 7. Therefore, in the illustrated example, the short detection method according to the present invention is enabled starting from time t=t4.
[0047] 8 shows exemplary waveforms in the short circuit detection method according to the present invention when a first type of short circuit SC1 occurs, compared with nOP (dashed line) during normal operation. In the illustrated example, the gate-controlled power switch 4 is turned on at time t=t0, and the output signal of the gate driver circuit 5 is VG off From VG on At the same time, the current I D begins to increase, and this is reflected by the measurement signal V LS,m The measurement signal V LS,m is the reference voltage V LS,ref When it becomes higher, the comparison output signal V LS,C is asserted high (time t=t1). At time t=t2, a delay time t delWhen time has elapsed, the short circuit detection mechanism according to the present invention operates, and the short circuit detection enable signal V SC,en is asserted high. At time t>t2, a short circuit SC causes a current I D continues to rise, and therefore, unlike when there is no abnormality, the comparison output signal V LS,C remains high. The comparison output signal V LS,C , i.e., the comparator output signal, and the short detection enable signal V SC,en Both become high, which is an indication of the occurrence of a short SC. As a result, the abnormal signal, i.e., the short detection signal V SC , is also asserted high, thus detecting the occurrence of a short circuit. SC may be latched for an adjustable predetermined period of time.
[0048] 9 shows exemplary waveforms for short circuit detection when a short circuit of the second type SC2 occurs, compared to nOP (dashed line) during normal operation. When a short circuit of the second type II (SC2) occurs, the fast short circuit detection method according to the invention proceeds in the same way as for the short circuit of the first type SC1. An example of the occurrence of a short circuit of the second type SC2 is shown in FIG. 9, where the current I D is shown by a dashed line. In this case, the delay time t del does not occur and the enable signal is already high. Therefore, the signal V SC,c If any pulse occurs in the short circuit, the detection is activated and an abnormality signal, i.e., the short circuit detection signal V SC , is asserted high. Thus, the delay time t del Therefore, the detection of a short circuit in the second situation SC2 is faster than the detection of a short circuit in the first short circuit situation SC1.
[0049] FIG. 10 shows an exemplary configuration of a short-circuit detection device 1 according to the present invention. The short-circuit detection device 1 is used for detecting a short circuit in a gate-controlled power switch 4 as shown in FIG. 10. The short-circuit detection device 1 includes a measurement circuit 2 and a short-circuit detection signal generation circuit 3. In one embodiment, the stray inductance L S Voltage drop ΔV atLS is measured using a compensation voltage divider consisting of resistors R1, R2 and capacitors C1, C2 as shown in FIG.
[0050] In the compensation voltage divider of the measurement circuit 2, it is preferable that the resistance value and the capacitance value of each of the capacitors C1 and C2 satisfy the following relationship. RI×CI=R2×C2
[0051] In one embodiment, the voltage divider of the measurement circuit 2 is a voltage divider that divides a voltage V in the range of −2.5 to 2.5 V. LS、1 It is advisable to design the circuit so that this voltage V LS、1 bias voltage V bias It is a good idea to add an offset to avoid using negative voltages in the circuit. The resulting voltage can then be amplified by a factor of 2 using a high frequency op-amp, as shown in Figure 10. The output of the op-amp is the measurement signal V LS,m This is a voltage in the range of 0 to 5 V with a steady-state voltage of 2.5 V. When the gate-controlled power switch 4 turns on, a large positive change in the current dI / dt causes a voltage drop V LS,m This is because, in the illustrated embodiment, pin S' constitutes the ground of the illustrated circuit. In the embodiment shown in FIG. LS,m Using a comparator circuit 3A as shown in FIG. 10, a self-generated reference voltage V ref In the embodiment shown in FIG. ref is the measurement signal V LS,m In one embodiment, the reference voltage V LS,ref is the measurement signal V LS,m In that case, the reference voltage V LS,ref 10. Thus, in the illustrated embodiment, the measurement circuit 2 generates the measurement signal V LS,m The internal reference voltage V is also generated, which is derived from the steady-state voltage of the short-circuit detection signal generating circuit 3 and is supplied to the comparison circuit 3A of the short-circuit detection signal generating circuit 3. refIn this case, the stray inductance L S Any effects of circuit elements such as resistors, resistors, and passive elements, as well as integrated circuit tolerances and temperature, can be controlled. When a large positive current increase or change dI / dt occurs, the measurement signal V LS,m is the derived reference voltage V ref and the comparator circuit 3A outputs a high-level comparison output signal V LS,C Generate.
[0052] In a preferred embodiment, the short SC detection is activated only when the gate-controlled power switch 4 is in the on-state. The output voltage of the gate driver circuit 5 is preferably measured and adjusted using a simple voltage divider circuit 31 made up of resistors R9 and R10 in the short detection enable circuit 3B of the short detection signal generation circuit 3. The signal V G,m The delay voltage may be set in the range of 0 V to 5 V. In the embodiment shown in FIG. 10, the signal delay circuit 32 is a low pass filter LPF, which is connected to a resistor R del and capacitor C del and delay time t del The filtered output signal of the low pass filter, V G,1 As shown in FIG. 10, the comparator of the signal delay circuit 32 outputs a reference voltage V ref,del In comparison, the short detection enable signal V SC,en It is recommended to generate the short detection enable signal V SC,en When the comparator 3A outputs a comparison output signal V LS,C The abnormal signal, i.e., the short circuit detection signal V SC , is issued, thereby detecting that a short circuit has occurred in the gate-controlled power switch 4.
[0053] 11 is an exemplary waveform diagram illustrating the operation of the short detection enable circuit 3B. In the illustrated embodiment, the logic gate 33 is an AND gate. The circuit elements used in this embodiment should have extremely small propagation delay times, on the order of less than 10 nanoseconds, and be suitable for high frequencies.
[0054] 12A, 12B, and 12C show the experimental results of the first type SC1 in the state where a short circuit occurs. D FIG. 12B shows the drain-source voltage V DS 12C shows the gate voltage V GS In the conventional method, the short SC is detected after 950 ns, and the total short endurance time t SC,desat In contrast, in the fast short detection method FSCP according to the present invention, the short SC is detected 200 nanoseconds after its occurrence and the soft turn-off operation is initiated. The total short endurance time t SC,FSCP takes just 300 nanoseconds, or about four times faster than conventional detection methods.
[0055] The experimental results in the second short detection situation SC2 are shown in the waveform diagrams of Figures 13A and 13B. In Figure 13A, the drain current of the gate-controlled power switch 4 is shown together with the drain-source voltage at the top, and the gate-source voltage is shown at the bottom. With the high-speed short detection method according to the present invention shown in Figure 13A, a detection time of about 54 nanoseconds was achieved, and the total short endurance time t SC,FSCP In contrast, in the conventional detection method shown in Fig. 13B, the short is detected after 450 ns, and the total short endurance time is about 750 ns. Thus, the fast short detection method according to the present invention is about five times faster than the conventional method in the second short detection situation SC2.
[0056] The fast short detection method according to the present invention does not interfere with the normal switching transition of the gate-controlled power switch 4. To verify this, a standard double pulse test was performed on the gate-controlled power switch 4 with a specification of 80 milliohms and 1200 V. The maximum peak current of the gate-controlled power switch 4 is 60 A (according to the data sheet). The test result is shown in FIG. 14. In FIG. 14, the drain-source voltage is shown at the top and the gate voltage is shown at the bottom. With a DC link voltage of 600 V and a drain current of 60 amperes or more, no false detection of the rising edge is observed. This shows that the fast short detection method according to the present invention can be applied to the normal operation of the gate-controlled power switch 4.
Claims
1. A short circuit detection device (1) for detecting a short circuit in a gate-controlled power switch (4), comprising: The stray inductance (L S ) voltage drop (ΔV LS ) according to the measurement signal (V LS,m a measurement circuit (2) configured to generate a The measurement signal (V LS,m ) is the reference voltage (V ref ) and the gate-controlled power switch (4) is in an on state, a short detection signal (V SC ) a short detection signal generating circuit (3) configured to generate a short detection signal; Equipped with The short detection signal generating circuit (3) a comparison circuit (3A) configured to compare the measurement signal (V LS,m ) generated by the measurement circuit (2) with the reference voltage (V ref ) to generate a comparison output signal (V LS,C ); A short detection enable circuit (3B); Equipped with The short detection enabling circuit (3B) a voltage divider circuit (31) configured to measure an output voltage of a gate control signal (VG) output from a gate driver circuit (5) and supplied to a gate terminal (G) of the gate-controlled power switch (4) to generate an actual gate voltage (VG,m); a signal delay circuit (32) configured to delay the measured gate voltage (VG,m) by a delay time (tdel-) to generate a short detection enable signal (VSC,en); A logic gate (33); Equipped with A short detection device in which, if the logic gate (33) is enabled by the short detection enable signal (V SC,en ) output by the signal delay circuit (32), the comparison output signal (V LS,C ) output by the comparison circuit (3A) is supplied to the input terminal (SC) of the gate driver circuit (5) as the short detection signal (V SC ) via the logic gate (33).
2. The measurement circuit (2) is connected to the gate-controlled power switch (4) integrated in a package having a Kelvin source pin (S'), and the Kelvin source pin (S') is connected to the stray inductance (L S 2. The short circuit detection device according to claim 1, wherein the voltage drop across the first terminal is acquired by the measuring circuit (2) of the short circuit detection device (1).
3. 2. The short circuit detection device according to claim 1, wherein the measuring circuit (2) is connected to the Kelvin source pin (S') and the source pin (S) of the gated power switch (4).
4. The short circuit detection device according to any one of claims 1 to 3, wherein the gate-controlled power switch (4) is a MOSFET, in particular a SiC-MOSFET, a GaN-MOSFET or a HEMT.
5. The generated short detection signal (V SC 5. The short circuit detection device according to claim 1, wherein the gate driver circuit (5) executes automatic turn-off of the gate-controlled power switch (4) during an OFF period by supplying a voltage Vcc to the input terminal (SC) of the gate driver circuit (5).
6. A gate control signal (V) is output from the gate driver circuit (5) and supplied to the gate terminal (G) of the gate controlled power switch (4) via a gate resistor. G The output voltage of the short circuit detection enable circuit (3B) is measured by a voltage divider circuit (31) of the short circuit detection enable circuit (3B) which is a part of the short circuit detection signal generation circuit (3) and is converted into the measured gate voltage (V G,m 6. The short detection device according to claim 5, wherein a signal representing the current flow is generated.
7. The gate control signal (V G 7. The short circuit detection device according to claim 1, wherein the signal is a modulated signal output by a microcontroller.
8. The reference voltage (V ref ) is the measurement signal (V LS,m 8. The short circuit detection device according to claim 1, wherein the internal reference voltage is derived from a steady state voltage of the first terminal of the short circuit detection circuit.
9. A fast short detection method for detection of a short circuit (SC) in a gate-controlled power switch (4), comprising the steps of: (a) The stray inductance (L S ) voltage drop (ΔV LS ) according to the measurement signal (V LS,m (S1) a step of producing (b) The generated measurement signal (V LS,m ) is the reference voltage (V ref ) and the gate-controlled power switch (4) is in an on state, a short detection signal (V SC (S2) producing Equipped with a comparison circuit (3A) compares the measurement signal (V LS,m ) generated by the measurement circuit (2) with the reference voltage (V ref ) to generate a comparison output signal (V LS,C ); supplying the generated short detection signal (V SC ) to an input terminal (SC) of a gate driver circuit (5), thereby executing automatic turn-off of the gate controlled power switch (4) by the gate driver circuit (5) during an OFF period; an output voltage of a gate control signal (VG) output from the gate driver circuit (5) and input to a gate terminal (G) of the gate controlled power switch (4) via a gate resistor is measured by a voltage divider circuit (31) to generate an actual gate voltage VG,m of the gate driver circuit (5); A short detection enable signal (V SC,en ) is generated by delaying the measured gate voltage V G,m of the gate driver circuit (5) by a delay time (t del− ) in a signal delay circuit (32); A high-speed short detection method in which, if a logic gate (33) is enabled by the short detection enable signal (V SC,en) output by the signal delay circuit (32), the comparison output signal (V LS,C ) is supplied to the input terminal (SC) of the gate driver circuit (5) as the short detection signal (V SC ) via the logic gate (33).
10. The stray inductance (L S 10. The method of claim 9, wherein: .DELTA..times ...
11. The gate control signal (V G 11. The high-speed short detection method according to claim 9 or 10, wherein the signal is a modulated signal output by a microcontroller.
12. The reference voltage (V ref ) is the measurement signal (V LS,m 12. The method of claim 9, wherein the internal reference voltage is derived from a steady-state voltage of the first input.
Citation Information
Patent Citations
Device of driving semiconductor element
JP2018186691A
Power conversion device and state monitoring method thereof
JP2020102973A
Power semiconductor switch series circuit and control method thereof
US20130083576A1
Semiconductor element drive device and power conversion device
WO2018203422A1