Detecting Collisions in a Network

Abstract

Various embodiments relate to detecting collisions in a communications network. The method may include transmitting a first signal onto a shared bus. The method may also include observing a second signal on the shared bus during the transmission. Further, the method may include detecting a collision on the shared bus in response to an amplitude of the second signal being greater than or less than a first threshold or a second threshold.

Description

[Technical field]

[0001] (Priority Claim) This application claims the benefit of the filing date of Chinese Patent Application No. 2019 / 10784565.6, filed on August 23, 2019, for "Detecting Collisions On a Network," and claims the benefit of the filing date of U.S. Patent Application No. 16 / 587,505, filed on September 30, 2019, for "Detecting Collisions On A Network," the disclosures of each of which are incorporated by reference in their entireties herein.

[0002] (Technical field) The present disclosure relates generally to communication networks, and more specifically to collision detection in single-pair Ethernet networks. [Background technology]

[0003] A variety of interface standards for connecting computers and external peripherals may be used to provide high speed connectivity. A widely used and flexible networking standard for connecting computers (e.g., in Local Area Networks (LANs) and Wide Area Networks (WANs)) is the Ethernet protocol. Ethernet communication generally refers to point-to-point communication within a network of multiple endpoints. Ethernet generally makes efficient use of shared resources, is easy to manage and reconfigure, and is compatible across many systems. While the disclosure concludes with claims that particularly point out and distinctly claim certain embodiments, the various features and advantages of embodiments within the scope of the present disclosure can be more readily ascertained from the following description when read in conjunction with the accompanying drawings. [Brief description of the drawings]

[0004] [Figure 1]1 illustrates a network including several nodes, in accordance with various embodiments of the present disclosure. [Diagram 2] 1 illustrates a node including a media access layer and a physical layer coupled to a network, according to various embodiments of the present disclosure. [Figure 3A] 3A-3C show timing diagrams illustrating various signals associated with a network in accordance with various embodiments of the present disclosure. [Figure 3B] 3A-3C show timing diagrams illustrating various signals associated with a network in accordance with various embodiments of the present disclosure. [Figure 4] 4 shows another timing diagram illustrating various signals associated with a network in accordance with various embodiments of the present disclosure. [Diagram 5] 1 illustrates an example physical layer of a node of a network, in accordance with various embodiments of the present disclosure. [Figure 6] 1 illustrates an exemplary signal detector in accordance with various embodiments of the present disclosure. [Figure 7] 4 is a flowchart of an exemplary method of operating a physical layer (PHY) of a network, in accordance with various embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0005] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and which show, by way of illustration, specific examples of embodiments in which the present disclosure may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present disclosure. However, other embodiments may be used, and structure, materials, and process changes may be made without departing from the scope of the present disclosure.

[0006] The figures presented herein are not intended to be actual illustrations of any particular method, system, device, or structure, but are merely idealized representations used to describe embodiments of the present disclosure. The figures presented herein are not necessarily drawn to scale. Similar structures or components in various figures may retain the same or similar numbering for the convenience of the reader. However, similarity in numbering does not necessarily mean that the structures or components are identical in size, composition, configuration, or any other characteristic.

[0007] The following description may include examples to assist those skilled in the art in enabling the disclosed embodiments to be practiced. The use of the terms "exemplary," "example," and "for example" means that the associated description is explanatory, and the scope of the disclosure is intended to encompass examples and legal equivalents, and the use of such terms is not intended to limit the embodiments or the scope of the disclosure to specific components, steps, features, functions, etc.

[0008] It will be readily understood that the components of the embodiments as generally described and illustrated in the figures herein could be arranged and designed in a wide variety of different configurations. Thus, the following description of various embodiments is not intended to limit the scope of the disclosure, but is merely representative of various embodiments. Although various aspects of the embodiments may be presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0009] Furthermore, the specific implementations shown and described are merely examples and should not be construed as the only way to implement the present disclosure unless otherwise specified herein. Elements, circuits, and functions may be shown in block diagram form so as not to obscure the present disclosure in unnecessary detail. Conversely, the specific implementations shown and described are merely exemplary and should not be construed as the only way to implement the present disclosure unless otherwise specified herein. Furthermore, the block definitions and partitioning of logic between various blocks are exemplary specific implementations. It will be readily apparent to one skilled in the art that the present disclosure can be implemented with numerous other partitioning solutions. For the most part, details regarding timing considerations and the like have been omitted, and such details are not necessary to obtain a complete understanding of the present disclosure and are within the capabilities of one skilled in the art.

[0010] Those skilled in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. Some figures may illustrate a signal as a single signal for clarity of display and explanation. Those skilled in the art will appreciate that a signal may represent a bus of signals, which may have various bit widths, and that the present disclosure may be implemented with any number of data signals, including a single data signal.

[0011] The various example logic blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed using a general purpose processor, a special purpose processor, a digital signal processor (DSP), an integrated circuit (IC), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general purpose processor (which may also be referred to herein as a host processor or simply a host) may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP core, or any other such configuration. A general purpose computer including a processor is considered a special purpose computer, and the general purpose computer is configured to execute computing instructions (e.g., software code) related to the embodiments of the present disclosure.

[0012] The embodiments may be described in terms of a process that is depicted as a flowchart, a flow diagram, a structure diagram, or a block diagram. Although a flowchart may describe operational acts as a sequential process, many of these acts can be performed in a different order, in parallel, or substantially simultaneously. Additionally, the order of the acts may be rearranged. A process may correspond to a method, a thread, a function, a procedure, a subroutine, a subprogram, etc. Furthermore, methods disclosed herein may be implemented in hardware, software, or both. If implemented in software, the functions may be stored on or transmitted as one or more instructions or code on a computer-readable medium (medium). Computer-readable media includes both computer storage media and communication media, such as any medium that facilitates transfer of a computer program from one place to another.

[0013] Any reference to elements herein using designations such as "first," "second," etc. does not limit the quantity or order of those elements unless such limitation is expressly stated. Rather, these designations may be used herein as a convenient way of distinguishing between two or more elements or instances of an element. Thus, reference to a first element and a second element does not imply that only two elements may be used or that the first element must precede the second element in any way. In addition, unless otherwise stated, a set of elements may include one or more elements.

[0014] As used herein, the term "substantially" when referring to a given parameter, characteristic, or condition means and includes the extent to which one of ordinary skill in the art would understand that the given parameter, characteristic, or condition is met with small variations, such as, for example, within acceptable manufacturing tolerances. As an example, depending on the particular parameter, characteristic, or condition that is substantially met, the parameter, characteristic, or condition may be at least 90% met, at least 95% met, or even at least 99% met.

[0015] Vehicles, such as automobiles, trucks, buses, ships, and / or aircraft, may include a vehicle communication network. The complexity of the vehicle communication network may vary depending on the number of electronic devices in the network. For example, an advanced vehicle communication network may include various control modules, such as for engine control, transmission control, safety control (e.g., anti-lock brakes), and emissions control. To support these modules, the automotive industry relies on a variety of communication protocols.

[0016] 10SPE (i.e., 10 Mbps Single Pair Ethernet) is a network technology specification currently being developed by the Institute of Electrical and Electronic Engineers as specification IEEE 802.3cg™. A 10SPE network may include a number of nodes (also referred to herein as "endpoints"), at least some of which may include a 10SPE physical layer (PHY).

[0017] The 10SPE PHY may operate in half-duplex mode and may support carrier-sense multiple access with collision detection (CSMA / CD), a media access control method most notably used in early Ethernet technologies for local area networking. According to CSMA / CD, a node wishing to transmit over a bus should delay transmission if there is already a carrier on the bus. In other words, if the node senses a carrier on the bus, the node should wait to transmit. The inventors of the present disclosure understand that the above assumes non-simultaneous transmission by the nodes of the network, i.e., assumes that there is a sufficient gap in time when the node begins transmitting later at a time node detects the carrier earlier in the node's data packet at a time node. However, the inventors of the present disclosure understand that sometimes two or more nodes may begin transmitting very close together such that the nodes do not detect an active carrier before they begin transmitting.

[0018] Various embodiments, as described in more detail below, relate to detecting collisions on a shared bus (e.g., a10SPE bus), and more particularly, to detecting collisions at the physical layer (i.e., PHY) of a 10SPE network. In some embodiments, during transmission, the PHY may be configured to observe signal levels on the 10SPE bus and detect collisions on the bus based at least in part on the observed signal levels. Stated differently, during transmission, the PHY may determine whether at least one other node in the network is also transmitting.

[0019] According to various embodiments, detection of abnormal signal amplitudes (e.g., at a 10SPE PHY) may indicate a 10SPE network collision. More specifically, in some embodiments, a network collision may be detected when the amplitude of a signal observed on a bus by a transmitting PHY is greater than or less than an expected amplitude. For example, a PHY transmitting a first signal (a "local transmit signal") may observe a second signal, which may include the first signal and another signal (a "remote transmit signal") transmitted by another PHY. In this example, if the local transmit signal has the same phase as the remote transmit signal, then in theory the signals will constructively interfere and the signal observed at the PHY should have an amplitude greater than the expected amplitude. If the local transmit signal has a different phase than the remote transmit signal, then in theory the signals will destructively interfere with each other and the signal observed at the PHY should have an amplitude less than the expected amplitude.

[0020] In some embodiments, the 10SPE PHY may include a signal detector, which may include, for example, an amplitude detector (e.g., an analog amplitude detector) and optional logic. The signal detector may be operably coupled to the bus and configured to respond to a signal on the bus having an amplitude characteristic of a collision. In some embodiments, a signal detector that may be used to detect a collision while the PHY is operating in a transmit mode may also be used to detect a signal while the PHY is operating in a receive mode.

[0021] In some embodiments, the signal detector of the PHY may be configured to use one or more thresholds. In these embodiments, to detect signals having a larger amplitude than expected, the signal detector may be configured to use a first "larger" threshold. For example, the signal detector may be programmed with a first threshold (e.g., a first differential threshold) during a first stage (e.g., a first number of bits of a collision detection operation). Additionally, to detect signals having a smaller amplitude than expected, the signal detector may be configured to use a second lower threshold (e.g., a second differential threshold). For example, in some embodiments, the lower threshold may be the same threshold used for signal detection (e.g., during a receive mode). For example, the signal detector may be programmed with a second threshold during a second stage (e.g., a second number of bits of a collision detection operation).

[0022] In some embodiments, the output of the signal detector may be multi-sampled (e.g., oversampled) to increase reliability at high time domain resolution, for example, the output of the signal detector may be sampled every 10 nanoseconds.

[0023] In some embodiments, the collision detection operation may be performed for a specified amount of time (e.g., beginning when a signal transmission begins). More specifically, for example, a collision detection operation performed at the PHY may be initiated in response to the PHY transmitting a signal, and the collision detection operation may be performed for a specified bit time (a programmable bit time of N bits (e.g., 512 bits)) following the beginning of the transmission. The specified amount of time may be, by way of non-limiting example and without limitation, a time (e.g., without limitation, microseconds), bits / bytes, symbols, or clock cycles. By way of non-limiting example, the amount of time may be specified with combinatorial logic or control bit values ​​stored in a control register.

[0024] In some embodiments, the collision detection operation may be performed during data transmission (e.g., when transmission is possible). In other embodiments, the collision detection operation may be limited to a specified amount of time, but may help avoid collisions with future input signals. According to various embodiments, after expiration of a programmable bit time (e.g., 512 bits), the collision detection operation may terminate (e.g., due to failure to process and / or utilize a signal generated via the detection circuit (e.g., the output of a signal detector)).

[0025] Various embodiments of the present disclosure will now be described with reference to the accompanying drawings.

[0026] 1 is a block diagram of at least a portion of a network (e.g., a wired local area network) 100, in accordance with some embodiments. More specifically, the network 100 may include a 10SPE network. The network 100 includes a number of nodes (also referred to as "endpoints") operably coupled to a communication bus 104. More specifically, the network 100 includes nodes 102_1, 102_2, 102_3, 102_4, 102_5, and 102_6, generally node 102. Although the network 100 is shown as having six nodes, the disclosure is not so limited and the network may include more than six nodes (e.g., eight nodes, ten nodes, twelve nodes, or more), or less than six nodes (e.g., five nodes, three nodes, or two nodes).

[0027] Each node 102_1, 102_2, 102_3, 102_4, 102_5, and 102_6 is configured to communicate over a communication bus 104, which may include or be a shared bus (e.g., a single twisted pair). As used herein, the term "shared bus" refers to a wired transmission medium, such as a single twisted pair, in which both signal transmission and signal reception occur over the same conductive structure (e.g., one or more cables).

[0028] In at least some embodiments, the network 100 may be used in an automotive environment. More specifically, as a non-limiting example, the network 100 may be configured to connect one or more of the nodes 102 to other nodes, computers, and / or controllers (e.g., in a vehicle). In this example, each node 102 of the network 100 may include, for example, without limitation, an amplifier, a microphone, an antenna, a speaker, and / or a sensor. Other non-limiting examples of application environments include lighting systems, residential and commercial building networks, and elevator networks.

[0029] 2 illustrates an exemplary network segment 101 including a node 102 (e.g., node 102_1, node 102_2, node 102_3, node 102_4, node 102_5, or node 102_6) coupled to a communication bus 104. As illustrated in FIG. 2, the node 102 includes a physical layer (PHY) 106 operably coupled to a media access control (MAC) layer 108. The PHY 106 may be configured to serve as an interface for a physical connection between the MAC 108 and the communication bus 104. In some embodiments, the PHY 106 includes at least a portion of an Ethernet physical layer circuit. As described in more detail below, the PHY (e.g., the PHY 106) may include a transceiver having a transmit circuit and a receive circuit.

[0030] 3A and 3B show timing diagrams illustrating various signals associated with a network (e.g., network 100 of FIG. 1) according to various embodiments of the present disclosure. More specifically, FIG. 3A shows a timing diagram 300 illustrating signals associated with detecting a collision based on a signal observed at a PHY, the observed signal having a larger amplitude than expected. More specifically, timing diagram 300 includes a signal 302 indicative of a signal transmitted by a first node (e.g., at node 102_1) and a signal 304 indicative of a signal transmitted by a second node (e.g., at node 102_2). Timing diagram 300 further includes a signal 306 indicative of a signal observed by a PHY of the second node (e.g., at node 102_2). Timing diagram 300 also shows thresholds 308A and 308B (i.e., for detecting a signal having an amplitude larger than expected in absolute value) and a signal 310 generated at a signal detector at the PHY that may indicate a collision.

[0031] As shown in timing diagram 300, when a first node and a second node transmit simultaneously, the amplitude of signal 306, which represents the signal observed at the PHY of the second node (e.g., at node 102_2), exceeds at least one of thresholds 308A and 308B, and in response, signal 310 transitions from a low state to a high state to indicate a collision. In this example, the absolute value of the amplitude of signal 306 exceeds both thresholds 308A and 308B, so the amplitude of signal 306 is larger than expected (i.e., compared to if only the second node were transmitting). When the amplitude of signal 306 exceeds thresholds 308A and 308B, the amplitude of signal 306 is larger than expected (i.e., compared to if only the second node were transmitting). A 3A , the absolute value of the amplitude of signal 306 does not exceed either of the thresholds for a period of time before the amplitude of signal 306 exceeds threshold 308A, so that signal 310 is deasserted.

[0032] 3B illustrates a timing diagram 350 showing signals associated with detecting a collision based on a signal observed at a PHY having a smaller than expected amplitude. More specifically, timing diagram 350 includes a signal 352 indicative of a signal transmitted by a first PHY (e.g., at node 102_1) and a signal 354 indicative of a signal transmitted by a second PHY (e.g., at node 102_2). Timing diagram 350 further includes a signal 356 indicative of a signal observed by a PHY of a second node (e.g., at node 102_2). Timing diagram 350 also illustrates thresholds 358A and 358B (i.e., for detecting signals having a smaller than expected amplitude) and a collision signal 360 that may indicate a collision.

[0033] As shown in timing diagram 350, when the first node and the second node transmit simultaneously, the absolute value of the amplitude of signal 356 representing the signal observed at the PHY of node 102_2 does not exceed both thresholds 358A and 358B, and therefore signal 360 transitions from a low state to a high state to indicate a collision. In this example, since the absolute value of the amplitude of signal 356 does not exceed both thresholds 358A and 358B, the amplitude of signal 356 is smaller than expected (i.e., compared to the case where only the PHY of the second node transmits). Because the amplitude of signal 306 is smaller than expected, it may be determined that the first PHY and the second PHY transmit simultaneously (here, out of phase).

[0034] As noted above, in some embodiments, collision detection operations may be performed for a specified amount of time during a signal transmission (e.g., to avoid later collisions that may cause packet loss). More specifically, for example, collision detection may only be applied (e.g., initiated in response to a signal transmission) within a specified bit time (e.g., the first 512 bits). In at least some of these embodiments, as a non-limiting example, the remaining duration of a signal transmission (e.g., after the 512 bit times) may be used for other signal detection, which may include carrier signal detection.

[0035] 4 illustrates a timing diagram 400 that includes a period 402 during which a PHY of a first node (e.g., node 102_1 in FIG. 1) transmits ("Remote Tx") and a period 404 during which a PHY of a second node (e.g., node 102_1 in FIG. 1) transmits ("Local Tx"). Additionally, the PHY of the second node (e.g., node 102_1 in FIG. 1) receives a transmit signal ("Local Rx") during each of periods 402 and 404. Timing diagram 400 further illustrates periods 410 and 412 during which another signal threshold detection is performed at the PHY of the second node.

[0036] Timing diagram 400 further illustrates a period 411 during which collision threshold detection is performed at the PHY of the second node. In this example, period 411, which begins in response to a signal transmission by the PHY of the second node, has a programmable duration. By way of a non-limiting example, period 411 may have a duration of approximately 512 bit times. As noted above, in some embodiments, a signal detector of the PHY may be used for collision threshold detection (e.g., during a transmit mode), and thus, in these embodiments, other signal detection may not be performed during period 411. It is specifically contemplated that in other embodiments, the PHY may include circuitry (e.g., two signal detectors) configured to perform other signal threshold detection and collision threshold detection simultaneously.

[0037] 5 illustrates an example PHY 500 in accordance with various embodiments of the present disclosure. PHY 500 is provided as an example PHY configuration that may be used to implement various embodiments disclosed herein. However, the present disclosure is not limited to any particular PHY configuration, and other configurations may be within the scope of the present disclosure.

[0038] For example, PHY 106 of Figure 2 may include PHY 500. PHY 500 may include transmit circuitry 502, which may be configured to communicate transmit data from a MAC (e.g., MAC 108 of Figure 2) to a communications bus 504. For example, bus 504 may be part of communications bus 104 of Figures 1 and 2. Communications bus 504, which may be used for both transmitting and receiving data, may include a single twisted pair (e.g., unshielded twisted pair, or UTP).

[0039] PHY 500 further includes a signal detector 506 and collision logic 508. As described more fully herein, signal detector 506 may be configured to perform signal threshold detection during a time period associated with collision threshold detection (e.g., time 411 of FIG. 4 ), and collision logic 508 may be configured to detect a collision in response to one or more signal thresholds detected by signal detector 506.

[0040] The PHY 500 may further include a calibration unit 510 for tuning the signal detector 506 by tuning one or more thresholds (e.g., thresholds stored in the signal detector 506) and / or for tuning the collision logic 508 with one or more parameters (e.g., a programmable bit time for collision detection), by way of non-limiting example.

[0041] In one or more embodiments, the signal detector 506 may be configured to detect signals outside of a specified threshold observed on the communication bus 504. More specifically, the signal INPUT (e.g., differential signals RXP, RXN shown in FIG. 6) on the bus 504 may be observed at the signal detector 506 (e.g., observed at p and n terminals operably coupled to a single twisted pair type cable). The signal detector 506 may be configured to detect whether the amplitude of the INPUT is outside the threshold and, in response, communicate a logic "1" on the signal det_out to the collision logic 508, and to detect whether the amplitude of the INPUT is within the threshold and, in response, communicate a logic "0" on the signal det_out to the collision logic 508. In response to receiving a logic "1" on the det_out, the collision logic 508 may be configured to transmit a collision detection signal (e.g., signal 310 of FIG. 3A or signal 360 of FIG. 3B) that may be received at a MAC (e.g., MAC 108 of FIG. 2).

[0042] As will be appreciated, the 10SPE PHY may operate in a half-duplex mode, and thus in conventional devices, systems, and / or networks, at least some circuitry of the 10SPE PHY (e.g., signal detector 506) may not be used during a transmit mode. In contrast, according to various embodiments, signal detector 506, which may be used to detect other signal thresholds (e.g., carrier signal thresholds for carrier sense), including during modes other than transmit (e.g., during a receive mode), may be used to detect collisions (e.g., during "collision detection" (also referred to herein as "collision detection operation")) during a transmit mode (i.e., while a signal is being transmitted by circuit 502).

[0043] As described herein, according to some embodiments, collision detection may be performed for a specified amount of time (e.g., a programmable bit time) during a signal transmission. Thus, in at least some of these embodiments, a bit count (i.e., the number of bits transmitted by the circuit 502) may be monitored and provided to the collision logic 508 (e.g., via the transmit circuit 502). If the bit count is equal to the specified number of bits (e.g., 512), the collision detection operation may be terminated. More specifically, in response to a signal transmission by the PHY (i.e., the start of a signal transmission in response to an asserted transmit enable TxEn signal from the MAC 108), a collision detection operation may be initiated at the PHY, and the bits transmitted by the transmit circuit 502 may be monitored and counted by the collision logic 508 as a bit count representing the number of bits transmitted while the collision logic 508 is counting. When the bit count equals a specified number of bits (eg, 512), the collision detection operation may terminate (eg, due to a failure to process and / or utilize a signal (eg, signal det_out) in signal detector 506).

[0044] It should be noted that in some embodiments, at least some portions of the transmit circuitry 502 (e.g., a pulse shaper and / or driver) and / or at least some portions of the receiver (e.g., a signal detector) may be in a chip separate from the chip that includes the signal detector 506 and the collision logic 508.

[0045] 6 illustrates an example signal detector 600 in accordance with various embodiments of the present disclosure. For example, the signal detector 506 of FIG. 5 may include the signal detector 600. As illustrated, the signal detector 600 includes a comparator 602, a comparator 604, and an OR gate 606. Each comparator 602 and 604 receives a threshold control signal thrsh_cntl, which may be generated, for example, via the calibration unit 510 of FIG. 5. <x:0>Since the operation of a signal detector such as signal detector 600 is known to one of ordinary skill in the art, certain details regarding the operation of signal detector 600 will not be described.

[0046] During the intended operation of the signal detector 600, the comparator 602 may detect whether the positive differential signal RXP has reached a first threshold. If so, the output D1 of the comparator 602 is "1". Similarly, the comparator 604 may be used to detect whether the negative differential signal RXN has reached a first threshold (e.g., the negative of the positive threshold). If so, the output D2 of the comparator 604 is "1". If the comparator 602 or the comparator 604 transmits a "1", the OR gate 606 transmits a "1". In particular, since the differential signal continuously switches between its positive and negative amplitudes, the outputs of the comparators 602 and 604 (i.e., outputs D1 and D2, respectively) may not necessarily be continuous "1", but the output of the OR gate 606 may be continuous "1". Thus, the result of the OR gate 606 is a continuous "1" or high potential signal only if the absolute value of the observed signal is greater than the first threshold.

[0047] As mentioned above, the crash threshold detection can be based on different thresholds. More specifically, in one example, the comparators 602 and 604 can be programmed with a first threshold to detect an amplitude greater than an expected amplitude. In this example, if the detector output signal det_out includes a high voltage signal, i.e., a "1", it can be determined that the received signal (e.g., differential signals RXP, RXN) has an amplitude equal to or greater than the first threshold (e.g., a crash has occurred). Otherwise, it can be determined that the received signal (e.g., differential signals RXP, RXN) has an amplitude less than the first threshold. In other embodiments, if the detector output signal det_out includes a high voltage signal for more than a predetermined time (e.g., a few nanoseconds) (i.e., the differential signals RXP, RXN remain above the first differential threshold (i.e., are greater than the first differential threshold) for the predetermined time), it can be determined that a crash has occurred. Otherwise, it can be determined that no crash has occurred.

[0048] Further, in another example, the comparators 602 and 604 may be programmed with a second lower threshold to detect an amplitude less than the expected amplitude. In this example, if the detector output signal det_out includes a low voltage signal, it may be determined that the received signal (e.g., differential signals RXP, RXN) has an amplitude less than the second threshold (e.g., a collision has occurred). Otherwise, it may be determined that the received signal (e.g., differential signals RXP, RXN) has an amplitude equal to or greater than the second threshold. Stated differently, in some embodiments, the collision threshold detection may be characterized by detecting fluctuations outside the range defined by the first and second thresholds. Thus, the result of the OR gate 606 is a continuous "0" or a low voltage signal only if the absolute value of the observed signal is less than the second threshold.

[0049] In other embodiments, if the detector output signal det_out includes a low voltage signal for longer than a programmed time (e.g., a few nanoseconds) (i.e., the differential signals RXP, RXN remain within (i.e., are less than) the second differential threshold for a predetermined time), then it may be determined (e.g., by the collision logic 508) that a collision has occurred. Otherwise, it may be determined that a collision has not occurred.

[0050] Signal detector 600 is provided as an example signal detector and the embodiments disclosed herein are not limited to a particular signal detector. Rather, any suitable signal detector may be used to implement various embodiments of the present disclosure, including but not limited to using multiple signal detectors.

[0051] According to some embodiments, the collision detection signal (e.g., generated via collision logic 508 of FIG. 5) may be used to control the operation of an associated node. More specifically, for example, the collision detection signal may be communicated to a MAC (e.g., MAC 108 of FIG. 2) such that the MAC can stop transmissions of the node if the collision detection signal indicates that a collision has occurred. More specifically, in response to detecting a collision, the MAC can stop any further transmissions, or at least stop further transmissions for a predetermined backoff time.

[0052] 7 is a flow chart of an exemplary method 700 of operating a network, such as a 10SPE network. The method 700 may be reordered according to at least one embodiment described in this disclosure. The method 700 may be performed in some embodiments by a device, system, or network, such as the network 100 of FIG. 1, the node 102 of FIG. 2, the PHY 500 of FIG. 5, and the signal detector 600 of FIG. 6, and / or one or more of their components, or another system or device. In these and other embodiments, the method 700 may be performed based on the execution of instructions stored on one or more non-transitory computer-readable media. Although shown as separate blocks, various blocks may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation.

[0053] Method 700 may begin at block 702, where a bit time for performing collision detection may be programmed, and the method may proceed to block 704. More specifically, for example, a calibration unit (e.g., calibration unit 510 of FIG. 5) may communicate one or more signals to collision logic 508 to program the collision logic 508 with the bit time (e.g., 512 bits).

[0054] In block 704, the signal detector may be programmed with one or more thresholds. More specifically, a calibration unit (e.g., calibration unit 510 of FIG. 5) may communicate a threshold control signal to the signal detector (e.g., signal detector 506 of FIG. 5) to program the signal detector with the threshold. For example, during a crash detection operation, the signal detector (e.g., signal detector 506) may be programmed with a first threshold during a first stage (e.g., a first number of bits (e.g., 256 bits)) of the crash threshold detection operation, and the signal detector may be programmed with a different threshold during a second stage (e.g., a second number of bits (e.g., 256 bits)) of the crash detection operation. Alternatively, multiple instances of the signal detector 506 may be provided, each provided with a respective threshold.

[0055] At block 706, the first signal may be transmitted to the shared bus, and method 700 may proceed to block 708. For example, a PHY of node 102_2 of the 10SPE network (see FIG. 1) may transmit a signal to bus 104 (see FIG. 1).

[0056] At block 708, a second signal on the shared bus may be observed, and method 700 may proceed to block 710. More specifically, for example, the PHY of node 102_2 (see FIG. 1) may observe a second signal (e.g., input signal INPUT of FIG. 5) while transmitting the first signal. In one embodiment, a differential signal may be observed (e.g., at a differential input), and the differential signal may represent the second signal.

[0057] At block 710, the amplitude of the observed signal may be compared to a number of thresholds, and method 700 may proceed to block 712. For example, the absolute value of the amplitude of the observed signal may be compared to a first set of thresholds (e.g., thresholds 308A and / or 308B of FIG. 3A) and / or a second set of thresholds (e.g., thresholds 358A and / or 358B of FIG. 3B). More specifically, for example, during a first stage (e.g., a first number of bits), the amplitude of the observed signal may be compared (e.g., via signal detector 506 of FIG. 5) to a first set of thresholds (e.g., thresholds 308A and / or 308B of FIG. 3A) to determine whether the absolute value of the amplitude of the observed signal is greater than the first set of thresholds (i.e., greater than expected). Further, for example, during a second stage (e.g., a second number of bits), the amplitude of the observed signal may be compared (e.g., via signal detector 506 of FIG. 5) to a second set of thresholds (e.g., thresholds 358A and / or 358B of FIG. 3B) to determine whether the absolute value of the amplitude of the observed signal is less than the second set of thresholds (i.e., less than expected).

[0058] At block 712, it may be determined whether a collision has occurred based on a comparison of the amplitude of the observed signal to the number of thresholds, and method 700 may proceed to block 714. In some embodiments, based on a collision signal (e.g., signal det_out from signal detector 506 of FIG. 5), collision logic (e.g., collision logic 508 of FIG. 5) may determine whether a collision has occurred. More specifically, for example, a collision may be determined to have occurred in response to an absolute value of the amplitude of the observed signal being greater than a first differential threshold (e.g., thresholds 308A and / or 308B of FIG. 3A) or less than a second differential threshold (e.g., thresholds 358A and / or 358B of FIG. 3B).

[0059] At block 714, the collision detection process may be terminated (e.g., after expiration of a programmable bit time (e.g., 512 bits). More specifically, for example, in response to a bit count (e.g., determined via transmit circuitry 502) matching a programmed bit time (e.g., in collision logic 508). Optionally, at block 714, signal detection may be set to a receive mode, and more specifically, for example, to use another signal threshold associated with the period of other signal threshold detection 412 of FIG. 4.

[0060] Modifications, additions, or omissions may be made to method 700 without departing from the scope of the present disclosure. For example, the operations of method 700 may be performed in a different order. Additionally, the outlined operations and actions are provided only as examples, and some of the operations and actions may be optional, may be combined into fewer operations and actions, or may be expanded into additional operations and actions without departing from the essence of the disclosed embodiments.

[0061] Further, according to some embodiments, method 700 may include oversampling the signal generated by the signal detector (e.g., to improve reliability and / or accuracy). More specifically, for example, for a bitwise integration of X nanoseconds, the received signal may be sampled N times. In other words, N samples of the received signal may be processed every bit time (e.g., every 80 nanoseconds). More specifically, as an example, a sample of the received signal may be processed every 10 nanoseconds.

[0062] As disclosed herein, various embodiments may relate to a low power, fast, and efficient collision detection method, as the associated circuitry may require only a small area. Various embodiments of the present disclosure may be implemented in, but are not limited to, 10SPE networks for various applications, such as automotive applications, industrial applications, server backplanes, etc. Furthermore, various embodiments of the present disclosure may be applicable to, but are not limited to, architecture, elevators, lighting, industrial in-field, and Internet of Things (IOT).

[0063] As used in this disclosure, the term "module" or "component" may refer to a specific hardware implementation configured to perform the actions of a module or component and / or software object or routine that may be stored on and / or executed by general-purpose hardware (e.g., computer-readable media, processing device, etc.) of a computing system. In some embodiments, different components, modules, engines, and services described in this disclosure may be implemented as objects or processes that execute on a computing system (e.g., as separate threads). Although some of the systems and methods described in this disclosure are generally described as being implemented in software (stored and / or executed on general-purpose hardware), specific hardware implementations or combinations of software and specific hardware implementations are also possible and contemplated.

[0064] The terms used in this disclosure, and particularly in the appended claims (e.g., the body of the appended claims), are generally intended as "open" terms (e.g., the term "including" should be interpreted as "including, but not limited to," the term "having" should be interpreted as "having at least," the term "including" should be interpreted as "including, but not limited to," etc.).

[0065] In addition, where a specific number is intended in an introduced claim recitation, such intent will be expressly recited in the claim, and in the absence of such recitation, no such intent exists. For example, as an aid to understanding, the following appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed as limiting any particular claim that includes such an introduced claim recitation to embodiments that include only one of such recitations, even if the same claim includes the introductory phrases "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should be construed to mean "at least one" or "one or more"). The same applies to the use of definite articles used to introduce claim recitations.

[0066] In addition, even if a particular number in an introduced claim recitation is explicitly recited, one of ordinary skill in the art will recognize that such recitation should be interpreted to mean "at least the recited number" (e.g., an explicit recitation of "two ____" without other modifiers means "at least two or more than two ____"). Furthermore, when a convention similar to "at least one of A, B, and C, etc." or "one or more of A, B, and C, etc." is used, it is generally intended that such a structure includes only A, only B, only C, A and B together, A and C together, B and C together, or A, B, and C together, etc.

[0067] Moreover, any disjunction or phrase presenting two or more alternative terms, whether in the specification, claims, or drawings, should be understood to contemplate the possibility of including one of the terms, either of the terms, or both terms. For example, the phrase "A or B" should be understood to include the possibilities of "A" or "B" or "A and B."

[0068] Further non-limiting embodiments of the present disclosure are as follows.

[0069] Embodiment 1: A method of operating a physical layer (PHY) of a 10SPE network, comprising: transmitting a first signal from a node to a shared bus; observing a second signal on the shared bus during at least a portion of the transmission; and detecting a collision on the shared bus in response to detecting that the observed second signal is at least one of greater than a first threshold or less than a second threshold.

[0070] Embodiment 2: The method of embodiment 1, further comprising comparing an amplitude of the observed second signal to at least one of the first threshold and a second threshold.

[0071] Embodiment 3: The method of embodiment 1 or 2, wherein the step of comparing the amplitude of the observed second signal to at least one of the first threshold and the second threshold includes a step of comparing the amplitude of the observed second signal to both the first threshold and the second threshold.

[0072] Embodiment 4: The method according to any one of embodiments 1 to 3, wherein the step of comparing the amplitude of the second signal with at least one of the first threshold and the second threshold includes the step of comparing an amplitude of a differential signal with at least one of the first threshold and the second threshold.

[0073] Embodiment 5: The method of any one of embodiments 1 to 4, wherein the step of detecting the collision includes detecting the collision during a programmable bit time.

[0074] Embodiment 6: A method of operating a single pair Ethernet physical layer (PHY), comprising: transmitting a first signal on a shared bus; and performing collision threshold detection during the transmission of the first signal and in response to the first signal being transmitted, the performing collision threshold detection comprising: observing an amplitude of a second signal on the shared bus; and determining that a collision has occurred in response to an absolute value of the observed amplitude of the second signal being at least one of greater than a first threshold or less than a second threshold.

[0075] Embodiment 7: The method of embodiment 6, wherein observing the amplitude of the second signal includes observing the amplitude of a differential signal.

[0076] Embodiment 8: The method of embodiment 6 or 7, wherein the step of performing collision threshold detection further includes the steps of programming a signal detector of the PHY to the first threshold, comparing via the signal detector an absolute value of the amplitude of the second signal to the first threshold, programming the signal detector of the PHY to the second threshold, and comparing via the signal detector the absolute value of the amplitude of the second signal to the second threshold, and the step of determining that the collision has occurred includes the step of determining that the collision has occurred in response to the absolute value of the amplitude of the second signal being at least one of greater than the first threshold or less than the second threshold.

[0077] Embodiment 9: A physical layer (PHY) device comprising: a transmitter configured to transmit a first signal over a shared bus; a signal detector configured to observe a second signal on the shared bus during transmission of the first signal, compare an amplitude of the observed second signal to a number of thresholds, and generate a detector output signal based on a comparison of the amplitude of the observed second signal to at least one of the number of thresholds; and collision logic coupled to the signal detector configured to receive the detector output signal and determine whether a collision has occurred on the shared bus based on the detector output signal.

[0078] Embodiment 10: The device of embodiment 9, wherein the signal detector is configured to receive a control signal for programming the at least one threshold value.

[0079] Embodiment 11: A device as described in embodiment 9 or 10, further comprising a calibration unit configured to transmit one or more control signals to the signal detector to set the at least one threshold value.

[0080] Embodiment 12: A device described in any one of embodiments 9 to 11, wherein the signal detector includes a first comparator configured to receive a differential signal including the second signal and generate a first detection signal, a second comparator configured to receive the differential signal including the second signal and generate a second detection signal, and an OR gate configured to receive the first detection signal and the second detection signal and generate the detector output signal.

[0081] Embodiment 13: A device described in any one of embodiments 9 to 12, wherein the signal detector is further configured to detect an input signal in a receiving mode.

[0082] Embodiment 14: A device described in any one of embodiments 9 to 13, wherein the collision logic is configured to sample the detector output signal at a sampling frequency of approximately once every 10 nanoseconds.

[0083] While the present disclosure has been described herein with respect to certain illustrated embodiments, those skilled in the art will recognize and understand that the present invention is not so limited. Rather, numerous additions, deletions, and modifications can be made to the illustrated and described embodiments without departing from the scope of the present invention as claimed below along with their legal equivalents. In addition, features of one embodiment can be combined with features of other disclosed embodiments as contemplated by the inventor and still fall within the scope of the present disclosure.

Claims

1. 1. A method of operating a physical layer (PHY) of a 10SPE network, comprising: Initiating transmission of a first signal from the node onto the shared bus; initiating a bit count in response to the step of initiating transmission of the first signal; observing a second signal on the shared bus before the bit count is equal to a programmed bit time; and detecting a collision on the shared bus in response to detecting the observed second signal being at least one of greater than a first programmed threshold and less than a second programmed threshold.

2. 2. The method of claim 1, further comprising the step of comparing an amplitude of the observed second signal to at least one of the first programmed threshold and the second programmed threshold.

3. 3. The method of claim 2, wherein comparing the amplitude of the observed second signal to at least one of the first programmed threshold and the second programmed threshold comprises comparing the amplitude of the observed second signal to both the first programmed threshold and the second programmed threshold.

4. 3. The method of claim 2, wherein comparing the amplitude of the second signal to at least one of the first programmed threshold and the second programmed threshold comprises comparing an amplitude of a differential signal including the second signal to at least one of the first programmed threshold and the second programmed threshold.

5. The method of claim 1 , wherein detecting the collision comprises detecting the collision during a programmable bit time.

6. 1. A method of operating a single pair Ethernet physical layer (PHY), comprising: Initiating transmission of a first signal onto a shared bus; initiating a bit count in response to the step of initiating transmission of the first signal; and performing collision detection in response to the step of initiating transmission of the first signal, the step of performing collision detection comprising: observing an amplitude of a second signal on the shared bus before the bit count is equal to a programmed bit time; and determining that a collision has occurred in response to the absolute value of the observed amplitude of the second signal being at least one of greater than a first programmed threshold or less than a second programmed threshold.

7. The method of claim 6 , wherein observing the amplitude of the second signal comprises observing the amplitude of a differential signal that includes the second signal.

8. The method of claim 1, further comprising: programming a signal detector of the PHY to the first programmed threshold; comparing, via the signal detector, the absolute value of the amplitude of the second signal to the first programmed threshold; programming the signal detector of the PHY to the second programmed threshold; 7. The method of claim 6, further comprising: comparing, via the signal detector, the absolute value of the amplitude of the second signal to the second programmed threshold.

9. 1. A physical layer (PHY) device, comprising: a transmitter configured to transmit a first signal over the shared bus; 1. A signal detector comprising: observing a second signal on the shared bus during transmission of the first signal; comparing the amplitude of the observed second signal to a number of predetermined thresholds; a signal detector configured to generate a detector output signal based on a comparison of the amplitude of the observed second signal to at least one of the number of predetermined thresholds; collision logic coupled to the signal detector, Initiating a bit count in response to a start of transmission of the first signal; receiving the detector output signal; if the detector output signal is received before the bit count is equal to a programmed bit time, determining whether a collision has occurred on the shared bus based on the detector output signal; and collision logic configured to terminate a collision detection process if the detector output signal is received after the bit count is equal to a programmed bit time.

10. The device of claim 9 , wherein the signal detector is configured to receive a control signal for programming the at least one predetermined threshold.

11. The device of claim 9 , further comprising a calibration unit configured to communicate one or more control signals to the signal detector to set the at least one predetermined threshold.

12. The signal detector includes: a first comparator configured to receive a differential signal including the second signal and to generate a first detection signal; a second comparator configured to receive the differential signal including the second signal and to generate a second detection signal; an OR gate configured to receive the first and second detection signals and generate the detector output signal;

13. 10. The device of claim 9, wherein the collision logic is configured to sample the detector output signal at a sampling frequency of approximately once every 10 nanoseconds.

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