Generative modeling of quantum hardware

Abstract

A computer-implemented method for simulating quantum hardware performance can include accessing, by a computing system including one or more computing devices, a quantum hardware sample generation model configured to generate samples of the quantum hardware. The quantum hardware sample generation model can include parameters of one or more quantum hardware. The computer-implemented method can include sampling, by the computing system, samples of the quantum hardware from the quantum hardware sample generation model. The computer-implemented method can include obtaining, by the computing system, one or more simulated performance measures based at least in part on the samples of the quantum hardware.

Description

[Technical field]

[0001] The present disclosure relates generally to quantum computing, including systems and methods for generative modeling of quantum hardware. [Background technology]

[0002] Quantum computing is a computational methodology that utilizes quantum effects such as superposition and entanglement of basis states to perform certain calculations more efficiently than classical digital computers. In contrast to digital computers, which store and manipulate information in the form of bits, e.g., “1” or “0”, quantum computing systems can manipulate information using quantum bits (“qubits”). A qubit can refer to a quantum device that allows for a superposition of multiple states, e.g., data in both “0” and “1” states, and / or the superposition of multiple states of data itself. In conventional terminology, the superposition state of “0” and “1” in a quantum system may be represented, for example, as |0〉+b|1〉. The “0” and “1” states of a digital computer are analogous to the |0〉 and |1〉 basis states of a qubit, respectively. Summary of the Invention [Means for solving the problem]

[0003] Aspects and advantages of embodiments of the disclosure will be set forth in part in the description that follows, or may be learned from the description, or may be learned by practice of the embodiments.

[0004] One exemplary aspect of the present disclosure is directed to a computing system configured to generate quantum hardware samples. The computing system may include one or more processors and one or more memory devices. The one or more memory devices may store computer-readable data defining a quantum hardware sample generation model and instructions that, when executed, cause the quantum hardware sample generation model to provide quantum hardware samples. The quantum hardware sample generation model may have one or more quantum hardware parameter distributions. The quantum hardware sample generation model may have one or more quantum hardware parameter dependencies that define a relationship between the one or more quantum hardware parameter distributions. The one or more quantum hardware parameter distributions and the one or more quantum hardware parameter dependencies may define a statistical network having a hardware distribution that, when sampled, generates the quantum hardware sample. The quantum hardware sample may be configured to model the performance of the quantum hardware.

[0005] Another exemplary aspect of the present disclosure is directed to a computer-implemented method for simulating performance of quantum hardware. The computer-implemented method can include accessing, by a computing system including one or more computing devices, a quantum hardware sample generation model configured to generate samples of the quantum hardware. The quantum hardware sample generation model can have parameters of one or more quantum hardware. The computer-implemented method can include sampling, by the computing system, samples of the quantum hardware from the quantum hardware sample generation model. The computer-implemented method can include obtaining, by the computing system, one or more simulated performance measures based at least in part on the samples of the quantum hardware.

[0006] Another exemplary aspect of the present disclosure is directed to a computer-implemented method for generating quantum hardware samples that simulate the performance of the quantum hardware. The computer-implemented method can include accessing, by a computing system including one or more computing devices, a quantum hardware sample generation model configured to generate the quantum hardware samples. The quantum hardware sample generation model can have one or more quantum hardware parameter distributions and a statistical network of one or more quantum hardware parameter dependencies. The computer-implemented method can include sampling, by the computing system, the quantum hardware sample generation model to obtain the quantum hardware samples. Sampling the quantum hardware sample generation model can include sampling one or more parameter samples from each of the one or more quantum hardware parameter distributions and propagating the one or more parameter samples through a statistical network based on the one or more quantum hardware parameter dependencies.

[0007] Other aspects of the disclosure are directed to various systems, apparatus, non-transitory computer-readable media, user interfaces, and electronic devices.

[0008] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and form a part of this specification, illustrate exemplary embodiments of the present disclosure and, together with the description, serve to explain relevant principles.

[0009] A detailed discussion of embodiments directed to those skilled in the art with reference to the accompanying drawings is provided herein. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram of an exemplary quantum computing system in accordance with an exemplary embodiment of the present disclosure. [Figure 2A] FIG. 1 is a block diagram of an exemplary quantum hardware sample generation model according to an exemplary embodiment of the present disclosure. [Figure 2B] FIG. 1 is a block diagram of an exemplary quantum hardware sample generation model according to an exemplary embodiment of the present disclosure. [Figure 2C] FIG. 1 is a block diagram of an exemplary quantum hardware sample generation model according to an exemplary embodiment of the present disclosure. [Figure 2D] FIG. 1 is a block diagram of an exemplary quantum hardware sample generation model according to an exemplary embodiment of the present disclosure. [Figure 2E] FIG. 1 is a block diagram of an exemplary quantum hardware sample generation model according to an exemplary embodiment of the present disclosure. [Diagram 3] 1 is a flow diagram of an example system for designing quantum hardware employing an example quantum hardware sample generation model according to an example embodiment of the present disclosure. [Figure 4] 1 is a flow diagram of an example system for designing quantum hardware employing an example quantum hardware sample generation model according to an example embodiment of the present disclosure. [Diagram 5] 1 is a flow diagram of an exemplary computer-implemented method for simulating the performance of quantum hardware, according to an exemplary embodiment of the present disclosure. [Figure 6] 1 is a flow diagram of an exemplary computer-implemented method for generating samples of quantum hardware that simulate the performance of the quantum hardware, in accordance with an exemplary embodiment of the present disclosure. [Figure 7A] FIG. 1 is a block diagram of an exemplary computing system for performing quantum hardware sample model generation, according to an exemplary embodiment of the present disclosure. [Figure 7B]FIG. 1 is a block diagram of an example computing device that performs quantum hardware sample model generation, according to an example embodiment of the present disclosure. [Figure 7C] FIG. 1 is a block diagram of an example computing device that performs quantum hardware sample model generation, according to an example embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Reference numbers repeated among the figures are intended to identify like features in various implementations.

[0012] Reference will now be made in detail to the embodiments, one or more examples of which are illustrated in the drawings. Each example is provided for the purpose of illustrating the embodiments, not for the purpose of limiting the disclosure. Indeed, it will be apparent to those skilled in the art that various modifications and variations may be made to the embodiments without departing from the scope or spirit of the disclosure. For example, features illustrated or described as part of one embodiment may be used with another embodiment to yield yet a further embodiment. Accordingly, it is intended that aspects of the disclosure encompass such modifications and variations.

[0013] Designing quantum hardware can be a time-consuming and costly procedure. For example, one aspect of designing quantum hardware may include developing circuit design parameters (e.g., resistance of Josephson junctions, mutual inductance or coupling capacitance between control lines and qubits, coupling capacitance between qubits, etc.) with satisfactory values ​​to provide desired operating parameters (e.g., frequency of single-qubit and / or two-qubit gates, such as in frequency-tunable superconducting transmon qubits) to execute quantum algorithms with high fidelity, quality, reliability, repeatability, etc. Thus, testing the selection of circuit design parameters may require developing and prototyping the entire quantum processor, which can be a costly process. In some cases, human intuition may substitute for some evaluation steps, but human intuition may become unreliable, especially as quantum hardware scales become increasingly large. Furthermore, it may be difficult to propagate all aspects of the design (e.g., uncertainties) through complex probabilistic relationships with an increasing number of dependencies and / or increasing scope.

[0014] Exemplary aspects of the present disclosure are directed to generative modeling of quantum hardware (e.g., a quantum processor including one or more qubits). According to exemplary aspects of the present disclosure, samples of quantum hardware that can be used to simulate the behavior and / or performance of the quantum hardware may be generated by a quantum hardware sample generation model. Parameters of the quantum hardware may be modeled by any (e.g., designed) and / or experimentally measured distributions for random variables. The quantum hardware sample generation model may include a statistical network (e.g., a Bayesian network) that relates distributions of parameters of the quantum hardware as multiple nodes (e.g., distributions of parameters of the quantum hardware) connected by edges and / or dependencies (e.g., dependencies of parameters of the quantum hardware). For example, dependencies (e.g., conditional dependencies) may be defined between distributions of parameters of the quantum hardware based on known and / or understood dependencies in the quantum hardware. Additionally and / or alternatively, parameters of the quantum hardware with unknown dependencies may be treated as independent distributions. Additionally and / or alternatively, in some implementations (e.g., where there is sufficient available training data), machine learning modeling techniques, such as the use of neural networks, may be employed to generate and / or otherwise provide insight into parameter dependencies of the quantum hardware. For example, parameters and / or dependencies of a statistical network may be learned through the application of machine learning modeling and / or training techniques.

[0015] The statistical network may include as a final output a distribution of hardware (e.g., hardware distribution nodes) that conditionally depends (e.g., directly and / or through intermediate distributions) on some or all of the distributions of the parameters of the quantum hardware. The distribution of hardware may be sampled (e.g., by a pre-sampling process) to generate a sample of quantum hardware. A probabilistic approach to modeling that includes a statistical (e.g., Bayesian) network of distributions can more accurately model the variability between individual instances of quantum hardware, as found in manufactured quantum hardware. This can enable an improved (e.g., more accurate) design process, for example, compared to including only a single (e.g., fixed and / or non-probabilistic) parameter.

[0016] For example, a computing system may be configured to generate samples of quantum hardware. The computing system may include one or more processors and / or one or more memory devices. The one or more memory devices may store computer-readable data defining a quantum hardware sample generation model and instructions that, when executed, cause the quantum hardware sample generation model to provide samples of the quantum hardware. The samples of the quantum hardware may be simulated samples of the quantum hardware according to distributions and / or dependencies of parameters of the quantum hardware.

[0017] The quantum hardware sample generation model may include a distribution of one or more parameters of the quantum hardware. In some implementations, the distribution of the one or more parameters of the quantum hardware may include one or more experimentally measured distributions of parameters of the quantum hardware. For example, the distribution of the experimentally measured parameters of the quantum hardware may be experimentally measured from the performance of actual (e.g., fabricated) quantum hardware. In some implementations, the distribution of the one or more parameters of the quantum hardware may include a distribution of one or more designed parameters of the quantum hardware. For example, the designed quantum hardware parameter distributions may be specified and / or otherwise generated based on target performance, expected performance, etc., such as in lieu of experimental measurement.

[0018] In some implementations, the distribution of parameters of the one or more quantum hardware may include at least one of one or more circuit parameters, one or more electrical parameters, one or more fabrication parameters, and / or one or more defect parameters. For example, in some implementations, the distribution of one or more parameters of the quantum hardware may include at least one of: capacitance (e.g., qubit self-capacitance), junction resistance (e.g., Josephson junction resistance), qubit anharmonicity, qubit-control mutual inductance distribution, maximum frequency, readout resonator frequency, Josephson junction asymmetry, TLS number density of a two-level system (TLS), TLS frequency, TLS coherence, TLS qubit-decoupling, qubit quality, qubit-control mutual inductance prime distribution, drive impedance, resonator internal quality, resonator coupling quality, resonator-qubit coupling efficiency, bandpass filter frequency, bandpass filter quality, transmon frequency, T1 spectrum, single qubit frequency, or qubit grid frequency. In some implementations, the quantum hardware sample generation model may be or include a joint probability distribution over the distribution of parameters of the quantum hardware.

[0019] Additionally and / or alternatively, the quantum hardware sample generation model may include one or more quantum hardware parameter dependencies that define relationships between distributions of one or more quantum hardware parameters. The one or more quantum hardware parameter distributions and the one or more quantum hardware parameter dependencies may define a statistical network that includes the hardware distributions that generate the quantum hardware samples when sampled. In some implementations, the statistical network may be or may include a Bayesian network. In some implementations, the one or more quantum hardware parameter dependencies may include one or more conditional independence relationships between the distributions of the quantum hardware parameters with unknown dependencies and / or one or more conditional dependencies that relate the distributions of the quantum hardware parameters based on known dependencies.

[0020] In some implementations, the quantum hardware sample-generating model may include a machine-learned quantum hardware sample-generating model. For example, dependencies of parameters of one or more quantum hardware may be learned based at least in part on training the machine-learned quantum hardware sample-generating model. Additionally and / or alternatively, the statistical network may be or include a machine-learned neural network.

[0021] A sample of quantum hardware may represent the performance of quantum hardware, such as a quantum processor including one or more qubits. For example, a sample of quantum hardware may include some or all information about a theoretical instance of quantum hardware that is useful for estimating the performance of the quantum hardware. The information may include various parameters, such as, for example, a single number, multiple parameters (e.g., its database), relationships, etc. For example, in some implementations, a sample of quantum hardware may include and / or be otherwise useful for defining multiple sub-models, each configured to predict and / or otherwise describe the behavior of at least one of multiple performance indicators of the quantum hardware. For example, the multiple performance indicators may include frequency-dependent T1 relaxation, frequency-dependent T2 dephasing, and / or any other suitable performance indicator.

[0022] The computing system is capable of performing a computer-implemented method (e.g., by one or more processors performing one or more instructions) for simulating the performance of quantum hardware.

[0023] The computer-implemented method may include accessing (e.g., by a computing system including one or more computing devices) a quantum hardware sample generation model configured to generate samples of the quantum hardware. The quantum hardware sample generation model may include parameters of the one or more quantum hardware.

[0024] Additionally and / or alternatively, the computer-implemented method may include sampling (e.g., by the computing system) a sample of the quantum hardware from a quantum hardware sample generation model. In some implementations, sampling a sample of the quantum hardware from the quantum hardware sample generation model may include sampling a sample of the one or more parameters from each of a distribution of the one or more quantum hardware parameters and / or propagating the sample of the one or more parameters through a statistical network including dependencies of the one or more quantum hardware parameters. In some implementations, sampling a sample of the one or more parameters may include pre-sampling a sample of the one or more parameters.

[0025] Additionally and / or alternatively, the computer-implemented method may include obtaining (e.g., by the computing system) one or more simulated performance measurements based at least in part on the samples of the quantum hardware.

[0026] For example, in some implementations, obtaining one or more simulated performance measures may include determining (e.g., by the computing system) one or more operating parameters using an optimization algorithm and simulating (e.g., by the computing system) one or more simulated performance measures based at least in part on the one or more operating parameters. For example, in some implementations, the one or more operating parameters may include one or more operating frequencies.

[0027] Additionally and / or alternatively, in some implementations, obtaining one or more simulated performance measurements from the sample of quantum hardware may include providing the sample of quantum hardware to a quantum circuit simulator system (e.g., by the computing system). The quantum circuit simulator system may be configured to simulate the performance of the sample of quantum hardware with respect to one or more quantum testing algorithms. For example, the quantum testing algorithm can be any one or more quantum algorithms that may be suitable for evaluating the performance of the sample of quantum hardware. For example, the quantum testing algorithm may be or include an algorithm (e.g., an at least partially and / or purely classical algorithm and / or a quantum algorithm) that may be used to evaluate the performance of the quantum hardware with respect to one or more quantum algorithms of interest. Additionally and / or alternatively, in some implementations, obtaining one or more simulated performance measurements may include obtaining one or more algorithm errors with respect to the one or more testing algorithms from the quantum circuit simulator system (e.g., by the computing system).

[0028] Additionally and / or alternatively, the computer-implemented method may include obtaining (e.g., by the computing system) one or more performance distances between the one or more simulated performance measures and the one or more target performance measures.

[0029] Additionally and / or alternatively, the computer-implemented method may include performing (e.g., by the computing system) a control action to adjust at least one of the distributions of the parameters of the one or more quantum hardware based at least in part on the one or more performance distances. For example, in some implementations, the control action may be or may include any one or more of incrementing, decrementing, shifting, stretching, substituting, and / or changing the type of distribution of at least one of the distributions of the parameters of the one or more quantum hardware.

[0030] The computing system is capable of performing a computer-implemented method (e.g., by one or more processors performing one or more instructions) for generating samples of quantum hardware that simulate the performance of the quantum hardware.

[0031] The computer-implemented method may include accessing (e.g., by a computing system including one or more computing devices) a quantum hardware sample generation model configured to generate samples of the quantum hardware. The quantum hardware sample generation model may include a statistical network of distributions of parameters of the one or more quantum hardware and dependencies of the parameters of the one or more quantum hardware.

[0032] Additionally and / or alternatively, the computer-implemented method may include sampling (e.g., by the computing system) the quantum hardware sample generation model to obtain samples of the quantum hardware. Sampling the quantum hardware sample generation model may include sampling a sample of the one or more parameters from each of a distribution of the one or more quantum hardware parameters and / or propagating the sample of the one or more parameters through a statistical network based on dependencies of the one or more quantum hardware parameters.

[0033] Aspects of the present disclosure provide numerous technical effects and advantages. The quantum hardware samples may be used to simulate and design quantum hardware, including quantum hardware that may be impractical to design or test using physical prototypes. As one example, the quantum hardware samples may be scalable to a large number of qubits. This may enable the generation of quantum hardware samples that may be used to evaluate the performance of quantum algorithms on quantum hardware that is significantly larger than contemporary systems. For example, where quantum hardware systems generally have on the order of hundreds of qubits that perform reliable operation, quantum hardware samples may be generated that simulate quantum hardware with thousands or more qubits. Thus, the quantum hardware samples may facilitate the evaluation of quantum hardware architectures and / or designs at qubit sizes that may be impractical to manufacture. Additionally, the quantum hardware samples may provide reduced costs during the quantum hardware design process. For example, the quantum hardware samples may reduce fabrication costs associated with physical prototypes and / or modifications of physical prototypes.

[0034] According to example aspects of the present disclosure, an optimization algorithm may determine operational parameters for the sample of quantum hardware. Performance of the sample of quantum hardware may be evaluated at the operational parameters. For example, in some implementations, an evaluation model may estimate the performance of the quantum hardware represented by the sample of quantum hardware based on the operational parameters. This may be useful, for example, to determine operational parameters of prototype hardware, to evaluate the quality of the prototype hardware, etc. Additionally, the optimization algorithm may be useful for evaluating the feasibility of developing quantum hardware via the sample of quantum hardware. For example, if the performance of the sample of quantum hardware is sufficient, then actual quantum hardware (e.g., a quantum processor) can be developed, fabricated, etc. according to the distribution of the parameters of the quantum hardware. Additionally, the sample of quantum hardware may indicate potentially troubling problems (e.g., recursion), such as potentially troubling problems with a particular architecture, potentially troubling problems at a particular scaling, etc., without requiring development of physical hardware according to the parameters of the sample of quantum hardware. For example, if the performance of the quantum hardware samples is insufficient (e.g., the desired performance of the target algorithm is not achieved), the architecture (e.g., parameters, dependencies, etc.) may be adjusted and / or the quantum hardware sample generation model may be resampled until the quantum hardware samples exhibit the desired performance.

[0035] 1 illustrates an exemplary quantum computing system 100. The exemplary system 100 is one example of a system on one or more classical computers or quantum computing devices in one or more locations in which the systems, components, and techniques described below may be implemented. Those skilled in the art using the disclosure provided herein will understand that other quantum computing structures or systems may be used without departing from the scope of the present disclosure. For example, a sample of quantum hardware may be configured to simulate the behavior of quantum computing system 100 (e.g., quantum hardware 102) and / or any other suitable quantum computing system in accordance with exemplary aspects of the present disclosure.

[0036] The system 100 includes quantum hardware 102 in data communication with one or more classical processors 104. The quantum hardware 102 includes components for performing quantum computations. For example, the quantum hardware 102 includes a quantum system 110, a control device 112, and a readout device 114 (e.g., a readout resonator). The quantum system 110 may include one or more multi-level quantum subsystems, such as a register of qubits. In some implementations, the multi-level quantum subsystem may include superconducting qubits, such as, for example, flux qubits, charge qubits, transmon qubits, gmon qubits, etc.

[0037] The type of multi-level quantum subsystem utilized by system 100 may vary. For example, in some cases it may be advantageous to include one or more readout devices 114 attached to one or more superconducting qubits, e.g., transmon, flux, gmon, xmon, or other qubits. In other cases, ion traps, photonic devices, or superconducting cavities (wherein the state may be prepared without the need for qubits) may be used. Further examples of implementations of multi-level quantum subsystems include fluxmon qubits, silicon qudots, or phosphorus impurity qubits.

[0038] A quantum circuit may be constructed and applied to a register of qubits included in quantum system 110 via a number of control lines coupled to one or more control devices 112. An exemplary control device 112 operating on a register of qubits may be used to implement a quantum logic gate or a circuit of quantum logic gates, such as a Pauli gate, a Hadamard gate, a controlled NOT (CNOT) gate, a controlled phase gate, a T-gate, a multi-qubit quantum gate, a coupler quantum gate, etc. The one or more control devices 112 may be configured to operate on quantum system 110 through one or more respective control parameters (e.g., one or more physical control parameters). For example, in some implementations, the multi-level quantum subsystem may be a superconducting qubit, and the control device 112 may be configured to provide control pulses to the control lines to generate a magnetic field to tune the frequency of the qubit.

[0039] The quantum hardware 102 may further include a readout device 114 (e.g., a readout resonator). Measurement results 108 obtained by the measurement device may be provided to the classical processor 104 for processing and analysis. In some implementations, the quantum hardware 102 may include quantum circuits, and the control device 112 and readout device 114 may implement one or more quantum logic gates that operate on the quantum system 102 through physical control parameters (e.g., microwave pulses) transmitted over wiring included in the quantum hardware 102. Further examples of control devices include arbitrary waveform generators in which a DAC (digital-to-analog converter) generates a signal.

[0040] The readout device 114 may be configured to perform a quantum measurement on the quantum system 110 and transmit the measurement result 108 to the classical processor 104. Additionally, the quantum hardware 102 may be configured to receive data specifying the physical control qubit parameter values ​​106 from the classical processor 104. The quantum hardware 102 may use the received physical control qubit parameter values ​​106 to update the action of the control device 112 and the readout device 114 on the quantum system 110. For example, the quantum hardware 102 may receive data specifying new values ​​representing voltage strengths of one or more DACs included in the control device 112 and may update the action of the DACs on the quantum system 110 accordingly. The classical processor 104 may be configured to initialize the quantum system 110 to an initial quantum state, for example by transmitting data specifying an initial set of parameters 106 to the quantum hardware 102.

[0041] The readout device 114 can measure the state of an element (e.g., a qubit) of a quantum system, such as a qubit, by utilizing the difference in impedance for the |0〉 and |1〉 states of the element. For example, the resonant frequency of the readout resonator may have different values ​​when the qubit is in state |0〉 or state |1〉 due to the nonlinearity of the qubit. Thus, microwave pulses reflected from the readout device 114 carry amplitude and phase shifts that depend on the state of the qubit. In some implementations, a Purcell filter may be used in conjunction with the readout device 114 to prevent microwave propagation at the frequency of the qubit.

[0042] 2 illustrates a block diagram of an example quantum hardware sample generation model system 200 according to an example embodiment of the present disclosure. For example, the quantum hardware sample generation model system 200 may include a quantum hardware sample generation model 202. The quantum hardware sample generation model 202 may be sampled to generate samples of quantum hardware according to example aspects of the present disclosure. In some implementations, the quantum hardware sample generation model 202 may be stored as computer readable data in one or more computer readable memory devices.

[0043] The quantum hardware sample generation model 202 may include one or more distributions 210 of parameters of quantum hardware. Each of the distributions 210 of parameters of quantum hardware may model a statistical distribution of parameters of quantum hardware. For example, the distributions 210 of parameters of quantum hardware may model a distribution that represents the variability of parameters during fabrication, manufacturing, operation, etc. of the quantum hardware. The distributions 210 of parameters of quantum hardware may be experimentally measured (e.g., from multiple physical quantum hardware), and / or designed, and / or determined in any other suitable manner according to exemplary aspects of the present disclosure. For example, in some embodiments, the distributions 210 of parameters of the one or more quantum hardware may include one or more distributions of experimentally measured parameters of quantum hardware. Additionally and / or alternatively, in some embodiments, the distributions of parameters of the one or more quantum hardware may include one or more distributions of designed parameters of quantum hardware.

[0044] In some embodiments, the distribution of parameters 210 of the quantum hardware may be or may include at least one of: one or more circuit parameters, one or more electrical parameters, one or more fabrication parameters, or one or more defect parameters. The distribution of parameters of the quantum hardware may in some implementations include at least one of: a distribution of qubits, a distribution of circuits for qubits, a distribution of relaxation of qubits, or a distribution of background loss. In some implementations, the distribution of one or more parameters of the quantum hardware may include at least one of: capacitance (e.g., qubit self-capacitance), junction resistance (e.g., Josephson junction resistance), qubit anharmonicity, qubit controlled mutual inductance distribution, maximum frequency, readout resonator frequency, Josephson junction asymmetry, TLS number density of a two-level system (TLS), TLS frequency, TLS coherence, TLS qubit decoupling, qubit quality, qubit controlled mutual inductance prime distribution, drive impedance, resonator internal quality, resonator coupling quality, resonator-qubit coupling efficiency, bandpass filter frequency, bandpass filter quality, transmon frequency, T1 spectrum, single qubit frequency, or qubit grid frequency. In some implementations, the quantum hardware sample generation model 202 may be or include a joint probability distribution on the distributions 210 of parameters of the quantum hardware.

[0045] In some implementations, the distribution of parameters of the quantum hardware 210 can be a "simple distribution" that returns one or more numbers corresponding to several parameters of the quantum hardware, such as, for example, circuit parameters, fabrication parameters, TLS, etc. For example, FIG. 2B shows an expanded view of the quantum hardware sample generation system 200 including a distribution of parameters of the exemplary quantum hardware 212. For example, the distribution of parameters of the exemplary quantum hardware 212 can be an example of a distribution of resistances of Josephson junctions for multiple quantum hardware instances. The exemplary distribution 212 can be sampled to generate a distribution of parameters sample 214. The distribution samples can be propagated through the quantum hardware sample generation model 202 (e.g., by a statistical network, such as through at least the intermediate distribution 220). For example, the distribution of resistances of the exemplary Josephson junctions of the distribution of parameters of the exemplary quantum hardware 212 can be sampled to generate resistance values ​​in the distribution of parameters sample 214. The resistance values ​​in the parameter distribution sample 214 may indicate the resistance of a Josephson junction for an example quantum hardware sample, such as an example quantum hardware sample generated by propagating at least the parameter distribution sample 214 through the quantum hardware sample generation model 202.

[0046] In some embodiments, the dependencies (e.g., quantum hardware parameter dependencies) in the quantum hardware sample generation model 202 may be implemented manually. For example, the dependencies in the quantum hardware sample generation model 202 may be established based on an understanding of quantum hardware, rules of physics, and the like. Additionally, the quantum hardware parameter distributions 210 with unknown dependencies may be assumed to be independent. For example, in some embodiments, the quantum hardware parameter dependencies may include one or more conditional independence relations between the quantum hardware parameter distributions 210 with unknown dependencies, and one or more conditional dependencies that relate the quantum hardware parameter distributions 210 based on known dependencies. In this manner, the quantum hardware sample generation model 202 may define a statistical network, such as a Bayesian network, of the quantum hardware parameter distributions 210. Additionally and / or alternatively, in some implementations (e.g., if there is sufficient available training data), machine learning modeling techniques, such as the use of neural networks, may be employed to generate and / or otherwise provide insight into the quantum hardware parameter dependencies in the quantum hardware sample generation model 202. For example, parameters and / or dependencies of a statistical network may be learned through the application of machine learning modeling and / or training techniques.

[0047] In some embodiments, the quantum hardware sample generation model 202 may form a machine-learned quantum hardware sample generation model. For example, dependencies in the quantum hardware sample generation model 202 (e.g., dependencies of parameters of the quantum hardware) may be learned by the machine-learned model. For example, the dependencies may be learned based at least in part on training the machine-learned quantum hardware sample generation model. Furthermore, the statistical network may be a machine-learned neural network. As one example, a machine-learned model (e.g., a neural network, such as a convolutional neural network, a recurrent neural network, etc.) may be trained with training data that includes parameter distributions and / or relationships from existing quantum hardware. The neural network may learn to generate the quantum hardware sample generation model 202 in response to being provided with specifications of the quantum hardware architecture, parameters, etc. at inference time.

[0048] Additionally, the quantum hardware sample generation model 202 may include one or more intermediate distributions 220. The intermediate distributions 220 may be more complex than the quantum hardware parameter distributions 210. For example, the intermediate distributions 220 may combine samples from one or more quantum hardware parameter distributions 210 (and / or one or more other intermediate distributions 220) in a statistically consistent manner, such as via one or more statistical networks. The intermediate distributions 220 may be so-called "generalized distributions" that may return more complex objects than the parameter distributions 210 in some cases.

[0049] For example, FIG. 2C illustrates a close-up view of quantum hardware sample generation system 200 including an exemplary intermediate distribution 222. Exemplary intermediate distribution 222 is an exemplary T1 relaxation spectrum distribution. T1 relaxation can be an important performance indicator for a qubit. Exemplary intermediate distribution 222 may be sampled to generate intermediate distribution sample 224. For example, intermediate distribution sample 224 includes a sample of T1 relaxation spectrum for one qubit versus qubit frequency (e.g., an important operational parameter). The relevant underlying parameter distribution sample (e.g., a sample from quantum hardware parameter distribution 210) may include, for example, qubit circuit parameters, fabrication parameters, and / or TLS defect parameters.

[0050] Additionally, quantum hardware sample generation model 202 may include one or more quantum hardware component distributions 230. Quantum hardware component distribution 230 may be more complex than intermediate distribution 220. For example, quantum hardware component distribution 230 may combine samples from one or more quantum hardware parameter distributions 210, one or more intermediate distributions 220, and / or one or more other quantum hardware component distributions 230 in a statistically consistent manner, such as via one or more statistical networks. Quantum hardware components as represented by quantum hardware component distribution 230 may be coherent components of quantum hardware, such as, for example, qubits, readout resonators, interqubit couplers, and / or other suitable computing elements of quantum hardware, such as quantum processors.

[0051] 2D illustrates an expanded view of quantum hardware sample generation model 202, including exemplary quantum hardware component distribution 232. When sampled, quantum hardware component distribution 230 (e.g., exemplary quantum hardware component distribution 232) may generate component samples, such as component samples 234. Component samples 234 include data from which performance of each component according to exemplary quantum hardware component distribution 232 may be estimated. As one example, component samples 234 (e.g., for a qubit) may be or may include a T1 relaxation spectrum, a T2 phase relaxation spectrum, and / or other suitable data.

[0052] Further, the quantum hardware sample generation model 202 may include a quantum hardware distribution 240. As one example, the quantum hardware distribution 240 may represent a final output of the quantum hardware sample generation model 202. The quantum hardware distribution 240 may be sampled to generate the quantum hardware samples 204 according to exemplary aspects of the present disclosure. For example, in some embodiments, the quantum hardware distribution 240 (including, e.g., the quantum hardware parameter distribution 210, the intermediate distribution 220, the quantum hardware components 230, etc.) may be sampled by pre-sampling. For example, the pre-sampling may include an end-to-end procedure of generating the quantum hardware samples 204 from the quantum hardware distribution 240 by sampling the underlying parameter distributions (e.g., 210, 230, 230, etc.) and / or propagating the samples through the intermediate network and / or probabilistic relationships that characterize the statistical network of the quantum hardware sample generation model 202.

[0053] Quantum hardware distribution 240 (e.g., processor distribution) may be combined with quantum hardware architecture parameters 245 to generate data necessary to estimate the performance of a sample of quantum hardware. For example, quantum hardware architecture parameters 245 may be or include fixed, non-probabilistic quantities, such as, for example, processor geometry, qubit types, and other suitable architectural information. A single sample may combine samples from component distribution 230 for each component in the sample.

[0054] For example, FIG. 2E illustrates an expanded view of the quantum hardware sample generation model 202. FIG. 2E illustrates an example processor distribution 242 and an example quantum hardware sample 244. Additionally, FIG. 2E illustrates an example quantum hardware architecture parameter 246. The example processor distribution 242 may be sampled to generate an example quantum processor sample (e.g., sample 244) with respect to the quantum hardware architecture parameter 246. The example illustrated in FIG. 2E includes architecture parameters 246 for a 5×5 processor (e.g., having 25 qubits arranged in a 5×5 configuration) with nearest neighbor coupling and / or frequency tunable transmon properties. Thus, for example, a sample (e.g., sample 244) from the example processor distribution 242 would include a 5×5 T1 relaxation spectrum and a 5×5 phase relaxation spectrum, as well as other specified relevant information for the specified quantum processor.

[0055] The quantum hardware sample 204 sampled from the statistical quantum hardware distribution 240 may be provided to an optimizer 206. The optimizer 206 may be configured to provide an output distribution 208 (e.g., operational parameters such as gate frequencies) for the quantum hardware sample. The optimizer 206 is operable with respect to optimizer parameters 207 (e.g., parameters that indicate constraints on the operation of the optimizer 206). For example, the optimizer 206 may use an optimization algorithm (e.g., implemented by a computing system) to determine one or more operational parameters (e.g., as part of the output distribution 208) that optimize the performance of the quantum hardware sample. As one example, the operational parameters may include an operating frequency, such as a gate frequency (e.g., for one or more qubits). As another example, the one or more simulated performance measurements may be measurements of a performance metric, such as, for example, quantum logic gate errors, algorithm errors (e.g., based on a quantum testing algorithm), execution time (e.g., to completion of a quantum testing algorithm), etc.

[0056] FIG. 3 illustrates a flow diagram of an example system 300 for designing quantum hardware employing an example quantum hardware sample generation model according to an example embodiment of the present disclosure. The system 300 may include a quantum hardware sample generation model 310. For example, a distribution of design parameters 312 (e.g., a distribution of parameters of the quantum hardware) may be provided to the quantum hardware sample generation model 310 to generate a sample 314 of the quantum hardware. The system 300 may further include an optimizer 320. The optimizer 320 may receive the sample 314 of the quantum hardware and determine an operating parameter 322 (e.g., an operating frequency) with respect to a quantum testing algorithm 323. The optimizer 320 may then generate a simulated performance measure 324 (e.g., a gate error, an algorithm error, etc.). The simulated performance measure 324 may be propagated through a feedback loop 330 to adjust the distribution 312 of the design parameters. For example, the system 300 can implement control actions (e.g., from a user and / or automatically) to adjust the distributions of the design parameters to optimize (e.g., reduce / minimize the error of) the simulated performance measure 324.

[0057] 4 illustrates a flow diagram of an example system 400 for designing quantum hardware employing an example quantum hardware sample generation model according to an example embodiment of the present disclosure. The system 400 may include a quantum hardware sample generation model 410. For example, a distribution 412 of design parameters (e.g., a distribution of a parameter of the quantum hardware) may be provided to the quantum hardware sample generation model 410 to generate a sample 414 of the quantum hardware.

[0058] The system 400 may further include an optimizer 416. The optimizer 416 may receive the sample of quantum hardware 414 and determine operating parameters (e.g., operating frequency) with respect to a quantum testing algorithm 415. The optimizer 416 may then determine simulated performance measures 418 (e.g., algorithmic errors). As one example, determining the simulated performance measures 418 may include providing the sample of quantum hardware 414 to a quantum circuit simulator system (e.g., as part of the optimizer 416) and obtaining the simulated performance measures 418 (e.g., algorithmic errors) with respect to one or more test algorithms 415 from the quantum circuit simulator system. For example, the quantum circuit simulator system may be configured to simulate the performance of the sample of quantum hardware 414 with respect to one or more test algorithms 415. The test algorithms 415 can be quantum algorithms used to test the performance of the sample of quantum hardware. For example, the test algorithm 415 may include a sequence of one or more quantum gate operations, such as, for example, Pauli gates (e.g., Pauli X-gate, Pauli Y-gate, and / or Pauli Z-gate), Hadamard gates, phase gates, T-gates, controlled NOT (CNOT) gates, controlled Z (CZ) gates, swap gates, Toffoli gates, and / or any other suitable quantum gates, or combinations thereof. The simulated performance error 418 may include an algorithm error that represents how accurately the sample of quantum hardware 414 is able to execute the test algorithm 415. For example, missed or erroneous operations, mistakes, etc. may increase the algorithm error.

[0059] Additionally, the system 400 may obtain one or more performance distances 420 between one or more simulated performance measurements 418 and one or more target performance measurements 422. As one example, the performance distances 420 may be obtained by subtracting the simulated performance measurements 418 (e.g., measurements of operating parameters, algorithmic errors, etc.) from the corresponding target performance measurements 422. For example, in some cases, the simulated performance measurements 418 and / or the target performance measurements 422 may be or include simple numbers on which an arithmetic subtraction may be performed. Additionally and / or alternatively, in some cases, the simulated performance measurements 418 and / or the target performance measurements 422 may be or include distributions. If including a distribution, the performance distances 420 may be obtained by a suitable similar process, such as, for example, calculating a statistical distance metric such as cross-entropy or KL divergence. The performance distances 420 may generally indicate how closely a sample of quantum hardware performs to a target specification, such as a design requirement. In some embodiments, the target performance measures 422 may include distributions and / or thresholds.

[0060] Based on the performance distance 420, the system 400 may implement control actions 424 to adjust at least one of the distributions 412 of the parameters of the one or more quantum hardware. For example, in some embodiments, the control actions 424 may be implemented to adjust the distributions 412 of the parameters of the quantum hardware as part of a feedback loop to optimize the design of the distributions 412 of the parameters of the quantum hardware. As one example, the control actions 424 may include incrementing, decrementing, shifting, stretching, substituting, changing the type of distribution of the at least one of the distributions 412 of the parameters of the quantum hardware, or performing any other suitable control action.

[0061] Control actions 424 may be implemented to reduce and / or ultimately minimize the performance distance 420. For example, in some embodiments, simulated performance measurements 418, performance distances 420, and / or other data from the quantum hardware sample generation model 410 may be provided to a user. The user may provide the computing system with control actions 424 that are implemented to adjust the distributions 412 of the parameters of the quantum hardware. For example, the user may manually perform operations on the distributions 412 of the parameters of the quantum hardware, such as incrementing, decrementing, shifting, stretching, replacing, changing the type of distribution, etc. Additionally and / or alternatively, the control actions 424 may be propagated from one or more performance distances 420. For example, the control actions 424 may be determined by a feedback loop (e.g., by a gradient, such as by gradient descent).

[0062] 5 illustrates a flow diagram of an exemplary computer-implemented method 500 for simulating the performance of quantum hardware, according to an exemplary embodiment of the present disclosure. Although FIG. 5 illustrates steps performed in a particular order for purposes of explanation and discussion, the method of the present disclosure is not limited to the order or arrangement specifically shown. Various steps of method 500 may be omitted, rearranged, combined, and / or adapted in various ways without departing from the scope of the present disclosure.

[0063] At 502, the method 500 may include accessing (e.g., by a computing system including one or more computing devices) a quantum hardware sample generation model configured to generate samples of quantum hardware. The quantum hardware sample generation model may include a distribution of parameters of one or more quantum hardware. For example, the quantum hardware sample generation model may be or may include any of the quantum hardware sample generation models discussed with reference to Figures 2-4.

[0064] As one example, the quantum hardware sample generation model may include one or more quantum hardware parameter distributions and / or one or more quantum hardware parameter dependencies that define a relationship between the one or more quantum hardware parameter distributions. The one or more quantum hardware parameter distributions and the one or more quantum hardware parameter dependencies may define a statistical (e.g., Bayesian) network that includes a hardware distribution that, when sampled, generates a quantum hardware sample configured to model the behavior of the quantum hardware. As one example, the quantum hardware parameter distributions may form the nodes of the statistical network and / or the quantum hardware parameter dependencies may form the edges of the statistical network. Samples from some or all of the nodes (e.g., quantum hardware parameter distributions) may be propagated through the statistical network by edges (e.g., quantum hardware parameter dependencies) to a final output (e.g., hardware distribution) that, when sampled, generated the quantum hardware sample. The distribution of parameters of the quantum hardware and / or dependencies of parameters of the quantum hardware may be formed by experimental measurements, prior understanding of the quantum hardware (e.g., the rules of physics), and / or theoretical data (e.g., desired design parameters, assumptions, etc.).

[0065] At 504, method 500 may include sampling (e.g., by the computing system) a sample of quantum hardware from the quantum hardware sample generation model. For example, in some embodiments, sampling a sample of quantum hardware from the quantum hardware sample generation model may include sampling a sample of one or more parameters from each of a distribution of the parameters of the one or more quantum hardware and propagating the sample of the one or more parameters through a statistical network based on dependencies of the parameters of the one or more quantum hardware. For example, in some embodiments, sampling a sample of the one or more parameters may include pre-sampling a sample of the one or more parameters. As an example, each of the distributions of the parameters of the multiple quantum hardware may be sampled (e.g., by pre-sampling) and propagated through a statistical (e.g., Bayesian) network based on their dependencies. For example, a final output (e.g., a hardware distribution node) of the statistical network may be sampled (e.g., by pre-sampling) to generate a sample of quantum hardware.

[0066] At 506, the computer-implemented method 500 may include obtaining (e.g., by the computing system) one or more simulated performance measurements from the sample of quantum hardware. For example, in some embodiments, obtaining the one or more simulated performance measurements may include determining one or more operating parameters using an optimization algorithm (e.g., implemented by the computing system) and simulating (e.g., by the computing system) one or more simulated performance measurements based at least in part on the one or more operating parameters. As one example, the operating parameters may include an operating frequency, such as a frequency of a gate (e.g., for one or more qubits). As another example, the one or more simulated performance measurements can be, for example, a measurement of a performance metric, such as, for example, algorithm error, effective time, etc.

[0067] As one example, obtaining one or more simulated performance measurements may include providing a sample of quantum hardware to a quantum circuit simulator system (e.g., by the computing system) and obtaining one or more algorithmic errors for one or more test algorithms by the computing system and from the quantum circuit simulator system. For example, the quantum circuit simulator system may be configured to simulate the performance of the sample of quantum hardware with respect to one or more test algorithms. The test algorithms can be quantum algorithms used to test the performance of the sample of quantum hardware. For example, the test algorithms may include a sequence of one or more quantum gate operations, such as, for example, Pauli gates (e.g., Pauli X-gates, Pauli Y-gates, and / or Pauli Z-gates), Hadamard gates, phase gates, T-gates, controlled NOT (CNOT) gates, controlled Z (CZ) gates, swap gates, Toffoli gates, and / or any other suitable quantum gates, or combinations thereof. The algorithmic errors may represent how accurately the sample of quantum hardware can execute the test algorithm. For example, missed or erroneous operations, mistakes, etc. may increase the algorithmic errors. The algorithm error may be one example of a simulated performance measure.

[0068] At 508, the computer-implemented method 500 may include obtaining (e.g., by the computing system) one or more performance distances between the one or more simulated performance measurements and the one or more target performance measurements. As one example, the performance distances may be obtained by subtracting the simulated performance measurements (e.g., measurements of operating parameters, algorithmic errors, etc.) from the corresponding target performance measurements. The performance distances may generally indicate how closely a sample of quantum hardware performs to target specifications, such as design requirements.

[0069] At 510, the computer-implemented method 500 may include performing (e.g., by the computing system) a control action to adjust at least one of the distributions of the parameters of the one or more quantum hardware based at least in part on the one or more performance metrics. For example, in some embodiments, the control action may adjust the distributions of the parameters of the quantum hardware as part of a feedback loop to optimize the design of the distributions of the parameters of the quantum hardware. As one example, the control action may include incrementing, decrementing, shifting, stretching, substituting, changing the type of distribution of at least one of the distributions of the parameters of the one or more quantum hardware, or performing any other suitable control action.

[0070] Control actions may be implemented to reduce and / or ultimately minimize the performance distance. For example, in some embodiments, simulated performance measurements, performance distances, and / or other data from the quantum hardware sample generation model may be provided to a user. The user may provide the computing system with control actions that are implemented to adjust the distribution of the parameters of the quantum hardware. For example, the user may manually perform operations on the distribution of the parameters of the quantum hardware, such as, for example, incrementing, decrementing, shifting, stretching, permuting, changing the type of distribution, etc. Additionally and / or alternatively, control actions may be propagated from one or more performance distances. For example, the control actions may be determined by a feedback loop (e.g., by gradients, such as by gradient descent).

[0071] 6 illustrates a flow diagram of an exemplary computer-implemented method 600 for generating quantum hardware samples that simulate the performance of the quantum hardware, according to an exemplary embodiment of the present disclosure. Although FIG. 6 illustrates steps performed in a particular order for purposes of explanation and discussion, the methods of the present disclosure are not limited to the order or arrangement specifically shown. Various steps of method 600 may be omitted, rearranged, combined, and / or adapted in various ways without departing from the scope of the present disclosure.

[0072] At 602, the computer-implemented method 600 may include accessing (e.g., by a computing system including one or more computing devices) a quantum hardware sample generation model configured to generate samples of quantum hardware. The quantum hardware sample generation model may include a statistical network of distributions of parameters of the one or more quantum hardware and dependencies of the parameters of the one or more quantum hardware. For example, the quantum hardware sample generation model may be or include any of the quantum hardware sample generation models discussed with reference to Figures 2-4.

[0073] As one example, the quantum hardware sample generation model may include one or more quantum hardware parameter distributions and / or one or more quantum hardware parameter dependencies that define a relationship between the one or more quantum hardware parameter distributions. The one or more quantum hardware parameter distributions and the one or more quantum hardware parameter dependencies may define a statistical (e.g., Bayesian) network that includes a hardware distribution that, when sampled, generates a quantum hardware sample configured to model the behavior of the quantum hardware. As one example, the quantum hardware parameter distributions may form the nodes of the statistical network and / or the quantum hardware parameter dependencies may form the edges of the statistical network. Samples from some or all of the nodes (e.g., quantum hardware parameter distributions) may be propagated through the statistical network by edges (e.g., quantum hardware parameter dependencies) to a final output (e.g., hardware distribution) that, when sampled, generated the quantum hardware sample. The distributions of parameters of the quantum hardware and / or dependencies of parameters of the quantum hardware may be formed by experimental measurements, prior understanding of the quantum hardware (e.g., rules of physics), and / or from theoretical data (e.g., desired design parameters, assumptions, etc.). The sample quantum hardware may include multiple mathematical models (e.g., parameters, functions, etc.) that model the behavior of multiple performance metrics of the quantum hardware with respect to one or more operating parameters.

[0074] At 604, the computer-implemented method 600 may include sampling (e.g., by the computing system) the quantum hardware sample generation model to obtain a quantum hardware sample. Sampling the quantum hardware sample generation model may include sampling one or more parameter samples from each of the distributions of the one or more quantum hardware parameters and propagating the one or more parameter samples through a statistical network based on dependencies of the one or more quantum hardware parameters. For example, the parameter samples may be or include single entities, instances, etc. sampled from the distributions of the quantum hardware parameters. As one example, if the distribution of the quantum hardware parameters is a distribution of resistance, the parameter samples can be resistance values.

[0075] 7A illustrates a block diagram of an exemplary computing system 700 for performing quantum hardware sample model generation according to an exemplary embodiment of the present disclosure. The system 700 includes a user computing device 702, a server computing system 730, and a training computing system 750 that are communicatively coupled via a network 780.

[0076] The user computing device 702 can be any type of computing device, such as, for example, a personal computing device (e.g., a laptop or desktop), a mobile computing device (e.g., a smartphone or tablet), a game console or controller, a wearable computing device, an embedded computing device, or any other type of computing device.

[0077] The user computing device 702 includes one or more processors 712 and memory 714. The one or more processors 712 can be any suitable processing device (e.g., a processor core, a microprocessor, an ASIC, an FPGA, a controller, a microcontroller, etc.) and can be a single processor or multiple processors operatively connected. The memory 714 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, magnetic disks, etc., and combinations thereof. The memory 714 can store data 716 and instructions 718 that are executed by the processor 712 to cause the user computing device 702 to perform operations.

[0078] In some implementations, the user computing device 702 may store or include one or more quantum hardware sample model generation models 720. For example, the quantum hardware sample model generation models 720 may be or otherwise include various machine-learned models, such as neural networks (e.g., deep neural networks), or other types of machine-learned models including nonlinear and / or linear models. The neural networks may include feedforward neural networks, recurrent neural networks (e.g., long short-term memory recurrent neural networks), convolutional neural networks, or other forms of neural networks.

[0079] In some implementations, one or more quantum hardware sample model generation models 720 may be received from a server computing system 730 over a network 780, stored in a memory 714 of a user computing device, and then used or otherwise implemented by one or more processors 712. In some implementations, a user computing device 702 may implement multiple parallel instances of a single quantum hardware sample model generation model 720 (e.g., to perform parallel quantum hardware sample model generation across multiple instances of the quantum hardware sample model generation model).

[0080] Additionally or alternatively, one or more quantum hardware sample model generation models 740 may be included in or otherwise stored and implemented by a server computing system 730 that communicates with the user computing device 702 via a client-server relationship. For example, the quantum hardware sample model generation models 740 may be implemented by the server computing system 740 as part of a web service (e.g., a quantum hardware sample model generation service). Thus, one or more models 720 may be stored and implemented in the user computing device 702 and / or one or more models 740 may be stored and implemented in the server computing system 730.

[0081] The user computing device 702 may also include one or more user input components 722 that receive user input. For example, the user input component 722 can be a touch-sensitive component (e.g., a touch-sensitive display screen or touchpad) that is capable of sensing the touch of a user input object (e.g., a finger or stylus). The touch-sensitive component may serve to implement a virtual keyboard. Other exemplary user input components include a microphone, a conventional keyboard, or other means by which a user can provide user input.

[0082] The server computing system 730 includes one or more processors 732 and memory 734. The one or more processors 732 can be any suitable processing device (e.g., a processor core, a microprocessor, an ASIC, an FPGA, a controller, a microcontroller, etc.) and can be a single processor or multiple processors operatively connected. The memory 734 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, magnetic disks, etc., and combinations thereof. The memory 734 can store data 736 and instructions 738 that are executed by the processor 732 to cause the server computing system 730 to perform operations.

[0083] In some implementations, server computing system 730 includes or is otherwise implemented by one or more server computing devices. When server computing system 730 includes multiple server computing devices, such server computing devices may operate according to a serial computing architecture, a parallel computing architecture, or some combination thereof.

[0084] As described above, the server computing system 730 may store or otherwise include one or more machine-learned quantum hardware sample model generation models 740. For example, the models 740 may be or may otherwise include a variety of machine-learned models. Exemplary machine-learned models include neural networks or other multi-layer nonlinear models. Exemplary neural networks include feedforward neural networks, deep neural networks, recurrent neural networks, and convolutional neural networks.

[0085] The user computing device 702 and / or the server computing system 730 can train the models 720 and / or 740 by interaction with a training computing system 750 that is communicatively coupled via a network 780. The training computing system 750 can be separate from the server computing system 730 or can be part of the server computing system 730.

[0086] The training computing system 750 includes one or more processors 752 and memory 754. The one or more processors 752 can be any suitable processing device (e.g., a processor core, a microprocessor, an ASIC, an FPGA, a controller, a microcontroller, etc.) and can be a single processor or multiple processors operatively connected. The memory 754 may include one or more non-transitory computer-readable storage media, such as RAM, ROM, EEPROM, EPROM, flash memory devices, magnetic disks, etc., and combinations thereof. The memory 754 can store data 756 and instructions 758 executed by the processor 752 to cause the training computing system 750 to perform operations. In some implementations, the training computing system 750 includes or is otherwise implemented by one or more server computing devices.

[0087] The training computing system 750 may include a model trainer 760 that trains the machine-learned models 720 and / or 740 stored at the user computing device 702 and / or server computing system 730 using various training or learning techniques, such as, for example, backpropagation. For example, a loss function may be backpropagated through the model to update one or more parameters of the model (e.g., based on the gradient of the loss function). Various loss functions may be used, such as mean squared error, likelihood loss, cross entropy loss, hinge loss, and / or various other loss functions. Gradient descent may be used to iteratively update the parameters through multiple training iterations.

[0088] In some implementations, performing backpropagation may include performing truncated backpropagation through time. The model trainer 760 can perform a number of generalization techniques (e.g., weight decay, dropout, etc.) to improve the generalization ability of the model being trained.

[0089] In particular, model trainer 760 can train quantum hardware sample model generation model 720 and / or 740 based on a set of training data 762. Training data 762 may include, for example, distributions of parameters of quantum hardware, dependencies of parameters of quantum hardware, and / or other sampled performance metrics from actual quantum hardware.

[0090] In some implementations, if the user has given consent, the training examples may be provided by the user computing device 702. Thus, in such implementations, the model 720 provided to the user computing device 702 may be trained by the training computing system 750 against user-specific data received from the user computing device 702. In some cases, this process may be referred to as personalizing the model.

[0091] Model trainer 760 includes computer logic utilized to provide desired functionality. Model trainer 760 may be implemented in hardware, firmware, and / or software controlling a general-purpose processor. For example, in some implementations, model trainer 760 includes program files stored on a storage device, loaded into memory, and executed by one or more processors. In other implementations, model trainer 760 includes one or more sets of computer-executable instructions stored in a tangible computer-readable storage medium, such as RAM, a hard disk, or an optical or magnetic medium.

[0092] Network 780 may be any type of communications network, such as a local area network (e.g., an intranet), a wide area network (e.g., the Internet), or some combination thereof, and may include any number of wired or wireless links. In general, communications over network 780 may be carried over any type of wired and / or wireless connections using a wide variety of communications protocols (e.g., TCP / IP, HTTP, SMTP, FTP), encodings or formats (e.g., HTML, XML), and / or security schemes (e.g., VPN, Secure HTTP, SSL).

[0093] The machine-learned models described herein may be used in a variety of tasks, applications, and / or use cases.

[0094] In some implementations, an input to the machine-learned model of the present disclosure may be image data. The machine-learned model may process the image data to generate an output. As an example, the machine-learned model may process the image data to generate an image recognition output (e.g., recognition of the image data, latent embedding of the image data, an encoded representation of the image data, a hash of the image data, etc.). As another example, the machine-learned model may process the image data to generate an image segmentation output. As another example, the machine-learned model may process the image data to generate an image classification output. As another example, the machine-learned model may process the image data to generate an image data modification output (e.g., modification of the image data, etc.). As another example, the machine-learned model may process the image data to generate an encoded image data output (e.g., an encoded and / or compressed representation of the image data, etc.). As another example, the machine-learned model may process the image data to generate an upscaled image data output. As another example, the machine-learned model may process the image data to generate a prediction output.

[0095] In some implementations, the input to the machine-learned model of the present disclosure may be text or natural language data. The machine-learned model may process the text or natural language data to generate an output. As an example, the machine-learned model may process the natural language data to generate a language encoding output. As another example, the machine-learned model may process the text or natural language data to generate a latent text embedding output. As another example, the machine-learned model may process the text or natural language data to generate a translation output. As another example, the machine-learned model may process the text or natural language data to generate a classification output. As another example, the machine-learned model may process the text or natural language data to generate a text segmentation output. As another example, the machine-learned model may process the text or natural language data to generate a semantic intent output. As another example, the machine-learned model may process the text or natural language data to generate an upscaled text or natural language output (e.g., text or natural language data of higher quality than the input text or natural language). As another example, the machine-learned model may process the text or natural language data to generate a prediction output.

[0096] In some implementations, an input to a machine-learned model of the present disclosure may be speech data. The machine-learned model may process the speech data to generate an output. As an example, the machine-learned model may process the speech data to generate a voice recognition output. As another example, the machine-learned model may process the speech data to generate a speech translation output. As another example, the machine-learned model may process the speech data to generate a latent embedding output. As another example, the machine-learned model may process the speech data to generate an encoded speech output (e.g., an encoded and / or compressed representation of the speech data, etc.). As another example, the machine-learned model may process the speech data to generate an upscaled speech output (e.g., speech data of higher quality than the input speech data, etc.). As another example, the machine-learned model may process the speech data to generate a text representation output (e.g., a text representation of the input speech data, etc.). As another example, the machine-learned model may process the speech data to generate a predicted output.

[0097] In some implementations, the input to the machine-learned model of the present disclosure may be latent coded data (e.g., a latent space representation of the input, etc.). The machine-learned model may process the latent coded data to generate an output. As an example, the machine-learned model may process the latent coded data to generate a recognition output. As another example, the machine-learned model may process the latent coded data to generate a reconstruction output. As another example, the machine-learned model may process the latent coded data to generate a search output. As another example, the machine-learned model may process the latent coded data to generate a reclustering output. As another example, the machine-learned model may process the latent coded data to generate a prediction output.

[0098] In some implementations, the input to the machine-learned model of the present disclosure may be statistical data. The machine-learned model may process the statistical data to generate an output. As an example, the machine-learned model may process the statistical data to generate a recognition output. As another example, the machine-learned model may process the statistical data to generate a prediction output. As another example, the machine-learned model may process the statistical data to generate a classification output. As another example, the machine-learned model may process the statistical data to generate a segmentation output. As another example, the machine-learned model may process the statistical data to generate a segmentation output. As another example, the machine-learned model may process the statistical data to generate a visualization output. As another example, the machine-learned model may process the statistical data to generate a diagnostic output.

[0099] In some implementations, the input to the machine-learned models of the present disclosure may be sensor data. The machine-learned models may process the sensor data to generate an output. As an example, the machine-learned models may process the sensor data to generate a recognition output. As another example, the machine-learned models may process the sensor data to generate a prediction output. As another example, the machine-learned models may process the sensor data to generate a classification output. As another example, the machine-learned models may process the sensor data to generate a segmentation output. As another example, the machine-learned models may process the sensor data to generate a segmentation output. As another example, the machine-learned models may process the sensor data to generate a visualization output. As another example, the machine-learned models may process the sensor data to generate a diagnostic output. As another example, the machine-learned models may process the sensor data to generate a detection output.

[0100] In some cases, the machine-learned model may be configured to perform a task that includes encoding (and / or corresponding decoding) of input data for reliable and / or efficient transmission or storage. For example, the task may be an audio compression task. The input may include audio data, and the output may include compressed audio data. In another example, the input may include visual data (e.g., one or more images or videos), and the output may include compressed visual data, and the task is a visual data compression task. In another example, the task may include generating an embedding for the input data (e.g., input audio or visual data).

[0101] 7A illustrates one exemplary computing system that may be used to implement the present disclosure. Other computing systems may also be used. For example, in some implementations, a user computing device 702 may include a model trainer 760 and a training dataset 762. In such implementations, the model 720 may be trained and used locally on the user computing device 702. In some such implementations, the user computing device 702 may implement the model trainer 760 to personalize the model 720 based on data specific to the user.

[0102] 7B illustrates a block diagram of an exemplary computing device 10 for performing quantum hardware sample model generation according to an exemplary embodiment of the present disclosure. The computing device 10 may be a user computing device or a server computing device.

[0103] The computing device 10 includes several applications (e.g., applications 1 through N). Each application includes its own machine learning library and machine-learned model. For example, each application may include a machine-learned model. Exemplary applications include a text messaging application, an email application, a dictation application, a virtual keyboard application, a browser application, etc.

[0104] 7B, each application may communicate with several other components of the computing device, such as, for example, one or more sensors, a context manager, a device state component, and / or additional components. In some implementations, each application may communicate with the components of each device using an API (e.g., a public API). In some implementations, the APIs used by each application are specific to that application.

[0105] 7C illustrates a block diagram of an exemplary computing device 50 for performing quantum hardware sample model generation according to an exemplary embodiment of the present disclosure. The computing device 50 may be a user computing device or a server computing device.

[0106] Computing device 50 includes several applications (e.g., applications 1 through N). Each application is in communication with a central intelligence layer. Exemplary applications include a text messaging application, an email application, a dictation application, a virtual keyboard application, a browser application, etc. In some implementations, each application may communicate with the central intelligence layer (and models stored therein) using an API (e.g., a common API across all applications).

[0107] The central intelligence layer includes several machine-learned models. For example, as shown in FIG. 7C, a respective machine-learned model (e.g., model) may be provided to each application and managed by the central intelligence layer. In other implementations, two or more applications may share a single machine-learned model. For example, in some implementations, the central intelligence layer may provide a single model (e.g., single model) to all of the applications. In some implementations, the central intelligence layer is included within or otherwise implemented by the operating system of the computing device 50.

[0108] The central intelligence layer can communicate with a central device data layer. The central device data layer can be a centralized repository of data for the computing device 50. As shown in FIG. 7C, the central device data layer can communicate with several other components of the computing device, such as, for example, one or more sensors, a context manager, a device state component, and / or additional components. In some implementations, the central device data layer can communicate with the components of each device using APIs (e.g., private APIs).

[0109] Implementations of the digital, classical, and / or quantum subject matter described herein and the operations of the digital functions and quantum operations can be implemented in digital electronic circuitry, suitable quantum circuitry, or more broadly, in quantum computing systems, including the structures disclosed herein and their structural equivalents, in tangibly embodied digital and / or quantum computer software or firmware, in digital and / or quantum computer hardware, or in a combination of one or more of these. The term "quantum computing system" may include, but is not limited to, a quantum computer / computing system, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0110] Implementations of the digital and / or quantum subject matter described herein can be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by or to control the operation of a data processing device. The digital and / or quantum computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more qubits / qubit structures, or a combination of one or more of them. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagated signal (e.g., a machine-generated electrical, optical, or electromagnetic signal) capable of encoding digital and / or quantum information, which is generated to encode the digital and / or quantum information for transmission to a receiver device suitable for execution by a data processing device.

[0111] The terms quantum information and quantum data refer to information or data carried by, held or stored in a quantum system, where the smallest important system is a qubit, i.e., a system that defines a unit of quantum information. The term "qubit" is understood to encompass all quantum systems that may be suitably approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, for example having two or more levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the computational basis state is identified with the ground state and the first excited state, but it is understood that other setups are possible in which the computational state is identified with a higher level excited state (e.g., qudits).

[0112] The term "data processing apparatus" refers to digital and / or quantum data processing hardware and encompasses all kinds of apparatus, devices, and machines for processing digital and / or quantum data, including, as examples, programmable digital processors, programmable quantum processors, digital computers, quantum computers, or multiple digital and quantum processors or computers, and combinations thereof. The apparatus can also be or further include special-purpose logic circuits, such as FPGAs (field programmable gate arrays), or ASICs (application-specific integrated circuits), or quantum simulators, i.e., quantum data processing apparatuses designed to simulate or generate information about specific quantum systems. In particular, quantum simulators are special-purpose quantum computers that do not have the ability to perform universal quantum computations. Optionally, the apparatus may include, in addition to hardware, code that creates an execution environment for digital and / or quantum computer programs, such as code that constitutes a processor's firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof.

[0113] A digital or classical computer program, which may be called or referred to as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use within a digital computing environment. A quantum computer program, which may be called or referred to as a program, software, software application, module, software module, script, or code, may be written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and may be converted into a suitable quantum programming language, or may be written in a quantum programming language, e.g., QCL, Quipper, Criq, etc.

[0114] A digital and / or quantum computer program may correspond to a file in a file system, but this is not necessarily the case. A program can be stored in a portion of a file holding other programs or data, e.g. one or more scripts stored in a markup language document, in a single file dedicated to the program in question, or in multiple organized files, e.g. files storing one or more modules, subprograms, or code portions. A digital and / or quantum computer program can be deployed to run on one digital or quantum computer, or on multiple digital and / or quantum computers located in one location or distributed across multiple locations and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network that may transmit quantum data using quantum systems, e.g. qubits. Generally, a digital data communication network cannot transmit quantum data, but a quantum data communication network may transmit both quantum data and digital data.

[0115] The processes and logic flows described herein may be performed, as appropriate, by one or more programmable digital and / or quantum computers, in which one or more digital and / or quantum processors operate to execute one or more digital and / or quantum computer programs to perform functions by operating on input digital and quantum data and generating outputs. The processes and logic flows may also be performed by special purpose logic circuitry, e.g., FPGAs or ASICs, or quantum simulators, or a combination of special purpose logic circuitry or quantum simulators with one or more programmed digital and / or quantum computers, and an apparatus may be implemented as a special purpose logic circuitry, e.g., FPGAs or ASICs, or quantum simulators, or a combination of special purpose logic circuitry or quantum simulators with one or more programmed digital and / or quantum computers.

[0116] A system of one or more digital and / or quantum computers or processors "configured to" or "operable to" perform a particular operation or action means that the system has installed thereon software, firmware, hardware, or a combination thereof that, during operation, causes the system to perform the operation or action. A system of one or more digital and / or quantum computer programs configured to perform a particular operation or action means that the program or programs contain instructions that, when executed by a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer may receive instructions from a digital computer that, when executed by a quantum computing device, cause the device to perform an operation or action.

[0117] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on a general purpose or dedicated digital and / or quantum microprocessor or both, or any other kind of central digital and / or quantum processing unit. In general, the central digital and / or quantum processing unit will receive instructions and digital and / or quantum data from a read-only memory, or a random access memory, or a quantum system suitable for transmitting quantum data, e.g. photons, or a combination thereof.

[0118] Some exemplary elements of a digital and / or quantum computer are a central processing unit for executing or executing instructions, and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory can be supplemented by or incorporated into special purpose logic circuits or quantum simulators. In general, a digital and / or quantum computer will also include one or more mass storage devices, such as magnetic, magneto-optical, or optical disks, for storing digital and / or quantum data, or a quantum system suitable for storing quantum information, or be operatively coupled to receive digital and / or quantum data from them, or transfer digital and / or quantum data to them, or both. However, a digital and / or quantum computer may not have such devices.

[0119] Suitable digital and / or quantum computer readable media for storing digital and / or quantum computer program instructions and digital and / or quantum data include, by way of example, all forms of non-volatile digital and / or quantum memories, media, and memory devices, including semiconductor memory devices, such as EPROM, EEPROM, and flash memory devices, magnetic disks, such as internal hard disks or removable disks, magneto-optical disks, and CD-ROM and DVD-ROM disks, as well as quantum systems, such as trapped atoms or electrons. A quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, such as a light-matter interface where light is used for transmission and matter is used to store and preserve the quantum characteristics of the quantum data, such as superposition or quantum coherence.

[0120] Control of the various systems or portions thereof described herein may be implemented in a digital and / or quantum computer program product stored on one or more tangible, non-transitory, machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. The systems or portions thereof described herein may each be implemented as an apparatus, method, or electronic system that may include one or more digital and / or quantum processing devices and a memory for storing executable instructions for performing the operations described herein.

[0121] Although the specification includes many specific implementation details, these should not be considered as limitations on the scope of what may be claimed, but rather as descriptions of features that may be specific to a particular implementation. Certain features described herein in relation to separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in relation to a single implementation may also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, although features may be described above as working in a particular combination, and may even be initially claimed as such, one or more features from the claimed combination may in some cases be deleted from the combination, and the claimed combination may be directed to a subcombination, or a variation of the subcombination.

[0122] Similarly, although operations are shown in a particular order in the figures, this should not be understood as requiring that such operations be performed in the particular order shown, or in a sequential order, or that all of the operations shown be performed, to achieve desired results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, it should be understood that the division of various system modules and components in the above-described implementations does not require such division in all implementations, and that the described program components and systems may generally be integrated together in a single software product or packaged in multiple software products.

[0123] Particular implementations of the subject matter have been described. Other implementations are within the scope of the appended claims. For example, the actions recited in the claims can be performed in a different order and still achieve desirable results. As one example, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. [Explanation of symbols]

[0124] 10. Computing Devices 50 Computing Devices 100 Quantum Computing Systems 102 Quantum Hardware 104 Classical Processors 106 Physical control qubit parameter values, parameters 108 Measurement results 110 Quantum Systems 112 Control Device 114 Readout Device 200 Quantum Hardware Sample Generation Model System 202 Quantum Hardware Sample Generation Model 204 Quantum Hardware Samples 206 Optimizer 207 Optimizer parameters 208 Output distribution 210 Quantum hardware parameter distribution, parameter distribution 212 Distribution of parameters of quantum hardware, distribution of resistance of Josephson junction 214 Sample distribution of parameters, resistance (ohms) 220 Intermediate distribution 222 Intermediate distribution, distribution of T1 relaxation spectrum 224 Samples of intermediate distribution 230 Distribution of quantum hardware components 232 Distribution of quantum hardware components, distribution of qubits 234 Component Samples 240 Quantum Hardware Distribution 242 Processor Distribution 244 Quantum Hardware Examples 245 Quantum hardware architecture parameters, Quantum hardware architecture 246 Quantum hardware architecture parameters, 5x5 processor, nearest neighbor coupling, frequency tunable transmons 300 Systems 310 Quantum Hardware Sample Generative Model, Generative Model 312 Distribution of Design Parameters 314 Quantum hardware samples, quantum hardware models 320 Optimizer, Error Model / Optimizer 322 Operating parameters 323 Quantum Test Algorithm, Quantum Algorithm 324 Simulated Performance Measures 330 Feedback Loop, Feedback 400 Systems 410 Quantum Hardware Sample Generation Model 412 Distribution of design parameters, distribution of designs 414 Quantum hardware samples, quantum hardware models 415 Quantum Test Algorithms, Quantum Algorithms, and Other Hardware Information 416 Optimizer, Operating parameters generated by the optimizer 418 Simulated performance measurements, simulated execution errors 420 performance distance 422 Target performance measurements, desired performance parameters 424 Control Actions, Control Actions (Design Updates) 500 Computer-Implemented Methods 600 Computer-Implemented Methods 700 Computing System 702 User Computing Device 712 processor 714 Memory 716 Data 718 command 720 Quantum Hardware Sample Model Generative Model 722 User Input Components 730 Server Computing System 732 processor 734 Memory 736 Data 738 command 740 Quantum Hardware Sample Model Generative Model 750 Training Computing System 752 processor 754 Memory 756 Data 758 command 760 Model Trainer 762 Training Data 780 Network

Claims

1. 1. A computing system comprising: one or more processors; and one or more memory devices for storing computer readable data, said computer readable data comprising: a distribution of parameters of one or more quantum hardware; and one or more quantum hardware parameter dependencies defining a relationship between distributions of the one or more quantum hardware parameters; Including, the distribution of parameters of the one or more quantum hardware and the dependencies of parameters of the one or more quantum hardware define a statistical network; The one or more memory devices further comprise, when implemented in the computing system, Sampling values ​​for one or more parameters of quantum hardware from the distribution of parameters of the one or more quantum hardware; simulating execution of a quantum algorithm with simulated quantum hardware characterized by values ​​of the one or more parameters of the quantum hardware; A computing system that stores instructions to perform the steps of:

2. The computing system of claim 1 , wherein the statistical network comprises a Bayesian network.

3. 2. The computing system of claim 1, wherein the distribution of parameters of the one or more quantum hardware comprises a distribution of parameters of quantum hardware measured by one or more experiments.

4. 2. The computing system of claim 1 , wherein the distribution of parameters of the one or more quantum hardware comprises a distribution of parameters of one or more engineered quantum hardware.

5. 2. The computing system of claim 1 , wherein the distribution of parameters of the one or more quantum hardware comprises at least one of one or more circuit parameters, one or more electrical parameters, or one or more defect parameters.

6. 2. The computing system of claim 1, wherein the distribution of parameters of the one or more quantum hardware comprises at least one of a distribution of qubits, a distribution of qubit circuits, a distribution of qubit relaxation, or a distribution of background loss.

7. 10. The computing system of claim 1 , wherein the quantum hardware comprises a quantum processor having one or more qubits.

8. 2. The computing system of claim 1, wherein the computer readable data further comprises a joint probability distribution over distributions of parameters of the quantum hardware.

9. 2. The computing system of claim 1, wherein the dependencies of the parameters of the one or more quantum hardware include one or more conditional independence relations between distributions of parameters of quantum hardware with unknown dependencies, and one or more conditional dependencies relating distributions of parameters of quantum hardware based on known dependencies.

10. 2. The computing system of claim 1 , wherein the computer-readable data further comprises a machine-learned model, wherein dependencies of parameters of the one or more quantum hardware are learned based at least in part on training the machine-learned model, and wherein the statistical network comprises a machine-learned neural network.

11. 1. A computer-implemented method for simulating the performance of quantum hardware, comprising: accessing, by a computing system comprising one or more computing devices, computer readable data, the computer readable data comprising a distribution of parameters of one or more quantum hardware; sampling, by the computing system, values ​​for one or more parameters of quantum hardware from a distribution of parameters of the one or more quantum hardware; obtaining, by the computing system, one or more simulated performance measurements based at least in part on values ​​of parameters of the one or more quantum hardware; wherein obtaining the one or more simulated performance measures comprises simulating execution of a quantum algorithm with simulated quantum hardware characterized by values ​​of parameters of the one or more quantum hardware.

12. obtaining the one or more simulated performance measures, determining, by the computing system, one or more operating parameters using an optimization algorithm; obtaining, by the computing system, one or more simulated performance measurements based at least in part on the one or more operating parameters; 12. The computer-implemented method of claim 11, further comprising:

13. 13. The computer-implemented method of claim 12, wherein the one or more operating parameters include one or more operating frequencies.

14. obtaining, by the computing device, one or more performance distances between the one or more simulated performance measures and one or more target performance measures; implementing, by the computing system, a control action to adjust at least one of the distributions of parameters of the one or more quantum hardware based at least in part on the one or more performance metrics; 12. The computer-implemented method of claim 11, further comprising:

15. 15. The computer-implemented method of claim 14, wherein the control actions include one or more of incrementing, decrementing, shifting, stretching, substituting, or changing a type of distribution of at least one of the parameters of the one or more quantum hardware.

16. 12. The computer-implemented method of claim 11, wherein sampling values ​​of the one or more quantum hardware parameters from a distribution of the one or more quantum hardware parameters comprises propagating values ​​of the one or more quantum hardware parameters through a statistical network that includes dependencies of the one or more quantum hardware parameters.

17. 17. The computer-implemented method of claim 16, wherein sampling values ​​of parameters of the one or more quantum hardware comprises pre-sampling values ​​of parameters of the one or more quantum hardware.

18. obtaining the one or more simulated performance measures from values ​​of parameters of the one or more quantum hardware, providing, by the computing system, values ​​of parameters of the one or more quantum hardware to a quantum circuit simulator system, the quantum circuit simulator system configured to simulate performance of the values ​​of parameters of the one or more quantum hardware with respect to one or more test algorithms; obtaining, by the computing system and from the quantum circuit simulator system, one or more algorithm errors for the one or more test algorithms; 12. The computer-implemented method of claim 11, further comprising:

19. A computer-implemented method for simulating the performance of quantum hardware with respect to a quantum algorithm, comprising: accessing, by a computing system comprising one or more computing devices, computer readable data, the computer readable data comprising distributions of parameters of one or more quantum hardware and a statistical network of dependencies of parameters of the one or more quantum hardware; sampling, by the computing system, values ​​of one or more quantum hardware parameters from a distribution of the one or more quantum hardware parameters, comprising sampling a value of the one or more quantum hardware parameters from each of the distributions of the one or more quantum hardware parameters and propagating the values ​​of the one or more quantum hardware parameters through the statistical network based on dependencies of the one or more quantum hardware parameters; wherein values ​​of the one or more quantum hardware parameters are used by the computing system to simulate execution of the quantum algorithm by a simulated quantum hardware characterized by the values ​​of the one or more quantum hardware parameters. A computer-implemented method.

20. 20. The computer-implemented method of claim 19, wherein the values ​​of parameters of the one or more quantum hardware include values ​​of parameters associated with a plurality of sub-models, each sub-model configured to model the behavior of at least one of a plurality of performance indicators of a quantum processor having one or more qubits.

Images