DC-DC Converter

Abstract

The present invention relates to a DC-DC converter, comprising an integrated circuit including at least one power transistor and a snubber circuit connected in parallel to the at least one power transistor, and a selection resistor connected between a power supply voltage supplied to the integrated circuit and the snubber circuit, the snubber circuit including at least two snubbers, each of the at least two snubbers including a resistor, a first transistor, and a capacitor connected in series, the selection resistor being connected to a gate of a first transistor of any one of the at least two snubbers.

Description

[Technical field]

[0001] Cross-reference to related application(s) This application claims the benefit of priority based on Korean Patent Application No. 10-2021-0182457 dated December 20, 2021, and all contents disclosed in the documents of that Korean patent application are incorporated herein by reference.

[0002] The present disclosure relates to DC-DC converters. [Background technology]

[0003] A DC-DC converter converts an input voltage and supplies an output voltage with a required voltage level. In a DC-DC converter, voltage switching can cause an excess voltage. To prevent damage to components due to excess voltage and to eliminate EMI radiation noise, a snubber circuit can be applied to the DC-DC converter.

[0004] To eliminate noise, it is necessary to optimize the snubber circuit by changing its snubber values, such as its resistance and capacitance, but if the snubber circuit is built into an IC element, it is difficult to change the snubber values ​​of the snubber circuit unless the IC element is replaced. Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide a DC-DC converter including a snubber circuit, which is capable of variably applying a snubber value when the snubber circuit is built into an IC element. [Means for solving the problem]

[0006] According to one aspect of the invention, a converter includes an integrated circuit including at least one power transistor and a snubber circuit coupled in parallel to the at least one power transistor, and a selection resistor coupled between a power supply voltage supplied to the integrated circuit and the snubber circuit, the snubber circuit including at least two snubbers, each of the at least two snubbers including a resistor, a first transistor, and a capacitor coupled in series, and the selection resistor coupled to a gate of a first transistor of any one of the at least two snubbers.

[0007] A first transistor of any one of the at least two snubbers may be turned on by the power supply voltage provided through the selection resistor.

[0008] The first transistors of the remaining snubbers except for the one of the at least two snubbers may be turned off.

[0009] The integrated circuit may further include a switch control circuit receiving the power supply voltage and controlling a switching operation of the at least one power transistor.

[0010] According to another aspect of the invention, a converter includes an integrated circuit including at least one power transistor and a snubber circuit connected in parallel to the at least one power transistor, and at least two selection resistors connected between a power supply voltage supplied to the integrated circuit and the snubber circuit, the snubber circuit including at least two resistors, at least two first transistors connected in series to each of the at least two resistors, at least two capacitors, and at least two second transistors connected in series to each of the at least two capacitors, a first selection resistor of the at least two selection resistors connected to a gate of a first transistor connected in series to any one of the at least two resistors, and a second selection resistor of the at least two selection resistors connected to a gate of a second transistor connected in series to any one of the at least two capacitors.

[0011] A first transistor connected in series to any one of the at least two resistors may be turned on by the power supply voltage supplied through the first selection resistor, and a second transistor connected in series to any one of the at least two capacitors may be turned on by the power supply voltage supplied through the second selection resistor.

[0012] A first transistor connected in series to the remaining resistors except for one of the at least two resistors may be turned off, and a second transistor connected in series to the remaining capacitors except for one of the at least two capacitors may be turned off.

[0013] The integrated circuit may further include a switch control circuit receiving the power supply voltage and controlling the at least one power transistor.

[0014] A third selected resistor of the at least two selected resistors is connected to a gate of a first transistor connected in series to another one of the at least two resistors, and a resistance value of the snubber circuit may be a parallel combined resistance of one of the at least two resistors and the other one.

[0015] A third selection resistor of the at least two selection resistors is connected to a gate of a second transistor that is connected in series to another one of the at least two capacitors, and a capacitance value of the snubber circuit may be a parallel combined capacitance of one of the at least two capacitors and the other one. Effect of the Invention

[0016] Through the present disclosure, it is possible to provide a DC-DC converter that includes a snubber circuit, in which, when the snubber circuit is built into an IC element, it is possible to selectively configure a snubber circuit from among a plurality of snubbers, and to variably apply the resistance value and capacitance of the snubber circuit. [Brief description of the drawings]

[0017] [Figure 1] FIG. 2 is a block diagram illustrating a converter according to one embodiment. [Diagram 2] 1 is a circuit diagram illustrating an example of a snubber circuit and a resistor box according to an embodiment; [Diagram 3] FIG. 2 is a circuit diagram illustrating an example of a resistor box according to one embodiment. [Figure 4] 1 is a circuit diagram illustrating an example of a snubber circuit and a resistor box according to an embodiment; [Diagram 5] FIG. 2 is a circuit diagram illustrating an example of a resistor box according to one embodiment. [Figure 6] FIG. 2 is a circuit diagram illustrating an example of a resistor box according to one embodiment. [Figure 7] FIG. 2 is a circuit diagram illustrating an example of a resistor box according to one embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, the embodiments disclosed herein will be described in detail with reference to the attached drawings, and the same or similar components will be given the same or similar reference numerals, and the duplicated description thereof will be omitted. The suffixes "module" and / or "part" for components used in the following description are given or mixed for the sake of ease of specification writing only, and do not have any meaning or role that is different from each other by themselves. In addition, when describing the embodiments disclosed herein, if it is determined that a detailed description of related known technology may make the gist of the embodiments disclosed herein unclear, the detailed description will be omitted. In addition, the attached drawings are merely for making the embodiments disclosed herein easily understandable, and the technical ideas disclosed in the present specification are not limited by the attached drawings, and it should be understood that the drawings include all modifications, equivalents, or alternatives included in the ideas and technical scope of the present invention.

[0019] Terms including ordinal numbers such as first, second, etc. may be used to describe various components, but the components are not limited to the terms. The terms are used only to distinguish one component from another.

[0020] In this application, the terms "comprise" or "have" and the like are intended to specify the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification, but should be understood as not precluding the presence or additional possibility of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0021] 1 to 7 illustrate a converter circuit that enables various configurations of a snubber circuit in a converter that converts an input DC voltage into a DC voltage.

[0022] FIG. 1 is a block diagram that diagrammatically illustrates a converter according to one embodiment.

[0023] The converter 1 can perform DC-DC conversion of an input voltage Vin to output an output voltage Vout. The converter 1 can include an integrated circuit (IC) 10, a resistor box 20, and an output unit 30. The converter 1 can be mounted on a printed circuit board (PCB).

[0024] A power supply voltage VCC may be supplied to IC 10 through terminal P1, and the power supply voltage VCC may be supplied to resistor box 20.

[0025] An input voltage Vin may be supplied to IC 10 through terminal P1. IC 10 may perform DC-DC conversion on the input voltage Vin and transmit the output voltage to output unit 30 through terminals P4 and P5.

[0026] Resistor box 20 can select the configuration of IC 10 through a number of selection terminals P11-P13. Although IC 10 is shown in FIG. 1 as including three selection terminals P11-P13, this is by way of example only and the invention is not limited thereto, and IC 10 may be embodied with two or more selection terminals.

[0027] The IC 10 can convert an input voltage through a plurality of transistors and a switch control circuit. The IC 10 can include a switch control circuit 110, a first power transistor Q1, a first resistor R1, a first capacitor C1, a second power transistor Q2, a snubber circuit 120, and an inductor L.

[0028] The switch control circuit 110 can generate transistor control signals QCS1 and QCS2 for controlling the switching operations of the first and second power transistors Q1 and Q2 using the power supply voltage VCC input through the terminal P1 as a power supply. The switching operations of the first and second power transistors Q1 and Q2 can be controlled by the transistor control signals QCS1 and QCS2 supplied from the switch control circuit 110.

[0029] The first resistor R1 and the first capacitor C1 are connected in series with each other and in parallel with the first power transistor Q1. One end of the first power transistor Q1 is connected to one end of the switch control circuit 110. The other end of the first power transistor Q1 is connected to a node where one end of the second power transistor Q2, a terminal P21 of the snubber circuit 120, and one end of the inductor L are connected. The other end of the second power transistor Q2 is connected to a node where the other end of the switch control circuit 110 and a terminal P22 of the snubber circuit 120 are connected. A terminal P23 of the snubber circuit 120 is connected to a terminal P5 of the IC10. The other end of the inductor L is connected to a terminal P4, and the terminal P23 of the snubber circuit 120 is connected to a terminal P5.

[0030] The output unit 30 may include a capacitor C and a load R. In the output unit 30, one end of the output voltage Vout is connected to a node to which one end of the capacitor C and one end of the load R are connected, and the other end of the output voltage Vout is connected to a node to which the other end of the capacitor C and the other end of the load R are connected.

[0031] The on level of the transistor control signals QCS1 and QCS2 is a high level, and the off level is a low level. When the first power transistor Q1 is turned on and the second power transistor Q2 is turned off by the high level transistor control signal QCS1 and the low level transistor control signal QCS2, the input voltage Vin is supplied to the inductor L, and the current flowing through the inductor L can increase. When the first power transistor Q1 is turned off and the second power transistor Q2 is turned on by the low level transistor control signal QCS1 and the high level transistor control signal QCS2, the current flowing through the inductor L can decrease while flowing through the second power transistor Q2. The current flowing through the inductor L is supplied to the load R, and the output voltage Vout can be smoothed to a constant level by the capacitor C. The switch control circuit 110 can detect the output voltage Vout and control the switching operations of the first and second power transistors Q1 and Q2 so that the output voltage Vout can be maintained at a predetermined level.

[0032] Hereinafter, the operation of the snubber circuit 120 based on the internal circuit configuration of the resistor box 20 will be described with reference to FIGS.

[0033] FIG. 2 is a circuit diagram showing an example of a snubber circuit and a resistor box according to an embodiment.

[0034] The snubber circuit according to the example shown in FIG. 2 can operate as a snubber unit in which a resistor, a capacitor, and a transistor are connected in series.

[0035] The snubber circuit 120 may include a first snubber 121, a second snubber 122, a third snubber 123, and a plurality of gate resistors RG21-RG23. The first snubber 121 may include a resistor R21, a capacitor C21, and a transistor Q21, the second snubber 122 may include a resistor R22, a capacitor C22, and a transistor Q22, and the third snubber 123 may include a resistor R23, a capacitor C23, and a transistor Q23.

[0036] 2, snubber circuit 120 is shown as including three snubbers 121-123, however this is by way of example only and the invention is not limited thereto, and snubber circuit 120 may be embodied with two or more snubbers. The number of selection terminals P11-P13 as shown in FIG. 2 may be increased or decreased based on the number of snubbers included in snubber circuit 120.

[0037] One end of the first snubber 121, one end of the second snubber 122, and one end of the third snubber 123 are connected to terminal P21, and the other end of the first snubber 121, the other end of the second snubber 122, and the other end of the third snubber 123 are connected to a node to which terminals P22 and P23 are connected.

[0038] The terminal P21 is coupled to a node to which one end of the resistor R21, one end of the resistor R22, and one end of the resistor R23 are coupled.

[0039] The other end of the resistor R21 is connected to one end of a transistor Q21. The other end of the transistor Q21 is connected to one end of a capacitor C21. One end of a gate resistor RG21 is connected to the gate terminal of the transistor Q21, and the other end of the gate resistor RG21 is connected to a selection terminal P11.

[0040] The other end of resistor R22 is connected to one end of transistor Q22. The other end of transistor Q22 is connected to one end of capacitor C22. One end of gate resistor RG22 is connected to the gate terminal of transistor Q22, and the other end of gate resistor RG22 is connected to selection terminal P12.

[0041] The other end of resistor R23 is connected to one end of transistor Q23. The other end of transistor Q23 is connected to one end of capacitor C23. One end of gate resistor RG23 is connected to the gate terminal of transistor Q23, and the other end of gate resistor RG23 is connected to selection terminal P13.

[0042] The other end of the capacitor C21, the other end of the capacitor C22, and the other end of the capacitor C23 are coupled to a node to which the terminal P22 and the terminal P23 are coupled.

[0043] The snubber circuit 120 according to the embodiment shown in FIG. 2 can operate through at least one of a first snubber 121, a second snubber 122, and a third snubber 123, which is selected according to the configuration of the resistor box 20.

[0044] The resistor box 20 may include a plurality of individual resistor boxes 21-23. Although the resistor box 20 is shown in FIG. 2 to include three individual resistor boxes 21-23, this is merely an example, and the invention is not limited thereto, and the resistor box 20 may be embodied to include two or more individual resistor boxes. The number of individual resistor boxes may be increased or decreased depending on the number of selection terminals P11-P13.

[0045] Each of the plurality of individual resistor boxes 21-23 may include a selected resistor. Alternatively, each of the plurality of individual resistor boxes 21-23 may be open circuited. In the following description, among the plurality of individual resistor boxes 21-23, a resistor box that does not include a selected resistor is considered to be open circuited.

[0046] Hereinafter, one embodiment of the individual resistor boxes 21-23 included in the resistor box 20 will be described with reference to FIG.

[0047] FIG. 3 is a circuit diagram illustrating an example of a resistor box according to one embodiment.

[0048] In the example of FIG. 3, the individual resistor box 21 includes a selection resistor RS1, and the remaining individual resistor boxes 22, 23 do not include a selection resistor.

[0049] The power supply voltage VCC supplied to the resistance box 20 can supply current to a corresponding selection terminal (e.g., P11) among a plurality of selection terminals P11-P13 through an individual resistance box (e.g., 21) including a selection resistor among a plurality of individual resistance boxes 21-23.

[0050] 2 and 3, the transistor Q21 is turned on by the power supply voltage VCC supplied through the resistors RS1 and RG21. When the transistor Q21 is turned on, the first snubber 121 is connected in parallel to the second power transistor Q2. That is, the first snubber 121 can operate against a transient voltage that may be generated when the second power transistor Q2 is switched on.

[0051] When the transistor Q21 is turned on, the resistance of the snubber circuit 120 is the resistance of the resistor R21, and the capacitance of the snubber circuit 120 is determined by the capacitance of the capacitor C21.

[0052] Hereinafter, the operation of the snubber circuit 120 based on the internal circuit configuration of the resistor box 20 capable of controlling the resistance and the capacitor of the snubber will be described with reference to FIGS.

[0053] FIG. 4 is a circuit diagram showing an example of a snubber circuit and a resistor box according to an embodiment.

[0054] The snubber circuit according to the example shown in FIG. 4 may not operate on a snubber-by-snubber basis, unlike the snubber circuit according to the example shown in FIG.

[0055] The snubber circuit 120 may include a plurality of resistors R21-R23, a plurality of capacitors C21-C23, a plurality of transistors Q21-Q23, Q211, Q221, Q231, and a plurality of gate resistors RG21-RG23, RG211, RG221, RG231.

[0056] Terminal P21 is connected to a node where one end of resistor R21, one end of resistor R22, and one end of resistor R23 are connected.

[0057] The other end of resistor R21 is connected to one end of transistor Q21. One end of gate resistor RG21 is connected to the gate terminal of transistor Q21, and the other end of gate resistor RG21 is connected to selection terminal P11. One end of transistor Q211 is connected to one end of capacitor C21. One end of gate resistor RG211 is connected to the gate terminal of transistor Q211, and the other end of gate resistor RG211 is connected to selection terminal P14.

[0058] The other end of resistor R22 is connected to one end of transistor Q22. One end of gate resistor RG22 is connected to the gate terminal of transistor Q22, and the other end of gate resistor RG22 is connected to selection terminal P12. One end of transistor Q221 is connected to one end of capacitor C22. One end of gate resistor RG221 is connected to the gate terminal of transistor Q221, and the other end of gate resistor RG221 is connected to selection terminal P15.

[0059] The other end of resistor R23 is connected to one end of transistor Q23. One end of gate resistor RG23 is connected to the gate terminal of transistor Q23, and the other end of gate resistor RG23 is connected to selection terminal P13. One end of transistor Q231 is connected to one end of capacitor C23. One end of gate resistor RG231 is connected to the gate terminal of transistor Q231, and the other end of gate resistor RG231 is connected to selection terminal P16.

[0060] To node NN, the other end of transistor Q21, the other end of transistor Q211, the other end of transistor Q22, the other end of transistor Q221, the other end of transistor 23, and the other end of transistor Q231 are connected.

[0061] The other end of the capacitor C21, the other end of the capacitor C22, and the other end of the capacitor C23 are coupled to a node to which the terminal P22 and the terminal P23 are coupled.

[0062] The snubber circuit 120 according to the embodiment shown in FIG. 4 can operate through at least one of the multiple resistors R21-R23 selected according to the configuration of the resistor box 20 and at least one of the multiple capacitors C21-C23 selected according to the configuration of the resistor box 20.

[0063] A plurality of individual resistor boxes 21-26 may be included in the resistor box 20. In Fig. 4, the resistor box 21 is shown to include six individual resistor boxes 21-26, and the number of selection terminals P11-P16 is shown to be six.

[0064] Each of the plurality of individual resistor boxes 21-26 may include a selected resistor. Alternatively, each of the plurality of individual resistor boxes 21-26 may be open circuited. In the following description, among the plurality of individual resistor boxes 21-26, a resistor box that does not include a selected resistor is considered to be open circuited.

[0065] Hereinafter, one embodiment of the individual resistor boxes 21-26 included in the resistor box 20 will be described with reference to FIG.

[0066] FIG. 5 is a circuit diagram illustrating an example of a resistor box according to one embodiment.

[0067] In the example of FIG. 5, individual resistor box 21 includes a selected resistor RS1, individual resistor box 25 includes a selected resistor RS5, and the remaining individual resistor boxes 22-24, 26 do not include a selected resistor.

[0068] The power supply voltage VCC supplied to the resistance box 20 can supply current to a corresponding selection terminal (e.g., P11 and P15) among the multiple selection terminals P11-P16 through an individual resistance box (e.g., 21 and 25) including a selection resistor among the multiple individual resistance boxes 21-26.

[0069] 4 and 5, in converter 1 using snubber circuit 120 and resistor box 20, transistor Q21 is turned on by power supply voltage VCC supplied through resistors RS1 and RG21, and transistor Q221 is turned on by power supply voltage VCC supplied through resistors RS5 and RG221. With transistors Q21 and Q221 turned on, resistor R21 and capacitor C22 are connected in parallel to second power transistor Q2.

[0070] With transistor Q21 and transistor Q221 turned on, the resistance of snubber circuit 120 is the resistance of resistor R21, and the capacitance of snubber circuit 120 can be determined by the capacitance of capacitor C22.

[0071] In addition, in the converter 1 using the snubber circuit 120 of FIG. 4, the resistance value of the snubber circuit 120 may be determined by a combined resistance using multiple resistors, and the capacitance of the snubber circuit 120 may be determined by a combined capacitance using multiple capacitors.

[0072] 6 and 7, an embodiment of a resistor box that allows the snubber circuit 120 to have a combined resistance or combined capacitance will now be described.

[0073] FIG. 6 is a circuit diagram illustrating an example of a resistor box according to one embodiment.

[0074] In the example of FIG. 6, individual resistor box 21 includes a selected resistor RS1, individual resistor box 23 includes a selected resistor RS3, individual resistor box 25 includes a selected resistor RS5, and the remaining individual resistor boxes 22, 24, 26 do not include selected resistors.

[0075] The power supply voltage VCC supplied to the resistance box 20 can supply current to a corresponding selection terminal (e.g., P11, P13, and P15) among the multiple selection terminals P11-P16 through an individual resistance box (e.g., 21, 23, and 25) including a selection resistor among the multiple individual resistance boxes 21-26.

[0076] 4 and 6, the transistor Q21 is turned on by the power supply voltage VCC supplied through resistors RS1 and RG21, the transistor Q23 is turned on by the power supply voltage VCC supplied through resistors RS3 and RG23, and the transistor Q221 is turned on by the power supply voltage VCC supplied through resistors RS5 and RG221. With the transistors Q21, Q23, and Q221 turned on, the resistors R21, R23, and capacitor C22 are connected in parallel to the second power transistor Q2.

[0077] With transistor Q21, transistor Q23, and transistor Q221 turned on, the resistance of snubber circuit 120 is the parallel combined resistance of resistors R21 and R23, and the capacitance of snubber circuit 120 can be determined by the capacitance of capacitor C22.

[0078] FIG. 7 is a circuit diagram illustrating an example of a resistor box according to one embodiment.

[0079] In the example of FIG. 7, individual resistor box 21 includes a selected resistor RS1, individual resistor box 25 includes a selected resistor RS5, individual resistor box 26 includes a selected resistor RS6, and the remaining individual resistor boxes 22-24 do not include selected resistors.

[0080] The power supply voltage VCC supplied to the resistance box 20 can supply current to a corresponding selection terminal (e.g., P11, P15, and P16) among the multiple selection terminals P11-P16 through an individual resistance box (e.g., 21, 25, and 26) including a selection resistor among the multiple individual resistance boxes 21-26.

[0081] 4 and 7, in converter 1 using snubber circuit 120 and resistor box 20, transistor Q21 is turned on by power supply voltage VCC supplied through resistor RS1 and resistor RG21, transistor Q221 is turned on by power supply voltage VCC supplied through resistor RS5 and resistor RG221, and transistor Q231 is turned on by power supply voltage VCC supplied through resistor RS6 and resistor RG231. With transistor Q21, transistor Q221, and transistor Q231 turned on, resistor R21, capacitor C22, and capacitor C23 are connected in parallel to second power transistor Q2.

[0082] With transistor Q21, transistor Q221, and transistor Q231 turned on, the resistance of snubber circuit 120 is the resistance of resistor R21, and the capacitance of snubber circuit 120 can be determined by the parallel combined capacitance of capacitor C22 and capacitor C23.

[0083] The snubber circuit 120 may include multiple resistors as shown in Figures 4 and 6, or multiple capacitors as shown in Figures 4 and 7. Alternatively, the snubber circuit 120 may be a resistor box that combines the resistor box shown in Figure 6 and the resistor box shown in Figure 7 to include multiple resistors and multiple capacitors.

[0084] According to an embodiment, the snubber circuit 120 can reduce noise that may occur in the second power transistor Q2, and the snubber value of the snubber circuit 120 provided inside the IC 10 can be adjusted by configuring selected resistors included in a resistor box 20 located outside the IC 10. By adjusting the snubber value outside the IC 10, the debugging time for noise removal can be shortened.

[0085] Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements made by a person having ordinary knowledge in the field to which the present invention belongs also fall within the scope of the present invention. [Explanation of symbols]

[0086] 1: Converter 10:IC 110: Switch control circuit 120: Snubber circuit 121: First snubber 122: Second snubber 123: 3rd snubber 20: Resistor box 21, 22, 23, 24, 25, 26: Individual resistor boxes 30: Output section

Claims

1. an integrated circuit including at least one power transistor, a snubber circuit connected in parallel with the at least one power transistor, and a switch control circuit receiving a power supply voltage and controlling a switching operation of the at least one power transistor; an external resistor connected between the power supply voltage and the snubber circuit, external to the integrated circuit; The snubber circuit comprises: At least two snubbers; each of the at least two snubbers includes a resistor, a first transistor, and a capacitor connected in series; The external resistor is coupled to a gate of a first transistor of any one of the at least two snubbers.

2. 2. The converter of claim 1, wherein a first transistor of any one of the at least two snubbers is turned on by the power supply voltage provided through the external resistor.

3. 3. The converter of claim 2, wherein the first transistors of the remaining snubbers, except for the snubber including the turned-on first transistor, are turned off among the at least two snubbers.

4. an integrated circuit including at least one power transistor, a snubber circuit connected in parallel to the at least one power transistor, and a switch control circuit receiving a power supply voltage and controlling the at least one power transistor; a resistor box external to the integrated circuit, the resistor box being coupled between the power supply voltage and the snubber circuit; The snubber circuit comprises: at least two resistors, at least two first transistors connected in series to each of the at least two resistors, at least two capacitors, and at least two second transistors connected in series to each of the at least two capacitors, The resistor box includes: a first external resistor connected to a gate of a first transistor connected in series to one of the at least two resistors; a second external resistor connected to a gate of a second transistor connected in series to one of the at least two capacitors; Includes a converter.

5. a first transistor connected in series to one of the at least two resistors is turned on by the power supply voltage supplied through the first external resistor; 5. The converter of claim 4, wherein a second transistor connected in series to one of the at least two capacitors is turned on by the power supply voltage supplied through the second external resistor.

6. a first transistor connected in series to the remaining resistors, except for the resistor connected in series to the first transistor that is turned on, among the at least two resistors, is turned off; 6. The converter of claim 5, wherein second transistors connected in series to the remaining capacitors, except for the capacitor connected in series to the second transistor that is turned on, are turned off among the at least two capacitors.

7. the resistor box further includes a third external resistor connected to a gate of a first transistor connected in series to another one of the at least two resistors; 7. The converter according to claim 4, wherein the resistance value of the snubber circuit is a parallel combined resistance of one of the at least two resistors and another one of the at least two resistors.

8. the resistor box further includes a third external resistor connected to a gate of a second transistor connected in series to another one of the at least two capacitors; 7. A converter according to claim 4, wherein the capacitance value of the snubber circuit is a parallel combined capacitance of one of the at least two capacitors and another one of the at least two capacitors.

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