Analog-to-digital conversion method and analog-to-digital converter

Abstract

According to the present invention, an analog-to-digital conversion method for converting an optical analog signal into an electrical digital signal includes: a step of performing, on the optical analog signal, at least one of affine transformation using first reference light and homodyne detection on a detection axis of second reference light; a step of photoelectrically converting the optical analog signal, on which the at least one of the affine transformation and the homodyne detection has been performed, into an electrical analog signal; and a step of converting the electrical analog signal into the electrical digital signal through a threshold process.　With this configuration, the analog-to-digital conversion method according to the present invention can reduce power consumption.

Description

[Technical field]

[0001] The present invention relates to an optical-electrical analog-to-digital conversion method and an analog-to-digital converter capable of reducing power consumption. [Background technology]

[0002] In recent years, optical analog computing units, such as optical neural network accelerators, have been researched and developed as a new application technology premised on large-scale integration of on-chip optical devices (Non-Patent Document 1).

[0003] Optical analog calculators are attracting attention because vector calculations using optical interference can ideally be performed with zero energy consumption (energy saving) and can reduce calculation delays in certain applications (low latency).

[0004] In an optical analog computing device, the input and output optical signals are analog signals, so it is necessary to operate an electro-optic analog to digital converter (EO DAC, Patent Document 1), which is a mechanism for converting an electrical digital signal into an optical analog signal, and an opto-electronic analog to digital converter (OE ADC), which is a mechanism for converting an optical analog signal into an electrical digital signal.

[0005] Currently, a typical OE ADC is configured by combining an optical receiver with an electrical ADC with a certain number of bits (approximately 8-12 bits). For high-speed operation of several GHz or more with this configuration, a parallel ADC is required. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2019-167620 [Non-patent literature]

[0007] [Non-Patent Document 1] Y. Shen et al., “Deep learning with coherent nanophotonic circuits,” Nature Photon 11, 441-446 (2017) [Non-Patent Document 2] W. Liu et al., "HolyLight: A Nanophotonic Accelerator for Deep Learning in Data Centers," 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, 1483-1488 (2019) Summary of the Invention [Problem to be solved by the invention]

[0008] However, a parallel ADC requires 2(N-1) comparators (N is bit resolution), which consumes a lot of power. It is estimated that the parallel ADC consumes about 80-90% of the power of the entire optical neural network accelerator (Non-Patent Document 2).

[0009] Thus, when a parallel ADC is used in an OE ADC, high power consumption is a problem.

[0010] Therefore, it is desirable to perform all the processing in the ADC optically as much as possible, but it is difficult to perform the threshold processing all optically. Therefore, it is necessary to perform the processing other than the threshold processing in the ADC optically as much as possible. [Means for solving the problem]

[0011] In order to solve the above-mentioned problems, an analog-to-digital conversion method according to the present invention is an analog-to-digital conversion method for converting an optical analog signal into an electrical digital signal, the method comprising: performing an affine transformation of the optical analog signal with a first reference light; Steps to be taken and homodyne detection on the detection axis of the second reference light. Waves The method includes the steps of: performing a digital signal generation process; converting the performed optical analog signal into an electrical analog signal by photoelectric conversion; and converting the electrical analog signal into an electrical digital signal by threshold processing.

[0012] Further, an analog-to-digital converter according to the present invention is an analog-to-digital converter for converting an optical analog signal into an electrical digital signal, comprising: a first reference light generating unit that generates a first reference light; and a calculation unit that performs affine transformation on the optical analog signal using the first reference light; a second reference light generating unit that generates a second reference light; The affine transformed optical analog signal a detection unit that performs homodyne detection using the second reference light to obtain an electrical analog signal; electricity and a conversion unit that converts the analog signal into an electrical digital signal by threshold processing. Effect of the Invention

[0014] According to the present invention, it is possible to provide an analog-to-digital conversion method and an analog-to-digital converter capable of reducing power consumption. [Brief description of the drawings]

[0015] [Figure 1] FIG. 1 is a block diagram showing a configuration of an analog-to-digital converter according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a block diagram showing a configuration of an analog-to-digital converter according to a second embodiment of the present invention. [Diagram 3] FIG. 3 is a flow chart for explaining the analog-to-digital conversion method according to the first embodiment of the present invention. [Figure 4A] FIG. 4A is a diagram for explaining an analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 4B] FIG. 4B is a diagram for explaining the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 4C] FIG. 4C is a diagram for explaining the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 4D] FIG. 4D is a diagram for explaining the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 5A] FIG. 5A is a diagram for explaining an example of an analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 5B] FIG. 5B is a diagram for explaining an example of the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 6A] FIG. 6A is a diagram for explaining an example of an analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 6B] FIG. 6B is a diagram for explaining an example of the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 7A] FIG. 7A is a diagram for explaining an example of an analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 7B] FIG. 7B is a diagram for explaining an example of the analog-to-digital conversion method according to the first and second embodiments of the present invention. [Figure 8] FIG. 8 is a diagram for explaining the effects of the analog-to-digital conversion method and the analog-to-digital converter according to the embodiment of the present invention. [Figure 9A] FIG. 9A is a diagram for explaining the effects of the analog-to-digital conversion method and the analog-to-digital converter according to the embodiment of the present invention. [Figure 9B] FIG. 9B is a diagram for explaining the effects of the analog-to-digital conversion method and the analog-to-digital converter according to the embodiment of the present invention. [Figure 10A]FIG. 10A is a diagram for explaining the effects of the analog-to-digital conversion method and the analog-to-digital converter according to the embodiment of the present invention. [Figure 10B] FIG. 10B is a diagram for explaining the effects of the analog-to-digital conversion method and the analog-to-digital converter according to the embodiment of the present invention. [Figure 11] FIG. 11 is a diagram showing a configuration of an analog-to-digital converter according to a first embodiment of the present invention. [Figure 12] FIG. 12 is a diagram showing a configuration of an analog-to-digital converter according to a second embodiment of the present invention. [Figure 13] FIG. 13 is a diagram showing the configuration of an analog-to-digital converter according to a modified example of the first embodiment of the present invention. [Figure 14] FIG. 14 is a diagram showing a configuration of an analog-to-digital converter according to a modified example of the first embodiment of the present invention. [Figure 15] FIG. 15 is a block diagram showing a configuration of an analog-to-digital converter according to the third embodiment of the present invention. [Figure 16] FIG. 16 is a diagram showing a configuration of an analog-to-digital converter according to a third embodiment of the present invention. [Figure 17] FIG. 17 is a diagram showing an example of the configuration of an analog-to-digital converter according to the third embodiment of the present invention. [Figure 18] FIG. 18 is a block diagram showing a configuration of an analog-to-digital converter according to a fourth embodiment of the present invention. In FIG. [Figure 19] FIG. 19 is a diagram showing a configuration of an analog-to-digital converter according to a fourth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0016] <First embodiment> An analog-to-digital converter according to a first embodiment of the present invention will be described with reference to Fig. 1. The analog-to-digital converter according to this embodiment uses a time division multiplexing system.

[0017] <Configuration of analog-to-digital converter> The analog-to-digital converter 10 of this embodiment uses a time division multiplexing method, and as shown in Figure 1, includes a first reference light generating unit 12, a calculation unit 13, a second reference light generating unit 14, a detection unit 15, and a conversion unit 16.

[0018] An optical analog signal (signal light) 11 is input to an analog-to-digital converter 10 .

[0019] The first reference light generating unit 12 is a time-varying reference light generating unit that generates a first reference light by varying it over time and outputs it to the calculation unit 13 .

[0020] The calculation unit 13 adds the first reference light to the input signal light, thereby performing an affine transformation (translation) on the signal light.

[0021] Here, in the affine transformation of light, the magnitude of the signal light can be detected by comparing it with multiple reference lights. In detail, the magnitude of the signal light can be detected by adding multiple reference lights with different amplitudes (magnitudes) to the signal light and then judging whether the result is larger or smaller than a predetermined threshold value.

[0022] The second reference light generating unit 14 is a time-varying reference light generating unit that generates the second reference light by varying it over time and outputs it to the detecting unit 15 .

[0023] The detection unit 15 performs homodyne detection on the affine transformed signal light on an arbitrary detection axis using the second reference light, and obtains an electrical analog signal.

[0024] Here, by using an arbitrary detection axis, it is possible to mainly detect the phase of the signal light. In detail, the phase of the signal light can be detected by discriminating the signal light using multiple reference lights with different phases (described later).

[0025] The conversion unit 16 performs threshold processing with low bit resolution (1 to 2 bits) to convert the electrical analog signal into an electrical digital signal 17. This low bit threshold processing can reduce power consumption.

[0026] According to the analog-to-digital converter 10 of this embodiment, the OE ADC can perform the affine transformation (detection of the intensity of the signal light) and the homodyne detection (detection of the phase of the signal light) by optical processing. As a result, the power consumption can be reduced.

[0027] <Second embodiment> An analog-to-digital converter according to a second embodiment of the present invention will be described with reference to Fig. 2. The analog-to-digital converter according to this embodiment uses a space division multiplexing system.

[0028] <Configuration of analog-to-digital converter> Analog-to-digital converter 20 of this embodiment uses a space division multiplexing method and, as shown in FIG. 2, includes a plurality (N) of first reference light generation units 22_1 to 22_N, a plurality (N) of calculation units 23_1 to 23_N, a plurality (N) of second reference light generation units 24_1 to 24_N, a plurality (N) of detection units 25_1 to 25_N, and a plurality (N) of conversion units 26_1 to 26_N.

[0029] An optical analog signal (signal light) 21 is input to an analog-to-digital converter 20 .

[0030] The first reference light generating units 22_1 to 22_N generate first reference light and output it to the calculation unit.

[0031] The calculation units 23_1 to 23_N perform affine transformation (parallel movement) of the signal light by adding the first reference light to the input signal light. Here, similarly to the first embodiment, in the affine transformation by light, the magnitude of the signal light can be detected by comparison with a plurality of reference lights.

[0032] The second reference light generating sections 24_1 to 24_N generate second reference light and output the same to the detecting sections 25_1 to 25_N.

[0033] The detection units 25_1 to 25_N perform homodyne detection on the affine transformed signal light with an arbitrary detection axis using the second reference light to obtain an electrical analog signal. Here, as in the first embodiment, by using an arbitrary detection axis, it is possible to mainly detect the phase of the signal light.

[0034] The conversion units 26_1 to 26_N convert the electrical analog signals into electrical digital signals 27_1 to 27_N with a low bit resolution (1 to 2 bits). Here, by performing analog-to-digital (AD) conversion with a low bit resolution, power consumption can be reduced.

[0035] According to the analog-to-digital converter 20 of this embodiment, the OE ADC can perform the affine transformation (detection of the intensity of the signal light) and the homodyne detection (detection of the phase of the signal light) by optical processing. As a result, the power consumption can be reduced.

[0036] <Analog-to-digital conversion method> The analog-to-digital conversion method according to the first and second embodiments will be described with reference to Fig. 3 to Fig. 4D. Fig. 3 shows a flow chart of the analog-to-digital conversion method according to the present embodiment. Fig. 4A to Fig. 4D show IQ plane diagrams for explaining the analog-to-digital conversion method according to the present embodiment.

[0037] An optical analog signal (signal light) is input. Figure 4A shows the initial state of the optical analog signal to be converted.

[0038] First, as shown in FIG. 4B, a first reference light is added to the signal light, thereby performing an affine transformation (translation) on the signal light (step S1).

[0039] Next, as shown in Fig. 4C, the light after the affine transformation is detected on the detection axis of an arbitrary reference light (second reference light) (step S2). The detected light is then converted into an electrical analog signal by photoelectric conversion (step S3). In reality, the magnitude of the analog signal changes depending on the magnitude of the reference light, but here we assume a situation in which the orthogonal projection onto the reference axis (thick line in the figure) is detected as an analog quantity.

[0040] Next, as shown in Fig. 4D, the value (analog amount) of the above-mentioned electric analog signal is converted into a 1-digit or 2-digit electric digital signal by AD conversion at a low bit of 1 to 2 bits (step S4). In the figure, 41_1 and 41_2 show the modes of AD conversion at 1 bit and 2 bits, respectively.

[0041] Finally, when the time division multiplexing method is used, the first reference light and the second reference light are changed over time, and the above steps are repeated a preset number of times (N times) to obtain a multi-digit digital signal (steps S5 and S6).

[0042] In addition, when the space division multiplexing method is used, a plurality of first reference beams and a plurality of second reference beams are used as shown in Fig. 2, so that a multi-digit digital signal can be obtained by repeating the above steps once. In this case, the above steps S5 and S6 are not required.

[0043] In the analog-to-digital conversion method according to the present embodiment, the affine transformation and homodyne detection are processes that use only linear optical elements in the optical circuit, so wavelength division multiplexing can also be used. In this way, by combining time division multiplexing, space division multiplexing, and wavelength division multiplexing, a digital signal with a higher bit count can be obtained at a higher speed.

[0044] A specific example of the analog-to-digital conversion method according to this embodiment will be described below.

[0045] Figures 5A and 5B show the analog-to-digital conversion when using multiple phases of second reference beams. Figure 5A shows the IQ components of the second reference beams. The absolute phases of the second reference beams R11, R12, R13, and R14 are 0, π / 4, π / 2, and 3π / 4, respectively, and the amplitudes are the same.

[0046] After performing four types of homodyne detection using these four second reference beams R11 to R14, the results (numbers) of 1-bit analog-to-digital conversion for each second reference beam are arranged (placed) in order. As a result, as shown in FIG. 5B, a four-digit electrical digital signal (in the brackets "") is obtained by a 1-bit threshold processor. Here, the most significant one is the one due to the second reference beam R14, followed by those due to R13, R12, and R11. In this way, when combining the phases of the four reference beams with a 1-bit threshold processor, eight types of quantization are achieved.

[0047] As described above, in the analog-to-digital conversion method according to the present embodiment, the digital signal is determined by the phase of the optical analog input signal.

[0048] 6A and 6B show the manner of analog-to-digital conversion when multiple amplitudes of the first reference beam are used. Fig. 6A shows the IQ components of the first reference beam. The absolute phase of each of the first reference beams R21, R22, R23, and R24 is 0, and four types of amplitude are used.

[0049] Using these four first reference beams R21 to R24, four types of affine transformation are performed, and the results (numbers) of 1-bit analog-to-digital conversion for each of the first reference beams are arranged (placed) in order.

[0050] As a result, as shown in Fig. 6B, a four-digit electrical digital signal (inside "") is obtained by a one-bit threshold processor. Here, the most significant one is the one due to the first reference beam R24, followed by those due to R23, R22, and R21. In this way, when the amplitudes of the four reference beams are combined with a one-bit threshold processor, five quantization possibilities are obtained.

[0051] As described above, in the analog-to-digital conversion method according to the present embodiment, the digital signal is determined by the "amplitude" of the optical analog input signal.

[0052] Figures 7A and 7B show the analog-to-digital conversion when the first and second reference beams are used. Figure 7A shows the IQ components of the second reference beams R31, R32, R33, and R34. Here, the absolute phase is fixed at π / 4, and multiple amplitudes are used.

[0053] After the four affine transformations using the first reference light, two types of homodyne detection (IQ detection) are performed using four second reference light R31 to R34. In detail, two types of homodyne detection (IQ detection) with a phase difference of π / 2 are performed. Next, the results (numbers) of the I channel and Q channel of 1-bit analog-to-digital conversion for each second reference light are arranged (placed) in order.

[0054] As a result, as shown in FIG. 7B, two sets of four-digit electrical digital signals (the upper row shows the I channel results and the lower row shows the Q channel results in " " in the figure) are obtained by the one-bit threshold processor. Here, the most significant is the result from the second reference light R34, followed by R33, R32, and R31 in order. In this way, when the "I component" and "Q component" of the four reference light are combined with a one-bit threshold processor, 25 quantizations are possible.

[0055] As described above, in the analog-to-digital conversion method according to this embodiment, a digital signal is determined by the "I component" and "Q component" of an optical analog input signal.

[0056] <Effects> The effects of the analog-to-digital conversion methods and analog-to-digital converters according to the first and second embodiments will be described with reference to Fig. 8 to Fig. 10B. Here, the case where the phase of the second reference light is used (hereinafter referred to as "Type A") and the case where the "I component" and "Q component" of the second reference light (hereinafter referred to as "Type B") are used will be described as examples.

[0057] First, a description will be given of the relationship between the homodyne detection number x and the maximum quantization number in the analog-to-digital conversion method and the analog-to-digital converter according to the present embodiment.

[0058] Figure 8 shows the relationship between the homodyne detection number x and the maximum quantization number in analog-to-digital conversion for Type A with 1 bit (31_1 in the figure) and 1.5 bits (31_2 in the figure) and for Type B with 1 bit (31_3 in the figure) and 1.5 bits (31_4 in the figure).

[0059] The relationship between the homodyne detection number x and the maximum quantization number is derived by calculating specific examples of numerical analysis values ​​of the maximum quantization number obtained for detection numbers 2, 4, 6, 8, and 16, and deducing a general formula from the obtained sequence.

[0060] The maximum quantization number does not depend on the analog-to-digital conversion method and increases monotonically with the homodyne detection number x, but its dependence on the homodyne detection number x differs as follows:

[0061] For type A (1 bit), it depends on 2x (31_1). For type A (1.5 bits), it depends on 2x 2 Depends on +1(31_2).

[0062] For type B (1 bit), it is (x / 2+1) 2 Depends on (31_3). For type B (1.5 bits), it is (x+1). 2 Depends on (31_4).

[0063] As shown in FIG. 8, the maximum quantization number is smallest for type A (1 bit), and increases in the order of type B (1 bit), type B (1.5 bits), and type A (1.5 bits).

[0064] Thus, the quantization number can be increased most efficiently in the case of Type A (1.5 bits). However, in this case, the IQ plane is divided unevenly.

[0065] For example, in the case of 1.0 bit, as shown in Figure 4(a), the threshold boundary line passes through the origin, dividing the IQ plane into eight equal parts, and the quantized signals are distributed evenly. On the other hand, in the case of 1.5 bit, the threshold boundary line does not pass through the origin, and the intersection point shifts from the origin, so the IQ plane is not divided into eight equal parts, and the quantized signals are distributed unevenly.

[0066] In analog-to-digital conversion, if the quantized signal is distributed unevenly, it becomes a nonlinear conversion, which is difficult to control. On the other hand, if the quantized signal is distributed uniformly, it becomes a linear conversion, which is desirable.

[0067] Therefore, Type B is desirable for use in analog-to-digital conversion because the reference light can be set so that it is uniformly divided into a grid on the IQ plane, regardless of the resolution of the analog-to-digital conversion used in low-bit quantization, as shown in Figure 7B.

[0068] Next, the power consumption (energy consumption) in the analog-to-digital conversion method and analog-to-digital converter according to the present embodiment will be described with reference to Fig. 9A to Fig. 10B. Here, a case is shown in which a 1.0-bit threshold processor (32_1 in the figure), a 1.5-bit threshold processor (32_2 in the figure), and a 2.0-bit threshold processor (32_3 in the figure) are used in Type A of the OE ADC.

[0069] The energy consumption is calculated as the sum of the number of photodiodes required in each configuration multiplied by the energy consumption per PD (described below) and the number of threshold processors required in each configuration multiplied by the energy consumption of the threshold processors.

[0070] Here, the standard energy consumption of the ADC is set to 50 fJ / conversion. The 1-bit threshold processor is 50 fJ / conversion, the 1.5-bit threshold processor is 100 fJ / conversion, and the n-bit threshold processor is 2 n× 50fJ / conversion. The energy consumption per photodiode (PD) is assumed to be 5fJ / conversion (K. Nozaki et al., "Photonic-crystal nano-photodetector with ultrasmall capacitance for on-chip light-to-voltage conversion without an amplifier," Optica 3, 483-492 (2016)).

[0071] FIG. 9A shows the bit resolution dependency of energy consumption when using type A in an OE ADC and when using an ADC that performs all processing electrically (hereinafter referred to as an "electrical ADC"; indicated by 32_4 in the figure).

[0072] Here, since a space division multiplexing system is assumed, the number of PDs increases as the bit resolution increases. Also, the bit resolution of the OE ADC is expressed as the logarithm of base 2 (log 2 y).

[0073] FIG. 9B shows the degree to which the energy consumption is reduced (reduction ratio) in each of the OE ADC cases shown in FIG. 9A compared to the case of an electric ADC.

[0074] In Type A, when a 1.5-bit or 2.0-bit threshold processor is used, the energy consumption reduction ratio increases as the bit resolution increases. Furthermore, when a 1.5-bit threshold processor is used, the energy consumption reduction ratio is large, and is about 10 times that of an 8-bit equivalent. Here, the energy consumption reduction ratio is the ratio of each energy consumption to the energy consumption by an electrical ADC.

[0075] Thus, when a 1.5-bit threshold processor is used, a significant effect is achieved in terms of reducing energy consumption. Also, as the bit resolution increases, a significant effect is achieved in terms of reducing energy consumption.

[0076] Similarly, Fig. 10A shows the bit resolution dependence of energy consumption when using type B in the OE ADC and when using an electric ADC. Here, the cases of using a 1.0-bit threshold processor (33_1 in the figure), a 1.5-bit threshold processor (33_2 in the figure), and a 2.0-bit threshold processor (33_3 in the figure) in type A are shown. Also shown is the case of using an electric ADC (33_4 in the figure).

[0077] FIG. 10B also shows the degree to which the energy consumption is reduced (reduction ratio) in each of the OE ADC cases shown in FIG. 10A compared to the case of the electric ADC.

[0078] In Type B, the energy consumption can be reduced to the same extent with a 1.0-bit, 1.5-bit, or 2.0-bit threshold processor, and the energy consumption can be reduced as the bit resolution increases. Among them, the use of a 1.5-bit threshold processor has a particularly remarkable effect on reducing energy consumption.

[0079] In this way, in the analog-to-digital conversion method and analog-to-digital converter according to the first and second embodiments, multiple processes are performed in the OE ADC using an optical circuit, and multiple digital signals are obtained from the multiple analog quantities obtained from these processes via a low-bit electrical ADC.

[0080] As a result, the analog-to-digital conversion method and analog-to-digital converter according to the first and second embodiments can reduce power consumption significantly compared to the case where a high-bit electrical ADC is used.

[0081] <First Example> Next, an analog-to-digital converter according to a first embodiment of the present invention will be described with reference to FIG.

[0082] <Configuration of analog-to-digital converter> The analog-to-digital converter 100 according to this embodiment is an example of the configuration of the first embodiment.

[0083] As shown in FIG. 11, the analog-to-digital converter 100 includes an optical IQ modulator 106, a phase modulator 107, a Y combiner 108, a coupler 109, a photodetector 110, a differential amplifier 111, and a threshold processor 112.

[0084] In a configuration for generating a signal light to be input to an analog-to-digital converter 100 , a continuous wave laser diode (CW LD) 101 is connected to a splitter 102 , one output terminal of which is connected to an optical interferometer 103 .

[0085] The other output end of the splitter 102 is connected to another splitter 105 .

[0086] One output terminal of another demultiplexer 105 is connected to the optical IQ modulator 106 in the analog-to-digital converter 100. In addition, one output terminal of the other demultiplexer 105 is connected to a phase modulator 107.

[0087] Here, it is preferable that the splitters 102 and 105 are variable splitters so that the distribution ratio between the signal light and the reference light can be set optimally.

[0088] The output end of the optical interferometer 103 and the output end of the optical IQ modulator 106 are connected to a Y multiplexer 108 , and the output end of the Y multiplexer 108 and the output end of the phase modulator 107 are connected to a coupler 109 .

[0089] Each of the two outputs from coupler 109 is connected to a photodetector 110 , and the output of each photodetector 110 is connected to a differential amplifier 111 .

[0090] The output of the differential amplifier 111 is connected to a threshold processor 112 .

[0091] <Operation of analog-to-digital converter> In the optical interferometer 103, the light input from the CW light source 101 via the demultiplexer 102 is modulated by an electrical input signal 104 and output as a signal light.

[0092] The optical IQ modulator 106 outputs the light branched by the splitter 102 from the CW light source 101 as reference light for affine transformation (first reference light) in a time-division manner.

[0093] The Y combiner 108 combines the signal light output from the optical interferometer 103 with the first reference light output from the optical IQ modulator 106, and performs an affine transformation.

[0094] A phase modulator 107 outputs the light branched by the splitters 102 and 105 from the CW light source 101 in a time-division manner as reference light (second reference light) for homodyne detection.

[0095] Coupler 109 causes the signal light affinely transformed by Y multiplexer 108 to interfere with the second reference light, and outputs two interference lights.

[0096] Each of the photodetectors 110 converts the output light of the coupler 109 into an electrical signal and outputs it to a differential amplifier 111 .

[0097] The differential amplifier 111 obtains a differential signal from the respective electrical signals. The signal thus obtained by homodyne detection is output to the threshold processor 112.

[0098] The threshold processor 112 quantizes the difference signal to obtain an electrical digital signal 113 .

[0099] In this embodiment, a Y-branch or a specific fixed ratio coupler may be used as the splitter. When emphasis is placed on reconfigurability, it is preferable to use a variable splitter.

[0100] In this embodiment, the coupler may be a 3 dB coupler such as a directional coupler or a multimode interference waveguide.

[0101] In this embodiment, the present invention is not limited to a differential amplifier, but may be implemented as a difference calculator, and the present invention is not limited to a threshold processor, but may be implemented as a transimpedance amplifier.

[0102] The analog-to-digital converter 100 according to this embodiment is capable of operating in the above-mentioned Type A and Type B. Here, when operating in Type B, the phase modulator 107 is changed over time with a phase change of π / 2.

[0103] According to the analog-to-digital converter 100 of this embodiment, the OE ADC can perform the affine transformation and homodyne detection optically.

[0104] As a result, the analog-to-digital converter 100 according to this embodiment can reduce power consumption.

[0105] <Second Example> Next, an analog-to-digital converter according to a second embodiment of the present invention will be described with reference to FIGS.

[0106] <Configuration of analog-to-digital converter> As shown in FIG. 12, the analog-to-digital converter 200 includes an optical IQ modulator 206, a Y multiplexer 208, couplers 209_1 and 209_2, photodetectors 210_1 and 210_2, differential amplifiers 211_1 and 211_2, threshold processors 212_1 and 212_2, and a π / 2 phase shifter 214.

[0107] The configuration for generating the signal light to be input to the analog-to-digital converter 100 is the same as that of the first embodiment, including a continuous wave laser diode (CW LD) 201 and an optical interferometer 203, and a configuration connected to an optical IQ modulator 206 in the analog-to-digital converter 100 via splitters 202 and 205.

[0108] The analog-to-digital converter 200 includes a Y-combiner 208 downstream of an optical IQ modulator 206, and two components (hereinafter referred to as "homodyne detection circuits") that perform homodyne detection similar to that of the first embodiment and threshold processors 212_1 and 212_2 are connected in parallel.

[0109] One homodyne detection circuit is composed of a coupler 209_1, a photodetector 210_1, and a differential amplifier 211_1, while the other homodyne detection circuit is composed of a coupler 209_2, a photodetector 210_2, and a differential amplifier 211_2.

[0110] Here, of the two homodyne detection circuits, a π / 2 phase shifter 214 is disposed in front of the input terminal of the second reference light in the other homodyne detection circuit, so that the second reference light is input to couplers 209_1 and 209_2 of each homodyne detection circuit with a π / 2 phase difference.

[0111] In this configuration, an I component 213_1 is output from one homodyne detection circuit, and a Q component 213_2 is output from the other homodyne detection circuit.

[0112] According to the analog-to-digital converter of this embodiment, the above-mentioned Type B operation is possible.

[0113] According to the analog-to-digital converter 200 of this embodiment, the OE ADC can perform the affine transformation and homodyne detection by optical processing.

[0114] Therefore, the analog-to-digital converter 200 according to this embodiment can reduce power consumption.

[0115] <Modification> As a modification of the first embodiment, as shown in Fig. 13, two optical IQ modulators 306_1 and 306_2 may be used, Y multiplexers 308_1 and 308_2 may be provided in the subsequent stages of the optical IQ modulators 306_1 and 306_2, and four homodyne detection circuits and threshold processors 312_1 to 312_4 may be connected in parallel. With this configuration, the number of spatial divisions can be doubled.

[0116] 14, four optical IQ modulators 406_1 to 406_4 may be used, Y multiplexers 408_1 to 408_4 may be provided in the subsequent stage of the optical IQ modulators 406_1 to 406_4, and eight homodyne detection circuits and threshold processors 412_1 to 412_8 may be connected in parallel. With this configuration, the number of spatial divisions can be increased by four times.

[0117] In the embodiment and the modified example of the present invention, the reference light for affine transformation is generated by an IQ modulator, but this is not limiting. If time division is not used, a fixed attenuator or phase shifter can be used.

[0118] Furthermore, when an increase in the number of spatial divisions is restricted due to circuit area or the like, this can be accommodated by appropriately combining time division and wavelength division.

[0119] <Third embodiment> An analog-to-digital conversion method and an analog-to-digital converter according to a third embodiment of the present invention will be described with reference to FIGS.

[0120] When a time division multiplexing system is used, the analog-to-digital converter 50 according to this embodiment includes a second reference light generating section 54, a detecting section 55, and a converting section 56, as shown in FIG.

[0121] An optical analog signal (signal light) 51 is input to an analog-to-digital converter 50 .

[0122] The second reference light generating section 54 is a time-varying reference light generating section, which generates the second reference light by varying it over time, and outputs it to the detecting section 55 .

[0123] The detection unit 55 performs homodyne detection on an arbitrary detection axis using the second reference light, and obtains an electrical analog signal.

[0124] The conversion unit 56 converts the electrical analog signal into an electrical digital signal 57 at a low bit resolution (1 to 2 bits). Here, by performing analog-to-digital (AD) conversion at a low bit resolution, power consumption can be reduced.

[0125] The analog-to-digital conversion method according to the present embodiment does not require step S1 in the analog-to-digital conversion method according to the first embodiment.

[0126] According to the analog-to-digital converter of this embodiment, the operation of Type A in the first embodiment is possible.

[0127] According to the analog-to-digital converter 50 of this embodiment, the OE ADC can perform optical processing up to homodyne detection, thereby reducing power consumption.

[0128] As a result, the analog-to-digital converter 50 according to this embodiment can reduce power consumption.

[0129] <Third Example> An analog-to-digital conversion method and an analog-to-digital converter according to a third embodiment of the present invention will be described with reference to Fig. 16. An analog-to-digital converter 500 according to this embodiment is an example of the configuration of the third embodiment, as shown in Fig. 16.

[0130] <Configuration of analog-to-digital converter> As shown in FIG. 16, the analog-to-digital converter 500 includes a phase modulator 507, a coupler 509, a photodetector 510, a differential amplifier 511, and a threshold processor 512.

[0131] In a configuration for generating signal light to be input to an analog-to-digital converter 500 , a continuous wave laser diode (CW LD) 501 is connected to a splitter 502 , one output terminal of which is connected to an optical interferometer 503 .

[0132] The other output terminal of the splitter 503 is connected to the phase modulator 507 in the analog-to-digital converter 500 .

[0133] The output end of the optical interferometer 503 and the output end of the phase modulator 507 are connected to a coupler 509 .

[0134] Each of the two outputs from coupler 509 is connected to a photodetector 510 , and the output of each photodetector 510 is connected to a differential amplifier 511 .

[0135] The output of the differential amplifier 511 is connected to a threshold processor 512 .

[0136] <Operation of analog-to-digital converter> In the optical interferometer 503, the light input from the CW light source 501 via the demultiplexer 502 is modulated by an electrical input signal and output as a signal light.

[0137] A phase modulator 507 outputs the light branched by the splitter 502 from the CW light source 501 in a time-division manner as reference light (second reference light) for homodyne detection.

[0138] The coupler 509 causes the signal light from the optical interferometer 503 to interfere with the second reference light, and outputs two interference lights.

[0139] Each of the photodetectors 510 converts the output light of the coupler 509 into an electrical signal and outputs it to a differential amplifier 511 .

[0140] The differential amplifier 511 obtains a differential signal from the respective electrical signals. The signal thus obtained by homodyne detection is output to the threshold processor 512.

[0141] The threshold processor 512 quantizes the difference signal to obtain an electrical digital signal 513 .

[0142] According to the analog-to-digital converter 500 of this embodiment, the above-mentioned Type A operation is possible.

[0143] According to the analog-to-digital converter 500 of this embodiment, the OE ADC can perform optical processing up to homodyne detection.

[0144] As a result, the analog-to-digital converter 500 according to this embodiment can reduce power consumption.

[0145] 17, a configuration may be adopted in which a plurality of homodyne detection circuits are connected in parallel to the rear stage of the phase modulators 607_1 to 607_4 using space division multiplexing. This allows the number of space divisions to be increased. In this case, the analog-to-digital conversion method does not require steps S2, S5, and S6 in the analog-to-digital conversion method according to the first embodiment.

[0146] <Fourth embodiment> An analog-to-digital conversion method and an analog-to-digital converter according to a fourth embodiment of the present invention will be described with reference to FIGS.

[0147] <Configuration of analog-to-digital converter> When the analog-to-digital converter 70 of this embodiment uses a time division multiplexing method, it includes a first reference light generating unit 72, a calculation unit 73, a second reference light generating unit 74, a detection unit 75, and a conversion unit 76, as shown in Figure 18.

[0148] An optical analog signal (signal light) 71 is input to an analog-to-digital converter 70 .

[0149] The first reference light generating unit 72 is a time-varying reference light generating unit that generates a first reference light by varying it over time, and outputs the first reference light to the calculation unit 73 .

[0150] The calculation unit 73 adds the first reference light to the input signal light, thereby performing an affine transformation (translation) on the signal light.

[0151] The second reference light generating section 74 generates a second reference light and outputs it to the detecting section 75 .

[0152] The detection unit 75 performs homodyne detection on the affine transformed signal light on an arbitrary detection axis using the second reference light, and obtains an electrical analog signal.

[0153] The conversion unit 76 converts the electrical analog signal with a low bit resolution (1 to 2 bits) into an electrical digital signal 77. Here, by performing analog-to-digital (AD) conversion with a low bit resolution, power consumption can be reduced.

[0154] The analog-to-digital conversion method according to this embodiment is similar to that of the first embodiment.

[0155] According to the analog-to-digital converter 70 of this embodiment, the OE ADC can perform the affine transformation and homodyne detection by optical processing, thereby reducing power consumption.

[0156] <Fourth Example> An analog-to-digital conversion method and an analog-to-digital converter according to a fourth embodiment of the present invention will be described with reference to FIG.

[0157] An analog-to-digital converter 700 according to this embodiment is an example of the configuration of the fourth embodiment, as shown in FIG.

[0158] <Configuration of analog-to-digital converter> As shown in FIG. 19, the analog-to-digital converter 700 includes an optical IQ modulator 706, a Y combiner 708, a coupler 709, a photodetector 710, a differential amplifier 711, and a threshold processor 712.

[0159] In the configuration for generating signal light in the analog-to-digital converter 700 , a continuous wave laser diode (CW LD) 701 is connected to a splitter 702 , one output end of which is connected to an optical interferometer 703 .

[0160] The other output terminal of the splitter 702 is connected to another splitter 705 .

[0161] One output end of another demultiplexer 705 is connected to the optical IQ modulator 706 in the analog-to-digital converter 700 .

[0162] The output end of the optical interferometer 703 and the output end of the optical IQ modulator 706 are connected to a Y multiplexer 708 , and the output end of the Y multiplexer 708 and the output end of the other demultiplexer 705 are connected to a coupler 709 .

[0163] Each of the two outputs from coupler 709 is connected to a photodetector 710 , and the output of each photodetector 710 is connected to a differential amplifier 711 .

[0164] The output of the differential amplifier 711 is connected to a threshold processor 712 .

[0165] <Operation of analog-to-digital converter> In the optical interferometer 703, the light input from the CW light source 701 via the demultiplexer 702 is modulated by an electrical input signal and output as signal light.

[0166] An optical IQ modulator 706 outputs the light branched from the CW light source 701 by the splitters 702 and 705 as reference light for affine transformation (first reference light) in a time-division manner.

[0167] The Y combiner 708 combines the signal light output from the optical interferometer 703 with the first reference light output from the optical IQ modulator 706, and performs affine transformation.

[0168] The coupler 709 causes the signal light affine transformed by the Y multiplexer 708 to interfere with the second reference light from the other demultiplexer 705, and outputs two interference lights.

[0169] Each of the photodetectors 710 converts the output light of the coupler 709 into an electrical signal and outputs it to a differential amplifier 711 .

[0170] The differential amplifier 711 obtains a differential signal from the respective electrical signals. The signal thus obtained by homodyne detection is output to the threshold processor 712.

[0171] The threshold processor 712 quantizes the difference signal to obtain an electrical digital signal 713 .

[0172] The analog-to-digital converter 700 according to this embodiment can perform analog-to-digital conversion when using a plurality of amplitudes of the first reference light in the first embodiment (FIGS. 6A and 6B). Here, the amplitude of the first reference light is changed by the optical IQ modulator 706.

[0173] According to the analog-to-digital converter 700 of this embodiment, the OE ADC can perform the affine transformation and homodyne detection optically.

[0174] As a result, the analog-to-digital converter 700 according to this embodiment can reduce power consumption.

[0175] In the analog-to-digital conversion method and analog-to-digital converter according to the embodiment and examples of the present invention, an example has been shown in which the output light of a CW light source is branched and used as the first reference light and the second reference light, but the output light of another light source may also be used as the first reference light and the second reference light.

[0176] In the analog-to-digital conversion method and analog-to-digital converter according to the embodiment and examples of the present invention, an example has been shown in which the first reference light and the second reference light are changed, but at least one of the first reference light and the second reference light may be changed over time.

[0177] In the embodiment of the present invention, the structure, dimensions, materials, etc. of each component in the configuration of the analog-digital converter and the conversion method are shown as examples, but the present invention is not limited to these. Anything that can exert the functions and effects of the analog-digital conversion method and the analog-digital converter may be used. [Industrial Applicability]

[0178] The present invention can be applied to analog-to-digital converters used in optical computers and optical neural networks, and in particular, optical-electrical analog-to-digital converters. [Explanation of symbols]

[0179] 10 Analog-to-Digital Converter 12 First reference light generating unit 13 Arithmetic section 14 Second reference light generating unit 15 Detector 16 Conversion section

Claims

1. 1. An analog-to-digital conversion method for converting an optical analog signal into an electrical digital signal, comprising the steps of: performing an affine transformation of the optical analog signal with a first reference beam; performing homodyne detection on a detection axis of the second reference light; converting the optical analog signal into an electrical analog signal by photoelectric conversion; converting said electrical analog signal to an electrical digital signal by thresholding; An analog-to-digital conversion method comprising:

2. The phase of the second reference light is changed.

2. The analog-to-digital conversion method according to claim 1.

3. The amplitude of the first reference beam is changed.

3. The analog-to-digital conversion method according to claim 1 or 2.

4. Varying the amplitude of the first reference beam; The homodyne detection is performed in two phases with a phase difference of π / 2.

4. The analog-to-digital conversion method according to claim 1, wherein the first and second inputs are connected to the first and second inputs.

5. At least one of the first reference light and the second reference light is changed over time.

5. The analog-to-digital conversion method according to claim 1.

6. An analog-to-digital converter for converting an optical analog signal into an electrical digital signal, comprising: a first reference light generating unit that generates a first reference light; a calculation unit that performs affine transformation on the optical analog signal using the first reference light; a second reference light generating unit that generates a second reference light; a detection unit that performs homodyne detection on the affine transformed optical analog signal using the second reference light to obtain an electrical analog signal; a conversion unit that converts the electrical analog signal into an electrical digital signal by threshold processing; An analog-to-digital converter comprising:

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