Acoustic resonator device and filter device

Abstract

To provide an acoustic resonator device that reduces thermal resistance from a substrate to a contact bump.SOLUTION: A lateral excitation film bulk acoustic resonator (XBAR) 500 with low thermal impedance has a substrate 520 and a single crystal piezoelectric plate 560 with a back surface attached to a top surface of the substrate via a bonding oxide (BOX) layer 572. An interdigital transducer (IDT) 580 formed on a front surface of a plate has interleaved fingers 436 disposed on a diaphragm 415, and a distance of overlap of interleaved fingers defines an aperture of the resonator device. Contact pads 582, 584 are formed at a selected location on a surface of the substrate to provide electrical connection between the IDTs and contact bumps 480, 481 attached to the contact pads. A piezoelectric plate is removed from at least a part of a surface area of the device under each contact pad to reduce thermal resistance between the contact bump and the substrate.SELECTED DRAWING: Figure 5B

Description

Technical Field

[0001] Part of the disclosure of this patent document includes materials subject to copyright protection. This patent document may display and / or describe matters that are the owner's trade dress or may become trade dress. The owners of copyright and trade dress do not object to the reproduction of this patent disclosure by anyone as recorded in the patent file or records of the Patent and Trademark Office, but reserve all rights of copyright and trade dress in other cases.

[0002] 〔Related Application Information〕 This patent document claims the priority of the co-pending U.S. Provisional Patent Application No. 63 / 216,525, entitled "METHOD TO IMPROVE BUMP THERMAL RESISTANCE", filed on June 30, 2021.

[0003] The present disclosure relates to radio frequency filters using acoustic wave resonators, particularly filters for communication devices.

Background Art

[0004] A radio frequency (RF) filter is a two-port device configured to pass some frequencies and block other frequencies, where "pass" means transmission with relatively low signal loss and "block" means blocking or significantly attenuating. The range of frequencies passed by the filter is called the "passband" of the filter. The range of frequencies blocked by such a filter is called the "stopband" of the filter. A typical RF filter has at least one passband and at least one stopband. The specific requirements for the passband or stopband depend on the specific application. For example, the "passband" may be defined as a frequency range in which the insertion loss of the filter is better than a specified value, such as 1 dB, 2 dB, or 3 dB. The "stopband" may be defined as a frequency range in which the rejection of the filter is greater than a specified value, such as 20 dB, 30 dB, 40 dB, or more, depending on the application.

[0005] RF filters are used in communication systems where information is transmitted over a wireless link. For example, RF filters are found in the RF front ends of cellular base stations, mobile phones and computing devices, satellite transceivers and ground stations, IoT (Internet of Things) devices, laptop computers and tablets, fixed point wireless links, and other communication systems. RF filters are also used in radar, electronic warfare, and information warfare systems.

[0006] Typically, for each specific application, RF filters require many design trade - offs to achieve the best compromise among performance parameters such as insertion loss, rejection, isolation, power handling, linearity, size, and cost. Specific designs, manufacturing methods, and performance enhancements can simultaneously satisfy one or more of these requirements.

[0007] Enhancing the performance of RF filters in wireless systems can have a wide - ranging impact on system performance. Leveraging improvements in RF filters can achieve system performance improvements such as increased cell size, extended battery life, improved data rate, increased network capacity, cost reduction, enhanced security, and improved reliability. These improvements can be achieved individually or in combination at various levels of a wireless system, such as an RF module, an RF transceiver, a mobile or fixed subsystem, or at the network level.

[0008] High - performance RF filters for current communication systems typically incorporate acoustic wave resonators, including surface acoustic wave (SAW) resonators, bulk acoustic wave (BAW) resonators, film bulk acoustic wave resonators (FBAR), and other types of acoustic resonators. However, the prior art is not suitable for use at the higher frequencies and bandwidths proposed for future communication networks.

[0009] The demand for a wider communication channel bandwidth inevitably leads to the use of a higher-frequency communication band. The radio access technology for mobile phone networks is standardized by 3GPP (Registered Trademark) (3rd Generation Partnership Project). The radio access technology for 5th generation mobile networks is defined by the 5G NR (New Radio) standard. The 5G NR standard defines several new communication bands. Two of these new communication bands are n77, which uses the frequency range of 3300 MHz to 4200 MHz, and n79, which uses the frequency range of 4400 MHz to 5000 MHz. Since both band n77 and band n79 use time-division duplexing (TDD), a communication device operating in band n77 and / or band n79 uses the same frequency for both uplink transmission and downlink transmission. The bandpass filters for band n77 and band n79 must be able to handle the transmission power of the communication device. High frequencies and wide bandwidths are also required for the 5 GHz and 6 GHz WiFi bands. In addition, the 5G NR standard defines a millimeter-wave communication band with a frequency of 24.25 GHz to 40 GHz. Summary of the Invention

[0010] The Transversely Excited Film Bulk Acoustic Resonator (XBAR) is an acoustic resonator structure for microwave filters. The XBAR is described in Patent No. US10,491,291 entitled "TRANSVERSELY EXCITED FILM BULK ACOUSTIC RESONATOR". The XBAR resonator includes an interdigital transducer (IDT) formed on a thin floating layer or diaphragm of a single crystal piezoelectric material. The IDT includes a first set of parallel fingers extending from a first bus bar and a second set of parallel fingers extending from a second bus bar. The first and second sets of parallel fingers are interleaved. The microwave signal applied to the IDT excites a shear primary acoustic wave in the piezoelectric diaphragm. The XBAR resonator provides very high electromechanical coupling and high frequency capabilities. The XBAR resonator may be used in various RF filters including band reject filters, band pass filters, duplexers, and multiplexers. The XBAR is well suited for use in filters in communication bands with frequencies above 3 GHz.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3A

Figure 3B

Figure 3C

Figure 4

Figure 5A

Figure 5B

Figure 6

Figure 7A

Figure 7B

Figure 8A

Figure 8B

Figure 8C

Figure 9

DETAILED DESCRIPTION OF THE INVENTION

[0012] Throughout this description, elements appearing in the drawings are assigned three- or four-digit reference numbers, where the lower two digits are unique to the element and the upper one or two digits are the drawing number in which the element was first introduced. Elements not described in combination with the drawings may be assumed to have the same characteristics and functions as the aforementioned elements having the same reference number or the same lower two digits.

[0013] Description of the Device The transversely excited film bulk acoustic resonator (XBAR) is a novel resonator structure for microwave filters. The XBAR is described in U.S. Patent No. 10491291 entitled "TRANSVERSELY EXCITED FILM BULK ACOUSTIC RESONATOR," the entire disclosure of which is incorporated herein by reference. The XBAR resonator includes a conductor pattern having an interdigital transducer (IDT) formed on a thin floating layer or diaphragm of a piezoelectric material. The IDT has two bus bars attached to respective sets of fingers, and the two sets of fingers are interleaved on a diaphragm above a cavity formed in a substrate on which the resonator is mounted. The diaphragm may include a front and / or rear dielectric layer spanning the cavity. A microwave signal applied to the IDT excites a shear primary acoustic wave in the piezoelectric diaphragm such that acoustic energy flows substantially perpendicular to the surface of the layer that is orthogonal or transverse to the direction of the electric field generated by the IDT. The XBAR resonator provides very high electromechanical coupling and high frequency capabilities.

[0014] The piezoelectric film may be part of a plate of single crystal piezoelectric material spanning a cavity in the substrate. The piezoelectric diaphragm may be a film and may include a front and / or rear dielectric layer. The XBAR resonator may be such a diaphragm having an interdigital transducer (IDT) formed on the diaphragm or film. Contact pads may be formed at selected locations on the surface of the substrate to provide an electrical connection between the IDT and contact bumps that are attached to or formed on the contact pads.

[0015] The main mechanism for removing heat from the XBAR diaphragm is to conduct it through the IDT fingers to the substrate and then from the substrate through the contact pads and contact bumps to the package housing the XBAR. However, the contact pads and other conductors of the conductor pattern are separated from the substrate by the piezoelectric layer and generally the buried oxide (BOX) layer. The low thermal conductivity of the piezoelectric layer and the BOX layer presents a substantial barrier to efficiently removing heat from the substrate through the contact pads and bumps.

[0016] In the following, an improved XBAR resonator, filter, and manufacturing technique for the XBAR resonator that efficiently conducts heat from the substrate through the contact pads are described by removing at least a portion of the piezoelectric plate from the surface area of the device or substrate under each contact pad to provide a lower thermal resistance between the contact bump and the substrate. Removing the plate can reduce the thermal resistance from the substrate to the bump of the XBAR resonator by creating thermal vias to the buried oxide layer or electrical insulation layer that contacts the substrate under the contact pads.

[0017] FIG. 1 shows a simplified schematic top view and an orthogonal cross-sectional view of a laterally excited film bulk acoustic resonator (XBAR) 100. An XBAR resonator such as resonator 100 may be used in various RF filters including band-reject filters, band-pass filters, diplexers, and multiplexers. The XBAR is particularly suitable for use in filters in communication bands with frequencies above 3 GHz.

[0018] XBAR100 is composed of thin-film conductor patterns formed on the surfaces of piezoelectric plates 110 each having parallel front surfaces 112 and back surfaces 114. The piezoelectric plates are thin single-crystal layers of piezoelectric materials such as lithium niobate, lithium tantalate, lanthanum gallium silicate, gallium nitride, or aluminum nitride. The piezoelectric plates are cut such that the orientations of the X, Y, and Z crystal axes with respect to the front and back surfaces are known and consistent. In the presented example, the piezoelectric plate may be Z-cut, i.e., the Z-axis is perpendicular to the surface. However, the XBAR may be fabricated on piezoelectric plates having other crystal orientations.

[0019] The back surface 114 of the piezoelectric plate 110 is attached to a substrate 120 that provides mechanical support to the piezoelectric plate 110. The substrate 120 may be, for example, silicon, sapphire, quartz, or several other materials. The substrate may have a layer or a predetermined region of an electrically insulating material such as thermally oxidized silicon (TOX), SiO 2 , polycrystalline silicon, and / or other dielectric materials. The back surface 114 of the piezoelectric plate 110 or the diaphragm 115 including the plate may be joined to the substrate 120 using a wafer bonding process, grown on the substrate 120, or attached to the substrate in several other ways. The piezoelectric plate may be directly attached to the substrate, SiO 2 , or Al 2 O 3 such as a bonding oxide layer 122 such as other oxide bonding oxides (BOX ) layer.

[0020] The conductor pattern of the XBAR100 includes an interdigital transducer (IDT) 130. The IDT 130 includes a first plurality of parallel fingers such as fingers 136 extending from a first bus bar 132, and a second plurality of fingers extending from a second bus bar 134. The first plurality of parallel fingers and the second plurality of parallel fingers are interleaved. The interleaved fingers 136 typically overlap by a distance AP, which is commonly referred to as the "aperture" of the IDT. The center-to-center distance L between the outermost fingers of the IDT 130 is the "length" of the IDT.

[0021] The first bus bar 132 and the second bus bar 134 function as terminals or electrodes of the XBAR100. A radio frequency or microwave signal applied between the two bus bars 132, 134 of the IDT 130 excites a primary acoustic mode in the piezoelectric plate 110. As will be discussed in more detail, the excited primary acoustic mode is a bulk shear mode in which acoustic energy propagates along a direction substantially orthogonal to the surface of the piezoelectric plate 110, and this direction is also perpendicular or transverse to the direction of the electric field generated by the IDT fingers. Thus, the XBAR is considered a laterally excited film bulk acoustic resonator.

[0022] The cavity 140 is formed in the substrate 120 such that a portion 115 of the piezoelectric plate 110 including the IDT 130 is suspended above the cavity 140 without contacting the substrate 120 or the bottom of the cavity 140. "Cavity" has the conventional meaning of "an empty space within a solid". The cavity 140 may contain gas, air, or a vacuum. The cavity 140 may be a hole that completely penetrates the substrate 120 (as shown in cross-sections A-A and B-B of FIG. 1) or a recess within the substrate 120 (subsequently as shown in FIG. 3A). The cavity 140 may be formed, for example, by selectively etching the substrate 120 before or after attachment of the piezoelectric plate 110 and the substrate 120. As shown in FIG. 1, the cavity 140 has a rectangular shape with a range larger than the aperture AP and the length L of the IDT 130. The cavity of the XBAR may have various shapes such as a regular polygon or an irregular polygon. The cavity of the XBAR may have more or less than four straight or curved sides.

[0023] A portion 115 of the piezoelectric plate suspended above the cavity 140 is physically similar to the diaphragm of a microphone and is thus referred to herein as the "diaphragm" 115 (for lack of a better term). As shown in FIG. 1, the diaphragm 115 is adjacent to the remaining portion of the piezoelectric plate 110 around the entire outer periphery 145 of the cavity 140. The diaphragm may be continuously and seamlessly connected to the remaining portion of the piezoelectric plate 110 around the entire or substantially the entire outer periphery of the cavity 140. In this context, "adjacent" means "connected continuously without any intervening item". In some cases, the BOX layer may bond the plate 110 to the substrate 120 around the outer periphery. The BOX layer may be present between the plate and the substrate around the outer periphery 145 and may extend not only within the outer periphery but also further away from the cavity. In the absence of the process of removing the BOX layer (i.e., the present invention), the BOX layer is anywhere between the piezoelectric plate and the substrate. The BOX layer is typically removed from the back side of the diaphragm 115 as part of forming the cavity. The IDT 130 is disposed on the piezoelectric plate 110 such that at least the fingers 136 of the IDT 130 are disposed on the diaphragm 115 of the piezoelectric plate spanning or suspended above the cavity 140.

[0024] In FIG. 1, for clarity of the drawing, the geometric pitch and width of the IDT fingers are greatly enlarged relative to the length (dimension L) and aperture (dimension AP) of the XBAR. A typical XBAR has more than 10 parallel fingers on the IDT 110. The XBAR may have hundreds or, in some cases, thousands of parallel fingers on the IDT 110. Similarly, the thickness of the fingers in the cross-sectional view is greatly enlarged.

[0025] FIG. 2 shows a detailed schematic cross-sectional view of the XBAR100 of FIG. 1. The cross-sectional view may be a part of the XBAR100 including the fingers of the IDT. The piezoelectric plate 110 is a single crystal layer of a piezoelectric material having a thickness ts. Ts may be, for example, 100 nm to 1500 nm. When used in a filter in the LTE (registered trademark) band of 3.4 GHz to 6 GHz (for example, band n77, n79), the thickness ts may be, for example, 200 nm to 1000 nm.

[0026] The front dielectric layer 214 may be optionally formed on the front side of the piezoelectric plate 110. The "front side" of the XBAR is, by definition, the surface facing away from the substrate. The front dielectric layer 214 has a thickness tfd. The front dielectric layer 214 is formed between the IDT fingers 236. Although not shown in FIG. 2, the front dielectric layer 214 may also be deposited (evaporated) above the IDT fingers 236. The back dielectric layer 216 may be optionally formed on the back side of the piezoelectric plate 110. The back dielectric layer may be a BOX layer or may include a BOX layer. The back dielectric layer 216 has a thickness tbd. The front dielectric layer 214 and the back dielectric layer 216 may be non-piezoelectric dielectric materials such as silicon dioxide or silicon nitride. Tfd and tbd may be, for example, 0 to 500 nm. Tfd and tbd are typically less than the thickness ts of the piezoelectric plate. Tfd and tbd are not necessarily equal, and the front dielectric layer 214 and the back dielectric layer 216 are not necessarily the same material. Either or both of the front dielectric layer 214 and the back dielectric layer 216 may be formed of a plurality of layers made of two or more materials.

[0027] The front dielectric layer 214 may be formed over the IDTs of some (e.g., selected) XBAR devices within the filter. The front dielectric 214 may be formed between and cover some of the IDT fingers of the XBAR devices, but not formed over other XBAR devices. For example, the front frequency setting dielectric layer may be formed over the IDT of a shunt resonator to reduce the resonance frequency of the shunt resonator relative to the resonance frequency of a series resonator where the front dielectric is thinner or absent. Some filters may include front dielectrics of two or more different thicknesses over various resonators. The resonance frequency of the resonator may be set to at least partially "tune" the resonator by selecting the thickness of the front dielectric layer.

[0028] Furthermore, the passivation layer may be formed over the entire surface of the XBAR device 100 except for the contact pads where electrical connections are made to the circuitry external to the XBAR device. The passivation layer is a thin dielectric layer intended to seal and protect the surface of the XBAR device while the XBAR device is being incorporated into a package. The front dielectric layer and / or the passivation layer may be SiO 2 , Si 3 N 4 Al 2 O 3 or some other dielectric materials, or combinations of these materials.

[0029] The thickness of the passivation layer may be selected, particularly for power handling purposes, to protect the piezoelectric plate and metal conductors from water and chemical corrosion. The thickness of the passivation layer may be in the range of 10 - 100 nm. The passivation material may be composed of multiple oxide and / or nitride coatings such as SiO 2 and Si 3 N 4 materials.

[0030] ​The IDT fingers 236 may be one or more layers of aluminum or substantially aluminum alloy, copper or substantially copper alloy, beryllium, tungsten, molybdenum, gold, or some other conductive material. Thin (relative to the total thickness of the conductor) layers of other metals such as chromium or titanium may be formed below and / or above the fingers to improve adhesion between the fingers and the piezoelectric plate 110 and / or to passivate or encapsulate the fingers. The IDT busbars (132, 134 in FIG. 1) may be made of the same or different materials as the fingers.

[0031] The dimension p is the spacing or "pitch" between the centers of the IDT fingers and may be referred to as the pitch of the IDT and / or the pitch of the XBAR. The dimension w is the width or "mark" of the IDT fingers. The IDT of the XBAR is substantially different from the IDT used in surface acoustic wave (SAW) resonators. In a SAW resonator, the pitch of the IDT is half of the acoustic wavelength at the resonance frequency. Additionally, the ratio of the mark to the pitch of the IDT of a SAW resonator is typically close to 0.5 (i.e., the width of the mark or finger is approximately one quarter of the acoustic wavelength at resonance). In an XBAR, the pitch p of the IDT is typically 2 to 20 times the width w of the fingers. Further, the pitch p of the IDT is typically 2 to 20 times the thickness ts of the piezoelectric slab 212 (piezoelectric plate 110). The width of the IDT fingers of the XBAR is not limited to one quarter of the acoustic wavelength at resonance. For example, the width of the IDT fingers of the XBAR may be 500 nm or more, so the IDT can be manufactured using optical lithography. The thickness tm of the IDT fingers may be anywhere from 100 nm to approximately equal to the width w. The thickness of the IDT busbars (132, 134 in FIG. 1) may be the same as or greater than the thickness tm of the IDT fingers.

[0032] Figure 3A is an alternative cross-sectional view of the XBAR device 300 along the cutting plane A-A defined in Figure 1. In Figure 3A, the piezoelectric plate 310 is attached to the substrate 320. A part of the piezoelectric plate 310 forms a diaphragm 315 spanning the cavity 340 of the substrate. The cavity 340 is formed in the substrate below a part of the piezoelectric plate 310 including the IDT of the XBAR without completely penetrating the substrate 320. Fingers such as the fingers 336 of the IDT are arranged on the diaphragm 315. The plate 310, the diaphragm 315 and the fingers 336 may be the plate 110, the diaphragm 115 and the fingers 136.

[0033] The cavity 340 may be formed, for example, by etching the substrate 320 before attaching the piezoelectric plate 310. Alternatively, the cavity 340 may be formed by etching the substrate 320 using a selective etching solution that reaches the substrate through one or more openings 342 provided in the piezoelectric plate 310. The diaphragm 315 may be adjacent to the remaining portion of the piezoelectric plate 310 around most of the outer periphery 345 of the cavity 340. For example, the diaphragm 315 may be adjacent to the remaining portion of the piezoelectric plate 310 around at least 50% of the outer periphery of the cavity 340.

[0034] One or more intermediate material layers 322 may be attached between the plate 310 and the substrate 320. The intermediate layer may be a bonding layer, a BOX layer, an etch stop layer, a seal layer, an adhesive layer, or a layer of other material attached or bonded to the plate 310 and the substrate 320, or may include them. The layer 322 may be any one or more of these layers, or a combination of these layers. In other embodiments, the piezoelectric plate 310 is directly attached to the substrate 320 and there is no intermediate layer.

[0035] Although the cavity 340 is shown in cross-section, it should be understood that the lateral extent of the cavity is a continuous closed band of the substrate 320 that surrounds the cavity 340 in a direction perpendicular to the plane of the drawing and defines its size. The lateral (i.e., left and right as shown in the figure) extent of the cavity 340 is defined by the lateral edges of the substrate 320. The vertical (i.e., downward from the plate 310 as shown in the figure) extent or depth of the cavity 340 extends into the substrate 320. In this case, the cavity 340 has a side cross-section that is rectangular or nearly rectangular in cross-section.

[0036] The XBAR 300 shown in FIG. 3A is referred to herein as a "front-side etching" configuration because the cavity 340 is etched from the front side of the substrate 320 (before or after attachment of the piezoelectric plate 310). The XBAR 100 of FIG. 1 is referred to herein as a "back-side etching" configuration because the cavity 140 is etched from the back side of the substrate 120 after the piezoelectric plate 110 is attached. The XBAR 300 shows one or more openings 342 of the piezoelectric plate 310 on the left and right sides of the cavity 340. However, in some cases, the opening 342 of the piezoelectric plate 310 is only on the left or right side of the cavity 340.

[0037] Figure 3B is an explanatory diagram of the target primary acoustic mode in the XBAR. Figure 3B shows a small part of the XBAR 350 including the piezoelectric plates 310 and three interleaved IDT fingers 336. The XBAR 350 may be part of any XBAR herein. An RF voltage is applied to the interleaved fingers 336. This voltage generates an electric field that varies temporally between the fingers. The direction of the electric field is mainly lateral or parallel to the surface of the piezoelectric plate 310, as indicated by the arrow labeled "electric field". Due to the high dielectric constant of the piezoelectric plate, the electric field is highly concentrated within the piezoelectric plate compared to air. The lateral electric field introduces shear deformation and thus strongly excites the primary shear acoustic mode in the piezoelectric plate 310. In this context, "shear deformation" is defined as a deformation in which parallel planes within the material remain parallel and maintain a certain distance while moving parallel to each other. "Shear acoustic mode" is defined as an acoustic vibration mode of a medium that results in shear deformation of the medium. The shear deformation of the XBAR 350 is represented by the curve 360, and the adjacent small arrows schematically indicate the direction and magnitude of the atomic motion. The degree of atomic motion and the thickness of the piezoelectric plate 310 are greatly enlarged for ease of visualization. The atomic motion is mainly lateral (i.e., the horizontal direction shown in Figure 3B), but the direction of the flow of acoustic energy of the excited primary shear acoustic mode is substantially orthogonal to the front and back surfaces of the piezoelectric plate, as indicated by the arrow 365.

[0038] Acoustic resonators based on shear acoustic wave resonance can achieve better performance than current state-of-the-art film bulk acoustic resonators (FBARs) and solidly-mounted-resonator bulk-acoustic-wave (SMRBAW) devices in which the electric field is applied in the thickness direction. The piezoelectric coupling of shear-wave XBAR resonance can be higher (>20%) compared to other acoustic resonators. The high piezoelectric coupling enables the design and implementation of microwave filters and millimeter-wave filters with a significant bandwidth.

[0039] FIG. 3C is a schematic circuit diagram and layout of a high-frequency bandpass filter 370 using an XBAR. The filter 370 has a conventional ladder-type filter structure including three series resonators 380A, 380B, 380C and two shunt resonators 390A, 390B. These three series resonators 380A, 380B, 380C are serially connected between a first port and a second port. In FIG. 3C, the first port and the second port are labeled "In" and "Out", respectively. However, the filter 370 is bidirectional, and either port may function as the input or output of the filter. These two shunt resonators 390A, 390B are connected from the nodes between the series resonators to ground. All the shunt resonators and series resonators are XBARs on a single die.

[0040] The three series resonators 380A, 380B, 380C and the two shunt resonators 390A, 390B of the filter 370 are formed on a single piezoelectric material plate 310 bonded to a silicon substrate (not visible). Each resonator includes an IDT (not shown) with at least fingers disposed above the cavity of the substrate. In this context and similar contexts, the term "respectively" means "associating each with each", that is, a one-to-one correspondence. In FIG. 3C, the cavity is schematically shown as a dashed rectangle (e.g., rectangle 345). In this example, each IDT is disposed above its respective cavity. In other filters, the IDTs of two or more resonators may be disposed above a single cavity.

[0041] FIG. 4 is a schematic cross-sectional view of XBAR400 with piezoelectric plates in the surface area of the device under contact pads 432 and 434. XBAR400 has a substrate 420 with a cavity 440. XBAR400 may be any version of XBAR100, 300, and / or 350. The substrate 420 has a substrate top surface 450, the bonding oxide (BOX) layer 422 has a BOX top surface 452, the plate 410 has a plate top surface 454, and the IDT 430 has a top surface 456. At the outer periphery 445 of the cavity 440, the plate 410 has a plate back surface attached to the BOX top surface 452, and the BOX layer 422 has a back surface that is attached to the substrate top surface 450. The BOX layer 422 may be removed from the area of the cavity 440 so that the cavity extends upward to the bottom surface of the plate 410.

[0042] A portion of the piezoelectric plate 410 that is not attached to the BOX layer 422 on the substrate 420 around (and possibly beyond) the outer periphery 445 forms a diaphragm 415 that spans the cavity 440. The diaphragm 415 has a desired thickness for a shunt resonator or a series resonator. In some cases, the thickness includes a front dielectric (not shown) for forming a shunt resonator. The interdigital transducer (IDT) 430 is formed on the front surface 454 of the piezoelectric plate 410 such that the interleaved fingers 436 of the IDT are disposed on the diaphragm 415. The cavity 440 may be a swimming pool cavity. The cavity may be etched from the back side through the plate or from the front side.

[0043] XBAR 400 has contact pads 432, 434 formed in selected locations or predetermined regions WR1 and WR2, respectively, for forming contact pads, disposed above surface 450 of substrate 420. Contact pads 432 and 434 are formed on an IDT 430 formed in a plate 410 formed in BOX layer 422, above substrate 420, over regions WR1 and WR2. Contact bumps 480 and 481 are formed or bonded or attached to the top surface of contact pads 432 and 434, respectively, over regions WR1 and WR2, as shown.

[0044] The contact bumps 480 and 481 and contact pads herein may be formed of a metal or conductor, such as gold (Au). They may be formed of the same material. The IDTs and fingers 436 herein may be formed of a metal or conductor, such as aluminum (Al). They may be formed of the same material. The piezoelectric plates herein may be formed of lithium niobate (LN), lithium tantalate (LT), or other piezoelectric material, and the BOX layer herein may be formed of SiO. 2 Alternatively, the substrate may be formed of polycrystalline Si. It may be formed.

[0045] For some XBAR devices herein, the interconnection from the chip-scale device, such as the XBAR 400, 500, 550 and 900, to a ceramic package (not shown) involves a gold-to-gold process consisting of gold stud bumps 481 and 482 and flip-chip technology to the package with contact pads facing and attached to the gold stud bumps. In some cases, the gold bumps are 65 μm in diameter and 10,000 μm in area. 2 The contact pads of the round or square XBAR device (e.g. For example, pads 432, 532, 582. The device die with the XBARs is then flip-chip attached to the package (for example, opposing contact pads) using thermo-compression or thermo-sonic bonding.

[0046] This gold-to-gold interconnection functions as both an electrical signal path and a thermal path between the package and the XBAR. During RF operation, when a radio frequency signal is applied to the IDT, for example, from the package through the bumps to the IDT, heat is generated within the XBAR device, and these paths conduct this heat from the XBAR through the bumps to the package. However, the interconnection has a thermal resistance determined by the material properties of the path including the bumps and contact pads of the XBAR between the XBAR and the package. Also, the thickness of the contact pads of the XBAR, or the thickness of the stack of materials at the contact pads of the XBAR (e.g., the vertical direction on the paper surface of FIGS. 2-5 and FIGS. 7-9) may be a contact bump of 0.5 μm of gold (Au), a contact pad of aluminum (Al) with a thickness of 0.3-0.5 μm, a lithium niobate (LiNbO 3 ) piezoelectric plate with a thickness of 0.2-1.0 μm, a silicon oxide (SiO 2 ) bonding oxide layer (e.g., BOX layer 422, 572 or insulating layer 551), and a silicon (Si) base substrate with a thickness of 250-500 μm. The total thermal resistance is the sum of the individual resistances of each material. Alternatively, the SiO 2 bonding layer may be replaced by a polycrystalline silicon (polysilicon) bonding layer with a thickness of 1 μm to 10 μm (e.g., BOX layers 422, 572).

[0047] ​For the XBAR400, the main mechanism for removing heat, such as the heat generated by the IDT and the plate above the cavity 440, from the diaphragm 415 of the XBAR is to conduct it to the substrate 420 through the IDT fingers 436, and then from the substrate to the package of the XBAR (not shown, attached to the contact bumps and housing the XBAR) through the contact pads 432, 434 and the contact bumps 480, 481. However, the contact pads 432, 434 and other conductors of the conductor pattern or the IDT430 are separated from the substrate 420 by the piezoelectric plate 410 and the BOX layer 422. The low thermal conductivity of the piezoelectric layer and the BOX layer is a substantial barrier to efficiently removing heat from the substrate to the package through the contact pads and bumps. The large thermal resistance of the plate 410 and the BOX layer 422 blocks the efficient escape of heat from the substrate 420 to the package through the contact pads and contact bumps of the XBAR400 and cools the XBAR diaphragm of the XBAR400.

[0048] Thereby, the thermal resistance from the bump contact pad to the substrate of the XBAR is improved (e.g., reduced) by removing the related thermal resistance of the LiNbO 3 plate material below the contact pad (see, for example, FIGS. 5A and 7B). By this removal, a via hole or an opening is formed in the substrate of the LiNbO plate, and the Au contact bump and the Al contact pad layer are in direct contact with the SiO 3 of the BOX layer, and a lower thermal resistance between the contact bump and the substrate can be provided. 2 of For a BOX layer with a thickness of 1 to 2 μm or more, this thermal resistance can be further improved (see, for example, FIGS. 5B and 8A - C) by removing or thinning the BOX layer material below the contact pad. By removing the BOX layer and the plate layer, a thermal via extending from the contact pad to the electrical insulation layer or the substrate is formed, providing a lower thermal resistance between the contact bump and the substrate.

[0049]

[0050] ​ FIG. 5A is a schematic cross-sectional view of an improved XBAR500 in which at least a portion of the surface area of the device under contact pads 532 and 534 has the piezoelectric plate 410 removed to provide a lower thermal resistance between the contact bumps and the substrate. XBAR500 has a substrate 420 having a cavity 440. XBAR500 may be any version of XBAR100, 300, and / or 350. The substrate 420 has a substrate top surface 450, the bonding oxide (BOX) layer 422 has a BOX top surface 452, the plate 510 has a plate top surface 454, and the IDT 530 has a top surface 456. At the outer periphery 445 of the cavity 440, the plate 510 has a plate back surface attached to the BOX top surface 452, and the BOX layer 422 has a back surface attached to the substrate top surface 450. The BOX layer 422 is removed from the bottom surface of the plate 510 in the region of the cavity 440 such that the cavity can extend upward only to the bottom surface of the plate 510 in the region of the cavity 440.

[0051] A portion of the piezoelectric plate 510 that is not attached to the BOX layer 422 on the substrate 420 (optionally beyond) around the outer periphery 445 forms a diaphragm 415 spanning the cavity 440. The interdigital transducer (IDT) 530 is formed on the front surface 454 of the piezoelectric plate 510 such that the interleaved fingers 436 of the IDT are disposed on the diaphragm 415. The cavity 440 may be formed either before, during, or after any of the other components of XBAR500, for example, in any of the steps shown in FIG. 7.

[0052] The BOX layer 422 may be layer 122 or 322. The BOX layer 422 may be thermally oxidized silicon (TOX), SiO 2 , Si 3 O 4 , Si 3 N 4 and / or other dielectric oxide materials It may also be the case. The BOX layer 422 may be a polycrystalline silicon (polysilicon) bonding layer with a thickness of 1 to 10 μm. The substrate 420 may be polymorphic or crystalline silicon (Si) with a thickness of 250 to 500 μm.

[0053] In XBAR500, the piezoelectric plate 510 is removed from at least a part of each of the surface regions WR1 and WR2 of the upper surface 452 of the BOX layer 422 under the contact pads 532 and 534 to provide a lower thermal resistance between the contact bump and the substrate. In some cases, the regions WR1 and WR2 under each contact pad include predetermined regions WR21 and WR22 of the upper surface 452 of the BOX layer 422 at selected positions on the upper surface to reduce a predetermined amount of thermal resistance between the contact pads 532 and 534 and the substrate 420. The selected positions and the predetermined regions may be selected to provide proper electrical contact between the IDT530 and the package and / or to reduce a predetermined amount of thermal resistance between the contact pads 532 and 534 and the substrate 420.

[0054] Therefore, the contact pads 532 and 534 are formed on the BOX layer 422 across the regions WR21 and WR22 or are formed on the IDT530 directly attached thereto, as shown in the figure. The piezoelectric plate 510 is removed from at least the regions WR21 and WR22 of the surface region of the upper surface 452 of the BOX layer 422 under the contact pads 532 and 534 respectively to provide a lower thermal resistance between the contact bump and the substrate. The contact bumps 480 and 481 are formed on, joined to, or attached to the upper surfaces of the contact pads 532 and 534 respectively across the regions WR21 and WR22, as shown in the figure.

[0055] The diameter or width of each of the contact pads 532 and 534 may be in the range of 50 μm to 300 μm. Their cross-sections may be circular, square, elliptical, or rectangular. The contact pads 532 and 534 are formed of metal or a conductor as described for the pads 432 and 434.

[0056] The contact pads 532 and 534 are metal layers or include metal layers that are respectively attached to regions WR1 and WR2 of the IDT 530 attached to a part of the side surface and the upper surface of the bonding layer 422 and the piezoelectric layer 510. The metal layer is attached to the upper surface 456 and the side surface of the IDT and is electrically connected to the bus bar of the IDT.

[0057] The BOX layer 422 provides electrical insulation between the substrate 420 and the contact pads 432 and 434. For example, the BOX layer 422 may be a trap-rich layer with high electrical resistance formed on the surface of the substrate 420 in regions WR1 and WR2 that is sufficient to ensure an electrical insulation path between the substrate 420 and the contact pads.

[0058] For the XBAR 500, the main mechanism for removing heat such as the heat generated by the IDT and the plate above the cavity 440 from the diaphragm 415 of the XBAR is to conduct it to the substrate 420 through the IDT fingers 436, and then from the substrate to the package of the XBAR (not shown, attached to the contact bumps and housing the XBAR) through the contact pads 532, 534 and the contact bumps 480, 481. Here, the contact pads 532, 534 and other conductors of the conductor pattern or the IDT 530 are not separated from the substrate 420 by the piezoelectric plate 410. Therefore, the low thermal conductivity of the piezoelectric layer does not substantially prevent the efficient removal of heat from the substrate to the package through the contact pads and bumps. In this case, the large thermal resistance of the plate 410 does not prevent the heat from efficiently escaping from the substrate 420 to the package of the XBAR 500 through the contact pads and contact bumps of the XBAR 500 to cool the diaphragm 415 of the XBAR 500. Thereby, the temperature rise of a predetermined plate resonator for a predetermined input heat load can be suppressed.

[0059] FIG. 5B is a schematic cross-sectional view of an improved XBAR 550 in which the piezoelectric plates 560 and the buried oxide (BOX) layer 572 are removed from at least a portion of the surface area of the device under the contact pads 582 and 584 to provide a lower thermal resistance between the contact bumps and the substrate. The substrate 520 has a substrate top surface 450, the buried oxide (BOX) layer 572 has a BOX top surface 452, the plate 560 has a plate top surface 454, and the IDT 580 has a top surface 456. At the outer periphery 445 of the cavity 440, the plate 560 has a plate back surface mounted to the BOX top surface 452, and the BOX layer 572 has a back surface that is mounted to the substrate top surface 450. The BOX layer 572 may be removed from the bottom surface of the plate 560 in the region of the cavity 440 such that the cavity extends upward only to the bottom surface of the plate 560 in the region of the cavity 440.

[0060] A portion of the piezoelectric plate 560 that is not attached to the BOX layer 572 on the substrate 520 around (and possibly beyond) the outer periphery 445 forms a diaphragm 415 that spans the cavity 440. The interdigital transducer (IDT) 580 is formed on the front surface 454 of the piezoelectric plate 560 such that the interleaved fingers 436 of the IDT are disposed on the diaphragm 415. The BOX layer 572 may be a BOX layer 422 having electrical insulating materials 551 and 552. The cavity 440 may be formed either before, during, or after any of the other components of the XBAR 550, for example, in any of the steps shown in FIG. 8.

[0061] In the XBAR 550, the piezoelectric plates 560 and the BOX layer 572 are removed from at least a portion of each of the surface areas WR1 and WR2 of the top surface 452 of the BOX layer 472 under the contact pads 582 and 584 to provide a lower thermal resistance between the contact bumps and the substrate. In some cases, the regions WR1 and WR2 under each contact pad include predetermined regions WR31 and WR32 of the top surface at selected positions on the top surface 452 of the BOX layer 572 to reduce a predetermined amount of thermal resistance between the contact pads 582 and 584 and the substrate 520.

[0062] The electrical insulating layers 551 and 552 (e.g., SiO 2 ) are mounted in regions WR31 and WR32 between the upper surface 450 of the substrate and the bottom surface of the IDT580 . The bottom surface of the IDT580 is formed on and attached to the upper surfaces 561 and 562 of the insulating layers 551 and 552, and the bottom surfaces of the insulating layers 551 and 552 are attached to the substrate 520 in regions WR31 and WR32. In some cases, the insulating layers 551 and 552 extend several μm to a dozen or so μm below the upper surface 450. The insulating layers 551 and 552 electrically insulate the contact pads 582 and 584 from the substrate 520. Also, the insulating layers 551 and 552 can electrically insulate the BOX layers 572 and the plate 560 from the substrate 520.

[0063] The electrical insulating layers 551 and 552 may be thermally oxidized silicon (TOX), SiO 2 , Si 3 O 4 , Si 3 N 4 and / or other dielectric oxide materials. These may be formed of a dielectric material such as silicon oxide (SiO ) having a thickness of 1 to 2 μm deposited on the substrate 2 ). The substrate 520 may be, for example, a substrate 420 such as polycrystalline or crystalline silicon (Si) having a thickness of 250 to 500 μm. .

[0064] Accordingly, contact pads 582 and 584 are formed in IDT 580 that is directly formed on or directly attached to insulating layers 551 and 552 across regions WR31 and WR32 as shown. Piezoelectric plates 560 and BOX layer 572 are each removed from at least regions WR31 and WR32 of the surface area of the upper surface 450 of substrate 520 under contact pads 582 and 584 to provide a lower thermal resistance between the contact bumps and the substrate. Contact bumps 480 and 481 are formed on, joined to, or attached to the upper surfaces of contact pads 582 and 584 respectively across regions WR31 and WR32 as shown.

[0065] The diameter or width of each of insulating layers 551 and 552 and of contact pads 582 and 584 may be in the range of 50 μm to 300 μm. Their cross-sections may be circular, square, elliptical, or rectangular. The depth of insulating layers 551, 552 into substrate 520 may be in the range of 0.1% to 2% of the thickness of the substrate. Contact pads 582 and 584 are formed of metal or a conductor as described for pads 432 and 434.

[0066] Contact pads 582 and 584 are each a metal layer or include a metal layer that is attached to regions WR1 and WR2 of IDT 580 that are attached to the upper surfaces of insulating layers 551 and 552 and to a part of the side and upper surfaces of piezoelectric layer 560. The metal layer of the pads is electrically connected to the busbars of the IDT because it is attached to the upper and side surfaces of IDT 580.

[0067] In some cases, regions WR1 and WR2 of the device under each contact pad are spaced away from or extend beyond the length and width of the outer periphery 445 of cavity 440 by 5% to 25% or more. For example, contact pads 532 and 534 (582 and 584) extend beyond the length and width of the outer periphery 445 of cavity 440 by 5% to 25% or more of the total length and width. Dielectric or insulating layers 551 and 552 (e.g., SiO 2 ) extend beyond the outer periphery 445 of cavity 440 It may be mounted on the upper surface 450 of the substrate with a length and width of 5 to 25% of the total length and width obtained.

[0068] The insulating layers 551 and 552 extending over the regions WR31 and WR32 provide electrical insulation between the substrate 520 and the contact pads 582 and 584. For example, the insulating layers 551 and 552 may have a high electrical resistance with respect to the surface of the substrate 520 in the regions WR31 and WR32 that are sufficient to ensure an electrical insulation path between the substrate 520 and the contact pads 582 and 584.

[0069] For the XBAR550, the main mechanism for removing heat such as the heat generated by the IDT and the plate above the cavity 440 from the diaphragm 415 of the XBAR is to conduct it to the substrate 520 through the IDT fingers 436, and then from the substrate to the package of the XBAR (not shown, attached to the contact bumps and housing the XBAR) through the contact pads 582, 584 and the contact bumps 480, 481. Here, the contact pads 582, 584 and other conductors or the IDT580 of the conductor pattern are not separated from the substrate 520 by the piezoelectric plate 560 and the BOX layer 572. Therefore, the low thermal conductivity of the piezoelectric layer and the BOX layer does not substantially become a barrier to efficiently removing heat from the substrate to the package through the contact pads and the bumps. In this case, the large thermal resistance of the plate 560 and the BOX layer 572 allows heat to efficiently escape from the substrate 520 to the package through the contact pads and the contact bumps of the XBAR550, without preventing the cooling of the XBAR diaphragm 415 of the XBAR550. Thereby, the temperature rise of a predetermined plate resonator for a predetermined input heat load can be suppressed.

[0070] As described above, the contact bumps 480 and 481 of XBAR400, 500, and 550 may be attached, for example, to a package of the XBAR mounted above and on top of these bumps. The package may be or may include a printed circuit board (PCB) including a PCB substrate and metal wiring. It may be formed of a high-temperature co-fired ceramic (HTCC) having signal paths (e.g., vias, wirings, contact pads). In some cases, the package is a PCB laminate having copper (Cu) signal paths. It is formed by a well-known PCB process and may have well-known signal paths.

[0071] The removal of the BOX layer and / or the plate may be performed using a thin box surface etching. For example, wet etching or dry etching may be used for either the BOX layer or the plate, and different etchants may be used for the BOX layer than for the plate. The etching may require multiple photolithography process steps.

[0072] FIG. 6 is a table 600 showing a thermal resistance analysis from the bumps of the XBAR device to the substrate when at least a part of the surface area of the device under the contact pad is removed from the piezoelectric plate and the bonding oxide (BOX) layer and when it is not removed to provide a lower thermal resistance between the contact bump and the substrate. Table 600 may be an estimated value of a spreadsheet of the BOX layer and the LN piezoelectric laminate that affect XBAR heat conduction. The thermal resistance of the contacts, bumps, IDT, resonator diaphragm, circuit board, or other components of the XBAR device may be simulated or measured in C / W.

[0073] The first row of Table 600 shows the legend of the data labels for each column of the table. The second to sixth rows show the values of the columns when the XBAR device is simulated without removing the piezoelectric plate from the bonding oxide (BOX) layers of various thicknesses in at least a part of the surface area of the device under the contact pad as shown in FIG. 4. In the second to sixth rows, various SiO under the plate 410 having an LN material with a thickness of 0.5 μm 2BOX layer 422 having a thickness of 100 A bump-to-substrate thermal resistance analysis is performed using contact pads 432 and 434 with a surface area of ​​100 μm by 100 μm. The "bumps" in the table may be bond pads, gold bumps, or solder bumps, or other means for making a connection between the device (e.g., a conductor layer or bus bar) and an external circuit.

[0074] Lines 7-11 of table 600 show values ​​for columns of simulations of XBAR devices in which the piezoelectric plate has been removed from the bond oxide (BOX) layer of various thicknesses in at least a portion of the surface area of ​​the device below the contact pads, as in FIG. 5A. Lines 7-11 show values ​​for simulations of XBAR devices in which the piezoelectric plate has been removed from the bond oxide (BOX) layer of various thicknesses in at least a portion of the surface area of ​​the device below the contact pads, as in FIG. 2 and a BOX layer 422 having a thickness of , and contact pads 532 and 534 with a surface area of ​​100 μm×100 μm are used to perform a bump-to-substrate thermal resistance analysis.

[0075] As can be seen in the bottom row, regarding the “relative change” in thermal resistance from the bump to the substrate, the SiO 2 If the surface area of ​​the device under the contact pad is 1 μm, By removing the piezoelectric plate from at least a portion of the surface area, the bump-to-substrate thermal resistance is improved or reduced by 15%. Also, for other thicknesses of the BOX layer 422 in lines 9-11, the bump-to-substrate thermal resistance is shown. Therefore, XBARs 500 and 550 are more preferable than XBAR 400. The reason for this is that, as shown in lines 7-11 of FIG. 6, since the plate is removed from under the contact pads, the large thermal resistance of the piezoelectric plate 510 and 560 does not prevent heat from efficiently escaping from the substrate 420 and 520 through the contact pads and contact bumps of XBARs 500 and 550 to the package and cooling the XBAR diaphragm 415 of the XBAR. On the other hand, as shown in lines 2-6 of FIG. 6, if the plate is not removed, the plate 410 blocks the heat of XBAR 400.

[0076] Show me how Figures 7A and 7B (collectively referred to as "Figure 7") are flowcharts of a process for manufacturing an XBAR in which a piezoelectric plate is removed from at least a portion of the surface area of a device under a contact pad. Process 700 uses a mask or photoresist on the plate and a vertical etch stop under the plate. Holes can be patterned in the LN plate using photolithography. On the right side of each operation in the flowchart is a schematic cross-sectional view representing the end of each operation.

[0077] Process 700 starts at step 705 with a device having a substrate 420 and a plate of piezoelectric material 716 bonded to the substrate 420 using a bonding oxide (BOX) layer 422, and ends at step 795 with a completed XBAR or filter. The piezoelectric plate may be part of a wafer of piezoelectric material. The piezoelectric plate and the substrate may be bonded by a wafer bonding process using the BOX layer 422. The flowchart of Figure 7 includes only the main steps. Various conventional process steps (e.g., surface treatment, chemical mechanical polishing (CMP), cleaning, inspection, deposition, photolithography, firing, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown in Figure 7.

[0078] After step 705, process 700 proceeds to step 710 where, in device 701, a mask 712 is formed on plate 716 of the device of step 705. Mask 712 may be a photoresist deposited and bonded on the upper surface of the plate. Mask 712 has openings 713 and 714 that extend through the mask to the upper surface of the plate in regions WR71 and WR72. The openings may be holes through the mask formed by photolithography to pattern holes in photoresist 712 in regions WR71 and WR72. Regions WR71 and WR72 are equal to or larger than regions WR21 and WR22 and equal to or smaller than regions WR1 and WR2.

[0079] After step 710, in step 720, in device 702, etch plate 716 at openings 713 and 714 of mask 712 to form openings 723 and 724 through plate 716 of device 701 in step 710 to BOX layer 422. The etched plate 510 extends through the plate at a predetermined position to the upper surface of the BOX layer in regions WR71 and WR72, and has preset openings 723 and 724 in regions WR21 and WR22. The openings may be holes through a plate formed by wet or dry etching and removing the plate in regions WR21 and WR22 with respect to mask 712. The etching may be performed by ion milling, reactive ion etching (RIE), inductively coupled plasma (ICP), and / or a laser milling process. BOX layer 422 functions as a vertical etch stop under the plate and can stop the etching at the upper surface of the BOX layer or immediately below it (e.g., 1 - 5% of the layer thickness). Regions WR71 and WR72 or regions WR21 and WR22 may be at the respective positions of contact pads 532 and 534 formed in step 730.

[0080] After step 720, in step 730, in device 703, form IDT 530 and contact pads 532 and 534 through openings 723 and 724 through plate 510 to BOX layer 422 of device 702 in step 720. Step 730 may include removing mask 712. In other cases, mask 712 may be further patterned to form IDT 530. As shown in the figure, IDT 530 extends through the plate at a predetermined position to the upper surface of the BOX layer and is formed in plate 510 through preset openings (not shown) in regions WR21 and WR22. These openings are similar to openings 723 and 724 in regions WR71 and WR72 but may be formed after mask 712 is removed.

[0081] Next, contact pads 532 and 534 are formed at predetermined positions on the upper surface of the IDT530, in regions WR2 and WR1 over regions WR21 and WR22. The IDT530 includes fingers 536, busbars, and electrical connections from the fingers through the busbars to the contact pads. A cavity 440 is formed in the substrate 420. A portion of the plate 510 spanning the cavity within the outer periphery 445 of the cavity forms the diaphragm 415.

[0082] Forming the IDT530 in step 730 may include forming conductor patterns and dielectric layers that define one or more XBAR devices on the surface of the piezoelectric plate 510. Typically, the filter device has an IDT as the first conductor layer of two or more conductor layers that are sequentially deposited and patterned. The IDT530 layer may be, for example, aluminum, an aluminum alloy, copper, a copper alloy, molybdenum, tungsten, beryllium, gold, or some other conductive metal. Optionally, one or more layers of other materials may be disposed under (i.e., between the IDT layer and the piezoelectric plate) and / or on the IDT. For example, a thin film of titanium, chromium, or other metal may be used to improve adhesion between the IDT layer and the piezoelectric plate.

[0083] In step 730, the IDT530 may be formed by depositing a conductor layer on the surfaces of the piezoelectric plate and the BOX layer and removing excess metal by etching through a patterned photoresist that covers regions WR1 and WR2 of the IDT530 and other regions. Alternatively, in step 730, the IDT530 may be formed using a lift-off process. A photoresist may be deposited on the piezoelectric plate and the BOX layer, patterned, and the regions defining the IDT530 removed. The IDT material may be sequentially deposited on the surfaces of the photoresist, the piezoelectric plate, and the BOX layer. Next, in regions WR21 and WR22, the photoresist may be removed to remove excess material, leaving the IDT530.

[0084] Forming the contact pads 532 and 534 in step 730 may include forming a conductor pattern and a dielectric layer on the surface of the IDT 530. Typically, a filter device has contact pads after a first conductor layer (e.g., the IDT), which is one of two or more conductor layers that are sequentially deposited and patterned, is formed. The contact pads may be, for example, aluminum, an aluminum alloy, copper, a copper alloy, molybdenum, tungsten, beryllium, gold, or some other conductive metal. Optionally, one or more layers of other materials may be disposed under the contact pads (i.e., between the pads and the IDT layer) and / or on the contact pads. For example, a thin film of titanium, chromium, or other metal may be used to improve adhesion between the contact pads and the IDT.

[0085] In step 730, the conductor layer may be deposited on the surface of the IDT 530 and excess metal may be removed by etching through a patterned photoresist that covers the regions WR1 and WR2 to form the contact pads 532 and 534. Alternatively, in step 730, a lift-off process may be used to form the contact pads 532 and 534. The photoresist may be deposited on the piezoelectric plate and the IDT, patterned, and the regions defining the contact pads 532 and 534 may be removed. The contact pad material may be sequentially deposited on the plate and the surface of the IDT 530. Next, in the regions WR1 and WR2, the photoresist may be removed to remove the excess material, leaving the contact pads 532 and 534.

[0086] The formation in step 730 may include forming one or more dielectric layers, such as a front-side dielectric, a back-side dielectric, and / or a passivation layer, on the plate and / or the IDT, as described herein. The one or more dielectric layers may include, for example, a dielectric layer selectively formed on the IDT of a shunt resonator to shift the resonance frequency of the shunt resonator relative to the resonance frequency of a series resonator, as described in U.S. Patent No. 10491192. The one or more dielectric layers may include an encapsulation / passivation layer deposited over all or substantially all of the device.

[0087] The selected XBARs are tuned to different frequencies due to the different thicknesses of these dielectric layers compared to other XBARs. For example, different front dielectric layer thicknesses may be used in some XBARs to adjust the resonant frequency of the XBARs within the filter.

[0088] Also, one or more dielectric layers may include, for example, a SiO 2 or Si 3 O 4 encapsulation / passivation layer such as etc.

[0089] The cavity 440 is shown as being formed in step 730. However, the cavity may be formed before, during, or after any of the steps of process 700. The cavity may be a swimming pool cavity. The cavity may be etched from the back side through the plate or from the front side. Separate cavities may be formed for each resonator within the filter device.

[0090] After step 730, in step 740, in device 500, contact bumps 480 and 481 are formed on contact pads 532 and 534 of device 703 of step 730. A mask, screen, or other layer may be patterned on the device of step 730 to form openings in regions WR1 and WR2, and then the bump material may be deposited through the mask onto the mask to form the bumps. Next, the bump material may be heated or flowed to bond to the pads, and the mask may be removed. In some cases, the order of heating and removal may be reversed.

[0091] Contact bumps 480 and 481 are solder bumps, gold bumps, or other means for making an electrical connection between XBAR device 500 and an external circuit. They may be for electrically and thermally connecting contact pads 532 and 534 to opposing contact pads of a package device that packages the XBAR.

[0092] As described in FIG. 5A, for the XBAR 500, the large thermal resistance of the plate 410 does not prevent heat from being efficiently dissipated from the substrate 420 to the package via the contact pads and contact bumps 480, 481 of the XBAR 500, and cooling the XBAR diaphragm 415 of the XBAR 500.

[0093] The formation in step 740 may also include excision of individual devices from a wafer containing a plurality of devices, other packaging steps, and testing. Another operation that may be performed in step 740 is tuning the resonant frequency of the resonator in the filter device by adding or removing metal or dielectric material from the front side of the device.

[0094] Process 700 ends at step 795 with a completed XBAR or filter 500.

[0095] FIGS. 8A, 8B, and 8C (collectively referred to as "FIG. 8") are flowcharts of a process for manufacturing an XBAR in which at least a portion of the surface region of the device under the contact pad has the piezoelectric plate and the junction oxide (BOX) layer removed. Process 800 uses a mask or photoresist on the plate and a vertical etch stop of a sacrificial material under the BOX layer. Holes can be patterned in the LN plate and the sacrificial material using photolithography. On the right side of each operation of the flowchart, a schematic cross-sectional view representing the end of each operation is shown.

[0096] Process 800 starts at step 805 with a device having a substrate 520 and a plate of piezoelectric material 716 bonded to the substrate 520 using a bonding oxide (BOX) layer 822, and ends at step 895 with a completed XBAR or filter. The piezoelectric plate and the substrate may be bonded by a wafer bonding process using the BOX layer 822. The flowchart of FIG. 8 includes only the main process steps. Various conventional process steps (e.g., surface treatment, chemical mechanical polishing (CMP), cleaning, inspection, deposition, photolithography, firing, annealing, monitoring, testing, etc.) may be performed before, between, after, and during the steps shown in FIG. 8.

[0097] After step 805, process 800 proceeds to step 810 where, in device 801, a mask 712 is formed on plate 716 of the device of step 805. Mask 712 may be a photoresist and has openings 713 and 714 in regions WR71 and WR72 as described with respect to FIG. 7.

[0098] As shown, similar to device 801 and the device at step 805 before forming mask 712 on plate 716, BOX layer 822 has predetermined regions WR31 and WR32 of electrical insulation layers 551 and 552, and regions of sacrificial materials 851 and 852 above regions WR31 and WR32, on the upper surface of the electrical insulation material and under the plate. The bottom surface of the plate is bonded to or in contact with the upper surfaces of sacrificial materials 851 and 852. Thus, there is no BOX layer material 822 or 572 between the plate and the substrate in regions WR31 and WR32, and there are only sacrificial materials 851 and 852 between the electrical insulation layers 551 and 552 on top of substrate 520 and between the insulation material and the plate. At step 810, mask 712 is formed on plate 716.

[0099] The electrical insulation layers 551 and 552 are thermally oxidized silicon (TOX), SiO 2 , Si 3 O 4 , Si 3 N4 and / or other dielectric oxide materials may also be used. The sacrificial materials 851 and 85 2 may be polycrystalline silicon and / or other polycrystalline materials. Other sacrificial materials include lithium titanate (LTO), Si 3 N 4 , and SiC.

[0100] After step 810, in step 820, in device 802, etch plate 716 at openings 713 and 714 of mask 712 to form openings 823 and 824 through plate 716 of device 801 in step 810 to sacrificial layers 851 and 852.

[0101] The etched plate 560 extends through the plate at a predetermined position to the upper surfaces of sacrificial layers 851 and 852 in regions WR71 and WR72, and has preset openings 823 and 824 in regions WR31 and WR32. The openings may be holes through the plate formed by wet or dry etching and removing the plate in regions WR31 and WR32 with respect to mask 712. The etching may be performed by ion milling, reactive ion etching (RIE), inductively coupled plasma (ICP), and / or a laser milling process. Sacrificial layers 851 and 852 (and optionally a part of electrical insulation layers 551 and 552) function as a vertical etch stop under the plate and can stop the etching at the upper surface of layers 851 and 852 or directly below it (e.g., 1 - 5% of the layer thickness).

[0102] After step 820, in step 825, in device 803, etch sacrificial layers 851 and 852 at openings 823 and 824 of mask 712 to form openings 833 and 834 through plate 716 of device 802, sacrificial layers 851 and 852 in step 820 to the upper surfaces of electrical material layers 551 and 552.

[0103] The etched sacrificial layers 851 and 852 extend to the upper surfaces of the electrical material layers 551 and 552 through the plate and the sacrificial layers 851 and 852 at predetermined positions in the regions WR71 and WR72, and have preset openings 833 and 834 in the regions WR31 and WR32. The openings may be holes passing through the plate and the sacrificial layers 851 and 852, which are formed by wet or dry etching and removing the plate and the sacrificial layers 851 and 852 in the regions WR31 and WR32 with respect to the mask 712. The etching may be performed by ion milling, reactive ion etching (RIE), inductively coupled plasma (ICP), and / or a laser milling process. In some cases, the etching in step 825 2 uses a highly selective dry gas etchant such as XeF to selectively remove the sacrificial polysilicon material of the layers 8 51 and 852 by a front-side membrane removal (FSMR) technique which is a process of selectively removing. This process is performed on the device layer side (e.g., front-side etching through the regions WR71 and WR72), as opposed to back-side removal which requires forming vias in the Si substrate to access the sacrificial material. The electrical insulating layers 551 and 552 function as vertical etch stops under the sacrificial layers 851 and 852, and the etching can be stopped at the upper surfaces of the insulating layers 551 and 552 or immediately below them (e.g., 1 - 5% of the layer thickness).

[0104] The regions WR71 and WR72 or the regions WR31 and WR32 may be at the respective positions of the contact pads 532 and 534 formed in step 730.

[0105] After step 820, in step 830, in device 804, through openings 833 and 834 that pass through sacrificial layers 851 and 852 to electrical insulating layers 551 and 552 through plate 560 of device 803 in step 825, IDT 580 and contact pads 582 and 584 are formed. Step 830 may include removal of mask 712. In other cases, mask 712 may be further patterned to form IDT 580. As shown, IDT 580 extends through plate, sacrificial materials 851 and 852 to upper surfaces 561 and 562 of electrical insulating layers 551 and 552 at a predetermined position, and is formed in electrical insulating layers 551 and 552 through preset openings (not shown) in regions WR31 and WR32. These openings are similar to openings 823 and 824 in regions WR71 and WR72, but may be formed after removal of mask 712.

[0106] Next, contact pads 582 and 584 are formed on upper surfaces of electrical insulating layers 551 and 552 at a predetermined position over predetermined regions WR31 and WR32 in regions WR2 and WR1. IDT 580 includes fingers 536, busbars, and electrical connections from the fingers through the busbars to the contact pads. Cavity 440 is formed in substrate 520. A part of plate 560 spanning the cavity within outer perimeter 445 of the cavity forms diaphragm 415.

[0107] Forming IDT 580 in step 830 may include forming conductor patterns and dielectric layers as described for forming IDT 530 in step 730.

[0108] In step 830, the IDT 580 may be formed by depositing a conductor layer on the surfaces of the piezoelectric plate and the electrical insulating layers 551 and 552 and removing the excess metal by etching through a patterned photoresist that covers the regions WR1 and WR2 of the IDT 580 and other regions. Alternatively, in step 830, the IDT 580 may be formed using a lift-off process. A photoresist may be deposited on the piezoelectric plate and the electrical insulating layers 551 and 552, patterned, and the regions defining the IDT 580 may be removed. The IDT material may be sequentially deposited on the surfaces of the photoresist, the piezoelectric plate, and the electrical insulating layers 551 and 552. Next, in the regions WR31 and WR32, the photoresist may be removed to remove the excess material, leaving the IDT 580.

[0109] Forming the contact pads 582 and 584 in step 830 may include forming a conductor pattern and a dielectric layer on the surface of the IDT 580, similar to forming the pads 532 and 534 on the IDT 560. After forming the IDT and the contact pads in step 830, the BOX layer 822 becomes the BOX layer 572.

[0110] Forming the contact pads 582 and 584 in step 830 may include depositing a conductor layer on the surface of the IDT 580 and removing the excess metal by etching through a patterned photoresist that covers the regions WR1 and WR2. Alternatively, the contact pads 582 and 584 may be formed in step 830 using a lift-off process as described for forming the contact pads 532 and 534 on the IDT 530.

[0111] In some cases, an additional metal fill is added on top of the contact pads 582 and 584 initially formed in step 830. This additional fill is deposited with a conductor layer on the contact pads 582 and 584 and the excess metal is removed by etching or using a lift-off process as described for forming the contact pads 532 and 534 on the IDT 530.

[0112] The formation in step 830 may include forming one or more dielectric layers, such as a front dielectric, a back dielectric, and / or a encapsulation / passivation layer, on the plate and / or IDT, as described in step 730. The selected XBAR is tuned to different frequencies by different thicknesses of these dielectric layers, as described in step 730.

[0113] The cavity 440 is shown as being formed in step 830. However, the cavity may be formed either before, during, or after any of the steps of process 800.

[0114] After step 830, in step 840, in device 550, contact bumps 480 and 481 are formed on the contact pads 582 and 584 of device 804 of step 830. The bumps may be formed from a material using a process as described for step 740.

[0115] Contact bumps 480 and 481 make an electrical connection between the XBAR device 550 and an external circuit, as described for device 500 and step 740.

[0116] Note that, as described in FIG. 5B, for XBAR 550, the large thermal resistances of the plate 410 and the BOX layer 822 do not prevent heat from being efficiently dissipated from the substrate 520 to the package through the contact pads and contact bumps 480, 481 of the XBAR 550, cooling the XBAR diaphragm 415 of the XBAR 550.

[0117] Forming the bumps in step 840 may also include excising individual devices from a wafer containing multiple devices, and other packaging steps, testing, and tuning as described in step 740.

[0118] Process 800 ends at step 895 with the completed XBAR or filter 550.

[0119] As shown in Table 600, in the case of an embedded oxide (BOX) layer such as BOX layer 422 with a thickness exceeding several μm, removing only the LN plate under the contact pad has only a slight effect on reducing the thermal resistance from the bump to the substrate. This is because when the material of BOX layer 422 is polysilicon used as the bonding layer between the Si substrate and the LN plate, the material of the BOX layer has a thermal conductivity in the range of 10% - 50% of the thermal conductivity of the bulk Si substrate. Therefore, the polysilicon BOX layer 422 has a greater thermal resistance than the bulk Si of the same thickness of substrate 420. To improve this situation, an XBAR 550 having thermal vias extending to the BOX layer 572 can be created (for example, using process 800), and the same pre-patterning process as the film (for example, removing or etching the plate 716 in step 820) can be used to form the pre-patterned vias, and the front-side film removal (for example, removing or etching the sacrificial materials 851 and 852 in step 825) can be used to form the XBAR 550.

[0120] This process 800 may not be necessary for the polysilicon BOX layer 422 with high heat transport characteristics. In other cases, the BOX layer or the electrical insulation layer is thin enough as described in the first to second rows and fifth to sixth rows of Table 600. For example, the electrical insulation layers 551 and 552 can be used instead of the BOX layer 422 to reduce the thermal resistance between the contact bump and the substrate and electrically insulate the contact pad from the substrate 520. To provide electrical insulation for the thermal vias from the pure Si substrate 520, the electrical insulation layers 551 and 552 may be thin, typically an oxide film with a thickness of 50 - 100 nm.

[0121] In some cases, to reduce a predetermined amount of thermal resistance between contact pads 532 and 534 and substrate 420, regions WR1 and WR2 under each contact pad include predetermined regions WR21 and WR22 of the upper surface 452 of BOX layer 422 at selected positions of the upper surface. The selected positions and predetermined regions may be selected to provide proper electrical contact between IDT 530 and the package and / or to reduce a predetermined amount of thermal resistance between contact pads 532 and 534 and substrate 420.

[0122] FIG. 9 is a schematic cross-sectional view of an improved XBAR900 in which piezoelectric plate 910 is removed from at least a portion of the surface area of the device under contact pads 532 and 534 and under thermal vias 915 to provide lower thermal resistance between air and the substrate.

[0123] XBAR900 has a substrate 420 without cavity 440. XBAR900 may be added to any of XBAR100, 300, 350, 500, and / or 550, for example, by being disposed on the side of the resonator diaphragm. For example, in addition to contact pads 532 and 534, XBAR900 also has thermal vias 915 to reduce the thermal resistance from the air above the vias through BOX layer 422 to substrate 420.

[0124] Plate 910 has a plate upper surface 454, and IDT 930 has an upper surface 456. Plate 910 has a plate back surface mounted on BOX upper surface 452. Thermal via 915 includes a portion 932 of IDT 930 that extends through plate 910 to BOX layer 422 at a selected position and a predetermined region W9. Portions 936 of the contact pad layers of contact pads 532 and 534 are formed on and attached to the upper surface of portion 932 and also in region W9.

[0125] Portion 932 can be formed as described for the formation of any IDT in the previous embodiments. Portion 936 can be formed as described for the formation of any contact pad in the previous embodiments.

[0126] The width W9 may be in the range of 10 μm to 200 μm in terms of diameter or width. Their cross-sections may be circular, square, elliptical or rectangular. Their number may be less than 4 or more. Their number may be 4 to 100.

[0127] The plate 910 may be a part of a piezoelectric plate that is attached to a BOX layer on a substrate and has an outer periphery 445 that forms a diaphragm 415 spanning a cavity 440 (not shown) at other positions of the XBAR900. The IDT930 may be a part of the XBAR and may be a part of an IDT such as the IDT510 or 560 having interleaved fingers, bus bars and other electrical connection parts. Specifically, FIG. 9 shows that the via 915 is located on the right side of the contact pad 532 and the left side of the pad 534, so the via 915 is in the vicinity of the diaphragm 415 of the XBARS 500 and 550 and at a position different from the diaphragm 415. The via 915 may be between the two diaphragms 415 of the XBARS 500 and 550.

[0128] The thermal via 915 is electrically insulated from the substrate 420 by the BOX layer 422 from other parts of the IDT and the contact pads. The thermal via 915 is electrically insulated by the BOX 422 between the upper surface 450 of the substrate and the bottom surfaces of the plate 910 and the IDT930.

[0129] The thermal via 915 is used for thermal management by selecting a predetermined position and region W9 on the upper surface 452 of the BOX layer 422, and can reduce a predetermined amount of thermal resistance between the air above the via 915 and the substrate 420. The thermal via 915 enables heat to be dissipated by metal wiring (e.g., the metal of the IDT and the contact pad layer), and includes a via region that improves heat dissipation to the Si substrate 420 through, for example, the BOX layer. The via 915 provides more contact area for heat to enter the substrate. One advantage of using the via 915 is that it is easier to define the thermal via 915 during the aforementioned process compared to performing additional photolithography process steps such as etching a plate, forming an IDT, forming a contact pad, and flowing additional metal to reduce the thermal resistance between the air and the substrate.

[0130] Closing comment Throughout this description, the illustrated embodiments and examples are not intended to limit the disclosed or claimed devices and procedures, but should be regarded as illustrative. Many of the examples presented herein include specific combinations of method operations or system elements, but it should be understood that these operations and elements may be combined in other ways to achieve the same purpose. In the flowcharts, steps may be added and decreased, and the steps shown may be combined or further improved to achieve the methods described herein. The operations, elements, and features discussed in relation to one embodiment are not intended to exclude similar roles in other embodiments.

[0131] As used herein, "a plurality" means two or more. The term "set" as used herein may include one or more of such items. As used herein, terms such as "comprising", "including", "carrying", "having", "containing", "involving", etc. in the specification or claims should be understood to be open-ended, i.e., to be understood as including without limitation. In the claims, only the transitional phrases "consisting of" and "consisting essentially of" are respectively limiting or semi-limiting transitional phrases. The use of ordinal terms such as "first", "second", "third", etc. in a claim that changes claim elements is not, by itself, intended to imply any priority, precedence, or order in which one claim element is preferred over another, or the chronological order in which the acts of a method are performed, but rather is used merely as a label to distinguish one claim element having a particular name (if an ordinal is not used to distinguish claim elements) from other elements having the same name. As used herein, "and / or" means that the listed items are alternatives, but the alternatives include any combination of the listed items.

Claims

1. 1. An acoustic resonator device having reduced thermal resistance from a substrate to contact bumps, comprising: the substrate having a surface; a junction oxide (BOX) layer on a surface of the substrate; a piezoelectric plate having a front surface and a back surface attached to a surface of the substrate via the BOX layer, a portion of the piezoelectric plate forming a diaphragm above a cavity; an interdigital transducer (IDT) on the piezoelectric plate such that interleaved IDT fingers are disposed on the diaphragm; a conductor pattern on the substrate, made of the same material as the IDT, and electrically connected to the IDT; contact pads providing electrical connections between the IDTs and the contact bumps at selected locations on a surface of the substrate; the contact bumps mounted on the contact pads; the piezoelectric plate has a first portion of the piezoelectric plate removed over a predetermined area of ​​the BOX layer at a selected location of the BOX layer beneath each of the contact pads or a first portion of the piezoelectric plate removed over a predetermined area of ​​the substrate at a selected location of the substrate; An acoustic resonator device, wherein the surface of the contact bump in contact with the contact pad is inside a first portion of the piezoelectric plate, and the conductor pattern, the contact pad and the contact bump are stacked in sequence inside the first portion of the piezoelectric plate, thereby providing a lower thermal resistance between the contact bump and the substrate.

2. 2. The acoustic resonator device of claim 1, wherein the piezoelectric plate is removed above a predetermined area of ​​the BOX layer at a selected location of the BOX layer below each of the contact pads.

3. the interleaved fingers are two sets of fingers, the IDT further comprising a bus bar attached to each of the two sets of fingers; The acoustic resonator device of claim 1 , wherein the contact pads are electrically connected to the bus bars.

4. the BOX layer having a second portion of the BOX layer removed over a predetermined area of ​​the substrate at a selected location on the substrate to provide a lower thermal resistance between the contact bump and the substrate; The acoustic resonator device of claim 1 , wherein an electrically insulating layer is between the contact pads and a surface of the substrate.

5. 5. The acoustic resonator device of claim 4, wherein the piezoelectric plate has a first portion thereof removed over a predetermined area of ​​the substrate at a selected location of the substrate beneath each of the contact pads.

6. The acoustic resonator device of claim 5 , wherein the conductor pattern is attached to an upper surface of the electrically insulating layer.

7. the interleaved fingers are two sets of fingers, the IDT further comprising a bus bar attached to each of the two sets of fingers; The acoustic resonator device of claim 6 , wherein the contact pads are electrically connected to the bus bars.

8. The acoustic resonator device of claim 1 , wherein a radio frequency signal applied to the IDT excites a first order shear acoustic mode in the piezoelectric plate above the cavity.

9. A filter device having reduced thermal resistance from a substrate to contact bumps, comprising: A substrate; a piezoelectric layer above the substrate, spanning the cavity and forming a diaphragm at the location spanning the cavity; a bonding oxide (BOX) layer between the piezoelectric layer and the substrate; an interdigital transducer (IDT) having interleaved fingers on a surface of the piezoelectric layer and above the cavity; a conductor pattern that is located on a portion of the BOX layer that is laminated on the substrate, is made of the same material as the IDT, and is electrically connected to the IDT; contact pads providing electrical connections between the IDTs and the contact bumps at selected locations on a surface of the substrate; contact bumps mounted on the contact pads; Including, The cavity has an outer periphery; the piezoelectric layer has a first portion of the piezoelectric layer removed over a predetermined area of ​​the BOX layer at a selected location of the BOX layer beyond an outer periphery of the cavity or a first portion of the piezoelectric layer removed over a predetermined area of ​​the substrate at a selected location of the substrate; A filter device, wherein the surface of the contact bump in contact with the contact pad is inside a first portion of the piezoelectric layer, and the conductor pattern, the contact pad and the contact bump are stacked in sequence inside the first portion of the piezoelectric layer, thereby providing a lower thermal resistance between the contact bump and the substrate.

10. The substrate is Si and the BOX layer is SiO ２ 10. The filter device of claim 9, wherein the IDT is metal and the piezoelectric layer is either lithium niobate or lithium tantalate.

11. The filter device of claim 9 , wherein the first portion of the piezoelectric layer is located beyond the perimeter of the cavity by 5-25% of the length and width of the perimeter.

12. the interleaved fingers are two sets of fingers, the IDT further comprising a bus bar attached to each of the two sets of fingers; The filter device of claim 9 , wherein the contact pads are electrically connected to the bus bars.

13. The filter device of claim 9 , wherein a radio frequency signal applied to the IDT excites a first order shear acoustic mode in the piezoelectric layer above the cavity.

14. 1. A low thermal impedance acoustic resonator device, comprising: a substrate having a surface; a junction oxide (BOX) layer on a surface of the substrate; an electrically insulating layer over the substrate; a piezoelectric plate having a front surface and a back surface attached to a surface of the substrate via the BOX layer, a portion of the piezoelectric plate forming a diaphragm above a cavity; an interdigital transducer (IDT) on the piezoelectric plate such that the IDT fingers are interleaved on the diaphragm; a conductor pattern on the electrically insulating layer, the conductor pattern being made of the same material as the IDT and electrically connected to the IDT; contact pads on the conductor pattern at selected locations on a surface of the substrate; contact bumps attached to the contact pads; Including, the piezoelectric plate and the BOX layer are removed such that a first portion of the piezoelectric plate and a second portion of the BOX layer are removed over predetermined areas of the substrate at selected locations of the substrate beneath each of the contact pads; An acoustic resonator device, wherein the surface of the contact bump in contact with the contact pad is inside a first portion of the piezoelectric plate, and the conductor pattern, the contact pad and the contact bump are stacked in order inside the first portion of the piezoelectric plate.

15. the interleaved fingers are two sets of fingers, the IDT further comprising a bus bar attached to each of the two sets of fingers; The acoustic resonator device of claim 14 , wherein the contact pads are electrically connected to the bus bars.

16. The acoustic resonator device of claim 14 , wherein a radio frequency signal applied to the IDT excites a first order shear acoustic mode in the piezoelectric plate above the cavity.

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