Semiconductor device, power conversion device, and method of manufacturing semiconductor device

Abstract

This semiconductor device comprises: a semiconductor substrate (1) on which a semiconductor element is formed; a surface electrode (2) formed on the surface of the semiconductor substrate (1); a protective film (3) having an opening exposing a part of the surface electrode (2); a plated electrode (4) formed on the surface electrode (2) exposed in the opening of the protective film (3); and a lead frame (6) connected to the plated electrode (4) with a bonding material (5) interposed therebetween. The semiconductor substrate (1), surface electrode (2), protective film (3), plated electrode (4), and lead frame (6) are sealed with a mold resin (7). The bonding material (5) covers the protective film (3) at the edge of the opening, and the width of the portion where the protective film (3) at the edge of the opening is covered with the bonding material (5) is larger than the thickness of the bonding material (5) between the lead frame (6) and the plated electrode (4).

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device.

Background Art

[0002] A semiconductor device having a structure in which a metal lead frame is connected to a surface electrode formed on the surface of a semiconductor substrate is known. For example, Patent Document 1 below discloses a semiconductor device having a plating electrode on a surface electrode exposed from a protective film and connecting the plating electrode and the lead frame via solder as a bonding material. In Patent Document 1, the solder connecting between the plating electrode and the lead frame contacts the inclined side surface of the protective film. Further, the above protective film, plating electrode, solder, and lead frame are sealed with a mold resin.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In a semiconductor device having the above configuration, when a temperature distribution occurs due to heat generation and cooling accompanying the on and off of a semiconductor element, stress is generated at the boundary of each member due to the difference in the linear expansion coefficient of each member. In particular, if the expansion and contraction amounts of the mold resin and the protective film are different from those of the plating electrode, the bonding material, and the lead frame, and stress repeatedly occurs at the boundary between the two, the end portion of the plating electrode with low peel strength peels off, causing the destruction of the semiconductor device.

[0005] The present disclosure has been made to solve the above problems, and an object thereof is to prevent peeling of a plating electrode due to stress caused by differences in the linear expansion coefficients of respective parts of a semiconductor device.

Means for Solving the Problem

[0006] The semiconductor device according to the present disclosure includes a semiconductor substrate on which a semiconductor element is formed, a surface electrode formed on the surface of the semiconductor substrate, a protective film formed on the surface electrode and having an opening that exposes a part of the surface electrode, a plating electrode formed on the surface electrode exposed in the opening of the protective film, a lead frame connected to the plating electrode via a bonding material, and a mold resin that seals the semiconductor substrate, the surface electrode, the protective film, the plating electrode, and the lead frame. The mold resin is in contact with the bonding material, the protective film, and the lead frame, and the plating electrode is formed inside the opening so as not to cover the protective film at the edge of the opening. The bonding material a part of is protrudes from above the plating electrode, covering the protective film at the edge of the opening, and the width of the portion of the protective film at the edge of the opening covered by the bonding material is larger than the thickness of the bonding material between the lead frame and the plating electrode.

Effect of the Invention

[0007] According to the present disclosure, peeling of the plating electrode due to stress caused by differences in the linear expansion coefficients of the respective parts of the semiconductor device is prevented.

[0008] The object, features, aspects, and advantages of the present disclosure will become clearer from the following detailed description and the accompanying drawings.

Brief Description of the Drawings

[0009]

Figure 1

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Figure 10

Embodiments for Carrying Out the Invention

[0010] <Embodiment 1> FIG. 1 is a cross-sectional view showing the configuration of the main part (specifically, the vicinity of the connection part between the semiconductor element and the lead frame) of the semiconductor device according to Embodiment 1. As shown in FIG. 1, the semiconductor device according to Embodiment 1 includes a semiconductor substrate 1 on which a semiconductor element is formed, and a surface electrode 2 formed on the surface of the semiconductor substrate 1. As the semiconductor element formed on the semiconductor substrate 1, there is no particular limitation, and for example, any of a MOSFET, an IGBT, a Schottky barrier diode, a PN junction diode, etc. may be used.

[0011] On the surface electrode 2, a protective film 3 having an opening that exposes a part of the surface electrode 2 is formed, and a plating electrode 4 is formed on the surface electrode 2 exposed in the opening of the protective film 3. In the present embodiment, the protective film 3 is formed so as to cover the outer edge portion of the surface electrode 2, and the central portion of the surface electrode 2 is exposed in the opening of the protective film 3. Therefore, the plating electrode 4 is formed on the central portion of the surface electrode 2.

[0012] The plating electrode 4 is formed by plating the surface electrode 2 exposed in the opening of the protective film 3 with, for example, nickel. The protective film 3 is preferably a resin material having low elasticity, chemically stable, and high heat resistance, such as polyimide, from the viewpoints of assemblability and reliability.

[0013] The plating electrode 4 is connected to the lead frame 6 via the bonding material 5. The lead frame 6 is formed of, for example, copper, a copper alloy, or the like. Further, the semiconductor substrate 1, the surface electrode 2, the protective film 3, the plating electrode 4, and the lead frame 6 are sealed with a molding resin 7.

[0014] A part of the bonding material 5 protrudes from above the plating electrode 4 and covers the edge of the opening of the protective film 3. Thereby, the boundary portion between the plating electrode 4 and the protective film 3 with low peeling strength is covered with the bonding material 5, and peeling of the plating electrode 4 is prevented.

[0015] The width of the portion of the edge of the opening where the protective film 3 is covered with the bonding material 5 is preferably larger than the thickness of the bonding material 5 under the lead frame 6, that is, the thickness of the bonding material 5 between the lead frame 6 and the plating electrode 4. That is, as shown in FIG. 1, assuming that the thickness of the bonding material 5 between the lead frame 6 and the plating electrode 4 is a and the width of the portion where the edge of the opening of the protective film 3 is covered with the bonding material 5 is b, it is preferable that the relationship b > a holds.

[0016] Furthermore, the end face of the lead frame 6 covered with the molding resin 7 is located above the end of the plating electrode 4, that is, shifted from above the boundary portion between the plating electrode 4 and the protective film 3. In Embodiment 1, the end face of the lead frame 6 covered with the molding resin 7 is disposed above the plating electrode 4. Thereby, the stress generated at the boundary portion between the lead frame 6 and the molding resin 7 is suppressed from being applied to the end of the plating electrode 4 with low peeling strength, and peeling of the plating electrode 4 is further suppressed.

[0017] The amount of deviation between the position of the end face of the lead frame 6 covered with the molding resin 7 and the position of the end of the plating electrode 4 is preferably larger than the thickness of the bonding material 5 between the lead frame 6 and the plating electrode 4. That is, as shown in FIG. 1, assuming that the amount of deviation between the position of the end face of the lead frame 6 covered with the molding resin 7 and the position of the end of the plating electrode 4 is c, it is preferable that the relationship c > a holds.

[0018] The bonding material 5 is applied not only to the plating electrode 4 but also to the resin protective film 3, and it is necessary to cover the protective film 3 even after the lead frame 6 is bonded. Therefore, the bonding material 5 is preferably a material that does not involve wetting such as solder, but a material that cures as it is at the applied position, such as sintered silver which is a sintered body of silver or a conductive adhesive.

[0019] Also, the bonding material 5 made of sintered silver can be formed by applying a paste of nano silver and sintering it. There are two methods of sintering nano silver: pressure sintering in which heating is performed while applying pressure and non-pressure sintering in which heating is performed without applying pressure. In this embodiment, considering that there is a portion where the lead frame 6 does not exist on the bonding material 5 and that the bonding material 5 is made porous to have low elasticity, non-pressure sintering is preferred.

[0020] In order to suppress the stress generated in the semiconductor device to a small level, in the design of the semiconductor device, it is generally the case that members with similar linear expansion coefficients are selected as the materials of adjacent members. For example, by making the linear expansion coefficient of the mold resin 7 and the linear expansion coefficient of the lead frame 6 close to each other, the difference in the expansion amount and the contraction amount between the mold resin 7 and the lead frame 6 due to environmental temperature changes such as thermal cycles can be reduced.

[0021] However, when the semiconductor element is in the on state, most of the heat generated in the semiconductor element is dissipated to the lower surface side of the semiconductor substrate 1, but the temperatures of the plating electrode 4, the bonding material 5, and the lead frame 6 formed of a metal material with high thermal conductivity are higher than the temperatures of the protective film 3 and the mold resin 7 formed of a resin material with low thermal conductivity. Also, when the semiconductor element is in the off state, since the semiconductor substrate 1 is cooled from the lower surface side, the temperatures of the plating electrode 4, the bonding material 5, and the lead frame 6 are lower than those of the protective film 3 and the mold resin 7. Thus, since a temperature distribution (that is, a temperature difference between members) occurs during the operation of the semiconductor device, it is difficult to make the expansion amounts and the contraction amounts of these members uniform even if the linear expansion coefficients of the respective members are made close to each other.

[0022] Therefore, in the present embodiment, the boundary portion between the plating electrode 4 with low peel strength and the protective film 3 is covered with the bonding material 5, and further, the boundary between the mold resin 7 and the lead frame 6 (that is, the end face of the lead frame 6 covered with the mold resin 7) is not arranged thereon, thereby reducing the stress applied to the end portion of the plating electrode 4 due to the temperature distribution during the operation of the semiconductor device. Thereby, the peeling of the plating electrode 4 is prevented, which can contribute to the improvement of the reliability of the semiconductor device. In particular, for a semiconductor device in which the semiconductor substrate 1 is formed of silicon carbide (SiC), since the operating temperature range is wide, the difference in the amount of expansion and contraction between members becomes significant, so the above effect is very effective.

[0023] Hereinafter, a method for manufacturing a semiconductor device according to Embodiment 1 will be described with reference to the process diagrams of FIGS. 2 to 7. Among FIGS. 2 to 7, FIGS. 2 to 4 are wafer processes, and FIGS. 5 to 7 are assembly processes. Further, FIGS. 2 to 7 show the vicinity of the connection portion between the semiconductor substrate 1 and the lead frame 6 in the same manner as in FIG. 1. Hereinafter, the processes related to that portion will be described, and the description of other processes (for example, dicing process, die bond process, wire bond process, etc.) will be omitted.

[0024] First, a semiconductor substrate 1 on which a semiconductor element is formed is prepared, and as shown in FIG. 2, a surface electrode 2 is formed on the surface of the semiconductor substrate 1. Next, a protective film 3 is formed on the surface electrode 2, and as shown in FIG. 3, an opening for exposing a part of the surface electrode 2 is formed in the protective film 3. Subsequently, the surface of the surface electrode 2 exposed in the opening of the protective film 3 is plated to form a plating electrode 4 as shown in FIG. 4.

[0025] Thereafter, as shown in FIG. 5, a bonding material 5 containing silver is applied on the plating electrode 4 and on the protective film 3 at the edge of the opening. The application of the bonding material 5 can be performed, for example, by printing a nano silver paste as the bonding material 5 on the protective film 3 and the plating electrode 4.

[0026] Then, by placing the lead frame 6 on the bonding material 5 and heating it, as shown in FIG. 6, the lead frame 6 and the plating electrode 4 are connected via the bonding material 5. As described above, when using a nano silver paste as the bonding material 5, it is preferable to sinter the silver of the bonding material 5 in a non-pressurized state. Further, in the state after sintering the silver of the bonding material 5, it is preferable that the relationships of b > a and c > a described above hold.

[0027] Finally, as shown in FIG. 7, by using the mold resin 7 to seal the semiconductor substrate 1, the surface electrode 2, the protective film 3, the plating electrode 4, and the lead frame 6, the configuration of the semiconductor device shown in FIG. 1 is obtained.

[0028] <Embodiment 2> FIG. 8 is a cross-sectional view showing the configuration of the main part of the semiconductor device according to Embodiment 2. In FIG. 8, the same or corresponding elements as those described in Embodiment 1 (FIG. 1) are denoted by the same reference numerals. Therefore, detailed descriptions thereof are omitted here, and the differences from Embodiment 1 will be described.

[0029] In Embodiment 2, the end face of the lead frame 6 covered with the mold resin 7 is disposed outside the plating electrode 4. Other configurations are the same as those in Embodiment 1.

[0030] Also in the configuration of FIG. 8, since the end face of the lead frame 6 covered with the mold resin 7 is offset from above the end portion of the plating electrode 4 (that is, the boundary portion between the plating electrode 4 and the protective film 3), the stress generated at the boundary portion between the lead frame 6 and the mold resin 7 is prevented from being applied to the end portion of the plating electrode 4 where the peeling strength is low, and peeling of the plating electrode 4 is suppressed.

[0031] The amount of deviation between the position of the end face of the lead frame 6 covered with the mold resin 7 and the position of the end of the plating electrode 4 is preferably larger than the thickness of the bonding material 5 between the lead frame 6 and the plating electrode 4. That is, as shown in FIG. 8, when the amount of deviation between the position of the end face of the lead frame 6 covered with the mold resin 7 and the position of the end of the plating electrode 4 is d, it is preferable that the relationship d > a holds.

[0032] <Embodiment 3> FIG. 9 is a cross-sectional view showing the configuration of the main part of the semiconductor device according to Embodiment 3. Also in FIG. 9, the same or corresponding elements as those described in Embodiment 1 (FIG. 1) are denoted by the same reference numerals. Therefore, detailed descriptions thereof are omitted here, and differences from Embodiment 1 will be described.

[0033] In Embodiment 3, the thickness of the bonding material 5 above the boundary portion between the plating electrode 4 and the protective film 3 is larger than the thickness of the bonding material 5 under the lead frame 6 (that is, between the lead frame 6 and the plating electrode 4). That is, as shown in FIG. 9, when the thickness of the bonding material 5 between the lead frame 6 and the plating electrode 4 is a and the thickness of the bonding material 5 above the boundary portion between the plating electrode 4 and the protective film 3 is e, the relationship e > a holds. Thereby, the material covering the end of the plating electrode 4 with low peeling strength becomes uniform, and the difference in the expansion amount and the contraction amount due to the temperature distribution during the operation of the semiconductor device can be reduced, so that the peeling of the plating electrode 4 is suppressed.

[0034] In order to partially control the thickness of the bonding material 5, the bonding material 5 may be applied by dispensing (that is, application using a dispenser). Although the application of the bonding material 5 by printing can efficiently apply the bonding material 5 over a wide range, the thickness of the applied bonding material 5 becomes constant.

[0035] <Embodiment 4> This embodiment applies the semiconductor device according to Embodiments 1 to 3 described above to a power conversion device. The application of the semiconductor device according to Embodiments 1 to 3 is not limited to a specific power conversion device. Hereinafter, as Embodiment 4, a case where the semiconductor device according to Embodiments 1 to 3 is applied to a three-phase inverter will be described.

[0036] FIG. 10 is a block diagram showing the configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0037] The power conversion system shown in FIG. 10 includes a power source 100, a power conversion device 200, and a load 300. The power source 100 is a DC power source and supplies DC power to the power conversion device 200. The power source 100 can be configured by various means. For example, it can be configured by a DC system, a solar cell, a storage battery, or it may be configured by a rectifier circuit or an AC / DC converter connected to an AC system. Further, the power source 100 may be configured by a DC / DC converter that converts the DC power output from the DC system into a predetermined power.

[0038] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300. It converts the DC power supplied from the power source 100 into AC power and supplies the AC power to the load 300. As shown in FIG. 10, the power conversion device 200 includes a main conversion circuit 201 that converts DC power into AC power and outputs it, and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.

[0039] The load 300 is a three-phase motor driven by the AC power supplied from the power conversion device 200. Note that the load 300 is not limited to a specific application and is a motor mounted on various electrical devices. For example, it is used as a motor for a hybrid vehicle, an electric vehicle, a railway vehicle, an elevator, or an air conditioner.

[0040] The details of the power conversion device 200 will be described below. The main conversion circuit 201 includes switching elements and freewheeling diodes (not shown). By switching the switching elements, the DC power supplied from the power source 100 is converted into AC power and supplied to the load 300. There are various specific circuit configurations of the main conversion circuit 201. The main conversion circuit 201 according to the present embodiment is a two-level three-phase full-bridge circuit, and can be composed of six switching elements and six freewheeling diodes connected in anti-parallel to the respective switching elements. Each switching element and each freewheeling diode of the main conversion circuit 201 are constituted by a semiconductor module 202 corresponding to any one of the above-described Embodiments 1 to 3. The six switching elements are connected in series in pairs of two to form upper and lower arms, and each upper and lower arm constitutes each phase (U phase, V phase, W phase) of the full-bridge circuit. Then, the output terminals of each upper and lower arm, that is, the three output terminals of the main conversion circuit 201, are connected to the load 300.

[0041] In addition, the main conversion circuit 201 includes a drive circuit (not shown) for driving each switching element. The drive circuit may be built in the semiconductor module 202, or may be configured to include a drive circuit separately from the semiconductor module 202. The drive circuit generates a drive signal for driving the switching elements of the main conversion circuit 201 and supplies it to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, in accordance with a control signal from a control circuit 203 described later, a drive signal for turning on the switching element and a drive signal for turning off the switching element are output to the control electrodes of each switching element. When maintaining the switching element in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element. When maintaining the switching element in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.

[0042] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that a desired amount of power is supplied to the load 300. Specifically, based on the power to be supplied to the load 300, the time (on-time) during which each switching element of the main conversion circuit 201 should be in the on-state is calculated. For example, the main conversion circuit 201 can be controlled by PWM control in which the on-time of the switching element is modulated according to the voltage to be output. Then, a control command (control signal) is output to the drive circuit included in the main conversion circuit 201 so that an on-signal is output to the switching element that should be in the on-state and an off-signal is output to the switching element that should be in the off-state at each point in time. The drive circuit outputs an on-signal or an off-signal as a drive signal to the control electrode of each switching element according to this control signal.

[0043] In the power conversion device according to the present embodiment, since the semiconductor modules according to Embodiments 1 to 3 are applied as the switching elements and freewheeling diodes of the main conversion circuit 201, reliability improvement can be realized.

[0044] In the present embodiment, an example in which the semiconductor devices according to Embodiments 1 to 3 are applied to a two-level three-phase inverter has been described. However, the application of the semiconductor devices according to Embodiments 1 to 3 is not limited to this, and they can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device has been used, but a three-level or multi-level power conversion device may also be used. When supplying power to a single-phase load, the semiconductor devices according to Embodiments 1 to 3 may be applied to a single-phase inverter. Further, when supplying power to a DC load or the like, the semiconductor devices according to Embodiments 1 to 3 can also be applied to a DC / DC converter or an AC / DC converter.

[0045] Further, the power conversion device to which the semiconductor devices according to Embodiments 1 to 3 are applied is not limited to the case where the above-described load is an electric motor. For example, it can also be used as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system. Furthermore, it can also be used as a power conditioner for a photovoltaic power generation system, a power storage system, or the like.

[0046] Note that it is possible to freely combine each embodiment or to appropriately modify or omit each embodiment.

[0047] The above description is illustrative in all aspects and is to be understood as envisioning countless variations that are not illustrated.

Description of Reference Numerals

[0048] 1 semiconductor substrate, 2 surface electrode, 3 protective film, 4 plating electrode, 5 bonding material, 6 lead frame, 7 mold resin, 100 power supply, 200 power conversion device, 201 main conversion circuit, 202 semiconductor module, 203 control circuit, 300 load.

Claims

1. A semiconductor substrate on which a semiconductor element is formed, A surface electrode formed on the surface of the semiconductor substrate, A protective film formed on the surface electrode and having an opening that exposes a part of the surface electrode, A plating electrode formed on the surface electrode exposed in the opening of the protective film, A lead frame connected to the plating electrode via a bonding material, A molding resin that seals the semiconductor substrate, the surface electrode, the protective film, the plating electrode, and the lead frame, Comprising, The molding resin is in contact with the bonding material, the protective film, and the lead frame, The plating electrode is formed inside the opening so as not to cover the protective film at the edge of the opening, A part of the bonding material protrudes from above the plating electrode and covers the protective film at the edge of the opening, The width of the portion of the protective film at the edge of the opening covered by the bonding material is larger than the thickness of the bonding material between the lead frame and the plating electrode, A semiconductor device.

2. The position of the end face of the lead frame covered with the molding resin is shifted from above the end of the plating electrode, The semiconductor device according to claim 1.

3. The amount of shift between the position of the end face of the lead frame covered with the molding resin and the position of the end of the plating electrode is larger than the thickness of the bonding material between the lead frame and the plating electrode, The semiconductor device according to claim 2.

4. The end face of the lead frame covered with the molding resin is located on the plating electrode, The semiconductor device according to claim 3.

5. The end face of the lead frame covered with the molding resin is located outside the plating electrode, The semiconductor device according to claim 3.

6. The thickness of the bonding material above the boundary portion between the plating electrode and the protective film is larger than the thickness of the bonding material between the lead frame and the plating electrode, The semiconductor device according to any one of claims 1 to 5.

7. The protective film is formed of polyimide, The semiconductor device according to any one of claims 1 to 6.

8. The bonding material is a sintered body of silver The semiconductor device according to any one of claims 1 to 7.

9. The semiconductor substrate is formed of silicon carbide, The semiconductor device according to any one of claims 1 to 8.

10. A main conversion circuit that has the semiconductor device according to any one of claims 1 to 9 and converts and outputs the input power, A control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit, A power conversion device comprising the same.

11. A step of forming a surface electrode on the surface of a semiconductor substrate on which a semiconductor element is formed, A step of forming a protective film on the surface electrode and forming an opening for exposing a part of the surface electrode in the protective film, A step of forming a plated electrode by plating the surface of the surface electrode exposed in the opening of the protective film, A step of applying a bonding material containing silver on the plated electrode and on the protective film at the edge of the opening, A step of placing a lead frame on the bonding material and sintering the silver of the bonding material in a non-pressurized state to connect the lead frame and the plated electrode via the bonding material, A step of sealing the semiconductor substrate, the surface electrode, the protective film, the plated electrode, and the lead frame using a mold resin, Comprising, The plated electrode is formed inside the opening so as not to cover the protective film at the edge of the opening, The bonding material is formed such that a part thereof protrudes from above the plated electrode and covers the protective film at the edge of the opening, A method for manufacturing a semiconductor device, characterized in that.

12. After sintering the silver of the bonding material, the width of the portion of the protective film at the edge of the opening covered with the bonding material is larger than the thickness of the bonding material between the lead frame and the plated electrode The method for manufacturing a semiconductor device according to claim 11.

13. After sintering the silver of the bonding material, the position of the end face of the lead frame covered with the mold resin is shifted from above the end of the plated electrode, The method for manufacturing a semiconductor device according to claim 11 or claim 12.

14. After sintering the silver of the bonding material, the amount of deviation between the position of the end face of the lead frame covered with the mold resin and the position of the end of the plated electrode is larger than the thickness of the bonding material between the lead frame and the plated electrode, The method for manufacturing a semiconductor device according to claim 13.

15. After sintering the silver of the bonding material, the end face of the lead frame covered with the mold resin is located on the plated electrode, The method for manufacturing a semiconductor device according to claim 14.

16. After sintering the silver of the bonding material, the end face of the lead frame covered with the mold resin is located outside the plating electrode. The method of manufacturing a semiconductor device according to claim 14.

17. After sintering the silver of the bonding material, the thickness of the bonding material above the boundary portion between the plating electrode and the protective film is larger than the thickness of the bonding material between the lead frame and the plating electrode. The method of manufacturing a semiconductor device according to any one of claims 11 to 16.

18. The step of applying the bonding material is performed by printing a nano silver paste as the bonding material. The method of manufacturing a semiconductor device according to any one of claims 11 to 17.

19. The step of applying the bonding material is performed by dispensing a nano silver paste as the bonding material. The method of manufacturing a semiconductor device according to any one of claims 11 to 17.

20. The protective film is formed of polyimide. The method of manufacturing a semiconductor device according to any one of claims 11 to 19.

21. The semiconductor substrate is formed of silicon carbide. The method of manufacturing a semiconductor device according to any one of claims 11 to 20.

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