Semiconductor device

Abstract

To provide a semiconductor device in which the variation in threshold voltage of a switching element such as a transistor is small.SOLUTION: A semiconductor device includes a semiconductor substrate having an upper surface and a lower surface and including a drift region with a first conductivity type, a trench part provided ranging from the upper surface of the semiconductor substrate to the drift region, and a mesa part held by the trench part. The mesa part includes a base region with a second conductivity type provided between the drift region and the upper surface, and a first region with a concentration peak of the hydrogen chemical concentration at a first depth position in the mesa part.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] Conventionally, a technique is known in which hydrogen is implanted into a semiconductor substrate at a predetermined depth and diffused, so that lattice defects formed in a region through which hydrogen has passed are combined with hydrogen to be donorized, and the doping concentration can be increased (see, for example, Patent Document 1). Patent Document 1 Re-published Patent No. 2016-204227

Summary of the Invention

Problems to be Solved by the Invention

[0003] In a semiconductor device, it is preferable that the variation in the threshold voltage of a switching element such as a transistor is small.

Means for Solving the Problems

[0004] In order to solve the above problems, in one aspect of the present invention, there is provided a semiconductor device including a semiconductor substrate having an upper surface and a lower surface, and provided with a drift region of a first conductivity type. The semiconductor device may include a trench portion provided to reach from the upper surface of the semiconductor substrate to the drift region. The semiconductor device may include a mesa portion sandwiched between the trench portions. The mesa portion may have a base region of a second conductivity type provided between the drift region and the upper surface. The mesa portion may have a first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion.

[0005] The first depth position may be above the lower end of the base region. The hydrogen chemical concentration at the first depth position at the center in the width direction of the mesa portion may be higher than the hydrogen chemical concentration at the first depth position in the region in contact with the trench portion.

[0006] The semiconductor device may have a second region provided in a mesa portion different from the mesa portion provided with the first region, and having a hydrogen chemical concentration at a first depth position lower than that of the first region.

[0007] The mesa portion is disposed between the drift region and the upper surface of the semiconductor substrate, and may have a high-concentration region having a doping concentration higher than that of the base region. The first depth position may be disposed at a position shallower than the lower end of the high-concentration region.

[0008] The base region may have a peak in doping concentration at a second depth position deeper than the first depth position at an interface in contact with the side wall of the trench portion.

[0009] The high-concentration region may be an emitter region of a first conductivity type provided in contact with the trench portion and having a doping concentration higher than that of the drift region.

[0010] The high-concentration region may be a contact region of a second conductivity type having a doping concentration higher than that of the base region.

[0011] The semiconductor device may include an emitter electrode disposed above the upper surface of the semiconductor substrate. The first depth position may be such that the depth direction distance from the upper surface of the semiconductor substrate in contact with the emitter electrode is 1 μm or less.

[0012] The semiconductor device may include an interlayer insulating film covering the upper surface of the semiconductor substrate. The interlayer insulating film may have a contact hole exposing the upper surface of the semiconductor substrate. The first region may be provided at a position overlapping the contact hole in a top view.

[0013] The mesa portion may be disposed between the drift region and the upper surface of the semiconductor substrate and may have an emitter region of a first conductivity type having a doping concentration higher than that of the base region. The semiconductor device may include an interlayer insulating film covering the upper surface of the semiconductor substrate. The interlayer insulating film may have a contact hole exposing the upper surface of the semiconductor substrate. The first region may be provided at a position overlapping the contact hole in a top view. The semiconductor device may include a trench contact provided on the lower surface side of the contact hole and penetrating the emitter region from above. The first region may be provided at a position deeper than the bottom surface of the trench contact.

[0014] The base region may have a peak in doping concentration at a second depth position shallower than the first depth position at an interface in contact with the side wall of the trench portion.

[0015] The bottom surface of the trench contact may be disposed at a third depth position in the depth direction from the upper surface to the lower surface. The second depth position may be shallower than the third depth position. The third depth position may be shallower than the first depth position.

[0016] The semiconductor device may include a transistor portion having a collector region of a second conductivity type between the drift region and the lower surface of the semiconductor substrate. The semiconductor device may include a diode portion having a cathode region of a first conductivity type between the drift region and the lower surface of the semiconductor substrate. The first region may be provided in the mesa portion of the transistor portion. The second region may be provided in the mesa portion of the diode portion.

[0017] The transistor portion may have a first conductivity type region and a second conductivity type region alternately arranged along the longitudinal direction of the trench portion on the upper surface of the mesa portion. The first region may be arranged to overlap the first conductivity type region and not overlap the second conductivity type region in a top view.

[0018] The semiconductor device may include a first lower region disposed below the first region on the upper surface side of the semiconductor substrate. The semiconductor device may include a second lower region provided at the same depth position as the first lower region and disposed below the second region. The concentration of recombination centers in the first lower region may be lower than the concentration of recombination centers in the second lower region.

[0019] On the upper surface of the mesa portion, it may have a second conductivity type region provided away from the trench portion. On the upper surface of the mesa portion, it may have a first conductivity type region provided between the trench portion and the second conductivity type region and in contact with the trench portion. The first region may be arranged to overlap the second conductivity type region in a top view. The first region may be provided in the mesa portion of the transistor portion.

[0020] Note that the above summary of the invention does not list all the necessary features of the present invention. Also, sub-combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0021]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9A

Figure 9B

Figure 9C

Figure 9D

Figure 9E

Figure 9F

Figure 10

Figure 11

Mode for Carrying Out the Invention

[0022] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention.

[0023] In this specification, one side in a direction parallel to the depth direction of the semiconductor substrate is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity or the direction at the time of mounting the semiconductor device.

[0024] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. The orthogonal coordinate axes only specify the relative positions of the components and do not limit a specific direction. For example, the Z-axis does not limit and indicate the height direction with respect to the ground. Note that the +Z-axis direction and the -Z-axis direction are opposite directions. When described as the Z-axis direction without describing positive or negative, it means directions parallel to the +Z-axis and -Z-axis.

[0025] In this specification, orthogonal axes parallel to the upper and lower surfaces of the semiconductor substrate are defined as the X-axis and the Y-axis. Further, an axis perpendicular to the upper and lower surfaces of the semiconductor substrate is defined as the Z-axis. In this specification, the direction of the Z-axis may be referred to as the depth direction. Also, in this specification, a direction parallel to the upper and lower surfaces of the semiconductor substrate, including the X-axis and the Y-axis, may be referred to as the horizontal direction.

[0026] Also, a region from the center in the depth direction of the semiconductor substrate to the upper surface of the semiconductor substrate may be referred to as the upper surface side. Similarly, a region from the center in the depth direction of the semiconductor substrate to the lower surface of the semiconductor substrate may be referred to as the lower surface side. In this specification, the center position in the depth direction of the semiconductor substrate may be referred to as Zc.

[0027] In this specification, when referred to as "identical" or "equal", it may include cases having errors due to manufacturing variations or the like. Such errors are, for example, within 10%.

[0028] In this specification, the conductivity type of the doped region doped with impurities is described as P-type or N-type. In this specification, impurities may particularly mean either an N-type donor or a P-type acceptor in some cases, and may be described as dopants. In this specification, doping means introducing a donor or an acceptor into the semiconductor substrate to form a semiconductor having an N-type conductivity type or a semiconductor having a P-type conductivity type.

[0029] In this specification, the doping concentration means the concentration of donors or acceptors in the thermal equilibrium state. In this specification, the net doping concentration means the net concentration obtained by adding the donor concentration as the concentration of positive ions and the acceptor concentration as the concentration of negative ions, including the polarity of the charges. As an example, when the donor concentration is N D , and the acceptor concentration is N A , the net net doping concentration at any position is N D - N AThis becomes the case. In this specification, the net doping concentration may sometimes be simply referred to as the doping concentration.

[0030] A donor has the function of supplying electrons to a semiconductor. An acceptor has the function of receiving electrons from a semiconductor. The donor and acceptor are not limited to the impurity itself. For example, a VOH defect in which a vacancy (V), oxygen (O), and hydrogen (H) present in a semiconductor are combined functions as a donor that supplies electrons. In this specification, the VOH defect may sometimes be referred to as a hydrogen donor.

[0031] When described as P+ type or N+ type in this specification, it means that the doping concentration is higher than that of P type or N type. When described as P− type or N− type, it means that the doping concentration is lower than that of P type or N type. Also, when described as P++ type or N++ type in this specification, it means that the doping concentration is higher than that of P+ type or N+ type. The unit system in this specification is the SI unit system unless otherwise specified. The unit of length may be expressed in cm, but various calculations may be performed after converting to meters (m).

[0032] In this specification, the chemical concentration refers to the atomic density of an impurity measured regardless of the electrically activated state. The chemical concentration can be measured, for example, by secondary ion mass spectrometry (SIMS). The above-mentioned net doping concentration can be measured by the voltage-capacitance measurement method (CV method). Also, the carrier concentration measured by the spreading resistance measurement method (SR method) may be used as the net doping concentration. The carrier concentration measured by the CV method or the SR method may be taken as the value in the thermal equilibrium state. Also, in the N-type region, since the donor concentration is sufficiently larger than the acceptor concentration, the carrier concentration in the region may be taken as the donor concentration. Similarly, in the P-type region, the carrier concentration in the region may be taken as the acceptor concentration. In this specification, the doping concentration in the N-type region may sometimes be referred to as the donor concentration, and the doping concentration in the P-type region may sometimes be referred to as the acceptor concentration.

[0033] In addition, when the concentration distribution of donors, acceptors, or net doping has a peak, the peak value may be regarded as the concentration of donors, acceptors, or net doping in the region. In cases where the concentration of donors, acceptors, or net doping is substantially uniform, etc., the average value of the concentration of donors, acceptors, or net doping in the region may be regarded as the concentration of donors, acceptors, or net doping. In this specification, for the concentration representation per unit volume, atoms / cm 3 , or, / cm 3 is used. This unit is used for the donor or acceptor concentration or chemical concentration in the semiconductor substrate. The atoms notation may be omitted.

[0034] The carrier concentration measured by the SR method may be lower than the concentration of donors or acceptors. In the range where current flows when measuring the spreading resistance, the carrier mobility of the semiconductor substrate may be lower than the value in the crystalline state. The decrease in carrier mobility is caused by the scattering of carriers due to the disorder of the crystal structure (disorder) such as lattice defects.

[0035] The concentration of donors or acceptors calculated from the carrier concentration measured by the CV method or SR method may be lower than the chemical concentration of the element indicating the donors or acceptors. As an example, in a silicon semiconductor, the donor concentration of phosphorus or arsenic that acts as a donor, or the acceptor concentration of boron (boron) that acts as an acceptor is about 99% of these chemical concentrations. On the other hand, the donor concentration of hydrogen that acts as a donor in a silicon semiconductor is about 0.1% to 10% of the chemical concentration of hydrogen. Each concentration in this specification may be a value at room temperature. As an example, the value at room temperature may be the value at 300 K (Kelvin) (about 26.9 °C).

[0036] FIG. 1 is a top view showing an example of the semiconductor device 100. In FIG. 1, the positions where each member is projected onto the upper surface of the semiconductor substrate 10 are shown. In FIG. 1, only some members of the semiconductor device 100 are shown, and some members are omitted.

[0037] The semiconductor device 100 includes a semiconductor substrate 10. The semiconductor substrate 10 is a substrate formed of a semiconductor material. As an example, the semiconductor substrate 10 is a silicon substrate, but the material of the semiconductor substrate 10 is not limited to silicon.

[0038] The semiconductor substrate 10 has side edges 162 in a top view. When simply referred to as a top view in this specification, it means looking from the upper surface side of the semiconductor substrate 10. The semiconductor substrate 10 in this example has two sets of side edges 162 facing each other in a top view. In FIG. 1, the X-axis and the Y-axis are parallel to any one of the side edges 162. Also, the Z-axis is perpendicular to the upper surface of the semiconductor substrate 10.

[0039] An active portion 160 is provided on the semiconductor substrate 10. The active portion 160 is a region where a main current flows in the depth direction between the upper surface and the lower surface of the semiconductor substrate 10 when the semiconductor device 100 operates. An emitter electrode is provided above the active portion 160 but is omitted in FIG. 1.

[0040] At least one of a transistor portion 70 including transistor elements such as IGBTs and a diode portion 80 including diode elements such as a freewheeling diode (FWD) is provided in the active portion 160. In the example of FIG. 1, the transistor portion 70 and the diode portion 80 are alternately arranged along a predetermined arrangement direction (the X-axis direction in this example) on the upper surface of the semiconductor substrate 10. In other examples, only one of the transistor portion 70 and the diode portion 80 may be provided in the active portion 160.

[0041] In FIG. 1, the region where the transistor portion 70 is disposed is marked with the symbol "I", and the region where the diode portion 80 is disposed is marked with the symbol "F". In this specification, the direction perpendicular to the arrangement direction in the top view may be referred to as the extending direction (the Y-axis direction in FIG. 1). The transistor portion 70 and the diode portion 80 may each have a longitudinal direction in the extending direction. That is, the length of the transistor portion 70 in the Y-axis direction is larger than the width in the X-axis direction. Similarly, the length of the diode portion 80 in the Y-axis direction is larger than the width in the X-axis direction. The extending direction of the transistor portion 70 and the diode portion 80 may be the same as the longitudinal direction of each trench portion described later.

[0042] The diode portion 80 has an N+-type cathode region in the region in contact with the lower surface of the semiconductor substrate 10. In this specification, the region where the cathode region is provided is referred to as the diode portion 80. That is, the diode portion 80 is the region that overlaps the cathode region in the top view. A P+-type collector region may be provided in the region other than the cathode region on the lower surface of the semiconductor substrate 10. In this specification, the extended region 81 obtained by extending the diode portion 80 in the Y-axis direction up to the gate wiring described later may also be included in the diode portion 80. A collector region is provided on the lower surface of the extended region 81.

[0043] The transistor portion 70 has a P+-type collector region in the region in contact with the lower surface of the semiconductor substrate 10. Further, the transistor portion 70 has a gate structure including an N-type emitter region, a P-type base region, a gate conductive portion, and a gate insulating film periodically arranged on the upper surface side of the semiconductor substrate 10.

[0044] The semiconductor device 100 may have one or more pads above the semiconductor substrate 10. The semiconductor device 100 in this example has a gate pad 164. The semiconductor device 100 may have pads such as an anode pad, a cathode pad, and a current detection pad. Each pad is disposed in the vicinity of the end side 162. The vicinity of the end side 162 refers to the region between the end side 162 and the emitter electrode in a top view. When the semiconductor device 100 is mounted, each pad may be connected to an external circuit via a wiring such as a wire.

[0045] A gate potential is applied to the gate pad 164. The gate pad 164 is electrically connected to the conductive portion of the gate trench portion of the active portion 160. The semiconductor device 100 includes a gate wiring that connects the gate pad 164 and the gate trench portion. In FIG. 1, the gate wiring is hatched with oblique lines.

[0046] The gate wiring in this example has an outer peripheral gate wiring 130 and an active side gate wiring 131. The outer peripheral gate wiring 130 is disposed between the active portion 160 and the end side 162 of the semiconductor substrate 10 in a top view. The outer peripheral gate wiring 130 in this example surrounds the active portion 160 in a top view. The region surrounded by the outer peripheral gate wiring 130 in a top view may be regarded as the active portion 160. Further, the outer peripheral gate wiring 130 is connected to the gate pad 164. The outer peripheral gate wiring 130 is disposed above the semiconductor substrate 10. The outer peripheral gate wiring 130 may be a metal wiring containing aluminum or the like.

[0047] The active side gate wiring 131 is provided in the active portion 160. By providing the active side gate wiring 131 in the active portion 160, the variation in the wiring length from the gate pad 164 can be reduced for each region of the semiconductor substrate 10.

[0048] The active side gate wiring 131 is connected to the gate trench portion of the active portion 160. The active side gate wiring 131 is disposed above the semiconductor substrate 10. The active side gate wiring 131 may be a wiring formed of a semiconductor such as polysilicon doped with impurities.

[0049] The active-side gate wiring 131 may be connected to the outer peripheral gate wiring 130. The active-side gate wiring 131 in this example is provided to extend in the X-axis direction so as to cross the active portion 160 from one outer peripheral gate wiring 130 to the other outer peripheral gate wiring 130 at substantially the center in the Y-axis direction. When the active portion 160 is divided by the active-side gate wiring 131, in each divided region, the transistor portions 70 and the diode portions 80 may be alternately arranged in the X-axis direction.

[0050] Further, the semiconductor device 100 may include a temperature sensing portion (not shown) which is a PN junction diode formed of polysilicon or the like, and a current detection portion (not shown) which simulates the operation of the transistor portion provided in the active portion 160.

[0051] The semiconductor device 100 in this example includes an edge termination structure portion 90 between the active portion 160 and the end side 162 in a top view. The edge termination structure portion 90 in this example is arranged between the outer peripheral gate wiring 130 and the end side 162. The edge termination structure portion 90 relaxes the electric field concentration on the upper surface side of the semiconductor substrate 10. The edge termination structure portion 90 may include at least one of a guard ring, a field plate, and RESURF provided to surround the active portion 160 in an annular shape.

[0052] FIG. 2 is an enlarged view of the region D in FIG. 1. The region D is a region including the transistor portion 70, the diode portion 80, and the active-side gate wiring 131. The semiconductor device 100 in this example includes a gate trench portion 40, a dummy trench portion 30, a well region 11, an emitter region 12, a base region 14, and a contact region 15 provided inside the upper surface side of the semiconductor substrate 10. The gate trench portion 40 and the dummy trench portion 30 are each an example of a trench portion. Further, the semiconductor device 100 in this example includes an emitter electrode 52 and an active-side gate wiring 131 provided above the upper surface of the semiconductor substrate 10. The emitter electrode 52 and the active-side gate wiring 131 are provided separately from each other.

[0053] An interlayer insulating film is provided between the emitter electrode 52 and the active side gate wiring 131 and the upper surface of the semiconductor substrate 10, but is omitted in FIG. 2. Contact holes 54 are provided in the interlayer insulating film of this example so as to penetrate the interlayer insulating film. In FIG. 2, each contact hole 54 is hatched with oblique lines.

[0054] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the well region 11, the emitter region 12, the base region 14, and the contact region 15. The emitter electrode 52 contacts the emitter region 12, the contact region 15, and the base region 14 on the upper surface of the semiconductor substrate 10 through the contact hole 54. Further, the emitter electrode 52 is connected to the dummy conductive portion in the dummy trench portion 30 through a contact hole provided in the interlayer insulating film. The emitter electrode 52 may be connected to the dummy conductive portion of the dummy trench portion 30 at the tip of the dummy trench portion 30 in the Y-axis direction.

[0055] The active side gate wiring 131 is connected to the gate trench portion 40 through a contact hole provided in the interlayer insulating film. The active side gate wiring 131 may be connected to the gate conductive portion of the gate trench portion 40 at the tip portion 41 of the gate trench portion 40 in the Y-axis direction. The active side gate wiring 131 is not connected to the dummy conductive portion in the dummy trench portion 30.

[0056] The emitter electrode 52 is formed of a material containing metal. FIG. 2 shows the range where the emitter electrode 52 is provided. For example, at least a part of the emitter electrode 52 is formed of aluminum or an aluminum-silicon alloy, such as a metal alloy such as AlSi, AlSiCu, etc. The emitter electrode 52 may have a barrier metal formed of titanium or a titanium compound or the like under the region formed of aluminum or the like. Further, in the contact hole, a plug formed by embedding tungsten or the like so as to contact the barrier metal and aluminum or the like may be provided.

[0057] The well region 11 is provided overlapping the active side gate wiring 131. The well region 11 is also provided extending with a predetermined width in a range where it does not overlap the active side gate wiring 131. The well region 11 in this example is provided away from the Y-axis direction end of the contact hole 54 toward the active side gate wiring 131 side. The well region 11 is a region of a second conductivity type with a higher doping concentration than the base region 14. The base region 14 in this example is of P-type, and the well region 11 is of P+-type.

[0058] Each of the transistor section 70 and the diode section 80 has a plurality of trench sections arranged in the array direction. In the transistor section 70 of this example, one or more gate trench sections 40 and one or more dummy trench sections 30 are alternately provided along the array direction. In the diode section 80 of this example, a plurality of dummy trench sections 30 are provided along the array direction. The diode section 80 of this example is not provided with a gate trench section 40.

[0059] The gate trench section 40 of this example may have two straight portions 39 (portions of the trench that are linear along the extending direction) extending along an extending direction perpendicular to the array direction, and a tip portion 41 connecting the two straight portions 39. The extending direction in FIG. 2 is the Y-axis direction.

[0060] At least a part of the tip portion 41 is preferably provided in a curved shape in a top view. By connecting the ends of the two straight portions 39 in the Y-axis direction with the tip portion 41, the electric field concentration at the ends of the straight portions 39 can be alleviated.

[0061] In the transistor portion 70, the dummy trench portion 30 is provided between the respective straight portions 39 of the gate trench portion 40. One dummy trench portion 30 may be provided between the respective straight portions 39, or a plurality of dummy trench portions 30 may be provided. The dummy trench portion 30 may have a linear shape extending in the extending direction, and may have a straight portion 29 and a tip portion 31, similar to the gate trench portion 40. The semiconductor device 100 shown in FIG. 2 includes both a linear dummy trench portion 30 without a tip portion 31 and a dummy trench portion 30 having a tip portion 31. The direction in which the straight portion 39 of the gate trench portion 40 or the straight portion 29 of the dummy trench portion 30 extends long in the extending direction is defined as the longitudinal direction of the trench portion. The longitudinal direction of the gate trench portion 40 or the dummy trench portion 30 may coincide with the extending direction. In this example, the extending direction and the longitudinal direction are the Y-axis direction. The arrangement direction in which a plurality of gate trench portions 40 or dummy trench portions 30 are arranged is defined as the short-side direction of the trench portion. The short-side direction may coincide with the arrangement direction. Also, the short-side direction may be perpendicular to the longitudinal direction. In this example, the longitudinal direction and the short-side direction are perpendicular. In this example, the arrangement direction and the short-side direction are the X-axis direction.

[0062] The diffusion depth of the well region 11 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. The end portions of the gate trench portion 40 and the dummy trench portion 30 in the Y-axis direction are provided in the well region 11 in a top view. That is, at the end portions of each trench portion in the Y-axis direction, the bottom portion in the depth direction of each trench portion is covered with the well region 11. Thereby, the electric field concentration at the bottom portion of each trench portion can be alleviated.

[0063] In the array direction, mesa portions are provided between the respective trench portions. The mesa portion refers to the region sandwiched by the trench portions inside the semiconductor substrate 10. As an example, the upper end of the mesa portion is the upper surface of the semiconductor substrate 10. The depth position of the lower end of the mesa portion is the same as the depth position of the lower end of the trench portion. The mesa portion in this example is provided so as to extend in the extending direction (Y-axis direction) along the trench on the upper surface of the semiconductor substrate 10. In this example, a mesa portion 60 is provided in the transistor portion 70, and a mesa portion 61 is provided in the diode portion 80. When simply referred to as a mesa portion in this specification, it refers to each of the mesa portion 60 and the mesa portion 61.

[0064] A base region 14 is provided in each mesa portion. Among the base regions 14 exposed on the upper surface of the semiconductor substrate 10 in the mesa portion, the region closest to the active side gate wiring 131 is defined as the base region 14-e. In FIG. 2, the base region 14-e arranged at one end in the extending direction of each mesa portion is shown, but the base region 14-e is also arranged at the other end of each mesa portion. In each mesa portion, at least one of an emitter region 12 of the first conductivity type and a contact region 15 of the second conductivity type may be provided in the region sandwiched by the base region 14-e in a top view. The emitter region 12 in this example is of N+ type, and the contact region 15 is of P+ type. The emitter region 12 and the contact region 15 may be provided between the base region 14 and the upper surface of the semiconductor substrate 10 in the depth direction.

[0065] The mesa portion 60 of the transistor portion 70 has an emitter region 12 exposed on the upper surface of the semiconductor substrate 10. The emitter region 12 is provided in contact with the gate trench portion 40. The mesa portion 60 in contact with the gate trench portion 40 may be provided with a contact region 15 exposed on the upper surface of the semiconductor substrate 10.

[0066] Each of the contact region 15 and the emitter region 12 in the mesa portion 60 is provided from one trench portion in the X-axis direction to the other trench portion. As an example, the contact region 15 and the emitter region 12 of the mesa portion 60 are alternately arranged along the extending direction (Y-axis direction) of the trench portion.

[0067] In other examples, the contact region 15 and the emitter region 12 of the mesa portion 60 may be provided in a stripe shape along the extending direction (Y-axis direction) of the trench portion. For example, the emitter region 12 is provided in a region in contact with the trench portion, and the contact region 15 is provided in a region sandwiched by the emitter regions 12.

[0068] The emitter region 12 is not provided in the mesa portion 61 of the diode portion 80. The base region 14 and the contact region 15 may be provided on the upper surface of the mesa portion 61. In a region sandwiched by the base regions 14-e on the upper surface of the mesa portion 61, the contact regions 15 may be provided in contact with the respective base regions 14-e. In a region sandwiched by the contact regions 15 on the upper surface of the mesa portion 61, the base region 14 may be provided. The base region 14 may be arranged in the entire region sandwiched by the contact regions 15.

[0069] A contact hole 54 is provided above each mesa portion. The contact hole 54 is arranged in a region sandwiched by the base regions 14-e. The contact hole 54 in this example is provided above each of the contact region 15, the base region 14, and the emitter region 12. The contact hole 54 is not provided in a region corresponding to the base region 14-e and the well region 11. The contact hole 54 may be arranged at the center in the arrangement direction (X-axis direction) of the mesa portion 60.

[0070] In the diode section 80, an N+-type cathode region 82 is provided in a region adjacent to the lower surface of the semiconductor substrate 10. On the lower surface of the semiconductor substrate 10, a P+-type collector region 22 may be provided in a region where the cathode region 82 is not provided. The cathode region 82 and the collector region 22 are provided between the lower surface 23 of the semiconductor substrate 10 and the buffer region 20. In FIG. 2, the boundary between the cathode region 82 and the collector region 22 is indicated by a dotted line.

[0071] The cathode region 82 is arranged away from the well region 11 in the Y-axis direction. Thereby, a distance between the P-type region (well region 11) having a relatively high doping concentration and formed to a deep position and the cathode region 82 is ensured, and the breakdown voltage can be improved. The end portion of the cathode region 82 in the Y-axis direction in this example is arranged farther from the well region 11 than the end portion of the contact hole 54 in the Y-axis direction. In other examples, the end portion of the cathode region 82 in the Y-axis direction may be arranged between the well region 11 and the contact hole 54.

[0072] FIG. 3 is a diagram showing an example of the e-e cross section in FIG. 2. The e-e cross section is an XZ plane passing through the emitter region 12 and the cathode region 82. The semiconductor device 100 in this example has, in the cross section, the semiconductor substrate 10, the interlayer insulating film 38, the emitter electrode 52, and the collector electrode 24.

[0073] The interlayer insulating film 38 is provided on the upper surface of the semiconductor substrate 10. The interlayer insulating film 38 is a film including at least one layer of an insulating film such as a silicate glass to which impurities such as boron or phosphorus are added, a thermal oxide film, and other insulating films. The contact hole 54 described in FIG. 2 is provided in the interlayer insulating film 38.

[0074] The emitter electrode 52 is provided above the interlayer insulating film 38. The emitter electrode 52 is in contact with the upper surface 21 of the semiconductor substrate 10 through the contact hole 54 of the interlayer insulating film 38. The collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum. In this specification, the direction (Z-axis direction) connecting the emitter electrode 52 and the collector electrode 24 is referred to as the depth direction.

[0075] The semiconductor substrate 10 has an N-type or N- type drift region 18. The drift region 18 is provided in each of the transistor portion 70 and the diode portion 80.

[0076] In the mesa portion 60 of the transistor portion 70, an N+-type emitter region 12 and a P- type base region 14 are provided in order from the upper surface 21 side of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. An N+-type accumulation region 16 may be provided in the mesa portion 60. The accumulation region 16 is disposed between the base region 14 and the drift region 18.

[0077] The emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10 and is provided in contact with the gate trench portion 40. The emitter region 12 may be in contact with the trench portions on both sides of the mesa portion 60. The emitter region 12 has a higher doping concentration than the drift region 18.

[0078] The base region 14 is provided below the emitter region 12. The base region 14 in this example is provided in contact with the emitter region 12. The base region 14 may be in contact with the trench portions on both sides of the mesa portion 60.

[0079] The accumulation region 16 is provided below the base region 14. The accumulation region 16 is an N+-type region with a higher doping concentration than the drift region 18. The accumulation region 16 may have a concentration peak of a donor such as phosphorus or a hydrogen donor. By providing the high-concentration accumulation region 16 between the drift region 18 and the base region 14, the carrier injection promotion effect (IE effect) can be enhanced and the on-voltage can be reduced. The accumulation region 16 may be provided so as to cover the entire lower surface of the base region 14 in each mesa portion 60.

[0080] In the mesa portion 61 of the diode portion 80, a P-type base region 14 is provided in contact with the upper surface 21 of the semiconductor substrate 10. A drift region 18 is provided below the base region 14. In the mesa portion 61, an accumulation region 16 may be provided below the base region 14.

[0081] In each of the transistor portion 70 and the diode portion 80, an N+-type buffer region 20 may be provided below the drift region 18. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 has a concentration peak 25 with a higher doping concentration than the drift region 18. The doping concentration of the concentration peak 25 refers to the doping concentration at the apex of the concentration peak 25. Also, the doping concentration of the drift region 18 may be the average value of the doping concentrations in a region where the doping concentration distribution is substantially flat.

[0082] The buffer region 20 in this example has three or more concentration peaks 25 in the depth direction (Z-axis direction) of the semiconductor substrate 10. The concentration peaks 25 of the buffer region 20 may be provided at the same depth position as, for example, the concentration peaks of hydrogen (proton) or phosphorus. The buffer region 20 may function as a field stop layer that prevents the depletion layer extending from the lower end of the base region 14 from reaching the P+-type collector region 22 and the N+-type cathode region 82. In this specification, the depth position of the upper end of the buffer region 20 is denoted as Zf. The depth position Zf may be a position where the doping concentration becomes higher than the doping concentration of the drift region 18.

[0083] In the transistor section 70, a P+-type collector region 22 is provided below the buffer region 20. The acceptor concentration of the collector region 22 is higher than that of the base region 14. The collector region 22 may contain the same acceptor as the base region 14 or may contain a different acceptor. The acceptor of the collector region 22 is, for example, boron.

[0084] In the diode section 80, an N+-type cathode region 82 is provided below the buffer region 20. The donor concentration of the cathode region 82 is higher than that of the drift region 18. The donor of the cathode region 82 is, for example, hydrogen or phosphorus. Note that the elements serving as donors and acceptors in each region are not limited to the above-described examples. The collector region 22 and the cathode region 82 are exposed on the lower surface 23 of the semiconductor substrate 10 and are connected to the collector electrode 24. The collector electrode 24 may be in contact with the entire lower surface 23 of the semiconductor substrate 10. The emitter electrode 52 and the collector electrode 24 are formed of a metal material such as aluminum.

[0085] On the upper surface 21 side of the semiconductor substrate 10, one or more gate trench portions 40 and one or more dummy trench portions 30 are provided. Each trench portion penetrates from the upper surface 21 of the semiconductor substrate 10 through the base region 14 and reaches the drift region 18. In a region where at least any one of the emitter region 12, the contact region 15, and the accumulation region 16 is provided, each trench portion also penetrates these doping regions and reaches the drift region 18. The fact that the trench portion penetrates the doping region is not limited to the case where the trench portion is formed after the doping region is formed. Even in the case where the doping region is formed between the trench portions after the trench portions are formed, it is included in the case where the trench portion penetrates the doping region.

[0086] As described above, the transistor portion 70 is provided with the gate trench portion 40 and the dummy trench portion 30. The diode portion 80 is provided with the dummy trench portion 30 and is not provided with the gate trench portion 40. In this example, the boundary in the X-axis direction between the diode portion 80 and the transistor portion 70 is the boundary between the cathode region 82 and the collector region 22.

[0087] The gate trench portion 40 includes a gate trench provided on the upper surface 21 of the semiconductor substrate 10, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is provided to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate insulating film 42 within the gate trench. That is, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon.

[0088] The gate conductive portion 44 may be provided longer than the base region 14 in the depth direction. In the cross section, the gate trench portion 40 on the upper surface 21 of the semiconductor substrate 10 is covered with the interlayer insulating film 38. The gate conductive portion 44 is electrically connected to the gate wiring. When a predetermined gate voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed in the surface layer of the interface of the base region 14 that contacts the gate trench portion 40.

[0089] The dummy trench portion 30 may have the same structure as the gate trench portion 40 in the cross-section. The dummy trench portion 30 includes a dummy trench provided on the upper surface 21 of the semiconductor substrate 10, a dummy insulating film 32, and a dummy conductive portion 34. The dummy conductive portion 34 is electrically connected to the emitter electrode 52. The dummy insulating film 32 is provided to cover the inner wall of the dummy trench. The dummy conductive portion 34 is provided inside the dummy trench and is provided inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy conductive portion 34 may be formed of the same material as the gate conductive portion 44. For example, the dummy conductive portion 34 is formed of a conductive material such as polysilicon. The dummy conductive portion 34 may have the same length as the gate conductive portion 44 in the depth direction.

[0090] In this example, the gate trench portion 40 and the dummy trench portion 30 are covered by the interlayer insulating film 38 on the upper surface 21 of the semiconductor substrate 10. Note that the bottoms of the dummy trench portion 30 and the gate trench portion 40 may be convex downward in a curved surface shape (curved in the cross-section). In this specification, the depth position of the lower end of the gate trench portion 40 is denoted as Zt.

[0091] At least a part of the mesa portions (in this example, a part of the mesa portions 60) is provided with a first region 270. The first region 270 is a region where the hydrogen chemical concentration distribution in the depth direction shows a concentration peak. That is, the first region 270 is a region where the hydrogen chemical concentration is higher than other regions in the mesa portion 60. In FIG. 3, the depth position where the concentration peak is arranged is denoted as the first depth position Z1. The first depth position Z1 is arranged above the lower end position Zt of the gate trench portion 40. The first depth position Z1 may be arranged above the lower end of the base region 14.

[0092] The first region 270 can be formed, for example, by selectively injecting hydrogen from the upper surface 21 of the semiconductor substrate 10. By heat-treating the semiconductor substrate 10, the hydrogen injected into the first region 270 diffuses to the boundary between the gate trench portion 40 and the base region 14. Thereby, the recombination centers at the boundary can be terminated with hydrogen. The boundary functions as a channel of the transistor portion 70. Therefore, if the concentration of recombination centers at the boundary varies, the threshold voltage of the transistor portion 70 may vary. In this example, since the concentration of recombination centers at the boundary can be reduced, the variation in the concentration of recombination centers can be reduced, and the variation in the threshold voltage of the transistor portion 70 can be reduced.

[0093] When the first region 270 is provided in the base region 14, it is preferable to control the dose amount of hydrogen so that the first region 270 does not become an N-type region. The ratio at which the injected hydrogen is hydrogen-donated is about 0.1% to 10%. The hydrogen chemical concentration at the first depth position Z1 of the first region 270 may be 10 times or less, 1 time or less, or even 1 / 10 or less of the chemical concentration of the P-type dopant (for example, boron) at that position. The hydrogen chemical concentration at the first depth position Z1 of the first region 270 may be 0.001 times or more, 0.01 times or more, 0.1 times or more, or even 1 time or more of the chemical concentration of the P-type dopant (for example, boron) at that position.

[0094] In some mesa portions where the first region 270 is not provided (in this example, some mesa portions 61), the second region 260 may be provided. The second region 260 is a region where the hydrogen chemical concentration at the first depth position Z1 is lower than that of the first region 270. The hydrogen chemical concentration of each region may use the hydrogen chemical concentration at the center in the width direction of the mesa portion. In the mesa portion 61 where the second region 260 is provided, the hydrogen concentration may be the same as that of other regions other than the first region 270, or may be higher than that of other regions other than the first region 270. As an example, other regions other than the first region 270 are the drift region 18. The second region 260 may be a part of the base region 14. The second region 260 may be provided in the mesa portion 60 or the mesa portion 61 that is in contact with and sandwiched between two adjacent dummy trench portions 30 respectively.

[0095] The first region 270 of this example is provided in at least some mesa portions 60 of the transistor portion 70. The second region 260 of this example is provided in each mesa portion 61 of the diode portion 80. Among the mesa portions 60 of the transistor portion 70, the second region 260 may be provided in one or more mesa portions 60 closest to the diode portion 80. Among the mesa portions 60, the first region 270 may be provided in the mesa portion 60 in contact with the gate trench portion 40, and the second region 260 may be provided in the mesa portion 60 not in contact with the gate trench portion 40.

[0096] FIG. 4 is a diagram showing an example of a method for manufacturing the semiconductor device 100 shown in FIG. 3. In this example, hydrogen ions are implanted from the upper surface 21 of the semiconductor substrate 10 to the first depth position Z1. Before the hydrogen ion implantation, each trench portion, emitter region 12, base region 14, accumulation region 16, drift region 18, buffer region 20, collector region 22, and cathode region 82 may be formed in the semiconductor substrate 10.

[0097] Also, an interlayer insulating film 38 may be provided before hydrogen ion implantation. The interlayer insulating film 38 may function as a mask for shielding hydrogen ions. A contact hole 54 may be formed in the interlayer insulating film 38. However, the contact hole 54 is not formed above the mesa portion where the first region 270 is not formed. In a process after hydrogen ion implantation, the contact hole 54 may be formed above the mesa portion. Thereby, hydrogen ions can be implanted into the first region 270 and shielded from the second region 260. In another example, hydrogen ions may also be implanted into the second region 260 with a dose amount ( / cm 2 ) less than that of the first region 270. As another example, a resist by photolithography may be used as a mask for shielding hydrogen ions. The opening portion of the mask by the resist may be formed so as to be away from the inversion layer channel formation region of the gate trench portion 40 in a top view.

[0098] After hydrogen ion implantation, the semiconductor substrate 10 is heat-treated. In the heat treatment step, the semiconductor substrate 10 is heat-treated under the condition that the hydrogen implanted into the first region 270 diffuses to the boundary between the base region 14 and the gate trench portion 40. Thereby, the concentration of the recombination centers at the boundary is reduced. Therefore, the threshold voltage of the semiconductor device 100 can be adjusted.

[0099] FIG. 5 schematically shows a mesa portion 60 provided with the first region 270 and the hydrogen chemical concentration distributions in the X-axis direction and the Z-axis direction. The hydrogen chemical concentration distribution in the X-axis direction is the distribution at the first depth position Z1 of the mesa portion 60. The hydrogen chemical concentration distribution in the Z-axis direction is the distribution at the central position Xc in the X-axis direction of the mesa portion 60. As described above, at the first depth position Z1, the hydrogen chemical concentration distribution in the Z-axis direction shows a concentration peak Zh. Each concentration distribution shows the distribution after heat treatment. By heat treatment, the hydrogen implanted at the first depth position Z1 diffuses in each direction.

[0100] In this example, let the X-axis positions where the base region 14 contacts each trench portion be Xt1 and Xt2. Also, let the positions of both ends of the contact hole 54 in the X-axis direction be Xh1 and Xh2. In this example, hydrogen ions are implanted at the first depth position Z1 through the contact hole 54. For this reason, the first region 270 is provided below the contact hole 54. The first region 270 may be a region having the same position as the contact hole 54 in the XY plane. There may be a case where the position of the contact hole 54 in the XY plane is not the same, such as when the angle of hydrogen ion implantation is not perpendicular to the substrate 10. When using a resist mask, if the opening of the mask is narrower than the contact hole 54, the first region 270 may be formed narrower than the contact hole 54. The hydrogen chemical concentration distribution in the X-axis direction may have a concentration peak 275 below the contact hole 54. The concentration peak 275 may be arranged at the central position Xc of the mesa portion 60. Below the contact hole 54, the hydrogen chemical concentration at the first depth position Z1 may be substantially uniform. In this case, the peak value of the hydrogen chemical concentration distribution in the X-axis direction may use the hydrogen chemical concentration at the central position Xc.

[0101] On the other hand, since the gate insulating film 42 is covered by the interlayer insulating film 38, hydrogen ions are not implanted. For this reason, damage to the gate insulating film 42 can be suppressed. Also, the hydrogen implanted into the first region 270 diffuses during the heat treatment stage and reaches the positions Xt1 and Xt2. Thereby, the recombination centers existing at the positions Xt1 and Xt2 can be terminated with hydrogen. Since the recombination center concentration existing at the positions Xt1 and Xt2 decreases, the variation in the recombination center concentration can also be reduced. For this reason, even if there is a variation in the concentration of the recombination centers before the diffusion of hydrogen, the variation in characteristics such as the threshold voltage can be reduced.

[0102] The hydrogen chemical concentration Dht at the position Xt1 where the gate trench portion 40 is in contact with the base region 14 may be lower than the hydrogen chemical concentration Dhc at the concentration peak 275. In this example, the hydrogen chemical concentration Dht is lower than the hydrogen chemical concentration Dhc. The hydrogen chemical concentration Dht may be 3 / 4 or less of the hydrogen chemical concentration Dhc, or may be 1 / 2 or less. The hydrogen chemical concentration Dht may be 1 / 10 or more of the hydrogen chemical concentration Dhc, may be 1 / 5 or more, or may be 1 / 3 or more. The hydrogen chemical concentration Dht can be controlled by the width of the contact hole 54 in the X-axis direction and the dose amount of hydrogen ions, etc. By increasing the hydrogen chemical concentration Dht, variations in characteristics such as the threshold voltage can be reduced as described above. The length (Xh1 - Xt1) by which the interlayer insulating film 38 protrudes more than the gate trench portion 40 in the X-axis direction may be 10% or more, may be 20% or more, may be 30% or more, or may be 40% or more of the width (Xt2 - Xt1) of the mesa portion 60 in the X-axis direction. The length (Xt2 - Xh2) by which the interlayer insulating film 38 protrudes more than the dummy trench portion 30 in the X-axis direction may be the same as the above-described length (Xh1 - Xt1).

[0103] Note that the position Xt2 where the dummy trench portion 30 is in contact with the base region 14 may also have the same hydrogen chemical concentration Dht as the position Xt1. In other examples, the hydrogen chemical concentration at the position Xt2 where the dummy trench portion 30 is in contact with the base region 14 may be different from the hydrogen chemical concentration Dht at the position Xt1. Also, the width of the first region 270 in the X-axis direction may be the same as the width of the contact hole 54 in the X-axis direction. Alternatively, the width of the first region 270 in the X-axis direction may be 80% or more, or may be 90% or more of the width of the contact hole 54 in the X-axis direction. The width of the first region 270 in the X-axis direction may also be 100% or less of the width of the contact hole 54 in the X-axis direction.

[0104] In the depth direction (the direction of the negative side of the Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end on the lower surface 23 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16. Alternatively, the upper end on the upper surface 21 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16 or the drift region 18. On the other hand, the upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the trench portion. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The lower end on the lower surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14.

[0105] The first depth position Z1 in the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30.

[0106] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side with respect to the depth position of the upper end on the upper surface 21 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side with respect to the depth position of the upper end on the upper surface 21 side of the accumulation region 16.

[0107] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side with respect to the depth position of the upper end on the upper surface 21 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side with respect to the depth position of the upper end on the upper surface 21 side of the base region 14.

[0108] FIG. 6 is a diagram showing another structural example of the mesa portion 60 provided with the first region 270. In the mesa portion 60 of this example, the emitter regions 12 are arranged at both ends in the X-axis direction of the mesa portion 60 and are not provided at the center in the X-axis direction of the mesa portion 60. The emitter regions 12 are provided in regions in contact with each trench portion. On the upper surface 21 of the semiconductor substrate 10, a base region 14 is provided between the emitter regions 12 at both ends of the mesa portion 60. Structures other than the emitter regions 12 and the base region 14 are the same as any of the mesa portions 60 described with reference to FIGS. 1 to 5.

[0109] In this example, the depth position of the lower end of the emitter region 12 is denoted as Ze. The emitter region 12 is a high-concentration region having a higher doping concentration than the base region 14. The emitter region 12 of this example may have a concentration peak of a donor other than a hydrogen donor such as phosphorus or arsenic. The first depth position Z1 in the first region 270 is arranged above the depth position Ze. As described above, the first depth position Z1 is a position where the hydrogen chemical concentration distribution peaks in the depth direction.

[0110] Next to the structural diagram of FIG. 6, a doping concentration in the A-A cross section and a distribution diagram of the hydrogen chemical concentration in the B-B cross section are shown. The A-A cross section corresponds to the YZ plane passing through the portion in the mesa portion 60 that contacts the side wall of the gate trench portion 40. The B-B cross section corresponds to the YZ plane passing through the central position of the mesa portion 60 in the X-axis direction. In the A-A cross section, let the depth at the peak position of the doping concentration of the base region 14 be Zb. The depth position Zb is deeper than the depth position Z1. Further, the hydrogen chemical concentration at the depth position Zb of the B-B cross section may be higher or lower than the doping concentration of the base region 14 at the depth position Zb of the A-A cross section. In this example, the hydrogen chemical concentration at the depth position Zb of the B-B cross section is higher than the doping concentration of the base region 14 at the depth position Zb of the A-A cross section. In this case, in the A-A cross section, the hydrogen chemical concentration at the peak position of the doping concentration of the base region 14 can be made sufficiently high.

[0111] In this example, the first region 270 is provided in the base region 14 sandwiched between the emitter regions 12 disposed at both ends of the mesa portion 60 in the X-axis direction and in the emitter regions 12. Also in this example, the hydrogen chemical concentration distribution at the first depth position Z1 is the same as the example described in FIG. 5. Also according to this example, by diffusing hydrogen to the interface between the base region 14 and the gate trench portion 40, variations in characteristics such as the threshold voltage can be reduced. Also, in FIG. 6, the first region 270 is provided across the base region 14 and the emitter regions 12, but in the case of using a resist mask narrower than the contact opening 54, it can also be provided only in the base region 14. Also, the first depth position Z1 in the first region 270 may be disposed below the depth position Ze, and part or all of the first region 270 may be disposed below the depth position Ze. Also, in the depth direction (the direction of the negative side of the Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end on the lower surface 23 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps the accumulation region 16. Alternatively, the upper end on the upper surface 21 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps the accumulation region 16 or the drift region 18.

[0112] On the other hand, the upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the trench portion. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The lower end on the lower surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side with respect to the depth position of the lower end on the lower surface 23 side of the base region 14.

[0113] The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be a gate trench portion 40 or a dummy trench portion 30.

[0114] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than the depth position of the lower end on the lower surface 23 side of the lower surface of the storage region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than the depth position of the lower end on the lower surface 23 side of the storage region 16. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than the depth position of the upper end on the upper surface 21 side of the storage region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than the depth position of the upper end on the upper surface 21 side of the storage region 16.

[0115] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than the depth position of the upper end on the upper surface 21 side of the base region 14. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than the depth position of the upper end on the upper surface 21 side of the base region 14.

[0116] FIG. 7 is a diagram showing another structural example of the mesa portion 60 provided with the first region 270. In the mesa portion 60 of this example, the P-type contact region 15 is exposed on the upper surface 21 of the mesa portion 60. The structure other than the contact region 15 is the same as any of the mesa portions 60 described in FIGS. 1 to 5. The contact region 15 is a high-concentration region having a higher doping concentration than the base region 14. The contact region 15 may have a concentration peak of a P-type dopant such as boron. Emitter regions 12 may be provided at both ends of the mesa portion 60 in the X-axis direction in the same manner as in the example of FIG. 6. In other examples, the contact region 15 may be provided over the entire X-axis direction of the mesa portion 60.

[0117] In this example, let the depth position at the lower end of the contact region 15 be Zp. The first depth position Z1 in the first region 270 is arranged above the depth position Zp. The first depth position Z1 in the first region 270 may be arranged above the depth position Ze. The depth position Ze in this example is arranged above the depth position Zp.

[0118] The first region 270 in this example is provided across the contact region 15 and the emitter region 12. Also in this example, the hydrogen chemical concentration distribution at the first depth position Z1 is the same as the example described in FIG. 5. Also by this example, the variation in characteristics such as the threshold voltage can be reduced by the diffusion of hydrogen to the interface between the base region 14 and the gate trench portion 40. Further, in FIG. 7, although the first region 270 is provided across the contact region 15 and the emitter region 12, in the case of using a resist mask narrower than the contact opening 54, it can also be provided only in the contact region 15. Also, the first depth position Z1 in the first region 270 may be arranged below the depth positions Ze and Zp, and a part or the whole of the first region 270 may be arranged below the depth positions Ze and Zp. Also, in the depth direction (the direction of the negative side of the Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end on the lower surface 23 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16. Alternatively, the upper end on the upper surface 21 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps with the accumulation region 16 or the drift region 18.

[0119] On one hand, the upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The lower end on the lower surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the base region 14. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the base region 14.

[0120] The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30.

[0121] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than at the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than at the depth position of the upper end on the upper surface 21 side of the accumulation region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the upper end on the upper surface 21 side of the accumulation region 16.

[0122] The first depth position Z1 in the first region 270 may be located closer to the lower surface 23 side than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the upper surface 21 side than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the lower surface 23 side than the depth position of the upper end on the upper surface 21 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the upper surface 21 side than the depth position of the upper end on the upper surface 21 side of the base region 14.

[0123] Note that the first depth position Z1 described in FIGS. 1 to 7 may be a distance in the Z-axis direction from the upper surface 21 of the semiconductor substrate 10 of 1 μm or less. By reducing this distance, the damage when implanting hydrogen ions at the first depth position Z1 can be reduced. This distance may also be 0.5 μm or less. When implanting hydrogen ions, a mask such as a thin resist may be formed on the upper surface 21 of the semiconductor substrate 10 to adjust the range of the hydrogen ions.

[0124] FIG. 8 is a diagram showing another structural example of the mesa portion 60 provided with the first region 270. The mesa portion 60 of this example has a trench contact 55. The structure other than the trench contact 55 is the same as any of the mesa portions 60 described in FIGS. 1 to 7. The trench contact 55 is a groove formed from the upper surface 21 of the semiconductor substrate 10 to a position reaching the base region 14. In the mesa portion 60 of this example, an emitter region 12 is provided between the base region 14 and the upper surface 21, and the trench contact 55 penetrates the emitter region 12. A plug made of a metal material such as tungsten may be formed inside the trench contact 55. The trench contact 55 may be disposed at the center of the mesa portion 60 in the X-axis direction. The interlayer insulating film 38 may cover a region where the trench contact 55 is not provided.

[0125] The first region 270 is disposed below the trench contact 55. The first depth position Z1 of the first region 270 may be disposed within the base region 14. Before filling the trench contact 55 with a metal material such as tungsten, the first region 270 can be formed below the trench contact 55 by implanting hydrogen ions through the trench contact 55. In this case, the bottom surface of the trench contact 55 becomes the upper surface 21 which is the implantation surface of hydrogen ions. Let the depth position of the bottom surface of the trench contact 55 be Ztc. The distance in the Z-axis direction between the depth position Ztc and the first depth position Z1 of the first region 270 may be 1 μm or less, and may also be 0.5 μm or less.

[0126] To the right of the structural diagram of FIG. 8, a diagram showing the doping concentration in the A-A cross section and the distribution diagram of the hydrogen chemical concentration in the B-B cross section is shown. The A-A cross section corresponds to the YZ plane passing through the portion in the mesa portion 60 that contacts the side wall of the gate trench portion 40. The B-B cross section corresponds to the YZ plane passing through the central position of the mesa portion 60 in the X-axis direction. In the A-A cross section, let the depth at the peak position of the doping concentration of the base region 14 be Zb. The depth position Zb is shallower than the depth position Z1. Further, the depth position Z1 may be deeper than the depth position Ztc. Note that the depth position Zb may be shallower or deeper than the depth position Ztc. In this example, the depth position Zb is shallower than the depth position Ztc. The hydrogen chemical concentration at the depth position Z1 of the B-B cross section may be higher than the doping concentration of the base region 14 at the depth position Zb of the A-A cross section. Also, when the depth position Zb is deeper than the depth position Ztc, the hydrogen chemical concentration at the depth position Zb of the B-B cross section may be higher than the doping concentration of the base region 14 at the depth position Zb of the A-A cross section. In this case, in the A-A cross section, the hydrogen chemical concentration at the peak position of the doping concentration of the base region 14 can be made sufficiently high. The hydrogen chemical concentration at the depth position Z1 of the B-B cross section may be higher than the doping concentration of the base region 14 at the depth position Z1 of the A-A cross section. Note that in the case where the trench contact 55 is tapered, etc., the first region 270 may be provided across the base region 14 and the emitter region 12. Also, the contact region 15 may be provided on the side wall and the bottom of the trench contact 55, and the first region 270 may be provided so as to overlap the contact region 15. Also, in the depth direction (the direction of the negative side of the Z-axis) from the upper surface 21 of the semiconductor substrate 10, the lower end on the lower surface 23 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps the accumulation region 16. Alternatively, the upper end on the upper surface 21 side of the first region 270 may be deeper than the lower end on the lower surface 23 side of the base region 14. In this case, in the depth direction, in this example, the first region 270 overlaps the accumulation region 16 or the drift region 18.

[0127] On one hand, the upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the storage region 16. The lower end on the lower surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the storage region 16. The upper end on the upper surface 21 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the base region 14. The lower end on the lower surface 23 side of the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the base region 14.

[0128] The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the trench portion. The trench portion may be the gate trench portion 40 or the dummy trench portion 30.

[0129] The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than at the depth position of the lower end on the lower surface 23 side of the storage region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the lower end on the lower surface 23 side of the storage region 16. The first depth position Z1 in the first region 270 may be located on the lower surface 23 side rather than at the depth position of the upper end on the upper surface 21 side of the storage region 16. The first depth position Z1 in the first region 270 may be located on the upper surface 21 side rather than at the depth position of the upper end on the upper surface 21 side of the storage region 16.

[0130] The first depth position Z1 in the first region 270 may be located closer to the lower surface 23 side than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the upper surface 21 side than the depth position of the lower end on the lower surface 23 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the lower surface 23 side than the depth position of the upper end on the upper surface 21 side of the base region 14. The first depth position Z1 in the first region 270 may be located closer to the upper surface 21 side than the depth position of the upper end on the upper surface 21 side of the base region 14.

[0131] FIG. 9A is an enlarged view of the mesa portion 60 in a top view. As described in FIG. 2, on the upper surface of the mesa portion 60, a P-type region and an N-type region are alternately arranged in the Y-axis direction. The P-type region in this example is the contact region 15, and the N-type region is the emitter region 12. The structure of the mesa portion 60 is the same as any of the mesa portions 60 described in FIGS. 1 to 8. For example, the f-f cross section in FIG. 9A may have the same structure as the example shown in FIG. 5 or FIG. 8.

[0132] The first region 270 is arranged to overlap the emitter region 12 in a top view and not to overlap the contact region 15. The range in the top view of the first region 270 may be a region where the hydrogen chemical concentration at the first depth position Z1 is 80% or more of the peak concentration, or may be a region where it is 50% or more. The first region 270 may be in contact with at least one of the gate trench portion 40 and the dummy trench portion 30 in a top view.

[0133] According to this example, the first region 270 is selectively arranged in the base region 14 below the emitter region 12. Therefore, while reducing the total dose amount of hydrogen ions, the recombination centers of the base region 14 that function as channels can be efficiently terminated. Also, the first region 270 is not arranged below the contact region 15. Therefore, an increase in the hydrogen donor concentration below the contact region 15 can be suppressed, and the extraction of holes through the contact region 15 and the emitter electrode 52 is not inhibited.

[0134] In another example, the first region 270 may be provided up to a position overlapping with the contact region 15. However, it is preferable that the area where the first region 270 overlaps with the emitter region 12 is larger than the area where the first region 270 overlaps with the contact region 15.

[0135] FIG. 9B is another example of an enlarged view of the mesa portion 60 in a top view. It is different from FIG. 9A in that the first region 270 is provided in both the adjacent emitter region 12 and the contact region 15. The structure other than the first region 270 is the same as that in the example of FIG. 9A. For example, the structure of the f-f cross section passing through the emitter region 12 may have the same structure as the f-f cross section shown in FIG. 9A. The first region 270 in this example may be continuously provided across the adjacent emitter region 12 and contact region 15. The region where the first region 270 is continuously provided may include two or more emitter regions 12. The region where the first region 270 is continuously provided may include two or more contact regions 15.

[0136] FIG. 9C is another example of an enlarged view of the mesa portion 60 in a top view. The mesa portion 60 in this example corresponds to the mesa portion 60 shown in FIG. 6 or FIG. 7 or FIG. 8. The i-i cross section in FIG. 9C may have the same structure as the example shown in FIG. 6 or FIG. 7 or FIG. 8.

[0137] The mesa portion 60 in this example has a second conductivity type region disposed away from the trench portions (gate trench portion 40 and dummy trench portion 30 in this example) on the upper surface 21 of the semiconductor substrate 10, and a first conductivity type region disposed between the trench portions and the second conductivity type region on the upper surface 21 of the semiconductor substrate 10.

[0138] The second conductivity type region is the contact region 15 shown in FIG. 7, or the base region 14 shown in FIGS. 6 and 8. The second conductivity type region may be disposed along the trench portion. That is, the second conductivity type region may be provided to extend with a longitudinal direction in the Y-axis direction. The second conductivity type region may be disposed to overlap the center of the mesa portion 60 in the X-axis direction.

[0139] In this example, the first conductivity type region is the emitter region 12. The first conductivity type region may be arranged along the trench portion. That is, the first conductivity type region may be provided to extend in contact with the trench portion so as to have a longitudinal direction in the Y-axis direction. The first conductivity type region may be arranged so as to sandwich the second conductivity type region in the X-axis direction. For example, the second conductivity type region may be arranged away from each trench portion at the center in the X-axis direction of the mesa portion 60, and the first conductivity type region may be arranged on both sides in the X-axis direction of the second conductivity type region.

[0140] The first region 270 is arranged to overlap the second conductivity type region in a top view. The arrangement of the first region 270 is the same as the example in FIG. 6 or FIG. 7. The first region 270 may be arranged so as not to overlap the first conductivity type region in a top view. The first region 270 may be arranged along the trench portion in the same manner as the second conductivity type region. That is, the first region 270 may be provided to extend so as to have a longitudinal direction in the Y-axis direction. The first region 270 may be in contact with the first conductivity type region in a top view, and a part thereof may overlap.

[0141] FIG. 9D is a view showing another example of the f-f cross section in FIG. 9A or FIG. 9B. In the mesa portion 60 of this example, the depth position of the first region 270 is different from the example in FIG. 5. Other structures are the same as the mesa portion 60 described in FIG. 5.

[0142] In this example, at least a part of the first region 270 is arranged at the same depth as the emitter region 12. The first depth position Z1 may be arranged closer to the upper surface 21 side than the depth position Ze of the lower end of the emitter region 12. The whole of the first region 270 may be arranged closer to the upper surface 21 side than the depth position Ze of the lower end of the emitter region 12, and a part of the first region 270 may be arranged closer to the lower surface 23 side than the depth position Ze of the lower end of the emitter region 12.

[0143] FIG. 9E is a diagram showing an example of a g-g cross section in FIG. 9A. The g-g cross section is a cross section passing through the contact region 15. The mesa portion 60 in the g-g cross section has the contact region 15 instead of the emitter region 12, as compared with the structure of the mesa portion 60 in the f-f cross section. Also, the first region 270 is not disposed in the contact region 15.

[0144] FIG. 9F is a diagram showing an example of an h-h cross section in FIG. 9B. The h-h cross section is a cross section passing through the contact region 15. The mesa portion 60 in the h-h cross section is different in that it has the first region 270, as compared with the structure of the mesa portion 60 in the g-g cross section. Other structures are the same as those in the g-g cross section.

[0145] In the first region 270 of this example, the first region 270 is provided in the contact region 15. A part of the first region 270 may be provided in the base region 14, or the entire first region 270 may be provided in the contact region 15. When the h-h cross section has the structure shown in FIG. 9F, the f-f cross section may have the structure shown in FIG. 9D. Also, when the f-f cross section has the structure shown in FIG. 5, at least a part of the first region 270 in the h-h cross section may be provided in the base region 14. In this case, the entire first region 270 may be provided in the base region 14, or a part of the first region 270 may be provided in the contact region 15.

[0146] FIG. 10 is a diagram showing another example of an e-e cross section in FIG. 2. The semiconductor device 100 of this example has a first lower region 220 and a second lower region 210 disposed at a second depth position Z2 on the upper surface 21 side of the semiconductor substrate 10. The second lower region 210 is a region where the concentration of recombination centers at the second depth position Z2 is higher than that in the first lower region 220. In FIG. 10, the recombination centers are schematically shown by cross marks. The recombination centers may be lattice defects mainly composed of vacancies such as vacancies and divacancies, may be dislocations, may be interstitial atoms, or may be transition metals or the like.

[0147] The recombination center can be formed by injecting charged particles such as hydrogen ions and helium ions into the semiconductor substrate 10 from the lower surface 23. When injecting ions such as hydrogen ions or helium ions, the acceleration energy of the ions is adjusted so that the range of the ions becomes the first depth position Z1.

[0148] The second lower region 210 may be provided across the entire diode portion 80 in the XY plane. By providing the second lower region 210 in the diode portion 80, the carrier lifetime in the diode portion 80 can be reduced, and the reverse recovery time can be shortened. Thereby, the reverse recovery loss of the diode portion 80 can be reduced.

[0149] The second lower region 210 may extend to below the mesa portion 60 where the second region 260 is provided in the transistor portion 70. In this example, the second region 260 is provided in one or more mesa portions 60 closest to the diode portion 80.

[0150] The first lower region 220 is a region where the concentration of recombination centers is lower than that in the second lower region 210. At the second depth position Z2, the concentration of recombination centers in the second lower region 210 may be 2 times or more, 5 times or more, or 10 times or more the concentration of recombination centers in the first lower region 220. The concentration of recombination centers in the first lower region 220 may be 0.1 times or less, 0.01 times or less, or 0.001 times or less the concentration of recombination centers in the second lower region 210. The first lower region 220 may not substantially contain recombination centers. In this case, even if the first lower region 220 contains lattice defects or the like, the concentration of lattice defects may be the same as that in the drift region 18 other than the first lower region 220 and the second lower region 210. That is, the first lower region 220 may be a region where the carrier lifetime is not intentionally reduced. By not providing recombination centers in the transistor portion 70 or providing recombination centers at a low concentration, the reverse recovery time of the diode portion 80 can be shortened while suppressing an increase in leakage current in the transistor portion 70.

[0151] FIG. 11 is a diagram showing an example of a method for manufacturing the semiconductor device 100 shown in FIG. 10. First, in the first implantation step S1101, charged particles are implanted from the lower surface 23 to the second depth position Z2. The charged particles in this example are ions such as hydrogen ions or helium ions. Note that before the first implantation step S1101, each trench portion, emitter region 12, base region 14, accumulation region 16, drift region 18, buffer region 20, collector region 22, and cathode region 82 may be formed in the semiconductor substrate 10. In the first implantation step S1101, recombination centers having substantially the same concentration are formed in both the first lower region 220 and the second lower region 210.

[0152] Next, in the second implantation step S1102, hydrogen ions are implanted from the upper surface 21 into the base region 14 of each mesa portion to form the first region 270. The second implantation step S1102 is the same as the hydrogen ion implantation step shown in FIG. 4. An interlayer insulating film 38 may be provided before the second implantation step S1102.

[0153] Next, in the heat treatment step S1103, the semiconductor substrate 10 is heat treated. In the heat treatment step S1103, the semiconductor substrate 10 is heat treated under conditions such that the hydrogen implanted in the first region 270 diffuses to both the channel portion, which is the boundary between the base region 14 and the gate trench portion 40, and the first lower region 220. Thereby, the concentration of the recombination centers in the channel portion and the first lower region 220 decreases. Therefore, the recombination centers in the second lower region 210 can be selectively left. Thereby, the second lower region 210 can be selectively formed while adjusting the threshold voltage of the transistor portion 70.

[0154] In this example, the first region 270 is formed in a partial region above the first lower region 220. However, since the hydrogen implanted in the first region 270 also diffuses in the XY plane, the recombination centers can be terminated over the entire first lower region 220. In other examples, the concentration of the recombination centers in the region below the trench portion in the first lower region 220 may be higher than the concentration of the recombination centers in the region below the mesa portion 60.

[0155] In addition, when charged particles are injected from the upper surface 21 of the semiconductor substrate 10 where a gate insulating film or the like is provided, the gate insulating film may be damaged and characteristics such as the threshold voltage may change. On the other hand, by injecting charged particles from the lower surface 23 to the second depth position Z2 of the semiconductor substrate 10, damage to the upper surface 21 of the semiconductor substrate 10 can be suppressed.

[0156] However, when injecting charged particles from the lower surface 23 toward the upper surface 21 side, the acceleration energy of the charged particles increases. In such a case, when attempting to selectively inject charged particles in the XY plane, it becomes difficult to provide a mask such as a photoresist for shielding the charged particles. For example, since the film thickness of the mask becomes very large, patterning becomes difficult.

[0157] In this example, in the first injection step S1101, charged particles are injected into a region including both the first lower region 220 and the second lower region 210. Thereby, recombination centers are formed at approximately the same concentration in both the first lower region 220 and the second lower region 210. When the charged particles are helium, the chemical concentration of helium in the first lower region 220 and the second lower region 210 may be the same.

[0158] Thereafter, in the second injection step S1102, hydrogen ions (for example, protons) having a shorter range than the charged particles are injected into a region overlapping the first lower region 220 in the Z-axis direction. Since the range of the hydrogen ions is made small, the damage to the injection surface is small and selective shielding is also easy. After injecting the hydrogen ions, by heat-treating the semiconductor substrate 10, the hydrogen ions diffuse to the first lower region 220 and combine with the recombination centers in the first lower region 220. Thereby, the concentration of the recombination centers in the first lower region 220 can be made lower than the concentration of the recombination centers in the second lower region 210. The recombination center concentration at the second depth position Z2 of the first lower region 220 may be 1 / 2 or less, 1 / 5 or less, 1 / 10 or less, or even 1 / 100 or less of the recombination center concentration at the second depth position Z2 of the second lower region 210.

[0159] Incidentally, the magnitude of the concentration of the recombination centers may be determined by comparing the carrier lifetimes. The one with the shorter carrier lifetime may be regarded as having a higher concentration of recombination centers. When "the concentration of recombination centers is N times" is defined in this specification, it may be read as "the carrier lifetime is 1 / N times".

[0160] In this example, hydrogen diffuses into the first lower region 220, and hardly diffuses into the second lower region 210. Therefore, the hydrogen chemical concentration at the second depth position Z2 is higher in the first lower region 220 than in the second lower region 210. The hydrogen chemical concentration at the second depth position Z2 in the first lower region 220 may be 10 times or more, 100 times or more, or even 1000 times or more the hydrogen chemical concentration at the second depth position Z2 in the second lower region 210. The hydrogen chemical concentration at the second depth position Z2 in the second lower region 210 may be 0.

[0161] Also, the hydrogen chemical concentration at the first depth position Z1 is higher in the first region 270 than in the second region 260. The hydrogen chemical concentration at the first depth position Z1 in the first region 270 may be 10 times or more, 100 times or more, 1000 times or more, or 10 10 times or more the hydrogen chemical concentration at the first depth position Z1 in the second region 260. The hydrogen chemical concentration at the first depth position Z1 in the second region 260 may be 0.

[0162] As described above, the present invention has been described using the embodiments. However, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0163] In the claims, the specification, and the drawings, the execution order of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown is not explicitly indicated as "earlier" or "preceding" etc. in particular. It should be noted that, unless the output of the previous process is used in the subsequent process, it can be realized in any order. Regarding the operation flows in the claims, the specification, and the drawings, even if explanations are given using "first," "next," etc. for convenience, it does not mean that it is essential to implement in this order.

Explanation of Reference Numerals

[0164] 10 ··· semiconductor substrate, 11 ··· well region, 12 ··· emitter region, 14 ··· base region, 15 ··· contact region, 16 ··· storage region, 18 ··· drift region, 20 ··· buffer region, 21 ··· upper surface, 22 ··· collector region, 23 ··· lower surface, 24 ··· collector electrode, 25 ··· concentration peak, 29 ··· straight portion, 30 ··· dummy trench portion, 31 ··· tip portion, 32 ··· dummy insulating film, 34 ··· dummy conductive portion, 38 ··· interlayer insulating film, 39 ··· straight portion, 40 ··· gate trench portion, 41 ··· tip portion, 42 ··· gate insulating film, 44 ··· gate conductive portion, 52 ··· emitter electrode, 54 ··· contact hole, 55 ··· trench contact, 60, 61 ··· mesa portion, 70 ··· transistor portion, 80 ··· diode portion, 81 ··· extension region, 82 ··· cathode region, 90 ··· edge termination structure portion, 100 ··· semiconductor device, 130 ··· outer peripheral gate wiring, 131 ··· active side gate wiring, 160 ··· active portion, 162 ··· side edge, 164 ··· gate pad, 210 ··· second lower region, 220 ··· first lower region, 260 ··· second region, 270 ··· first region, 275 ··· concentration peak

Claims

1. A semiconductor substrate having an upper surface and a lower surface, and provided with a drift region of a first conductivity type, a trench portion provided reaching from the upper surface of the semiconductor substrate to the drift region, a mesa portion sandwiched between the trench portions and comprising, wherein the mesa portion has a base region of a second conductivity type provided between the drift region and the upper surface, and a first region having a concentration peak of hydrogen chemical concentration at a first depth position within the mesa portion and having, at the first depth position, a portion of the base region in contact with the trench portion containing hydrogen, wherein the hydrogen chemical concentration of the portion of the base region in contact with the trench portion is 1 / 10 or more of the hydrogen chemical concentration at the concentration peak of the first region a semiconductor device.

2. A semiconductor substrate having an upper surface and a lower surface, and provided with a drift region of a first conductivity type, a trench portion provided reaching from the upper surface of the semiconductor substrate to the drift region, a mesa portion sandwiched between the trench portions and comprising, wherein the mesa portion has a base region of a second conductivity type provided between the drift region and the upper surface, and a first region having a concentration peak of hydrogen chemical concentration at a first depth position within the mesa portion and having, at the first depth position, a portion of the base region in contact with the trench portion containing hydrogen, wherein recombination centers at the boundary between the base region and the trench portion are terminated by the hydrogen a semiconductor device.

3. further comprising an interlayer insulating film covering the upper surface of the semiconductor substrate, wherein the interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, wherein the first region is provided at a position overlapping the contact hole in a top view, and wherein the hydrogen chemical concentration at the first depth position continuously decreases from the hydrogen chemical concentration at a position corresponding to an end portion of the contact hole to the side wall of the trench portion the semiconductor device according to claim 1 or 2.

4. A semiconductor substrate having an upper surface and a lower surface, and provided with a drift region of a first conductivity type, a trench portion provided reaching from the upper surface of the semiconductor substrate to the drift region, a mesa portion sandwiched between the trench portions and comprising, wherein the mesa portion has a base region of a second conductivity type provided between the drift region and the upper surface, and an emitter region of a first conductivity type provided between the base region and the upper surface, in contact with the trench portion and having a higher doping concentration than the drift region, A contact region of the second conductivity type, which is provided between the base region and the upper surface and has a higher doping concentration than the base region, A first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion and has The emitter region and the contact region are alternately arranged along the longitudinal direction of the trench portion on the upper surface of the mesa portion. In a top view, the area where the first region overlaps with the emitter region is larger than the area where the first region overlaps with the contact region. Semiconductor device.

5. The first depth position is above the lower end of the base region. The semiconductor device according to any one of claims 1 to 4.

6. The hydrogen chemical concentration at the first depth position at the center in the width direction of the mesa portion is higher than the hydrogen chemical concentration at the first depth position in the region in contact with the trench portion. The semiconductor device according to any one of claims 1 to 5.

7. A semiconductor substrate having an upper surface and a lower surface and provided with a drift region of the first conductivity type, A trench portion provided to reach from the upper surface of the semiconductor substrate to the drift region, A mesa portion sandwiched between the trench portions and includes The mesa portion is A base region of the second conductivity type provided between the drift region and the upper surface, A first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion and has A second region is provided in a mesa portion different from the mesa portion where the first region is provided, and the hydrogen chemical concentration at the first depth position is lower than that of the first region. Semiconductor device.

8. A semiconductor substrate having an upper surface and a lower surface and provided with a drift region of the first conductivity type, A trench portion provided to reach from the upper surface of the semiconductor substrate to the drift region, A mesa portion sandwiched between the trench portions and includes The mesa portion is A base region of the second conductivity type provided between the drift region and the upper surface, A first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion and has The mesa portion is disposed between the drift region and the upper surface of the semiconductor substrate and has a high-concentration region having a higher doping concentration than the base region. The first depth position is disposed at a position shallower than the lower end of the high-concentration region. Semiconductor device.

9. The base region has a peak of doping concentration at a second depth position deeper than the first depth position at the interface in contact with the side wall of the trench portion. The semiconductor device according to claim 8.

10. The high-concentration region is an emitter region of a first conductivity type that is provided in contact with the trench portion and has a higher doping concentration than the drift region. The semiconductor device according to claim 8 or 9.

11. The high-concentration region is a contact region of a second conductivity type that has a higher doping concentration than the base region. The semiconductor device according to claim 8 or 9.

12. A semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; A trench portion provided to reach from the upper surface of the semiconductor substrate to the drift region; A mesa portion sandwiched between the trench portions; An emitter electrode disposed above the upper surface of the semiconductor substrate and comprising: The mesa portion has a base region of a second conductivity type provided between the drift region and the upper surface, and a first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion and having: The first depth position is such that the distance in the depth direction from the upper surface of the semiconductor substrate in contact with the emitter electrode is 1 μm or less. Semiconductor device.

13. Further comprising an interlayer insulating film covering the upper surface of the semiconductor substrate, The interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, The first region is provided at a position overlapping the contact hole in a top view. The semiconductor device according to any one of claims 1, 2, 4, or 7 to 12.

14. A semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; A trench portion provided to reach from the upper surface of the semiconductor substrate to the drift region; A mesa portion sandwiched between the trench portions and comprising: The mesa portion has a base region of a second conductivity type provided between the drift region and the upper surface, an emitter region of a first conductivity type disposed between the drift region and the upper surface of the semiconductor substrate and having a higher doping concentration than the base region, and a first region having a concentration peak of the hydrogen chemical concentration at a first depth position within the mesa portion and having: Further comprising an interlayer insulating film covering the upper surface of the semiconductor substrate, The interlayer insulating film has a contact hole exposing the upper surface of the semiconductor substrate, The first region is provided at a position overlapping the contact hole in a top view, and a trench contact provided on the lower surface side of the contact hole and penetrating the emitter region from the upper surface. The first region is provided at a position deeper than the bottom surface of the trench contact. The base region has a peak in doping concentration at a second depth position shallower than the first depth position at an interface in contact with the side wall of the trench portion. Semiconductor device.

15. The bottom surface of the trench contact is disposed at a third depth position in the depth direction from the upper surface toward the lower surface. The second depth position is shallower than the third depth position. The third depth position is shallower than the first depth position. The semiconductor device according to claim 14.

16. A transistor portion having a collector region of a second conductivity type between the drift region and the lower surface of the semiconductor substrate, A diode portion having a cathode region of a first conductivity type between the drift region and the lower surface of the semiconductor substrate. And further includes. The first region is provided in the mesa portion of the transistor portion. The second region is provided in the mesa portion of the diode portion. The semiconductor device according to claim 7.

17. The mesa portion has a first conductivity type region and a second conductivity type region alternately arranged along the longitudinal direction of the trench portion on the upper surface of the mesa portion. The first region is arranged so as to overlap the first conductivity type region in a top view and not to overlap the second conductivity type region. The semiconductor device according to claim 7.

18. A first lower region disposed below the first region on the upper surface side of the semiconductor substrate, A second lower region provided at the same depth position as the first lower region and disposed below the second region. And further includes. The concentration of recombination centers in the first lower region is lower than the concentration of recombination centers in the second lower region. The semiconductor device according to claim 7.

19. A semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type, A transistor portion having a collector region of a second conductivity type between the drift region and the lower surface of the semiconductor substrate, A diode portion having a cathode region of a first conductivity type between the drift region and the lower surface of the semiconductor substrate, A trench portion provided from the upper surface of the semiconductor substrate to reach the drift region, A mesa portion sandwiched between the trench portions. And includes. The mesa portion is A base region of a second conductivity type provided between the drift region and the upper surface, A first region having a peak in hydrogen chemical concentration at a first depth position within the mesa portion. On the upper surface of the mesa portion, a second conductivity type region provided apart from the trench portion, On the upper surface of the mesa portion, a first conductivity type region provided between the trench portion and the second conductivity type region and in contact with the trench portion and having, The first region is arranged to overlap the second conductivity type region in a top view, The first region is provided in the mesa portion of the transistor portion semiconductor device.

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