Semiconductor device

Abstract

To provide a semiconductor device capable of preventing breakage at a lower end of a trench contact part while suppressing hole injection at reverse recovery without providing a lifetime control region on a front surface side by providing the trench contact part and a plug region discretely in a diode part.SOLUTION: A semiconductor device 100 comprising a semiconductor substrate 10 having a diode part 80. The diode part comprises: an anode region 84 of a second conductivity type provided on a front surface of the semiconductor substrate; a gate trench part 40 provided so as to extend in a predetermined extending direction, on the front surface of the semiconductor substrate; a trench contact part 60 provided on the front surface of the semiconductor substrate; and a plug region 19 of the second conductivity type provided at a lower end of the trench contact part, having a doping concentration higher than that of the anode region. The plug region is provided along the extending direction discretely.SELECTED DRAWING: Figure 1B

Description

Technical Field

[0001] The present invention relates to a semiconductor device.

Background Art

[0002] Patent Document 1 describes a contact trench having a depth that is shallower than the gate trench 4 and reaches the p-type base region 3 located below the p-type body layer 6 through the n+-type emitter region 5 and the p-type body layer 6. [Prior Art Document] [Patent Document] [Patent Document 1] JP-A-2010-267863

Summary of the Invention

Problems to be Solved by the Invention

[0003] When such a contact trench is provided in the diode portion, there is a risk of a decrease in breakdown voltage, so a complicated process for maintaining the breakdown voltage is required, increasing the cost.

Means for Solving the Problems

[0004] In a first aspect of the present invention, a semiconductor device is provided. The semiconductor device includes a semiconductor substrate having a diode portion. The diode portion includes a second-conductivity-type anode region provided on the front surface of the semiconductor substrate, a trench portion provided on the front surface of the semiconductor substrate and extending in a predetermined extending direction, a trench contact portion provided on the front surface of the semiconductor substrate, and a second-conductivity-type plug region provided at the lower end of the trench contact portion and having a higher doping concentration than the anode region. The plug regions are provided discretely along the extending direction.

[0005] A plurality of trench contact portions may be provided discretely.

[0006] The plug region may be provided so as to cover the lower end of the trench contact portion.

[0007] In the extending direction, the length of the trench contact portion is 0.6 μm to 50 μm, and the distance between adjacent trench contact portions may be 1 μm to 50 μm.

[0008] The trench contact portion extends in the extending direction, and an anode region and a plug region may be provided at the lower end of the trench contact portion.

[0009] At the lower end of the trench contact portion, the anode region and the plug region may be alternately provided along the extending direction.

[0010] The semiconductor device further includes a transistor portion having a base region of a second conductivity type provided on the front surface of the semiconductor substrate, and the doping concentration of the anode region may be lower than the doping concentration of the base region.

[0011] The doping concentration of the anode region is 1E16 cm -3 or more and 1E17 cm -3 or less, and the doping concentration of the base region is 1E17 cm -3 or more and 1E18 cm -3 or less.

[0012] The transistor portion further has an emitter region of a first conductivity type provided on the front surface of the semiconductor substrate, and the lower end of the trench contact portion may be deeper than the lower end of the emitter region.

[0013] The lower end of the trench contact portion may be located at a depth of 0.35 μm to 0.6 μm from the front surface of the semiconductor substrate.

[0014] The trench contact portion may be further provided in the transistor portion.

[0015] The plug region is further provided at the lower end of the trench contact portion of the transistor portion, and in the extending direction, the length of the plug region of the transistor portion may be longer than the length of the plug region of the diode portion.

[0016] The diode portion may further have an accumulation region of a first conductivity type provided in the semiconductor substrate.

[0017] The doping concentration of the plug region may be 1E20 cm -3 or more and 1E21 cm -3 or less.

[0018] A lifetime control region including a lifetime killer may not be provided on the front surface side of the semiconductor substrate.

[0019] Note that the above summary of the invention does not list all the features of the present invention. Also, sub-combinations of these feature groups can also be inventions.

Brief Description of the Drawings

[0020]

Figure 1A

Figure 1B

Figure 1C

Figure 1D

Figure 2

Figure 3A

Figure 3B

Modes for Carrying Out the Invention

[0021] Hereinafter, the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the claims. Also, not all combinations of features described in the embodiments are essential for the solution means of the invention.

[0022] In this specification, one side in the direction parallel to the depth direction of the semiconductor substrate is referred to as "upper", and the other side is referred to as "lower". Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper", "lower", "front", and "back" are not limited to the direction of gravity or the direction of attachment to the substrate or the like when mounting the semiconductor device.

[0023] In this specification, technical matters may be described using orthogonal coordinate axes of the X-axis, Y-axis, and Z-axis. In this specification, a plane parallel to the front surface of the semiconductor substrate is defined as the XY plane, and the depth direction of the semiconductor substrate is defined as the Z-axis. Note that, in this specification, when the semiconductor substrate is viewed in the Z-axis direction, it is referred to as a plan view.

[0024] In each embodiment, an example is shown in which the first conductivity type is N-type and the second conductivity type is P-type, but the first conductivity type may be P-type and the second conductivity type may be N-type. In this case, the conductivity types of the substrate, layer, region, etc. in each embodiment have opposite polarities.

[0025] In this specification, in a layer or region with N or P prefix, it means that electrons or holes are the majority carriers, respectively. Also, the + and - attached to N and P mean that they have a higher doping concentration and a lower doping concentration than the layer or region without them, respectively. ++ means a higher doping concentration than +, and -- means a lower doping concentration than -.

[0026] In this specification, the doping concentration refers to the concentration of donors or acceptors that have been doped. Therefore, its unit is / cm 3That is the case. In this specification, the concentration difference between the donor and the acceptor (i.e., the net doping concentration) may be used as the doping concentration. In this case, the doping concentration can be measured by the SR method. Also, the chemical concentrations of the donor and the acceptor may be used as the doping concentration. In this case, the doping concentration can be measured by the SIMS method. If not particularly limited, any of the above may be used as the doping concentration. If not particularly limited, the peak value of the doping concentration distribution in the doping region may be used as the doping concentration in the doping region.

[0027] Also, in this specification, the dose amount refers to the number of ions per unit area implanted into the wafer when ion implantation is performed. Therefore, the unit is / cm 2 That is the case. Note that the dose amount of the semiconductor region can be the integrated concentration obtained by integrating the doping concentration over the depth direction of the semiconductor region. The unit of the integrated concentration is / cm 2 That is the case. Therefore, the dose amount and the integrated concentration may be treated as the same. The integrated concentration may be the integrated value up to the half-value width, and when it overlaps with the spectrum of another semiconductor region, it may be derived excluding the influence of the other semiconductor region.

[0028] Therefore, in this specification, the high or low doping concentration can be read as the high or low dose amount. That is, when the doping concentration of one region is higher than that of another region, it can be understood that the dose amount of the one region is higher than that of the other region.

[0029] FIG. 1A shows an example of a top view of a semiconductor device 100 according to Example 1. The semiconductor device 100 includes a semiconductor substrate having a transistor portion 70 including transistor elements such as IGBTs and a diode portion 80 including diode elements such as a freewheeling diode (FWD). For example, the semiconductor device 100 is a reverse conducting IGBT (RC-IGBT: Reverse Conducting IGBT).

[0030] Note that when simply referred to as a top view in this specification, it means viewing from the front side of the semiconductor substrate. In this example, the arrangement direction of the transistor portion 70 and the diode portion 80 in the top view is defined as the X-axis, the direction perpendicular to the X-axis on the front surface of the semiconductor substrate is defined as the Y-axis, and the direction perpendicular to the front surface of the semiconductor substrate is defined as the Z-axis.

[0031] The transistor portion 70 and the diode portion 80 may each have a length in the extending direction. That is, the length of the transistor portion 70 in the Y-axis direction is larger than the width in the X-axis direction. Similarly, the length of the diode portion 80 in the Y-axis direction is larger than the width in the X-axis direction. The extending direction of the transistor portion 70 and the diode portion 80 may be the same as the longitudinal direction of each trench portion described later.

[0032] The transistor portion 70 is a region obtained by projecting the collector region 22 provided on the back side of the semiconductor substrate onto the front surface of the semiconductor substrate 10. The collector region 22 in this example is P+-type as an example. The transistor portion 70 includes transistors such as IGBTs.

[0033] On the front surface side of the semiconductor substrate, an N-type emitter region 12, a P-type base region 14, and a gate trench portion 40 having a gate conductive portion and a gate insulating film are periodically arranged in the transistor portion 70.

[0034] The diode portion 80 is a region obtained by projecting the cathode region 82 provided on the back side of the semiconductor substrate 10 onto the front surface of the semiconductor substrate 10. The cathode region 82 in this example is N+-type as an example. The diode portion 80 includes diodes such as a free wheel diode (FWD) provided adjacent to the transistor portion 70 on the front surface of the semiconductor substrate 10. On the back surface of the semiconductor substrate 10, a P+-type collector region may be provided in a region other than the cathode region.

[0035] The semiconductor substrate may be a silicon substrate, may be a silicon carbide substrate, or may be a nitride semiconductor substrate such as gallium nitride. The semiconductor substrate in this example is a silicon substrate.

[0036] The semiconductor device 100 of this example includes a gate trench portion 40, a dummy trench portion 30, an emitter region 12, a base region 14, a contact region 15, a well region 17, and an anode region 84 provided on the front surface side of the semiconductor substrate. The gate trench portion 40 and the dummy trench portion 30 are each an example of a trench portion.

[0037] Further, the semiconductor device 100 of this example includes a gate metal layer 50 and an emitter electrode 52 provided above the front surface of the semiconductor substrate. An interlayer insulating film is provided between the emitter electrode 52 and the gate metal layer 50 and the front surface of the semiconductor substrate, but is omitted in FIG. 1A. Contact holes 54, 55, and 56 are provided through the interlayer insulating film of this example. In FIG. 1A, each contact hole is hatched with oblique lines.

[0038] The emitter electrode 52 is provided above the gate trench portion 40, the dummy trench portion 30, the emitter region 12, the base region 14, the contact region 15, the well region 17, and the anode region 84. The emitter electrode 52 is electrically connected to the emitter region 12, the base region 14, the contact region 15, and the anode region 84 on the front surface of the semiconductor substrate through the contact hole 54.

[0039] The emitter electrode 52 and the gate metal layer 50 are formed of a material containing metal. At least a part of the emitter electrode 52 may be formed of aluminum or an alloy mainly composed of aluminum (for example, an aluminum-silicon alloy, an aluminum-silicon-copper alloy, etc.). At least a part of the gate metal layer 50 may be formed of aluminum or an alloy mainly composed of aluminum (for example, an aluminum-silicon alloy, an aluminum-silicon-copper alloy, etc.).

[0040] The emitter electrode 52 and the gate metal layer 50 may have a barrier metal formed of titanium, a titanium compound, or the like under a region formed of aluminum or the like. The emitter electrode 52 and the gate metal layer 50 are provided separately from each other.

[0041] The contact hole 55 connects the gate conductive portion in the gate trench portion 40 of the transistor portion 70 and the gate metal layer 50. A plug formed of tungsten or the like may be provided inside the contact hole 55 via a barrier metal.

[0042] The contact hole 56 connects the dummy conductive portion in the dummy trench portion 30 provided in the transistor portion 70 and the diode portion 80 and the emitter electrode 52. A plug formed of tungsten or the like may be provided inside the contact hole 56 via a barrier metal.

[0043] The connection portion 25 electrically connects an electrode on the front side such as the emitter electrode 52 or the gate metal layer 50 and the semiconductor substrate. In one example, the connection portion 25 is provided in a region including inside the contact hole 55 between the gate metal layer 50 and the gate conductive portion. The connection portion 25 is also provided in a region including inside the contact hole 56 between the emitter electrode 52 and the dummy conductive portion.

[0044] The connection portion 25 is a material having conductivity, such as a metal such as tungsten or polysilicon doped with impurities. The connection portion 25 may also have a barrier metal such as titanium nitride. Here, the connection portion 25 is polysilicon doped with N-type impurities (N+). The connection portion 25 is provided above the front surface of the semiconductor substrate via an insulating film such as an oxide film.

[0045] The gate trench portions 40 are arranged at a predetermined interval along a predetermined arrangement direction (in this example, the X-axis direction). The gate trench portions 40 in this example may have two extending portions 39 that extend along an extending direction (in this example, the Y-axis direction) parallel to the front surface of the semiconductor substrate and perpendicular to the arrangement direction, and a connecting portion 41 that connects the two extending portions 39.

[0046] At least a part of the connecting portion 41 is preferably formed in a curved shape. By connecting the ends of the two extending portions 39 of the gate trench portion 40, the electric field concentration at the ends of the extending portions 39 can be alleviated. In the connecting portion 41 of the gate trench portion 40, the gate metal layer 50 may be connected to the gate conductive portion.

[0047] The dummy trench portion 30 is a trench portion in which a dummy conductive portion provided therein is electrically connected to the emitter electrode 52. The dummy trench portions 30 are arranged at a predetermined interval along a predetermined arrangement direction (in this example, the X-axis direction), similar to the gate trench portions 40. The dummy trench portions 30 in this example may have a U shape on the front surface of the semiconductor substrate, similar to the gate trench portions 40. That is, the dummy trench portion 30 may have two extending portions 29 that extend along the extending direction, and a connecting portion 31 that connects the two extending portions 29.

[0048] The transistor portion 70 in this example has a structure in which one gate trench portion 40 and one dummy trench portion 30 are repeatedly arranged. That is, the transistor portion 70 in this example has the gate trench portion 40 and the dummy trench portion 30 at a ratio of 1:1. For example, in the transistor portion 70, the extending portions 39 and the extending portions 29 are alternately provided in the arrangement direction.

[0049] However, the ratio of the gate trench portion 40 and the dummy trench portion 30 is not limited to this example. The ratio of the gate trench portion 40 and the dummy trench portion 30 may be 2:3 or 2:4. Also, it may be a so-called full gate structure in which the dummy trench portion 30 is not provided in the transistor portion 70 and all are the gate trench portion 40.

[0050] The well region 17 is provided on the front side of the semiconductor substrate rather than the drift region 18 described later. The well region 17 is an example of a well region provided on the edge side of the semiconductor device 100. The well region 17 is, as an example, P+-type. The well region 17 is provided in a predetermined range from the end of the active region on the side where the gate metal layer 50 is provided.

[0051] The diffusion depth of the well region 17 may be deeper than the depths of the gate trench portion 40 and the dummy trench portion 30. A part of the regions of the gate trench portion 40 and the dummy trench portion 30 on the gate metal layer 50 side is provided in the well region 17. The bottoms of the ends in the extending direction of the gate trench portion 40 and the dummy trench portion 30 may be covered by the well region 17.

[0052] The contact hole 54 is provided above each of the emitter region 12 and the contact region 15 in the transistor portion 70. The contact hole 54 is also provided above the anode region 84 in the diode portion 80. None of the contact holes 54 are provided above the well regions 17 provided at both ends in the Y-axis direction. Thus, one or a plurality of contact holes 54 are provided in the interlayer insulating film. The contact hole 54 in this example may be provided extending in the extending direction.

[0053] The mesa portions 71 and 81 are mesa portions provided adjacent to the trench portions in a plane parallel to the front surface of the semiconductor substrate. The mesa portion is a portion of the semiconductor substrate sandwiched between two adjacent trench portions, and may be a portion from the front surface of the semiconductor substrate to the depth of the deepest bottom of each trench portion. The extended portions of each trench portion may be regarded as one trench portion. That is, the region sandwiched between the two extended portions may be regarded as a mesa portion.

[0054] In the transistor portion 70, the mesa portion 71 is provided adjacent to at least one of the dummy trench portion 30 or the gate trench portion 40. The mesa portion 71 has a well region 17, an emitter region 12, a base region 14, and a contact region 15 on the front surface of the semiconductor substrate. In the mesa portion 71, the emitter region 12 and the contact region 15 are alternately provided in the extending direction.

[0055] In the diode portion 80, the mesa portion 81 is provided in a region sandwiched between adjacent dummy trench portions 30. The mesa portion 81 of this example has an anode region 84 on the front surface of the semiconductor substrate and has a well region 17 on the negative side in the Y-axis direction. A contact region 15 may be provided on the front surface of the anode region 84 in the mesa portion 81.

[0056] The base region 14 is a region provided on the front surface side of the semiconductor substrate in the transistor portion 70. The anode region 84 is a region provided on the front surface side of the semiconductor substrate in the diode portion 80. The base region 14 and the anode region 84 are, for example, P-type.

[0057] The doping concentration of the anode region 84 is lower than that of the base region 14. The doping concentration of the anode region 84 is 1E16 cm -3 above, 1E17 cm -3 below, and the doping concentration of the base region 14 is 1E17 cm -3 above, 1E18 cm -3 below. Here, E means the power of 10. For example, 1E16 cm -3is 1×10 16 cm -3 This means. In this example, by reducing the doping concentration of the anode region 84, hole injection during reverse recovery can be suppressed.

[0058] The emitter region 12 has the same conductivity type as the drift region 18 and has a higher doping concentration than the drift region 18. The emitter region 12 in this example is N+ type as an example. An example of the dopant in the emitter region 12 is arsenic (As). The emitter region 12 is provided in contact with the gate trench portion 40 on the front surface of the mesa portion 71. The emitter region 12 may be provided to extend in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other.

[0059] Also, the emitter region 12 may or may not be in contact with the dummy trench portion 30. The emitter region 12 in this example is in contact with the dummy trench portion 30. The emitter region 12 is not provided on the mesa portion 81.

[0060] The contact region 15 has the same conductivity type as the base region 14 and has a higher doping concentration than the base region 14. The contact region 15 in this example is P+ type as an example. The contact region 15 in this example is provided on the front surface of the mesa portion 71. The contact region 15 may be provided in the X-axis direction from one of the two trench portions sandwiching the mesa portion 71 to the other. The contact region 15 may or may not be in contact with the gate trench portion 40. Also, the contact region 15 may or may not be in contact with the dummy trench portion 30. In this example, the contact region 15 is in contact with the dummy trench portion 30 and the gate trench portion 40.

[0061] FIG. 1B is a view showing an example of the cross section taken along the line a-a' in FIG. 1A. The cross section taken along the line a-a' is an XZ plane passing through the emitter region 12 in the transistor section 70. The semiconductor device 100 of this example has, in the cross section taken along the line a-a', a semiconductor substrate 10, an interlayer insulating film 38, an emitter electrode 52, and a collector electrode 24. The emitter electrode 52 is provided above the semiconductor substrate 10 and the interlayer insulating film 38.

[0062] The drift region 18 is a region provided in the semiconductor substrate 10. The drift region 18 of this example is N-type as an example. The drift region 18 may be a region remaining in the semiconductor substrate 10 without other doping regions being formed. That is, the doping concentration of the drift region 18 may be the same as the doping concentration of the semiconductor substrate 10.

[0063] The buffer region 20 is a region provided below the drift region 18. The buffer region 20 of this example has the same conductivity type as the drift region 18 and is N-type as an example. The doping concentration of the buffer region 20 is higher than the doping concentration of the drift region 18. The buffer region 20 may function as a field stop layer that prevents the depletion layer spreading from the lower surface side of the base region 14 from reaching the collector region 22 and the cathode region 82.

[0064] The collector region 22 is a region having a conductivity type different from that of the drift region 18, which is provided below the buffer region 20 in the transistor section 70. The cathode region 82 is a region having the same conductivity type as the drift region 18, which is provided below the buffer region 20 in the diode section 80. The boundary between the collector region 22 and the cathode region 82 is the boundary between the transistor section 70 and the diode section 80.

[0065] The collector electrode 24 is provided on the back surface 23 of the semiconductor substrate 10. The collector electrode 24 is formed of a conductive material such as metal.

[0066] The base region 14 is a region of a conductivity type different from that of the drift region 18, provided above the drift region 18 in the mesa portion 71. The base region 14 in this example is P-type as an example. The base region 14 is provided in contact with the gate trench portion 40. The base region 14 may be provided in contact with the dummy trench portion 30.

[0067] The anode region 84 is a region of a conductivity type different from that of the drift region 18, provided above the drift region 18 in the mesa portion 81. The anode region 84 in this example is P-type as an example. The anode region 84 is provided in contact with the dummy trench portion 30.

[0068] The emitter region 12 is provided between the base region 14 and the front surface 21. The emitter region 12 in this example is provided in the mesa portion 71 and not provided in the mesa portion 81. The emitter region 12 is provided in contact with the gate trench portion 40. The emitter region 12 may or may not be in contact with the dummy trench portion 30.

[0069] When the diode portion 80 conducts, an electron current flows from the cathode region 82 to the anode region 84. When the electron current reaches the anode region 84, conductivity modulation occurs and a hole current flows from the anode region 84. Also, due to the electron current diffused from the cathode region 82, hole injection is promoted also from the contact region 15 of the transistor portion 70, and the hole density of the semiconductor substrate 10 increases. As a result, the time until the holes disappear when the diode portion 80 turns off becomes longer, so the reverse recovery peak current increases and the reverse recovery loss increases.

[0070] As a technique for suppressing such hole current, a technique of providing a lifetime control region including a lifetime killer on the front surface side of a semiconductor substrate is known. The lifetime killer is, for example, an electron beam injected into the entire semiconductor substrate, helium, an electron beam, or a proton injected at a predetermined depth, etc., and the lifetime control region is crystal defects formed inside the semiconductor substrate by lifetime killer injection. The lifetime control region promotes the recombination disappearance of electrons and holes generated when the diode portion conducts, and reduces the reverse recovery loss.

[0071] In this example, a lifetime control region including a lifetime killer is not provided on the front surface 21 side of the semiconductor substrate 10. In this example, by lowering the doping concentration of the anode region 84, hole injection during reverse recovery can be suppressed even without providing a lifetime control region.

[0072] The trench contact portion 60 electrically connects the emitter electrode 52 and the semiconductor substrate. The trench contact portion 60 is provided continuously with the contact hole 54. The trench contact portion 60 of this example is provided in each of the mesa portion 71 and the mesa portion 81.

[0073] The trench contact portion 60 has a conductive material filled in the contact hole 54. The trench contact portion 60 is provided between two adjacent trench portions among the plurality of trench portions. The trench contact portion 60 of this example is provided penetrating the emitter region 12 from the front surface 21 and is in contact with the plug region 19 at the lower end. The trench contact portion 60 may have the same material as the emitter electrode 52.

[0074] Note that a barrier metal formed of titanium or a titanium compound, etc. may be provided inside the trench contact portion 60 and the contact hole 54. Further, a plug formed of tungsten or the like may be provided inside the trench contact portion 60 and the contact hole 54 via the barrier metal.

[0075] The lower end of the trench contact portion 60 is deeper than the lower end of the emitter region 12. By providing the trench contact portion 60, the resistance of the base region 14 is reduced, and it becomes easier to extract minority carriers (for example, holes). As a result, the breakdown withstand voltage such as the latch-up withstand voltage caused by minority carriers can be improved. For example, the distance between the lower end of the emitter region 12 and the front surface 21 is 0.3 μm to 0.4 μm, and the distance D between the lower end of the trench contact portion 60 and the front surface 21 is 0.35 μm to 0.6 μm.

[0076] For example, the trench contact portion 60 is formed by etching the interlayer insulating film 38. The trench contact portion 60 has a substantially planar bottom surface. The trench contact portion 60 in this example has a tapered shape with inclined side walls. However, the side walls of the trench contact portion 60 may be provided substantially perpendicular to the front surface 21.

[0077] The plug region 19 is provided at the lower end of the trench contact portion 60 in each of the mesa portion 71 and the mesa portion 81. The plug region 19 has the same conductivity type as the base region 14 and the anode region 84, and is a region with a higher doping concentration than the base region 14 and the anode region 84. The plug region 19 in this example is P+ type as an example.

[0078] For example, the plug region 19 is formed by ion-implanting boron (B) or boron fluoride (BF 2 ) from the lower end of the trench contact portion 60. The plug region 19 may have the same doping concentration as the contact region 15. The doping concentration of the plug region 19 in this example is 1E20 cm -3 or more and 1E21 cm -3 or less. The plug region 19 suppresses latch-up by extracting minority carriers.

[0079] The plug region 19 diffuses from the lower end of the trench contact portion 60 and covers at least a part of the side wall of the trench contact portion 60. In the transistor portion 70, the emitter region 12 and the plug region 19 do not contact each other on the side wall of the trench contact portion 60. The side wall of the trench contact portion 60 provided in the transistor portion 70 is covered with the emitter region 12, the base region 14, and the plug region 19. That is, in the transistor portion 70, the side wall of the trench contact portion 60 is in contact with the base region 14.

[0080] In this example, in the transistor portion 70, since the emitter region 12 and the plug region 19 are in contact with the trench contact portion 60, the injection of carriers from the emitter region 12 can be suppressed, and the breakdown voltage can be improved. Further, even when a large current flows through the semiconductor device 100, the extraction efficiency of minority carriers can be improved by the plug region 19, and the potential of the base region 14 can be stabilized.

[0081] Also, in this example, by providing the plug region 19 also in the diode portion 80, the low doping concentration of the anode region 84 can be compensated, and an ohmic contact can be ensured.

[0082] The accumulation region 16 is a region provided on the front surface 21 side of the semiconductor substrate 10 rather than the drift region 18. The accumulation region 16 in this example has the same conductivity type as the drift region 18, and is, for example, N+-type. The accumulation region 16 is provided in the transistor portion 70 and the diode portion 80. However, the accumulation region 16 may not be provided.

[0083] Also, the accumulation region 16 is provided in contact with the gate trench portion 40. The accumulation region 16 may or may not be in contact with the dummy trench portion 30. The doping concentration of the accumulation region 16 is higher than the doping concentration of the drift region 18. The dose amount of ion implantation in the accumulation region 16 is 1E12 cm -2 above, 1E13 cm -2 below may be sufficient. Also, the dose amount of ion implantation in the accumulation region 16 is 3E12 cm -26E12 cm or less -2 It may be less than this. By providing the accumulation region 16, the carrier injection promotion effect (IE effect) can be enhanced, and the on-voltage of the transistor portion 70 can be reduced.

[0084] One or more gate trench portions 40 and one or more dummy trench portions 30 are provided on the front surface 21. Each trench portion is provided from the front surface 21 to the drift region 18. In the region where at least any one of the emitter region 12, the base region 14, the contact region 15, and the accumulation region 16 is provided, each trench portion penetrates these regions and reaches the drift region 18. The trench portion penetrating the doping region is not limited to the one manufactured in the order of forming the doping region and then the trench portion. Even the one in which the doping region is formed between the trench portions after forming the trench portion is included in the one in which the trench portion penetrates the doping region.

[0085] The gate trench portion 40 has a gate trench provided on the front surface 21, a gate insulating film 42, and a gate conductive portion 44. The gate insulating film 42 is provided to cover the inner wall of the gate trench. The gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the gate trench. The gate conductive portion 44 is provided inside the gate insulating film 42 inside the gate trench. The gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10. The gate conductive portion 44 is formed of a conductive material such as polysilicon. The gate trench portion 40 is covered by the interlayer insulating film 38 on the front surface 21.

[0086] The gate conductive portion 44 includes a region facing the base region 14 adjacent on the mesa portion 71 side with the gate insulating film 42 interposed therebetween in the depth direction of the semiconductor substrate 10. When a predetermined voltage is applied to the gate conductive portion 44, a channel formed by an electron inversion layer is formed on the surface layer of the interface of the base region 14 in contact with the gate trench.

[0087] The dummy trench portion 30 may have the same structure as the gate trench portion 40. The dummy trench portion 30 has a dummy trench provided on the front surface 21 side, a dummy insulating film 32, and a dummy conductive portion 34. The dummy insulating film 32 is provided to cover the inner wall of the dummy trench. The dummy conductive portion 34 is provided inside the dummy trench and is provided inside the dummy insulating film 32. The dummy insulating film 32 insulates the dummy conductive portion 34 from the semiconductor substrate 10. The dummy trench portion 30 is covered by an interlayer insulating film 38 on the front surface 21.

[0088] The interlayer insulating film 38 is provided on the front surface 21. An emitter electrode 52 is provided above the interlayer insulating film 38. The interlayer insulating film 38 is provided with one or more contact holes 54 for electrically connecting the emitter electrode 52 and the semiconductor substrate 10. Similarly, the contact hole 55 and the contact hole 56 may also be provided penetrating the interlayer insulating film 38.

[0089] FIG. 1C is a diagram showing an example of the b-b' cross-section in FIG. 1A. The b-b' cross-section is an XY plane passing through the contact hole 54 along its longitudinal direction in the transistor portion 70.

[0090] In the transistor portion 70, the contact hole 54 and the trench contact portion 60 are provided extending in the extending direction. That is, in the transistor portion 70, the trench contact portion 60 in this example is arranged in a stripe shape along the gate trench portion 40 and the dummy trench portion 30.

[0091] In the transistor portion 70, the plug region 19 may be provided extending in the Y-axis direction. That is, in the transistor portion 70, the plug region 19 is provided extending along the lower end of the trench contact portion 60.

[0092] FIG. 1D is a diagram showing an example of the c-c' cross-section in FIG. 1A. The c-c' cross-section is an XY plane that passes through the contact hole 54 along its longitudinal direction in the diode section 80.

[0093] In the diode section 80, the contact hole 54 and the trench contact section 60 are provided extending in the Y-axis direction, similar to the transistor section 70. That is, in the diode section 80, the trench contact section 60 of this example is arranged in a stripe shape along the dummy trench section 30.

[0094] On the other hand, in the diode section 80, the plug regions 19 are provided discretely along the Y-axis direction. That is, in the diode section 80, a plurality of plug regions 19 are provided in a dot shape spaced apart from each other in the Y-axis direction. That is, the length of the plug region 19 provided in the transistor section 70 in the Y-axis direction is longer than the length of the plug region 19 provided in the diode section 80 in the Y-axis direction.

[0095] Also, in the diode section 80, the plug region 19 covers only a part of the lower end of the trench contact section 60 extending in the Y-axis direction. The portion where the plug region 19 is not provided at the lower end of the trench contact section 60 is in contact with the anode region 84. That is, at the lower end of the trench contact section 60, the anode region 84 and the plug region 19 are provided alternately along the Y-axis direction.

[0096] Thus, in this example, the trench contact section 60 is provided in both the transistor section 70 and the diode section 80. Thereby, compared with the case where the trench contact section 60 is provided only in the transistor section 70 and only the contact hole 54 is provided in the diode section 80, the number of processes is reduced.

[0097] Also, in the diode section 80, by providing the plug regions 19 discretely without extending them in the Y-axis direction, an increase in the doping concentration in the region where the anode region 84 is provided can be suppressed, and hole injection during reverse recovery can be suppressed.

[0098] FIG. 2 is a diagram showing a modified example of the a-a' cross section in FIG. 1A. The plug region 19 diffuses from the lower end of the trench contact portion 60 and covers at least a part of the side wall of the trench contact portion 60. The plug region 19 in this example is different from the example of FIG. 1B in that it is in contact with the emitter region 12 on the side wall of the trench contact portion 60 provided in the transistor portion 70. In this example, the side wall of the trench contact portion 60 provided in the transistor portion 70 is covered with the emitter region 12 and the plug region 19. That is, in the transistor portion 70, the trench contact portion 60 is not in contact with the base region 14.

[0099] In this example, in the transistor portion 70, since the emitter region 12 and the plug region 19 are in contact with each other, similar to the example of FIG. 1B, the injection of carriers from the emitter region 12 can be suppressed, and the breakdown tolerance can be improved. Further, even when a large current flows through the semiconductor device 100, the plug region 19 can improve the extraction efficiency of minority carriers and stabilize the potential of the base region 14.

[0100] In this example, in the diode portion 80, the trench contact portion 60 is provided only in the region where the plug region 19 is provided. That is, the lower end of the trench contact portion 60 is covered with the plug region 19 and is not in contact with the anode region 84.

[0101] In the semiconductor device 100 of this example, since the doping concentration of the anode region 84 is low, the depletion layer easily expands into the anode region 84 during reverse recovery. When the voltage between the anode and the cathode increases and the depletion layer reaches the lower end of the trench contact portion 60, since there are crystal defects due to etching at the lower end of the trench contact portion 60, breakdown is likely to occur.

[0102] In this example, since the lower end of the trench contact portion 60 is covered by the plug region 19, the depletion layer stops at the plug region 19 and does not reach the lower end of the trench contact portion 60. Thereby, destruction at the lower end of the trench contact portion 60 can be prevented.

[0103] FIG. 3A shows an example of a top view of the semiconductor device 100 according to Example 2. FIG. 3B is a view showing an example of a c-c' cross section in FIG. 3A. Since the structure of the transistor portion 70 of the semiconductor device 100 in this example is common to the semiconductor device 100 according to Example 1, the configuration of the diode portion 80 will mainly be described here. Also, since the a-a' cross section and the b-b' cross section in FIG. 3A are respectively common to the a-a' cross section and the b-b' cross section shown in FIGS. 1B and 1C, illustration thereof is omitted.

[0104] In the diode portion 80, the contact holes 54 are discretely provided in the Y-axis direction. That is, in the diode portion 80, a plurality of contact holes 54 are provided in a dot-like manner, spaced apart from each other in the Y-axis direction.

[0105] Similarly, in the diode portion 80, a plurality of trench contact portions 60 are discretely provided. That is, in the diode portion 80, a plurality of trench contact portions 60 are provided in a dot-like manner, spaced apart from each other in the Y-axis direction.

[0106] In the diode portion 80, the lower end of the trench contact portion 60 is covered by the plug region 19. The plug region 19 diffuses from the lower end of the trench contact portion 60 and covers at least a part of the side wall of the trench contact portion 60. The side wall of the trench contact portion 60 provided in the diode portion 80 is covered by the anode region 84 and the plug region 19. In the Y-axis direction, the length L1 of the trench contact portion 60 in this example is 0.6 μm to 50 μm, and the length L2 between adjacent trench contact portions 60 is 1 μm to 50 μm. The length referred to here may be the distance at the upper end of the trench contact portion 60, that is, on the front surface 21.

[0107] In the semiconductor device 100 of this example, since the doping concentration of the anode region 84 is low, the depletion layer easily expands into the anode region 84 during reverse recovery. When the voltage between the anode and the cathode increases and the depletion layer reaches the lower end of the trench contact portion 60, since there are crystal defects due to etching at the lower end of the trench contact portion 60, breakdown is likely to occur.

[0108] In this example, since the lower end of the trench contact portion 60 is covered by the plug region 19, the depletion layer stops at the plug region 19 and does not reach the lower end of the trench contact portion 60. Thereby, breakdown at the lower end of the trench contact portion 60 can be prevented.

[0109] As described above, in the diode portion 80, by discretely providing the trench contact portion 60 and the plug region 19, it is possible to suppress hole injection during reverse recovery and prevent breakdown at the lower end of the trench contact portion 60 without providing a lifetime control region on the front surface 21 side.

[0110] As described above, the present invention has been described using embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It is obvious to those skilled in the art that various changes or improvements can be made to the above embodiments. It is clear from the description of the claims that forms with such changes or improvements can also be included in the technical scope of the present invention.

[0111] It should be noted that the execution order of each process such as operations, procedures, steps, and stages in the devices, systems, programs, and methods shown in the claims, the specification, and the drawings is not explicitly stated as "earlier" or "preceding" etc., and unless the output of the previous process is used in the subsequent process, it can be realized in any order. Regarding the operation flow in the claims, the specification, and the drawings, even if it is described using "first," "next," etc. for convenience, it does not mean that it must be implemented in this order.

Explanation of Reference Numerals

[0112] 10 ··· semiconductor substrate, 12 ··· emitter region, 14 ··· base region, 15 ··· contact region, 16 ··· accumulation region, 17 ··· well region, 18 ··· drift region, 19 ··· plug region, 20 ··· buffer region, 21 ··· front surface, 22 ··· collector region, 23 ··· back surface, 24 ··· collector electrode, 25 ··· connection portion, 29 ··· extension portion, 30 ··· dummy trench portion, 31 ··· connection portion, 32 ··· dummy insulating film, 34 ··· dummy conductive portion, 38 ··· interlayer insulating film, 39 ··· extension portion, 40 ··· gate trench portion, 41 ··· connection portion, 42 ··· gate insulating film, 44 ··· gate conductive portion, 50 ··· gate metal layer, 52 ··· emitter electrode, 54 ··· contact hole, 55 ··· contact hole, 56 ··· contact hole, 60 ··· trench contact portion, 70 ··· transistor portion, 71 ··· mesa portion, 80 ··· diode portion, 81 ··· mesa portion, 82 ··· cathode region, 84 ··· anode region, 100 ··· semiconductor device

Claims

1. A semiconductor device comprising a semiconductor substrate having a diode section, wherein the diode section comprises a p-type anode region provided on the front surface of the semiconductor substrate, a trench section provided on the front surface of the semiconductor substrate and extending in a predetermined extending direction, a trench contact section provided on the front surface of the semiconductor substrate, and a p-type plug region provided at the lower end of the trench contact section and having a doping concentration higher than that of the anode region, and the plug regions are discretely provided along the extending direction.

2. The semiconductor device according to claim 1, wherein a plurality of the trench contact sections are discretely provided.

3. The semiconductor device according to claim 2, wherein the plug region is provided so as to cover the lower end of the trench contact section.

4. The semiconductor device according to claim 3, wherein in the extending direction, the length of the trench contact section is from 0.6 μm to 50 μm, and the distance between adjacent trench contact sections is from 1 μm to 50 μm.

5. The semiconductor device according to claim 1, wherein the trench contact section extends in the extending direction, and the anode region and the plug region are provided at the lower end of the trench contact section.

6. The semiconductor device according to claim 5, wherein at the lower end of the trench contact section, the anode region and the plug region are alternately provided along the extending direction.

7. The semiconductor device according to any one of claims 1 to 6, further comprising a transistor section having a p-type base region provided on the front surface of the semiconductor substrate, wherein the doping concentration of the anode region is lower than that of the base region.

8. The semiconductor device according to claim 7.

9. The transistor section further has an n-type emitter region provided on the front surface of the semiconductor substrate, wherein the lower end of the trench contact section is deeper than the lower end of the emitter region.

10. The semiconductor device according to claim 9, wherein the lower end of the trench contact section is located at a depth of from 0.35 μm to 0.6 μm from the front surface of the semiconductor substrate. The doping concentration of the anode region is 1E16 cm －３ or more and 1E17 cm －３ or less, and the doping concentration of the base region is 1E17 cm －３ or more and 1E18 cm －３ or less

11. The semiconductor device according to any one of claims 7 to 10, wherein the trench contact section is further provided in the transistor section.

12. ​ ​ ​ ​ ​ ​ ​ ​ ​ The plug region is further provided at the lower end of the trench contact portion of the transistor portion. In the extending direction, the length of the plug region of the transistor portion is longer than the length of the plug region of the diode portion. The semiconductor device according to claim 11.

13. The diode portion further has an accumulation region of a first conductivity type provided in the semiconductor substrate. The semiconductor device according to any one of claims 1 to 12.

14. The doping concentration of the plug region is 1E20 cm －３ or more and 1E21 cm －３ or less The semiconductor device according to any one of claims 1 to 13.

15. A lifetime control region including a lifetime killer is not provided on the front surface side of the semiconductor substrate. The semiconductor device according to any one of claims 1 to 14.

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