Wiring board

Abstract

To provide a wiring board that is capable of high-speed response and has high reliability.SOLUTION: A wiring board 100 includes a substrate 110, a plurality of wirings 130 on the substrate 110, an insulating structure 140 arranged between the wirings and including voids, an insulating layer 150 on the plurality of wirings 130 and the insulating structure 140, a diffusion prevention layer arranged between the plurality of wirings 130 and the insulating layer 150, and a wiring 160 arranged on the insulating layer 150, and the wiring 160 is electrically connected to the plurality of wirings 130 via an opening 150A formed in the insulating layer 150 and the diffusion prevention layer.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a wiring board and a method for manufacturing the wiring board.

Background Art

[0002] A three-dimensional mounting technology in which semiconductor elements including integrated circuits and high-frequency elements including RF (Radio Frequency) elements are vertically stacked is widely used. Further, in order to achieve a further high-speed response of each element, the development of miniaturization of wiring has been promoted.

[0003] On the other hand, as the wiring is miniaturized, adjacent wirings come closer to each other. For this reason, the parasitic capacitance between the wirings increases. As a result, signal delay occurs. As a technique for solving such a problem, an insulator having a low dielectric constant is used as disclosed in Patent Documents 1 to 3 and Non-Patent Document 1.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Patent Document 2

Patent Document 3

Non-Patent Documents

[0005]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] On the other hand, when using the above technology (especially the technology described in Patent Document 1), it is necessary to remove the sacrificial layer. In this case, an opening for removing the sacrificial layer must be provided on the low-dielectric-constant insulator. Also, if no opening is provided, it is necessary to allow the insulating layer to pass through, and there is a risk that the insulation resistance will not be sufficiently maintained. This may be a factor in reducing the reliability of the device.

[0007] In view of such problems, an object of the embodiments of the present disclosure is to provide a wiring board capable of high-speed response and having high reliability.

Means for Solving the Problems

[0008] According to an embodiment of the present disclosure, there are provided a substrate, a first wiring on the substrate, a second wiring disposed spaced apart from the first wiring, an insulating structure disposed between the first wiring and the second wiring and including voids, and an insulating layer on the first wiring, the second wiring, and the insulating structure, wherein at least one of the widths of the first wiring and the second wiring is 0.1 μm or more and 2 μm or less, the width of the insulating structure is 0.1 μm or more and 2 μm or less, and the aspect ratio of the insulating structure is 0.5 or more and 10 or less.

[0009] In the above wiring board, the insulating structure may be filled with a gas.

[0010] In the above wiring board, the side surfaces of the first wiring and the second wiring may have a vertical shape or an inverse taper shape.

[0011] In the above wiring board, the insulating layer may have a protrusion on the side where the first wiring and the second wiring are disposed.

[0012] In the above wiring board, the protrusion may be in contact with at least one of the side surfaces of the first wiring and the second wiring.

[0013] In the above wiring board, the insulating layer may be a silicide containing oxygen or nitrogen.

[0014] In the above wiring board, a diffusion prevention layer may be further included between the first wiring and the second wiring and the insulating layer.

[0015] In the above wiring board, the diffusion prevention layer may cover the upper surfaces and side surfaces of the first wiring and the second wiring.

[0016] In the above wiring board, a second diffusion prevention layer may be further included between the diffusion prevention layer and the insulating layer.

[0017] According to an embodiment of the present disclosure, a method for manufacturing a wiring board is provided, which includes preparing a substrate, forming a first wiring and a second wiring spaced apart from the first wiring on the substrate, and forming an insulating layer on the first wiring and the second wiring in a state where there is a space between the first wiring and the second wiring.

[0018] In the method for manufacturing the above wiring board, the first wiring and the second wiring may be formed by a plating method.

[0019] In the method for manufacturing the above wiring board, a diffusion prevention layer may be formed between the first wiring and the second wiring and the insulating layer.

[0020] In the method for manufacturing the above wiring board, the insulating layer is provided on a release layer provided on a first surface of a second substrate, the diffusion prevention layer and the insulating layer are joined, light is irradiated from a second surface side of the second substrate, the insulating layer is peeled off from the second substrate through the release layer, and the insulating layer may be formed.

[0021] In the method for manufacturing the above wiring board, plasma treatment may be performed on the surface of the diffusion prevention layer and the surface of the insulating layer before joining.

Advantages of the Invention

[0022] According to an embodiment of the present disclosure, a wiring board capable of high-speed response and having high reliability can be provided.

Brief Description of the Drawings

[0023]

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Mode for Carrying Out the Invention

[0024] Hereinafter, a wiring board and the like according to each embodiment of the present disclosure will be described in detail with reference to the drawings. Note that each of the embodiments described below is an example of an embodiment of the present disclosure, and the present disclosure is not construed as being limited to these embodiments. In the drawings referred to in the present embodiment, the same part or a part having the same function is denoted by the same reference numeral or a similar reference numeral (a reference numeral with -A1, -A2, etc. added after the number), and the repeated description thereof may be omitted. Further, the dimensional ratios in the drawings may be different from the actual ratios for convenience of explanation, or a part of the configuration may be omitted from the drawings.

[0025] <First Embodiment> (1-1. Configuration of Wiring Board) FIG. 1(A) shows a top view of the wiring board 100 and FIG. 1(B) shows a cross-sectional view of the wiring board 100 between A1 and A2. As shown in FIGS. 1(A) and 1(B), the wiring board 100 includes a substrate 110, an insulating layer 120, wirings 130, an insulating structure 140, an insulating layer 150, and wirings 160.

[0026] A high-resistance material is used for the substrate 110. For example, a non-alkali glass substrate is used for the substrate 110. Note that the substrate 110 is not limited to a quartz glass substrate, and in addition to glass substrates such as quartz glass substrates, soda glass substrates, and borosilicate glass substrates, sapphire substrates, silicon substrates, silicon carbide substrates, alumina (Al2O3) substrates, aluminum nitride (AlN) substrates, zirconia (ZrO2) substrates, resin substrates including acrylic or polycarbonate, or laminates of these substrates may be used. The thickness of the substrate 110 is not particularly limited, but may be appropriately set within the range of 100 μm or more and 700 μm or less. For example, the thickness of the substrate 110 can be 400 μm. Further, the substrate 110 may include wirings, through electrodes, transistors, and the like.

[0027] The insulating layer 120 is provided on the substrate 110. For example, inorganic insulating materials such as silicon oxide films, silicon nitride films, silicon oxynitride films, silicon carbonitride films, silicon oxycarbide films, and silicon oxyfluoride films are used for the insulating layer 120. Note that organic insulating materials such as acrylic resins, epoxy resins, and polyimide resins may be used for the insulating layer 120. Further, the insulating layer 120 may be included in the substrate 110.

[0028] A plurality of wirings 130 are provided on the insulating layer 120. Among the wirings 130, the wiring 130-1 (which may be referred to as the first wiring) is arranged separately from the wiring 130-2 (which may be referred to as the second wiring). Also, the wiring 130-2 is arranged separately from the wiring 130-3. When there is no need to separately describe the wiring 130-1, the wiring 130-2, and the wiring 130-3, they are described as the wiring 130. A low-resistance material is used for the wiring 130. For example, copper (Cu) is used for the wiring 130. Note that the wiring 130 is not limited to copper (Cu), and aluminum (Al), aluminum copper (AlCu), aluminum neodymium (AlNd), gold (Au), silver (Ag), nickel (Ni), or tin (Sn) may also be used.

[0029] A plurality of insulating structures 140 are arranged between the provided wirings 130. Specifically, the insulating structure 140 is arranged between the wiring 130-1 and the wiring 130-2. It is desirable that the relative permittivity of the insulating structure 140 is 1.5 or less, preferably about 1.0. The insulating structure 140 includes voids. Specifically, the insulating structure 140 may be filled with a gas that is a low-dielectric constant material. For example, the insulating structure 140 may be filled with air. Note that the insulating structure 140 is not limited to air, and in addition to oxygen and nitrogen, noble gases such as argon and helium may also be used, or it may be a vacuum.

[0030] In the above, it is preferable that the width of the wiring 130 is 0.1 μm or more and 2 μm or less. Also, it is preferable that the width of the region between the wiring 130-1 and the wiring 130-2 (that is, the insulating structure 140) is 0.1 μm or more and 2 μm or less. Also, it is preferable that the thickness of the wiring 130 is 0.1 μm or more and 2 μm or less. Further, it is preferable that the aspect ratio of the insulating structure 140 is 0.5 or more and 10 or less.

[0031] The insulating layer 150 is provided on the wiring 130 and the insulating structure 140. An inorganic insulating material is used for the insulating layer 150. For example, a silicon film containing oxygen or nitrogen is used for the insulating layer 120. Specifically, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon carbonitride film, a silicon oxycarbide film, a silicon oxyfluoride film, etc. are used as the insulating layer 120. Note that the insulating layer 150 may contain bubbles (also referred to as pores). Also, the film thickness of the insulating layer 150 is preferably 0.05 μm or more and 50 μm or less.

[0032] The wiring 160 is provided on the insulating layer 150. The wiring 160 is electrically connected to the wiring 130 through an opening 150A provided in the insulating layer 150. The same material as that of the wiring 130 may be used for the wiring 160.

[0033] Fig. 2 shows a cross-sectional view of a partially enlarged portion 100A of the wiring substrate 100. As shown in Fig. 2, the side surface 130-1S of the wiring 130-1 and the side surface 130-2S of the wiring 130-2 preferably have a vertical shape (Fig. 2(A)) or an inverse taper shape (Fig. 2(B)).

[0034] (1-2. Manufacturing method of the wiring substrate) Next, the manufacturing method of the wiring substrate 100 shown in Fig. 1 will be described with reference to Figs. 3 to 10.

[0035] As shown in Fig. 3, a substrate 110 having a first surface 110-1 and a second surface 110-2 facing the first surface 110-1 is prepared. For example, a non-alkali glass substrate or a silicon substrate is used for the substrate 110. Note that the substrate 110 does not have to be formed of a single material and may include transistors, wirings, and insulating layers. Also, the substrate 110 may include a through electrode. At this time, the through electrode may be appropriately connected to a wiring disposed on the second surface 110-2 side of the substrate 110.

[0036] Next, as shown in FIG. 4, an insulating layer 120 is formed on the first surface 110-1 of the substrate 110. The insulating layer 120 is formed using a chemical vapor deposition (CVD) method, a sputtering method, a printing method, or a coating method. For the insulating layer 120, an inorganic film such as silicon oxide or silicon nitride formed by a plasma CVD method may be used. Alternatively, for the insulating layer 120, an organic resin such as a polyimide resin, an acrylic resin, an epoxy resin, or a benzocyclobutene (BCB) resin may be used. Alternatively, for the insulating layer 120, in addition to the organic resin, an organic-inorganic hybrid resin containing silica may be used. For example, a silicon oxide film formed by a plasma CVD method may be used for the insulating layer 120. Note that the insulating layer 120 may be included in the substrate 110.

[0037] Next, wirings 130 are formed on the insulating layer 120 shown in FIG. 5. Note that among the wirings 130, the wirings 130-1, 130-2, and 130-3 are formed separately from each other. The wirings 130 are formed by an electroplating method, a sputtering method, a CVD method, a coating method, or a printing method. A low-resistance material is used for the wirings 130. For example, copper (Cu) is used for the wirings 130. Note that the wirings 130 are not limited to copper (Cu), and aluminum (Al), aluminum copper (AlCu), aluminum neodymium (AlNd), gold (Au), silver (Ag), nickel (Ni), or tin (Sn) may be used.

[0038] For example, when forming the wirings 130, the following method is used. First, as shown in FIG. 6, a thin film 131 of copper (Cu) is formed on the insulating layer 120 using a sputtering method.

[0039] Next, as shown in FIG. 7, after a resist film is formed on the thin film 131, a resist pattern 135 is formed by a photolithography method. At this time, it is desirable that the width of the resist pattern 135 is 0.1 μm or more and 2 μm or less. Also, it is preferable that the thickness of the resist pattern 135 is 0.1 μm or more and 2 μm or less.

[0040] Next, as shown in FIG. 8, wiring 130 is formed by an electrolytic plating method. Next, resist pattern 135 and thin film 131 under resist pattern 135 are removed. Thus, wiring 130 is formed. The above method is called a semi-additive method. Note that wiring 130 is not limited to the semi-additive method and may be formed by a damascene method. When a plating method including the semi-additive method and the damascene method is used for wiring 130, it is formed in accordance with the shape of resist pattern 135. At this time, since the side surface of resist pattern 135 has a vertical or forward taper shape, the side surface of wiring 130 can have a vertical shape or a reverse taper shape. Since wiring 130 has the above shape, it becomes easier to form subsequent insulating layer 150.

[0041] Next, as shown in FIG. 9, with a space 139 serving as insulating structure 140 between wiring 130-1 and wiring 130-2 and between wiring 130-2 and wiring 130-3, insulating layer 150 is formed on wiring 130-1 and wiring 130-2. Insulating layer 150 is preferably formed by a CVD method. Specifically, it is formed by a plasma CVD method using tetraethoxysilane (TEOS) and oxygen (O2). At this time, the gas flow rate of TEOS is preferably 20 sccm or more and 400 sccm or less, and the gas flow rate of O2 is preferably about 10 to 50 times the gas flow rate of TEOS. Specifically, the gas flow rate of O2 is preferably 400 sccm or more and 2000 sccm or less. Also, the formation temperature of insulating layer 150 is preferably 150°C or more and 400°C or less. Also, the pressure during the formation of insulating layer 150 is preferably 30 Pa or more and 150 Pa or less. Also, RF power (electric power) is applied to the substrate side, and the power at this time is preferably 300 W or more and 2000 W or less. By using the above method, gas is likely to stay in space 139. Therefore, insulating layer 150 can be formed while maintaining space 139. Also, at this time, insulating structure 140 is formed simultaneously with the formation of insulating layer 150.

[0042] In the above, it is not limited to oxygen, and oxidizing gases such as nitrous oxide (N2O) and ozone (O3) may be used. Also, it is not limited to TEOS, and silane (SiH4) may be used. Further, when forming the insulating layer 150, it is not limited to the plasma CVD method, and it may be formed by the ozone reaction CVD method or the thermal CVD method.

[0043] Next, as shown in FIG. 10, after forming the opening 150A in the insulating layer 150, the wiring 160 is formed on the wiring 130 and the insulating layer 150. The wiring 160 is formed by the same material and method as the wiring 130. By the above method, the wiring substrate 100 is manufactured.

[0044] FIG. 11 is a cross-sectional SEM photograph of the wiring substrate 100 manufactured using the above method. As shown in FIG. 11, the wiring substrate 100 has an insulating structure 140 composed of air between the wiring 130-1 and the wiring 130-2.

[0045] Here, it will be described while comparing with the manufacturing method of a conventional wiring substrate. FIGS. 26 and 27 are cross-sectional views showing the manufacturing method of a conventional wiring substrate. For the sake of explanation, the same reference numerals as those in the present embodiment may be used.

[0046] In the case of the manufacturing method of a conventional wiring substrate, as shown in FIG. 26(A), a sacrificial layer 345 is formed on the insulating layer 120 and between the plurality of wirings 330. The sacrificial layer 345 contains a material that vaporizes by heat treatment or a material that can be removed by a chemical solution. As shown in FIG. 26(B), it is necessary to remove the sacrificial layer 345 until the wiring 330 is exposed.

[0047] In the case of the conventional method for manufacturing a wiring board, as shown in FIG. 27(A), an insulating layer 350 is formed on the sacrificial layer 345 and the wiring 330. In this case, as shown in FIG. 27(B), in order to remove the sacrificial layer 345, it is necessary to provide an opening 351A in addition to the opening 350A in the insulating layer 350. Alternatively, when the opening 351A is not provided, it is necessary to make the insulating layer 350 a low-density film (for example, porous). Therefore, in the conventional method for manufacturing a wiring board, the manufacturing process may become long, or sufficient insulation resistance may not be obtained.

[0048] However, by using this embodiment, since there is no need to use a sacrificial layer, the manufacturing process for forming an insulating structure with a low relative permittivity is simplified. In addition, there is no need to make the insulating layer porous, and a dense insulating layer can be used, thereby enhancing the insulation resistance. That is, by using this embodiment, a wiring board capable of high-speed response and having high reliability can be provided.

[0049] <Second Embodiment> (2-1. Configuration of Wiring Board) Next, a wiring board having a different structure will be described. Note that the structures, materials, and methods described in the first embodiment are incorporated by reference.

[0050] FIGS. 12 to 14 show enlarged cross-sectional views of a part of a wiring board 100-1, a wiring board 100-2, and a wiring board 100-3. As shown in FIG. 12, in the wiring board 100-1, the insulating layer 150 has a protrusion 151 on the side where the wirings 130-1 and 130-2 are arranged. The side surface 151S of the protrusion 151 may be linear as shown in FIG. 12(A), convex as shown in FIG. 12(B), or concave as shown in FIG. 12(C). Further, the protrusion 151 may be in contact with the side surface 130-1S of the wiring 130-1.

[0051] Also, as shown in FIGS. 13(A), 13(B), and 13(C), in the wiring board 100-2, the protruding portion 151 may be provided so as to be in contact with the side surface 130-1S of the wiring 130-1 and the side surface 130-2S of the wiring 130-2.

[0052] Also, as shown in FIG. 14, in the wiring board 100-3, either the side surface 130-1S of the wiring 130-1 or the side surface 130-2S of the wiring 130-2 may have the protruding portion 151 in a state having an inverse taper shape.

[0053] FIG. 15 is a cross-sectional view of the actually manufactured wiring board 100-1. As shown in FIG. 15, the wiring board 100-1 has an insulating structure 140 composed of air between the wirings 130-1 and 130-2, and the insulating layer 150 has the protruding portion 151. The insulating layer 150 is in contact with the side surface 130-2S of the wiring 130-2.

[0054] By using this embodiment, the adhesion between the wiring 130 and the insulating layer 150 can be enhanced. Thereby, a wiring board capable of high-speed response and having high reliability can be provided.

[0055] <Third Embodiment> (3-1. Configuration of Wiring Board) Next, a wiring board having a different structure will be described. Note that the structures, materials, and methods shown in the first embodiment and the second embodiment are incorporated by reference.

[0056] FIG. 16 is a cross-sectional view of the wiring board 100-4. The wiring board 100-4 includes a diffusion prevention layer 170 and an insulating layer 180 in addition to the substrate 110, the insulating layer 120, the wiring 130, the insulating structure 140, the insulating layer 150, and the wiring 160.

[0057] The diffusion prevention layer 170 is disposed between the wiring 130 (for example, the wirings 130-1 and 130-2) and the insulating layer 150. Also, as shown in FIG. 16, the diffusion prevention layer 170 may cover the upper surface and the side surface of the wiring 130.

[0058] The diffusion prevention layer 170 has a function of preventing the diffusion of metal. For example, a silicon nitride (SiNx) film, silicon carbide (SiC), silicon carbonitride (SiCN), or the like is used for the diffusion prevention layer 170.

[0059] (3-2. Manufacturing method of wiring board) Next, the manufacturing method of the wiring board 100-4 is shown in FIGS. 17 to 21.

[0060] First, as shown in FIG. 17, after forming the insulating layer 120 and the wiring 130 on the first surface 110-1 side of the substrate 110, a diffusion prevention layer 170 is formed on the insulating layer 120 and the wiring 130. The diffusion prevention layer 170 is formed by a plasma CVD method, a thermal CVD method, a sputtering method, or a vapor deposition method. In addition to silicon nitride (SiNx), titanium, tantalum, titanium nitride (TiNx), tantalum nitride (TaNx), or the like may be used for the diffusion prevention layer 170. For example, a silicon nitride film formed by a plasma CVD method is used for the diffusion prevention layer 170.

[0061] Also, as shown in FIG. 17, the insulating layer 150 may be provided on a substrate 200 different from the substrate 110. At this time, an insulating layer 180 and a release layer 190 are provided between the substrate 200 and the insulating layer 150 (that is, on the first surface 200-1 side of the substrate 200). An organic resin such as polyimide is used for the insulating layer 180. An organic resin material containing a polymer is used for the release layer 190. Note that when the insulating layer 180 is polyimide, the insulating layer 180 may be used as the release layer.

[0062] Next, as shown in FIG. 18, plasma treatment 210 is performed on the surface of the insulating layer 150 and the surface of the diffusion prevention layer 170. For example, as the plasma treatment, plasma treatment using argon (Ar) gas may be performed. By performing the plasma treatment, the surfaces of the insulating layer 150 and the diffusion prevention layer 170 can be modified and activated. Note that the plasma treatment may be performed on either the insulating layer 150 or the diffusion prevention layer 170. Also, in addition to argon (Ar), N 2Plasma treatment may be performed using a gas such as O.

[0063] Next, as shown in FIG. 19, the insulating layer 150 and the diffusion prevention layer 170 are joined. At this time, room temperature joining, heat joining, or joining under vacuum may be performed. Si, O, H, N, etc. present at the joining interface contribute to the bonding, and the joining is performed.

[0064] Next, as shown in FIG. 20, laser light 220 is irradiated from the second surface 200-2 side of the substrate 200. The wavelength of the laser light 220 is not limited, but when an organic resin material such as polyimide is used for the insulating layer 180, the absorption is maximum for light with a wavelength of 308 nm in the ultraviolet region, and light with a wavelength of 350 nm or more is not absorbed.

[0065] For example, when laser light with a wavelength of 308 nm is irradiated onto the polyimide film that is the peeling layer 190 and the insulating layer 180, a part of the peeling layer 190 and the insulating layer 180 evaporates (sublimes) due to the energy of the absorbed light. As a result, as shown in FIG. 21, the insulating layer 150 and the insulating layer 180 are peeled off from the substrate 200 via the peeling layer 190. As described above, a diffusion prevention layer 170 is formed between the wiring 130 and the insulating layer 150, and an insulating structure 140 can be formed in the space of the wiring 130. Further, by forming the wiring 160, the wiring substrate 100-4 is manufactured.

[0066] By using this embodiment, metal diffusion can be prevented, and thus a wiring substrate having higher reliability and capable of high-speed response can be provided.

[0067] <Fourth Embodiment> In this embodiment, a semiconductor device including the wiring substrate 100 described in the first embodiment will be described.

[0068] FIG. 22 is a cross-sectional view of the semiconductor device 500. As shown in FIG. 22, the semiconductor device 500 includes a circuit element 600, a chip-sized semiconductor element 670 including transistors, an interposer 700, and a package substrate 800. The semiconductor element 670 has a function as a central processing unit (CPU) or a function as a storage device. The circuit element 600 is used for noise cancellation applications or signal filters. The interposer 700 has a function of relaying between the package substrate 800 and the semiconductor element 670 and the circuit element 600. A wiring substrate 100 may be provided for the circuit element 600, the semiconductor element 670, and the interposer 700. The circuit element 600 and the semiconductor element 670 and the interposer 700 are electrically connected using gold bumps 690 or the like. Also, between the circuit element 600 and the semiconductor element 670 may be sealed with a molding resin. Also, the interposer 700 and the package substrate 800 are connected using solder bumps 750 containing tin, silver, or the like. Also, the gap between the interposer 700 and the package substrate 800 may be sealed by filling with an underfill resin.

[0069] <Fifth Embodiment> In this embodiment, an example in which the semiconductor device 500 described in the fourth embodiment is applied to an electric device will be described.

[0070] FIG. 23 is a diagram for explaining an electric device. The above-described semiconductor device 500 is mounted on various electric devices such as, for example, a mobile terminal (mobile phone, smartphone, notebook personal computer, game device, etc.), an information processing device (desktop personal computer, server, car navigation, etc.), a household electric appliance (microwave oven, air conditioner, washing machine, refrigerator), an automobile, etc. FIG. 23(A) is a smartphone 4000. FIG. 23(B) is a portable game machine 5000. FIG. 23(C) is a notebook personal computer 6000.

[0071] In these electrical devices, the semiconductor device 500 including the circuit element 600 and the semiconductor element 670 can have functions such as a noise filter, a signal filter, and a control unit composed of a CPU or the like that executes an application program to realize various functions.

[0072] <Modification Example> In the third embodiment of the present disclosure, an example in which the diffusion prevention layer 170 covers the upper surface and the side surface of the wiring 130 has been described, but the present disclosure is not limited thereto. A cross-sectional view of the wiring board 100-5 is shown in FIG. 24, and a cross-sectional view of the wiring board 100-6 is shown in FIG. 25. As shown in FIG. 24, in addition to the substrate 110, the insulating layer 120, the wiring 130, the insulating structure 140, the insulating layer 150, and the wiring 160, the wiring board 100-5 has a diffusion prevention layer 171. The same material as that of the diffusion prevention layer 170 is used for the diffusion prevention layer 171. The diffusion prevention layer 171 may be disposed between the wiring 130 and the insulating layer 150 and may be disposed so as to overlap the insulating layer 150. Further, as shown in FIG. 25, in addition to the substrate 110, the insulating layer 120, the wiring 130, the insulating structure 140, the insulating layer 150, and the wiring 160, the wiring board 100-6 includes a diffusion prevention layer 170 and a diffusion prevention layer 171 (also referred to as a second diffusion prevention layer). The diffusion prevention layer 171 may be disposed between the diffusion prevention layer 170 and the insulating layer. Thereby, the diffusion prevention effect of the metal is further enhanced. Therefore, it is possible to provide a wiring board capable of high-speed response and having high reliability.

[0073] In the third embodiment of the present disclosure, an example of peeling by irradiating laser light has been shown, but the present disclosure is not limited thereto. For example, it may be physically peeled or peeled by chemical solution treatment or the like.

Description of Reference Numerals

[0074] 100... wiring substrate, 110... substrate, 120... insulating layer, 130... wiring, 131... thin film, 135... resist pattern, 139... space, 140... insulating structure, 150... insulating layer, 160... wiring, 170... diffusion prevention layer, 171... diffusion prevention layer, 180... insulating layer, 190... peeling layer, 200... substrate, 210... plasma, 220... laser beam, 330... wiring, 345... sacrificial layer, 350... insulating layer, 500... semiconductor device, 600... circuit element, 670... semiconductor element, 690... gold bump, 700... interposer, 750... bump, 800... package substrate, 4000... smartphone, 5000... portable game console, 6000... notebook personal computer

Claims

1. A substrate; A first wiring on the substrate; a second wiring arranged apart from the first wiring; an insulating structure including a gap, the insulating structure being disposed between the first wiring and the second wiring; an insulating layer on the first wiring, the second wiring, and the insulating structure; a diffusion prevention layer disposed between the first wiring, the second wiring, and the insulating layer; an upper wiring disposed on the insulating layer; the first wiring and the second wiring have an inverse tapered shape; the upper wiring is electrically connected to the first wiring and the second wiring through openings formed in the insulating layer and the diffusion prevention layer; Wiring board.

2. the first wiring and the second wiring have an inverse tapered shape; The wiring board according to claim 1 .

3. a second insulating layer having a flat portion on the substrate; the first wiring, the second wiring, and the insulating structure are provided on the flat portion of the second insulating layer; The wiring board according to claim 1 .

4. the insulating structure is gas-filled; The wiring board according to claim 1 .

5. The insulating layer is a silicide containing oxygen or nitrogen. The wiring board according to claim 1 .

6. the diffusion prevention layer covers upper surfaces and side surfaces of the first wiring and the second wiring; The wiring board according to claim 1 .

7. a second diffusion prevention layer between the diffusion prevention layer and the insulating layer; The wiring board according to claim 1 .

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