Display panel

Abstract

The present application provides a display panel comprising a substrate, a thin film transistor layer located on the substrate, and an auxiliary layer located between the substrate and the thin film transistor layer, the auxiliary layer comprising a first auxiliary layer and a second auxiliary layer located at least on a side of the first auxiliary layer closer to the substrate, the dielectric constant of a constituent material of the first auxiliary layer being smaller than the dielectric constant of a constituent material of the substrate and larger than the dielectric constant of a constituent material of the second auxiliary layer, and the second auxiliary layer comprising a plurality of auxiliary portions arranged at intervals.

Description

Technical Field

[0001] This application relates to the field of display technologies, and more particularly to the manufacture of display devices, and specifically to display panels.

Background Art

[0002] The assembly structure of an OLED (Organic Light Emitting Diode) panel is simple, with low production costs, energy-saving, and has bendable characteristics, and its scope of application is extremely wide.

[0003] Currently, OLED panels achieve bendable characteristics through flexible substrates. A large number of polarized charges existing in the flexible substrates are very easily polarized to form a large number of polarized charges, which cause a polarization effect on the active layer of the transistors in the pixel circuit, reducing the reliability of transistor operation and degrading the display screen quality of the OLED panel.

[0004] Therefore, the reliability of the transistors in the pixel circuit of conventional OLED panels is low and needs to be improved urgently.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The objective of this application is to provide a display panel that solves the problem of low reliability of transistors in the pixel circuit of a flexible substrate in a conventional OLED panel due to the polarization effect on the active layer of the transistors.

Means for Solving the Problems

[0006] The embodiments of this application include a substrate, a thin film transistor layer located on the substrate and including a plurality of transistors, and an auxiliary layer located between the substrate and the thin film transistor layer. The auxiliary layer includes a first auxiliary layer and a second auxiliary layer located at least on the side of the first auxiliary layer closer to the substrate. The second auxiliary layer includes a plurality of auxiliary portions, and there is a gap between two adjacent auxiliary portions. A display panel is provided in which the dielectric constant of the constituent material of the first auxiliary layer is smaller than the dielectric constant of the substrate and larger than the dielectric constant of the constituent material of the second auxiliary layer.

Effect of the Invention

[0007] This application includes a substrate, a thin film transistor layer located on the substrate and including a plurality of transistors, and an auxiliary layer located between the substrate and the thin film transistor layer. The auxiliary layer includes a first auxiliary layer and a second auxiliary layer located at least on the side of the first auxiliary layer closer to the substrate. The second auxiliary layer includes a plurality of auxiliary portions, and there is a gap between two adjacent auxiliary portions. A display panel is provided in which the dielectric constant of the constituent material of the first auxiliary layer is smaller than the dielectric constant of the substrate and larger than the dielectric constant of the constituent material of the second auxiliary layer. By providing a first auxiliary layer with a dielectric constant smaller than that of the substrate, this application reduces the influence on the movement of charges in the active layer, and further provides a second auxiliary layer with an even smaller dielectric constant. However, since the second auxiliary layer includes a plurality of auxiliary portions arranged at intervals, the influence on the movement of charges in the active layer can be further reduced.

Brief Description of the Drawings

[0008] The present application will be further described below with reference to the drawings. As necessary for the description, the drawings described below are only for explaining some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative efforts.

[0009]

Figure 1

Figure 2

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Figure 4

Embodiments for Carrying Out the Invention

[0010] Hereinafter, in conjunction with the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and thoroughly described. It is obvious that the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present application.

[0011] In the description of the present application, it should be understood that the orientation or positional relationship indicated by technical terms such as "upper", "lower", "close to", "far from", "both ends", etc. is based on the orientation or positional relationship shown in the drawings. For example, "upper" simply means that the surface is on the object, specifically, it may refer to directly above, diagonally above, or the upper surface, as long as the object is above the horizontal. "Both ends" refers to two opposite positions of the object that can be embodied in the figure, and the two positions may be in direct or indirect contact with the object. The above orientation or positional relationship is only for the purpose of the description of the present application and for simplifying the description, and does not indicate or imply that the mentioned device or member must have a specific orientation and be configured and operated in a specific orientation, and should not be understood as limiting the present application.

[0012] Furthermore, it should be further explained that the drawings only provide structures and steps closely related to the present application, and some details not very related to the present application are omitted. The purpose is to simplify the drawings and make the present application clear at a glance, and it does not mean that the actual device and method are exactly the same as the drawings, nor does it limit the actual device and method.

[0013] The present application provides a display panel, and the display panel includes, but is not limited to, the following embodiments and combinations between the following embodiments.

[0014] In one embodiment, as shown in FIGS. 1 and 2, the display panel 100 includes a substrate 10, a thin film transistor layer located on the substrate 10 and including a plurality of transistors 20, and an auxiliary layer located between the substrate 10 and the thin film transistor layer. The auxiliary layer includes a first auxiliary layer 30 and a second auxiliary layer 40 located at least on the side of the first auxiliary layer 30 close to the substrate 10. The second auxiliary layer 40 includes a plurality of auxiliary portions 401, and there is a gap between two adjacent auxiliary portions 401. The dielectric constant of the constituent material of the first auxiliary layer 30 is smaller than the dielectric constant of the constituent material of the substrate 10 and larger than the dielectric constant of the constituent material of the second auxiliary layer 40.

[0015] The constituent material of the substrate 10 may include polyimide. Further, as shown in FIGS. 1 and 2, the substrate 10 may include a first substrate 101, a second substrate 102 located near the thin film transistor layer of the first substrate 101, and a first buffer layer 103 located between the first substrate 101 and the second substrate 102. The constituent materials of the first substrate 101 and the second substrate 102 may include polyimide, and the constituent material of the first buffer layer 103 may include at least one of silicon oxide and silicon nitride. For example, the first buffer layer 103 made of silicon oxide has a water absorption and heat preservation effect and can extend the life of the display panel 100.

[0016] Specifically, as shown in FIGS. 1 and 2, the transistor 20 may include an active layer 201, a gate layer 202 located on the side of the active layer 201 away from the substrate 10, and a source-drain layer located on the side of the gate layer 202 away from the substrate 10. The source-drain layer may include a source portion 203 provided opposite to and electrically connected to one end of the active layer 201, and a drain portion 204 provided opposite to and electrically connected to one end of the active layer 201. Further, the display panel 100 may further include a first insulating layer 205 located between the active layer 201 and the gate layer 202 and covering the active layer 201, a second insulating layer 206 covering the side of the gate layer 202 away from the substrate 10, a metal layer 207 located on the side of the second insulating layer 206 away from the substrate 10, and an interlayer dielectric layer 208 located between the metal layer 207 and the source-drain layer and covering the metal layer 207.

[0017] The constituent material of the active layer 201 may include at least one of amorphous silicon and polysilicon. The polysilicon may include low-temperature polysilicon. Further, the constituent material of the active layer 201 may further include an oxide. Understandably, for example, manufacturing the active layer 201 by low-temperature polysilicon technology can provide high electron mobility. Thus, when the transistor 20 charges the corresponding pixel, a large driving current is generated, and the charging speed can be improved. For example, the active layer 201 manufactured by amorphous silicon or an oxide has a low leakage current, and it can prevent the leakage current of the transistor 20 under exposure from interfering with the signal. Specifically, for example, when the constituent material of the active layer 201 includes amorphous silicon, both ends electrically connected to the source-drain layer of the active layer 201 may form two doping regions by doping particles. The doping particles may include phosphorus ions, and the concentration of the doping particles in the doping region may be set according to the actual situation. For example, when the constituent material of the active layer 201 includes an oxide, it is possible to avoid forming a doping region by setting doping particles.

[0018] Furthermore, in combination with the above description, as shown in FIGS. 1 and 2, the source-drain layer can be extended to the active layer 201 and electrically connected by via holes penetrating through the interlayer dielectric layer 208, the second insulating layer 206, and a part of the first insulating layer 205. Specifically, the first via hole communicates with the side away from the substrate 10 at one end of the active layer 201 and the side away from the substrate 10 of the interlayer dielectric layer 208. The second via hole communicates with the side away from the substrate 10 at the other end of the active layer 201 and the side away from the substrate 10 of the interlayer dielectric layer 208. The source portion 203 is filled in the first via hole and extends to the side away from the substrate 10 of the interlayer dielectric layer 208. The drain portion 204 is filled in the second via hole and extends to the side away from the substrate 10 of the interlayer dielectric layer 208. The metal layer 207 is provided opposite to the gate layer 202 and can form a capacitance in the corresponding pixel circuit.

[0019] Specifically, the constituent materials of the first insulating layer 205, the second insulating layer 206, and the interlayer dielectric layer 208 may include at least one of an inorganic dielectric material and an organic dielectric material. The inorganic dielectric material may be silicon oxide, silicon nitride, or silicon oxynitride. The organic dielectric material may be a polyimide-based resin, an epoxy-based resin, or an acrylic-based resin material. Specifically, the constituent materials of the gate layer 202, the metal layer 207, and the source-drain layer may include at least one of conductive materials such as metal, metal oxide, metal nitride, and metal oxynitride. The metal may be copper, aluminum, molybdenum, or titanium.

[0020] It should be noted that when FIGS. 1 and 2 are combined, a large number of polarized charges existing in the substrate 10 are very easily affected by external influences or the internal electric field of the display panel 100 and polarized to form a large number of polarized charges. When the auxiliary layer is not provided, a large number of polarized charges located on the side of the substrate 10 close to the thin-film transistor layer of the substrate 10 in the substrate 10 cause a polarization effect on the active layer 201, and the movement of charges in the active layer 201 is affected, reducing the reliability of the operation of the transistor 20.

[0021] It is understandable that the dielectric constant of the constituent material of the first auxiliary layer 30 in this embodiment is smaller than that of the substrate 10. As can be seen from the law that "the greater the dielectric constant, the easier it is for polarization to occur", the first auxiliary layer 30 is less likely to be polarized with respect to the substrate 10. Therefore, a large number of polarized charges are formed on the substrate 10. Even if there is an influence of an electric field inside the display panel 100, the number of polarized charges formed by the polarization of the first auxiliary layer 30 located between the substrate 10 and the transistor 20 can still be much smaller than the number of polarized charges formed by the polarization of the substrate 10 when the first auxiliary layer 30 is not provided. Thus, the influence of the charge movement in the active layer 201 can be reduced, and the operation reliability of the transistor 20 can be improved.

[0022] Furthermore, the dielectric constant of the constituent material of the second auxiliary layer 40 in this embodiment is smaller than that of the constituent material of the first auxiliary layer 30. For the same reason, according to the above analysis, the number of polarized charges formed by the polarization of the second auxiliary layer 40 located closer to the substrate 10 of the first auxiliary layer 30 can still be much smaller than the number of polarized charges formed by the polarization of the first auxiliary layer 30 when the second auxiliary layer 40 is not provided. Therefore, the influence of the charge movement in the active layer 201 can be further reduced, and the operation reliability of the transistor 20 can be further improved.

[0023] In this embodiment, by providing the second auxiliary layer 40 to be composed of a plurality of auxiliary portions 401 arranged at intervals, it is possible to avoid the second auxiliary layer 40 completely covering the substrate 10. When at least one of the situations that the display panel 100 includes a photosensitive element located below the auxiliary layer or below the substrate 10, and the display panel 100 is a bottom emission display device exists, the installation method of the second auxiliary layer 40 can guarantee the transmittance of the display panel 100 and avoid blocking a lot of light, thereby improving at least one of the luminance of the display panel 100 and the operation reliability of the photosensitive element. This embodiment does not limit the shape and size of the auxiliary portion 401.

[0024] It should be noted that although the dielectric constant of the constituent material of the second auxiliary layer 40 is small, its transmittance is generally small compared to that of the first auxiliary layer 30. That is, the second auxiliary layer 40 can further weaken the polarization phenomenon in the active layer 201, but there is a drawback of low transmittance. However, when combined with the above description, in this embodiment, the second auxiliary layer 40 is provided to be composed of a plurality of auxiliary portions 401 arranged at intervals. Based on the fact that "the dielectric constant of the constituent material of the second auxiliary layer 40 is small", the first auxiliary layer 30 with a high transmittance of the constituent material is filled between two adjacent auxiliary portions 401. By combining these, it is possible to avoid the transmittance on a certain plane of the second auxiliary layer 40 being too small.

[0025] In one embodiment, the first auxiliary layer 30 fills the gap. As can be seen from combining the above description, this embodiment provides a gap and fills the gap with the first auxiliary layer 30 having a high transmittance, thereby effectively improving the transmittance of the display panel 100. On the other hand, based on the plurality of gaps, the plurality of auxiliary portions 401 cannot be provided to overlap with the substrate 10, so they cannot act on the entire substrate 10. Therefore, in this embodiment, the gap is filled by the first auxiliary layer 30 whose dielectric constant is smaller than that of the substrate, and it acts on the substrate 10. When combined with the above description, that is, the number of polarization charges formed by polarizing the first auxiliary layer 30 can still be much less than the number of polarization charges formed by polarizing the substrate 10 when the first auxiliary layer 30 is not provided, based on the action of the second auxiliary layer 40 on the substrate 10, the influence of the first auxiliary layer 30 on the movement of charges in the active layer 201 can be further reduced.

[0026] In one embodiment, the second auxiliary layer 40 is a conductor. Understandably, the dielectric constant of a conductor is close to 0. Combining the above description, the influence of the charge movement in the active layer 201 can be significantly reduced. On the other hand, the resistivity of a conductor is small, and current is easily conducted. There are a large number of freely movable charged particles in the conductor, which attracts the polarization charges formed by the polarization of the first auxiliary layer 30 with a relatively large dielectric constant, and can equalize the distribution of the positively charged polarization charges and the negatively charged polarization charges. Furthermore, the positively charged polarization charges and the negatively charged polarization charges can be recombined to reduce the number of polarization charges and weaken the directionality of polarization, and similarly, the influence of the charge movement in the active layer 201 can be significantly reduced.

[0027] The constituent material of the second auxiliary layer 40 may include a metal conductor. The conductivity of a metal conductor is usually greater than that of other conductor materials. The resistivity of a metal conductor generally decreases with a decrease in temperature. At extremely low temperatures, the resistivity of a specific metal conductor and alloy disappears and becomes a "superconductor", and the influence of the charge movement in the active layer 201 can be further reduced. Specifically, the metal conductor in this embodiment may include, but is not limited to, indium tin oxide, silver alone, molybdenum alone, aluminum alone, graphene, superconducting metal, superconducting alloy. Understandably, the metal conductors listed above have a high transmittance so as to avoid significantly reducing the transmittance of the display panel 100 compared to other metal conductors, and have a small elastic modulus to meet the stress and strain requirements required by the display panel 100.

[0028] In one embodiment, as shown in FIGS. 1 and 2, the plurality of auxiliary portions 401 are uniformly arranged and directly contact the substrate surface. It can be understood that, combining the above description, the number of polarized charges formed by polarizing the second auxiliary layer 40 is extremely small, and the second auxiliary layer 40 is provided near the active layer 201, that is, each auxiliary portion 401 can weaken the polarization effect on the active layer 201 at the corresponding position on the substrate 10 and the corresponding position on the first auxiliary layer 30. Therefore, the plurality of auxiliary portions 401 arranged uniformly can equalize the regions where the influence of the charge movement in the active layer 201 is weakened, and further optimize the method of weakening the influence of the charge movement in the active layer 201. On the other hand, the plurality of auxiliary portions 401 arranged uniformly can equalize the arrangement of the corresponding plurality of gaps, thereby equalizing the transmittance of each region in the display panel 100 and optimizing the method of improving the transmittance of the display panel 100.

[0029] Furthermore, when the second auxiliary layer 40 is a conductor, in this embodiment, the plurality of auxiliary portions 401 arranged uniformly can equalize the regions for attracting the polarized charges of the first auxiliary layer 30 in the second auxiliary layer 40, thereby further equalizing the charge distribution of the first auxiliary layer 30. At the same time, the regions for recombining the polarized charges of the first auxiliary layer 30 in the second auxiliary layer 40 can be further equalized to further weaken the directionality of the polarization of the first auxiliary layer 30. Therefore, this embodiment can further significantly reduce the influence of the charge movement in the active layer 201.

[0030] In one embodiment, the first auxiliary layer 30 covers the side of the plurality of auxiliary portions 401 close to the thin film transistor layer. Specifically, in this embodiment, the side of the plurality of auxiliary portions 401 close to the first auxiliary layer 30 is wrapped within the first auxiliary layer 30. Based on the fact that the plurality of auxiliary portions 401 are formed on the substrate 10, in a situation where the surface area of the auxiliary portion 401 can be made constant, any other surface of the auxiliary portion 401 that does not contact the substrate 10 is brought into contact with the first auxiliary layer 30, so as to fully act on the polarized charges in the first auxiliary layer 30, reduce the number of polarized charges, and reduce the influence on the movement of charges in the active layer 201. Furthermore, combining the above description, the first auxiliary layer 30 can cover the plurality of auxiliary portions 401 and fill the gap between two adjacent auxiliary portions 401, and further directly contact the surface of the substrate 10.

[0031] In one embodiment, as shown in FIGS. 1 and 2, the side of the auxiliary portion 401 close to the first auxiliary layer 30 includes at least one of a convex portion and a concave portion. Specifically, the side of the auxiliary portion 401 close to the first auxiliary layer 30 shows a non-flat state. Combining the above description, the shape of the side of the first auxiliary layer 30 close to the second auxiliary layer 40 and the shape of the side of the plurality of auxiliary portions 401 close to the first auxiliary layer 30 are compatible, that is, the side of the first auxiliary layer 30 close to the second auxiliary layer 40 also includes at least one of a convex portion and a concave portion. It can be understood that the side of the auxiliary portion 401 close to the first auxiliary layer 30 in this embodiment presents a convex shape, and the shapes of the sides close to each other of the two are compatible, that is, the area where the second auxiliary layer 40 containing a very small number of polarized charges contacts the first auxiliary layer 30 is large, the ratio that can act on the charges in the first auxiliary layer 30 is large, correspondingly, the number of charges that can be polarized by the substrate 10 in the first auxiliary layer 30 is small, and the polarization effect on the active layer 201 can be reduced.

[0032] Furthermore, when the second auxiliary layer 40 is a conductor, in this embodiment, the second auxiliary layer 40 and the first auxiliary layer 30 have a large area and are arranged opposite each other, which increases the area of ​​the region in the second auxiliary layer 40 for attracting the polarization charge of the first auxiliary layer 30, and further enhances the uniformizing effect of the charge distribution of the first auxiliary layer 30. At the same time, the area of ​​the region in the second auxiliary layer 40 for recombining the polarization charge of the first auxiliary layer 30 is increased, and the polarization directionality of the first auxiliary layer 30 is further weakened. Therefore, this embodiment can further significantly reduce the influence of charge movement in the active layer 201.

[0033] The auxiliary portion 401 of the first auxiliary layer 30 away from the substrate 10 From the surface corresponding to the auxiliary portion 401 of the first auxiliary layer 30 The substrate 10 close to The first distance to the surface corresponds to the gap of the first auxiliary layer 30. away from the substrate 10 From the surface corresponding to the gap of the first auxiliary layer 30 It can be understood that, combining the above description, the first auxiliary layer 30 further includes a plurality of transistors, and in this embodiment, the first distance is limited to be greater than the second distance, so that the side of the first auxiliary layer 30 close to the thin film transistor layer can be planarized to form a stable plurality of transistors later, and the yield of the manufacturing process can be improved, and the side of the first auxiliary layer 30 close to the thin film transistor layer can be parallel to the substrate 10.

[0034] In one embodiment, the thickness of the first auxiliary layer 30 is less than 10 Å. It can be understood that the function of the first auxiliary layer 30 is to reduce the effect of the polarization charge in the substrate 10 on the charge movement in the active layer 201, and it is not desirable for the thickness of the first auxiliary layer 30 to be large. Therefore, in this embodiment, the thickness of the first auxiliary layer 30 is limited to be less than 10 Å, so as to maintain the function of the first auxiliary layer 30 and at the same time avoid the thickness of the first auxiliary layer 30 being too large, which increases the thickness of the display panel 100 or affects the stress of the display panel 100. Of course, the thickness of the auxiliary part 401 may be greater than the thickness of the first auxiliary layer 30.

[0035] In one embodiment, as shown in FIG. 2, the second auxiliary layer 40 is further located on the side of the first auxiliary layer 30 away from the substrate 10. A plurality of the auxiliary portions 401 in the second auxiliary layer 40 located on the side of the first auxiliary layer 30 away from the substrate 10 and a plurality of the auxiliary portions 401 in the other second auxiliary layer 40 located on the side of the first auxiliary layer 30 close to the substrate 10 correspond to each other one by one. Two of the auxiliary portions 401 corresponding to each other one by one are provided opposite to each other.

[0036] Specifically, after the first auxiliary layer 30 is formed, although not limited, a plurality of concave grooves may be formed by a photolithography process. The plurality of concave grooves correspond to a plurality of the auxiliary portions 401 in the second auxiliary layer 40 located on the side of the first auxiliary layer 30 close to the substrate 10 one by one. Further, although not limited, a plurality of the auxiliary portions 401 may be formed in the plurality of concave grooves by a physical vapor deposition method to constitute the other second auxiliary layer 40 located on the side of the first auxiliary layer 30 close to the substrate 10. It can be understood that when the thickness of the first auxiliary layer 30 is greater than the thickness of the second auxiliary layer 40 on the side close to the substrate 10, a plurality of the auxiliary portions 401 on the side away from the substrate 10 are formed to further act on the polarized charges in the first auxiliary layer 30, and at the same time, the influence on the movement of charges in the active layer 201 can be further reduced. Since two of the auxiliary portions 401 corresponding to each other one by one are provided opposite to each other, it is also possible to avoid further reduction of the transmittance of the display panel 100.

[0037] In one embodiment, the constituent material of the first auxiliary layer 30 includes a polarization material. It can be understood that polarization is a phenomenon in which the potential finally deviates from the open-circuit potential of the electrode due to the movement of current. Here, the "polarization material" can be understood as a material having polarization characteristics. For example, a polarization effect may occur on the substrate 10, or the first auxiliary layer 30 itself may be polarized. Specifically, the constituent material of the first auxiliary layer 30 may include amorphous silicon. The adsorption force between amorphous silicon and the substrate 10 is large, which is advantageous for the formation of the first auxiliary layer 30 and improves the stability between the auxiliary layer and the substrate 10. Specifically, amorphous silicon may be prepared from natural silicon oxide, and the cost is low. Amorphous silicon is a semiconductor and can realize the function of reducing the influence on the charge movement of the active layer 201 of the polarization charge in the substrate 10.

[0038] In one embodiment, as shown in FIGS. 1 and 2, the display panel 100 further includes a buffer layer 50 located on the side closer to the thin film transistor layer of the auxiliary layer. The constituent material of the buffer layer 50 includes at least one of silicon nitride and silicon oxide. It should be noted that the side closer to the thin film transistor layer of the auxiliary layer formed by the chemical vapor deposition process or the physical vapor deposition process is rough. In this embodiment, although not limited, a buffer layer 50 having a certain thickness may be formed by the chemical vapor deposition process, that is, the side closer to the thin film transistor layer of the buffer layer 50 is flat, which can be understood to be advantageous for the formation of the thin film transistor layer.

[0039] The buffer layer 50 formed by at least one of silicon nitride and silicon oxide may have a water absorption function to prevent external water vapor from entering and damaging the light-emitting element, and may also have a heat preservation function to prevent the reliability of the active layer 201 from decreasing due to a strong temperature change in the manufacturing process. Specifically, the buffer layer 50 may include a second buffer layer 501 and a third buffer layer 502 located in the second buffer layer 501. One of the constituent materials of the second buffer layer 501 and the third buffer layer 502 may include silicon oxynitride, and the other of the constituent materials of the second buffer layer 501 and the third buffer layer 502 may include silicon oxide. Further, the buffer layer 50 may further include a third buffer layer manufactured by silicon oxynitride. Further, a dielectric layer may be further provided between the buffer layer 50 and the thin film transistor layer. The dielectric layer is for insulating the active layer 201 and other film layers. For the constituent material of the dielectric layer, reference can be made to the relevant description of the constituent material of the buffer layer 50 above.

[0040] The present application further provides a method for manufacturing a display panel, which includes, but is not limited to, the following examples and combinations between the following examples.

[0041] In one embodiment, when FIGS. 3 and 4 are combined, the method for manufacturing the display panel includes, but is not limited to, the following steps.

[0042] S10: Provide a substrate.

[0043] Specifically, when FIGS. 1 to 4 are combined, the substrate 10 may include a first substrate 101, a second substrate 102 located near the thin film transistor layer of the first substrate 101, and a first buffer layer 103 located between the first substrate 101 and the second substrate 102. The constituent materials of the first substrate 101 and the second substrate 102 may include polyimide, and the constituent material of the first buffer layer 103 may include at least one of silicon oxide and silicon nitride. For example, the first buffer layer 103 manufactured by silicon oxide has water absorption and heat preservation functions and can extend the life of the display panel 100.

[0044] S20: Form an auxiliary layer on the substrate. The auxiliary layer includes a first auxiliary layer and a second auxiliary layer located at least on the side of the first auxiliary layer closer to the substrate. The second auxiliary layer includes a plurality of auxiliary portions, and there is a gap between two adjacent auxiliary portions. The dielectric constant of the constituent material of the first auxiliary layer is smaller than the dielectric constant of the substrate, and larger than the dielectric constant of the constituent material of the second auxiliary layer. The transmittance of the first auxiliary layer is larger than the transmittance of the second auxiliary layer.

[0045] It should be noted that when the above descriptions are combined, if the auxiliary layer is not provided, a large number of polarized charges in the substrate 10 will be polarized to form a large number of polarized charges, and then cause a polarization effect on the active layer 201, and the movement of charges in the active layer 201 will be affected.

[0046] Combining FIGS. 1 to 4, the second auxiliary layer 40 is located at least on the side of the first auxiliary layer 30 closer to the substrate 10, that is, the second auxiliary layer 40 may be formed before the first auxiliary layer 30 is formed. Specifically, the second auxiliary layer 40 may be formed on at least the second substrate 102 by physical vapor deposition. For example, the surface of the material source of the constituent material of the second auxiliary layer 40 is vaporized into gas atoms or gas molecules, or partially ionized into ions, and deposited on the surface of the second substrate 102 by a plasma process to form the second auxiliary layer 40. It should be noted that the energy for depositing the second auxiliary layer 40 may be small, and it is possible to avoid the scattering of the constituent material of the second auxiliary layer 40 into the substrate 10 and thus the warping of the substrate 10.

[0047] Based on this, further, by combining a mask having a plurality of openings with physical vapor deposition, a plurality of auxiliary portions 401 corresponding one-to-one to the plurality of openings can be deposited on the surface of the second substrate 102 to form the second auxiliary layer 40. Specifically, the number and arrangement method of the plurality of auxiliary portions 401 here are not limited, and the related descriptions about the auxiliary portions 401 can be referred to.

[0048] Combining FIGS. 1 to 4, after forming the second auxiliary layer 40, the first auxiliary layer 30 may be formed on the second auxiliary layer 40 by a chemical vapor deposition method, and the first auxiliary layer 30 can cover part or all of the second auxiliary layer 40. Specifically, as shown in FIGS. 1, 2, and 4, here, the second auxiliary layer 40 is described by taking as an example that it includes a plurality of auxiliary portions 401 provided at intervals, and the constituent material of the first auxiliary layer 30 may be deposited on the substrate 10 and the plurality of auxiliary portions 401 to form the first auxiliary layer 30. The thickness of the first auxiliary layer 30 may be less than 10 Å.

[0049] It can be understood that the dielectric constant of the constituent material of the first auxiliary layer 30 in this embodiment is smaller than the dielectric constant of the substrate 10. As can be seen from the law that "the greater the dielectric constant, the easier it is for polarization to occur", the first auxiliary layer 30 is difficult to be polarized with respect to the substrate 10. Therefore, a large number of polarized charges are formed on the substrate 10. Even if there is an electric field influence inside the display panel 100, the number of polarized charges formed by the polarization of the first auxiliary layer 30 located between the substrate 10 and the transistor 20 can still be much smaller than the number of polarized charges formed by the polarization of the substrate 10 when the first auxiliary layer 30 is not provided. Thus, the influence of the charge movement in the active layer 201 can be reduced, and the operation reliability of the transistor 20 can be improved.

[0050] Furthermore, the dielectric constant of the constituent material of the second auxiliary layer 40 in this embodiment is smaller than the dielectric constant of the constituent material of the first auxiliary layer 30. For the same reason, according to the above analysis, the number of polarized charges formed by the polarization of the second auxiliary layer 40 located on the side of the first auxiliary layer 30 close to the substrate 10 can still be much smaller than the number of polarized charges formed by the polarization of the first auxiliary layer 30 when the second auxiliary layer 40 is not provided. Therefore, the influence of the charge movement in the active layer 201 can be further reduced, and the operation reliability of the transistor 20 can be further improved.

[0051] It should be noted that the dielectric constant of the second auxiliary layer 40 is small, but its transmittance is small with respect to the first auxiliary layer 30, that is, the second auxiliary layer 40 can further weaken the polarization phenomenon in the active layer 201, but there is a drawback of low transmittance. Understandably, in this embodiment, by providing the second auxiliary layer 40 to be composed of a plurality of auxiliary portions 401 arranged at intervals, it is possible to avoid the second auxiliary layer 40 completely covering the substrate 10, and when at least one of the situations that the display panel 100 includes a photosensitive element located below the auxiliary layer or below the substrate 10 and the display panel 100 is a bottom emission display device exists, the installation method of the second auxiliary layer 40 can guarantee the transmittance of the display panel 100 and avoid blocking a lot of light, thereby improving at least one of the luminance of the display panel 100 and the operation reliability of the photosensitive element. This embodiment does not limit the shape and size of the auxiliary portion 401.

[0052] S30: Form a thin film transistor layer on the side of the auxiliary layer away from the substrate, and the thin film transistor layer includes a plurality of transistors.

[0053] Combining FIGS. 1, 2 and 4, the transistor 20 may include an active layer 201, a gate layer 202 located on the side of the active layer 201 away from the substrate 10, and a source-drain layer located on the side of the gate layer 202 away from the substrate 10. The source-drain layer includes a source portion 203 provided opposite to and electrically connected to one end of the active layer 201, and a drain portion 204 provided opposite to and electrically connected to one end of the active layer 201. Further, the display panel 100 further includes a first insulating layer 205 located between the active layer 201 and the gate layer 202 and covering the active layer 201, a second insulating layer 206 covering the side of the gate layer 202 away from the substrate 10, a metal layer 207 located on the side of the second insulating layer 206 away from the substrate 10, and an interlayer dielectric layer 208 located between the metal layer 207 and the source-drain layer and covering the metal layer 207. Specifically, for the related description of the specific structure of the transistor 20, reference can be made to the related description of the specific structure of the transistor 20 above.

[0054] Furthermore, when combining FIGS. 1, 2, and 4 with the above description, before forming the thin film transistor layer, a buffer layer 50 may be formed on the side of the auxiliary layer away from the substrate 10. For example, after forming a second buffer layer 501 on the side of the auxiliary layer away from the substrate 10, a third buffer layer 502 may be formed on the side of the second buffer layer 501 away from the substrate 10. For the constituent materials of the second buffer layer 501 and the third buffer layer 502, reference can be made to the above related description.

[0055] Specifically, for example, when the constituent material of the active layer 201 includes amorphous silicon, the active layer 201 may be directly formed of an amorphous silicon material on the side of the buffer layer 50 away from the substrate 10. Naturally, an amorphous silicon thin film may be processed by an excimer laser annealing process to form a polysilicon thin film, and then the active layer 201 may be formed by patterning. Specifically, for the active layer 201 manufactured from amorphous silicon, doping particles may be injected at both ends of the active layer 201 to form two doping regions, and then a first insulating layer 205 covering the active layer 201 may be formed. After forming the first insulating layer 205 covering the active layer 201, doping particles may be injected into the first insulating layer 205 and indirectly introduced into both ends of the active layer 201 to form two doping regions. Specifically, the side of the first insulating layer 205 away from the substrate 10 is not limited, but the gate layer 202 may be formed by combining a deposition process or a physical vapor deposition process with patterning. Further, the orthographic projection of the gate layer 202 on the plane where the active layer 201 is located is located within the boundary of the active layer 201. The gate layer 202 serves as a barrier portion, and doping particles may be injected into the portion of the active layer 201 protruding from the gate layer 202 to promote the formation of two doping regions. The doping concentration this time may be higher than the previous doping concentration. Specifically, after forming a second insulating layer 206 covering the gate layer 202, the metal layer 207 may be formed on the second insulating layer 206 by combining a deposition process or a physical vapor deposition process with patterning (not limited). The metal layer 207 and the gate layer 202 may be provided opposite to each other to form a capacitor. Specifically, after forming an interlayer dielectric layer 208 covering the metal layer 207, two via holes penetrating the interlayer dielectric layer 208, the second insulating layer 206, and a part of the first insulating layer 205 may be formed. The two via holes communicate with both ends of the active layer 201 and the side of the interlayer dielectric layer 208 away from the substrate 10, and then the constituent material of the source-drain layer is filled in the via holes and extends to the side of the interlayer dielectric layer 208 away from the substrate 10, and patterning is combined to form the source portion 203 and the drain portion 204.Furthermore, film layers such as a light-emitting layer, a pixel defining layer, and a sealing layer may be formed on the side of the interlayer dielectric layer 208 away from the substrate 10 and on the side of the source-drain layer away from the substrate 10.

[0056] The present application includes a substrate, a thin-film transistor layer located on the substrate and including a plurality of transistors, and an auxiliary layer located between the substrate and the thin-film transistor layer. The auxiliary layer includes a first auxiliary layer and a second auxiliary layer located at least on the side of the first auxiliary layer close to the substrate. The second auxiliary layer includes a plurality of auxiliary portions, and there is a gap between two adjacent auxiliary portions. The dielectric constant of the constituent material of the first auxiliary layer is smaller than the dielectric constant of the substrate, and larger than the dielectric constant of the constituent material of the second auxiliary layer, to provide a display panel. By providing a first auxiliary layer with a dielectric constant smaller than that of the substrate, the present application reduces the influence on the movement of charges in the active layer, and further provides a second auxiliary layer with an even smaller dielectric constant. However, the second auxiliary layer includes a plurality of auxiliary portions arranged at intervals, so that the influence on the movement of charges in the active layer can be further reduced.

[0057] As described above, the structure of the display panel provided by the embodiments of the present application has been introduced in detail. In this text, specific examples are used to explain the principle and embodiments of the present application. The description of the above embodiments is only for helping to understand the technical solution and its core idea of the present application. Those skilled in the art should understand that, still based on the technical solutions described in the above embodiments, they can make modifications or replace some technical features, but these modifications or replacements do not deviate from the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Description of Reference Numerals

[0058] 10: Substrate 20: Transistor 30: First Auxiliary Layer 40: Second Auxiliary Layer 50: Buffer Layer 100: Display Panel 101: First Substrate 102: Second Substrate 103: First buffer layer 201: Active layer 202: Gate layer 203: Source portion 204: Drain portion 205: First insulating layer 206: Second insulating layer 207: Metal layer 208: Interlayer dielectric layer 401: Auxiliary portion 501: Second buffer layer 502: Third buffer layer

Claims

1. A substrate, a thin film transistor layer located on the substrate and including a plurality of transistors, and an auxiliary layer located between the substrate and the thin film transistor layer, wherein the auxiliary layer includes a first auxiliary layer and a second auxiliary layer located at least on a side of the first auxiliary layer closer to the substrate, the second auxiliary layer includes a plurality of auxiliary portions and has a gap between two adjacent auxiliary portions, the dielectric constant of the constituent material of the first auxiliary layer is greater than the dielectric constant of the constituent material of the second auxiliary layer, the second auxiliary layer is further located on a side of the first auxiliary layer away from the substrate, and a plurality of the auxiliary portions in the second auxiliary layer located on the side of the first auxiliary layer away from the substrate and a plurality of the auxiliary portions in the other second auxiliary layer located on the side of the first auxiliary layer closer to the substrate correspond one-to-one, and two of the auxiliary portions corresponding one-to-one are provided opposite to each other, a display panel.

2. The display panel according to claim 1, wherein the first auxiliary layer includes a polarizing material and the second auxiliary layer includes a conductive material.

3. The first auxiliary layer includes amorphous silicon and the second auxiliary layer includes a metal conductor, the display panel according to claim 2.

4. The display panel according to any one of claims 1 to 3, wherein the transmittance of the first auxiliary layer is greater than the transmittance of the auxiliary portion.

5. The display panel according to claim 1, wherein the plurality of auxiliary portions are uniformly arranged on the substrate and are in direct contact with the surface of the substrate.

6. The display panel according to claim 5, wherein the first auxiliary layer covers the plurality of auxiliary portions, fills the gap between two adjacent auxiliary portions, and is further in direct contact with the surface of the substrate.

7. At least one of a convex portion and a concave portion is included on a side of the auxiliary portion closer to the first auxiliary layer, the display panel according to claim 6.

8. The display panel according to claim 7, wherein the thickness of the first auxiliary layer is 10 Å or less.

9. The display panel according to claim 7, wherein a first distance from a surface of the first auxiliary layer corresponding to the auxiliary portion away from the substrate to a surface of the first auxiliary layer corresponding to the auxiliary portion close to the substrate is smaller than a second distance from a surface of the first auxiliary layer corresponding to the gap away from the substrate to a surface of the first auxiliary layer corresponding to the gap close to the substrate.

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