Imaging device

Abstract

An imaging device according to the present invention comprises: a pixel region that includes a first substrate section and is provided with a plurality of pixels; and a peripheral region that includes a second substrate section and is not provided with pixels. The first substrate section and the second substrate section are included in one semiconductor substrate. Each of the plurality of pixels includes a first electrode, a second electrode, a photoelectric conversion layer positioned between the first electrode and the second electrode, and a charge accumulation region provided on the first substrate section. The pixel region includes a plurality of first through-holes penetrating the first substrate section, and a plurality of first through-electrodes, each provided in a corresponding first through-hole of the plurality of first through-holes and electrically connecting the first electrode and the charge accumulation region. The peripheral region includes a plurality of second through-holes penetrating the second substrate section, and a plurality of second through-electrodes, each provided in a corresponding second through-hole of the plurality of second through-holes. A surface area density of the plurality of first through-electrodes, which is a ratio of the surface area of the plurality of first through-electrodes to the surface area of the pixel region, differs from a surface area density of the plurality of second through-electrodes, which is a ratio of the surface area of the plurality of second through-electrodes to the surface area of the peripheral region.

Description

[Technical field]

[0001] The present disclosure relates to an imaging device. [Background technology]

[0002] 2. Description of the Related Art Charge-coupled device (CCD) image sensors and complementary metal oxide semiconductor (CMOS) image sensors are widely used in digital cameras etc. These image sensors have photodiodes formed on a semiconductor substrate.

[0003] A structure has been proposed in which a photoelectric conversion unit having a photoelectric conversion layer is disposed above a semiconductor substrate. An imaging device having such a structure is sometimes called a stacked imaging device. In a stacked imaging device, charges generated by photoelectric conversion are accumulated in a charge accumulation region. A signal corresponding to the amount of charge accumulated in the charge accumulation region is read out via a CCD circuit or a CMOS circuit formed on the semiconductor substrate.

[0004] Patent Document 1 proposes a back-illuminated imaging device. In this imaging device, a photoelectric conversion unit having a photoelectric conversion layer is provided on the back side of a semiconductor substrate. A wiring layer is provided on the front side of the semiconductor substrate.

[0005] In the imaging device of Patent Document 1, a through hole is provided in a semiconductor substrate in a pixel region. A through electrode is provided in the through hole. The through electrode electrically connects elements on a first surface side and elements on a second surface side of the semiconductor substrate. Specifically, the through electrode electrically connects a photoelectric conversion unit located on the back surface side of the semiconductor substrate and a wiring layer located on the front surface side of the semiconductor substrate. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2015 / 025723 Summary of the Invention [Problem to be solved by the invention]

[0007] The present disclosure provides a technique suitable for mass-producing imaging devices that satisfy the required specifications for the pixel region and the required specifications for the peripheral region. [Means for solving the problem]

[0008] An imaging device according to one aspect of the present disclosure includes: a pixel region including a first substrate portion and having a plurality of pixels; and a peripheral region including a second substrate portion and in which no pixels are provided. The first substrate portion and the second substrate portion are included in a single semiconductor substrate. Each of the plurality of pixels includes A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; The pixel region includes: a plurality of first through holes penetrating the first substrate portion; The peripheral region includes a plurality of first through electrodes, each of which is provided in a corresponding one of the plurality of first through holes and electrically connects the first electrode and the charge storage region. a plurality of second through holes penetrating the second substrate portion; and a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes. An area density of the plurality of first through electrodes, which is a ratio of an area of ​​the plurality of first through electrodes to an area of ​​the pixel region, is different from an area density of the plurality of second through electrodes, which is a ratio of an area of ​​the plurality of second through electrodes to an area of ​​the peripheral region. Effect of the Invention

[0009] The technology according to the present disclosure is suitable for mass-producing imaging devices that satisfy the required specifications of the pixel region and the required specifications of the peripheral region. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram showing the configuration of an imaging device. [Diagram 2] FIG. 2 is a schematic cross-sectional view showing a device structure. [Diagram 3] FIG. 3 is a plan view showing the shield electrode. [Figure 4A] FIG. 4A is a cross-sectional view showing an electrical connection between a fourth through electrode and a counter electrode. [Figure 4B] FIG. 4B is a plan view showing electrical connection between the fourth through electrode and the counter electrode. [Figure 4C] FIG. 4C is a cross-sectional view showing an electrical connection between the fourth through electrode and the counter electrode. [Figure 4D] FIG. 4D is a plan view showing electrical connection between the fourth through electrode and the counter electrode. [Figure 5A] FIG. 5A is a plan view showing a pixel region and a peripheral region. [Figure 5B] FIG. 5B is a plan view showing the pixel region and the peripheral region. [Figure 5C] FIG. 5C is an exploded perspective view showing the pixel region and the peripheral region. [Figure 6] FIG. 6 is a table showing the cross-sectional shapes of the first through electrode and the second through electrode. [Figure 7A] FIG. 7A is an explanatory diagram of the expression that a figure is close to a circle. [Figure 7B] FIG. 7B is an explanatory diagram of the expression that the shape is close to a rectangle. [Figure 8A] FIG. 8A is an explanatory diagram of a peripheral region in which second through electrodes are provided in gaps between a plurality of wirings. [Figure 8B] FIG. 8B is an explanatory diagram of the shape of the through electrode. [Figure 9] FIG. 9 is a diagram illustrating the number density of the first through electrodes and the number density of the second through electrodes. [Figure 10A] FIG. 10A is an explanatory diagram of the arrangement intervals of the second through electrodes. [Figure 10B]FIG. 10B is an explanatory diagram of the arrangement intervals of the second through electrodes. [Figure 11A] FIG. 11A is an explanatory diagram of the number density of third through electrodes. [Figure 11B] FIG. 11B is an explanatory diagram of the number density of the fourth through electrodes. [Figure 12A] FIG. 12A is an explanatory diagram of the arrangement intervals of the third through electrodes. [Figure 12B] FIG. 12B is an explanatory diagram of the arrangement intervals of the fourth through electrodes. [Figure 13A] FIG. 13A is an explanatory diagram showing a specific example of the arrangement of the through electrodes. [Figure 13B] FIG. 13B is an explanatory diagram showing a specific example of the arrangement of the through electrodes. [Figure 13C] FIG. 13C is an explanatory diagram showing a specific example of the arrangement of the through electrodes. [Figure 13D] FIG. 13D is an explanatory diagram showing a specific example of the arrangement of the through electrodes. [Figure 13E] FIG. 13E is an explanatory diagram showing a specific example of the arrangement of the through electrodes. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] (Summary of one aspect of the present disclosure) An imaging device according to a first aspect of the present disclosure, a pixel region including a first substrate portion and having a plurality of pixels; and a peripheral region including a second substrate portion and in which no pixels are provided. The first substrate portion and the second substrate portion are included in a single semiconductor substrate. Each of the plurality of pixels includes A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; The pixel region includes: a plurality of first through holes penetrating the first substrate portion; The peripheral region includes a plurality of first through electrodes, each of which is provided in a corresponding one of the plurality of first through holes and electrically connects the first electrode and the charge storage region. a plurality of second through holes penetrating the second substrate portion; and a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes. An area density of the plurality of first through electrodes, which is a ratio of an area of ​​the plurality of first through electrodes to an area of ​​the pixel region, is different from an area density of the plurality of second through electrodes, which is a ratio of an area of ​​the plurality of second through electrodes to an area of ​​the peripheral region.

[0012] The technology according to the present disclosure is suitable for mass-producing imaging devices that satisfy the required specifications of the pixel region and the required specifications of the peripheral region.

[0013] In a second aspect of the present disclosure, for example, the imaging device according to the first aspect includes: an electrical path electrically isolated from the plurality of first through electrodes and including the plurality of second through electrodes; The electrical path may be electrically connected to a specific portion in the pixel region without passing through the first substrate unit.

[0014] According to the second aspect, crosstalk between the electrical path and the first through-electrode can be more easily suppressed than in the case where an electrical path is configured to reach the specific portion via the first substrate portion.

[0015] In a third aspect of the present disclosure, for example, the imaging device according to the second aspect further includes a shield electrode electrically separated from the first electrode, The photoelectric conversion layer may be located between the shield electrode and the second electrode, The specific portion may be included in the shield electrode or the second electrode.

[0016] The shield electrode or the second electrode of the third embodiment is an example of an element that can include the specific portion.

[0017] In a fourth aspect of the present disclosure, for example, in the imaging device according to any one of the first to third aspects, A cross-sectional shape of each of the plurality of first through electrodes may be different from a cross-sectional shape of each of the plurality of second through electrodes.

[0018] Providing a difference in the cross-sectional shape of the through electrodes as in the fourth embodiment can contribute to achieving the required specifications of the pixel region and the peripheral region.

[0019] In a fifth aspect of the present disclosure, for example, in the imaging device according to the fourth aspect, The cross-sectional shape of each of the plurality of first through electrodes may be closer to a circle than the cross-sectional shape of each of the plurality of second through electrodes; The cross-sectional shape of each of the plurality of second through electrodes may be closer to a rectangle than the cross-sectional shape of each of the plurality of first through electrodes.

[0020] The fifth aspect is advantageous in that it suppresses the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0021] In a sixth aspect of the present disclosure, for example, in the imaging device according to the fourth or fifth aspect, The peripheral region may further include a plurality of wirings located in the second substrate portion, The second through electrodes may pass between the wirings, a rectangle having a minimum area surrounding the cross-sectional shape of each of the plurality of first through electrodes has a first side and a second side having a length equal to or greater than the length of the first side; a rectangle having a minimum area surrounding the cross-sectional shape of each of the plurality of second through electrodes has a third side and a fourth side having a length equal to or greater than the length of the third side, A ratio of the length of the second side to the length of the first side is defined as a first ratio; When the ratio of the length of the fourth side to the length of the third side is defined as a second ratio, The first ratio may be less than the second ratio.

[0022] The sixth aspect is advantageous in terms of suppressing the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0023] In a seventh aspect of the present disclosure, for example, in the imaging device according to any one of the first to sixth aspects, A cross-sectional area of ​​each of the plurality of first through electrodes may be different from a cross-sectional area of ​​each of the plurality of second through electrodes.

[0024] Providing a difference in the cross-sectional area of ​​the through electrodes as in the seventh embodiment can contribute to achieving the required specifications of the pixel region and the peripheral region.

[0025] In an eighth aspect of the present disclosure, for example, the imaging device according to the seventh aspect is A cross-sectional area of ​​each of the plurality of first through electrodes may be smaller than a cross-sectional area of ​​each of the plurality of second through electrodes.

[0026] The eighth aspect is advantageous in terms of suppressing the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0027] In a ninth aspect of the present disclosure, for example, in the imaging device according to any one of the first to eighth aspects, A circumferential length of a cross section of each of the plurality of first through electrodes may be different from a circumferential length of a cross section of each of the plurality of second through electrodes.

[0028] Providing a difference in the perimeter of the cross section of the through electrode as in the ninth embodiment can contribute to achieving the required specifications of the pixel region and the peripheral region.

[0029] In a tenth aspect of the present disclosure, for example, in the imaging device according to the ninth aspect, The perimeter of the cross section of each of the plurality of first through electrodes may be shorter than the perimeter of the cross section of each of the plurality of second through electrodes.

[0030] The tenth aspect is advantageous in terms of suppressing the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0031] In an eleventh aspect of the present disclosure, for example, in the imaging device according to any one of the first to tenth aspects, A number density of the plurality of first through electrodes in the pixel region may be different from a number density of the plurality of second through electrodes in the peripheral region.

[0032] Providing a difference in the numerical density of the through electrodes as in the eleventh embodiment can contribute to achieving the required specifications of the pixel region and the peripheral region.

[0033] In a twelfth aspect of the present disclosure, for example, in the imaging device according to the eleventh aspect, The number density of the plurality of first through electrodes in the pixel region may be smaller than the number density of the plurality of second through electrodes in the peripheral region.

[0034] The twelfth aspect is advantageous in terms of suppressing the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0035] In a thirteenth aspect of the present disclosure, for example, in the imaging device according to any one of the first to twelfth aspects, The area density of the plurality of first through electrodes may be smaller than the area density of the plurality of second through electrodes.

[0036] The thirteenth aspect is advantageous in terms of suppressing the superposition of noise on the charges flowing through the first through electrode in the pixel region, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate portion in the peripheral region.

[0037] In a fourteenth aspect of the present disclosure, for example, in the imaging device according to any one of the first to thirteenth aspects, The material of the plurality of first through electrodes may be different from the material of the plurality of second through electrodes.

[0038] Using different materials for the through electrodes as in the fourteenth embodiment can contribute to achieving the required specifications for the pixel region and the peripheral region.

[0039] In a fifteenth aspect of the present disclosure, for example, in the imaging device according to the fourteenth aspect, The plurality of first through electrodes may be substantially free of copper, The plurality of second through electrodes may contain copper as a main component.

[0040] The fifteenth aspect is advantageous from the viewpoint of allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit in the peripheral region while avoiding copper diffusion in the pixel region.

[0041] In a sixteenth aspect of the present disclosure, for example, in the imaging device according to any one of the first to fifteenth aspects, The peripheral region may include a first adjacent region adjacent to the pixel region in a first direction in a plan view, and a second adjacent region adjacent to the pixel region in a second direction in a plan view, A ratio of an average value of the arrangement intervals of the second through electrodes in the first adjacent region to an average value of the arrangement intervals of the second through electrodes in the second adjacent region may be not less than 0.8 and not more than 1.2.

[0042] According to the sixteenth aspect, it is easy to make the current supply capacity per unit length in the second direction of the first adjacent region and the current supply capacity per unit length in the first direction of the second adjacent region equal to each other.

[0043] In a seventeenth aspect of the present disclosure, for example, the imaging device according to any one of the first to sixteenth aspects comprises: The semiconductor device may further include a shield electrode electrically isolated from the first electrode. The plurality of second through electrodes may include at least one third through electrode and at least one fourth through electrode electrically separated from each other, The photoelectric conversion layer may be located between the shield electrode and the second electrode, The at least one third through electrode may be electrically connected to the shield electrode.

[0044] According to the seventeenth aspect, the connection destination of the third through electrode and the connection destination of the fourth through electrode can be electrically separated.

[0045] Furthermore, the third through electrode of the seventeenth aspect can electrically connect the shield electrode to an element present on the opposite side of the shield electrode as viewed from the second substrate portion.

[0046] In an eighteenth aspect of the present disclosure, for example, in the imaging device according to the seventeenth aspect, The at least one fourth through electrode may be electrically connected to the second electrode.

[0047] According to the fourth through electrode of the eighteenth aspect, the second electrode and an element present on the opposite side of the second electrode as viewed from the second substrate portion can be electrically connected to each other.

[0048] In a nineteenth aspect of the present disclosure, for example, in the imaging device according to the seventeenth or eighteenth aspect, the at least one third through electrode includes a plurality of third through electrodes; the at least one fourth through electrode includes a plurality of fourth through electrodes; A number density of the plurality of third through electrodes in the peripheral region may be different from a number density of the plurality of fourth through electrodes in the peripheral region.

[0049] Providing a difference in the numerical density of the through electrodes as in the nineteenth embodiment can contribute to achieving the required specifications of the connection destination of the third through electrode and the connection destination of the fourth through electrode. An imaging device according to a twentieth aspect of the present disclosure, a pixel region including a first substrate portion and having a plurality of pixels; and a peripheral region including a second substrate portion and in which no pixels are provided. The first substrate portion and the second substrate portion are included in a single semiconductor substrate. Each of the plurality of pixels includes A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; The pixel region includes: a plurality of first through holes penetrating the first substrate portion; The peripheral region includes a plurality of first through electrodes, each of which is provided in a corresponding one of the plurality of first through holes and electrically connects the first electrode and the charge storage region. a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes, the plurality of first through electrodes each having a smaller cross-sectional area than the plurality of second through electrodes;

[0050] In a twenty-first aspect of the present disclosure, for example, in the imaging device according to any one of the first to twentieth aspects, the peripheral region may include a first adjacent region adjacent to the pixel region along a first axis in a plan view, and a second adjacent region adjacent to the pixel region along a second axis in a plan view, A dimension of the first adjacent region along the second axis may be smaller than a dimension of the second adjacent region along the first axis; An average value of the arrangement interval of the plurality of second through electrodes in the first adjacent region may be shorter than an average value of the arrangement interval of the plurality of second through electrodes in the second adjacent region.

[0051] According to the twenty-first aspect, it is easy to make the current supply capacity of the first adjacent region as a whole equal to the current supply capacity of the second adjacent region as a whole.

[0052] In a twenty-second aspect of the present disclosure, for example, in the imaging device according to any one of the seventeenth to nineteenth aspects, The at least one third through electrode may have a cross-sectional shape different from a cross-sectional shape of the at least one fourth through electrode.

[0053] Providing a difference in the cross-sectional shape of the through electrodes as in the twenty-second embodiment can contribute to achieving the required specifications of the connection destination of the third through electrode and the connection destination of the fourth through electrode.

[0054] In a twenty-third aspect of the present disclosure, for example, in the imaging device according to any one of the seventeenth to nineteenth aspects, In the peripheral region, the at least one third through electrode may include a plurality of third through electrodes; In the peripheral region, the at least one fourth through electrode may include a plurality of fourth through electrodes; An area density of the plurality of third through electrodes in the peripheral region may be different from an area density of the plurality of fourth through electrodes in the peripheral region.

[0055] Providing a difference in the area density of the through electrodes as in the twenty-third embodiment can contribute to achieving the required specifications of the connection destination of the third through electrode and the connection destination of the fourth through electrode.

[0056] In a twenty-fourth aspect of the present disclosure, for example, in the imaging device according to any one of the seventeenth to nineteenth aspects, The peripheral region may have a first adjacent region adjacent to the pixel region in a first direction in a plan view, In the first adjacent region, the at least one third through electrode may include a plurality of third through electrodes; In the first adjacent region, the at least one fourth through electrode may include a plurality of fourth through electrodes; An average value of the arrangement interval of the plurality of third through electrodes in the first adjacent region may be different from an average value of the arrangement interval of the plurality of fourth through electrodes in the first adjacent region.

[0057] Providing a difference in the average arrangement interval of the through electrodes as in the twenty-fourth embodiment can contribute to achieving the required specifications of the connection destination of the third through electrode and the connection destination of the fourth through electrode.

[0058] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that the present disclosure is not limited to these embodiments.

[0059] In this specification, the terms "upper", "lower", etc. are used merely to specify the relative positions of components, and are not intended to limit the orientation of the imaging device when in use.

[0060] In this specification, "planar view" refers to a view from the thickness direction of the first substrate unit or the thickness direction of the second substrate unit. The thickness direction of the first substrate unit or the thickness direction of the second substrate unit may be the same.

[0061] In this specification, the concept of a rectangle includes a square.

[0062] As used herein, "resistance" refers to electrical resistance.

[0063] In the following description, the main component means a component that is contained in the largest amount by mass. In one example, the main component is a component that accounts for more than 50 mass%. In one specific example, the main component is a component that accounts for more than 80 mass%.

[0064] In the following description, "substantially free" means that the content is less than 1% by mass. In one specific example, "substantially free" means that the content is less than 0.1% by mass.

[0065] In the following embodiments, adjustments of each element in accordance with the difference in the positive and negative polarities of the signal charges, such as changing the conductivity type of the impurity regions, may be appropriately performed. Furthermore, interpretations of terms in accordance with the difference in the positive and negative polarities of the signal charges may be appropriately performed.

[0066] [Embodiment] (Configuration of imaging device) 1 is a diagram showing the configuration of an image capturing device according to an embodiment of the present invention. The image capturing device 100 shown in FIG.

[0067] The pixel region 101 has a first substrate portion. The peripheral region 102 has a second substrate portion. Specifically, the first substrate portion is a first semiconductor substrate portion. The second substrate portion is a second semiconductor substrate portion. In this embodiment, the first substrate portion and the second substrate portion are different portions of a single substrate in a plan view. However, a configuration in which the first substrate portion is one substrate and the second substrate portion is another substrate may also be adopted.

[0068] The pixel region 101 includes pixels 10. The pixels 10 include a photoelectric conversion unit. The photoelectric conversion unit converts incident light into an electric charge.

[0069] In the pixel region 101 of this embodiment, a plurality of pixels 10 are provided. The plurality of pixels 10 configure a pixel array PA. In this embodiment, the plurality of pixels 10 are arranged two-dimensionally. However, the plurality of pixels 10 may also be arranged one-dimensionally. In that case, the imaging device 100 may be a line sensor.

[0070] Specifically, in this embodiment, the pixels 10 are arranged in a matrix of m rows and n columns. The center of each pixel 10 is located on a lattice point of a square lattice. However, the arrangement of the pixels 10 is not limited to the example shown in the figure. For example, the center of each pixel 10 may be located on a lattice point of a triangular lattice, a hexagonal lattice, or the like.

[0071] A peripheral circuit 90 is provided in the peripheral region 102. The peripheral circuit 90 controls the pixels 10. In the example of FIG. 1, the peripheral circuit 90 includes a row scanning circuit 91, a signal processing circuit 92, an output circuit 93, and a control circuit 94.

[0072] The row scanning circuit 91 is also called a vertical scanning circuit. 0 ,R 1 ,…,R i ,…,R m-1 The row control line R 0 ,R 1 ,…,R i ,…,R m-1 are respectively associated with each row of the plurality of pixels 10.

[0073] The pixels 10 in the i-th row are connected to a row control line R i The row scanning circuit 91 is connected to the row control line R i , where i is an arbitrary integer between 0 and m-1.

[0074] The row scanning circuit 91 selects the pixels 10 on a row-by-row basis, and executes operations such as reading out the signal voltage and resetting the photoelectric conversion units in the pixels.

[0075] 1 merely shows a schematic diagram of the connection between each pixel 10 and the row scanning circuit 91. The number of control lines arranged for each row of the pixels 10 is not limited to one. The imaging device 100 may have two or more control lines for each row. For example, the row scanning circuit 91 may be connected to multiple reset control lines, and each row of the pixels 10 may be connected to a reset control line associated with that row.

[0076] The signal processing circuit 92 outputs a signal 0 ,S 1 ,…,S j ,…,S n-1 The output signal line S 0 ,S 1 ,…,S j ,…,Sn-1 are respectively associated with each column of the plurality of pixels 10.

[0077] The pixels 10 in the j-th column are connected to an output signal line S j The signal processing circuit 92 is connected to an output signal line S j , where j is an arbitrary integer between 0 and n-1.

[0078] The output of the pixel 10 is selected row by row by the row scanning circuit 91, and is transmitted to the output signal line S 0 From output signal line S n-1 The output signals read out from the pixels 10 are read out to a signal processing circuit 92 via an output circuit 93. The signal processing circuit 92 performs noise suppression signal processing, analog-to-digital conversion, and the like on the output signals read out from the pixels 10. An example of the noise suppression signal processing is correlated double sampling. The output of the signal processing circuit 92 is read out to the outside of the image pickup device 100 via an output circuit 93.

[0079] In this embodiment, command data, a clock, and the like are provided to the control circuit 94 from outside the image pickup apparatus 100. The control circuit 94 controls the entire image pickup apparatus 100 based on these.

[0080] In a typical example, the control circuit 94 includes a timing generator, and supplies drive signals to the row scanning circuit 91, the signal processing circuit 92, and the like.

[0081] (Device Structure) FIG. 2 is a schematic cross-sectional view showing the device structures of the pixel region 101 and the peripheral region 102. These device structures will be described below with reference to FIG. 2. In the following, the term "first conductivity type" may be used. In this embodiment, the first conductivity type is n-type. The second conductivity type is p-type. However, the first conductivity type may be p-type. The second conductivity type may be n-type.

[0082] First, the device structure of the pixel region 101 will be described.

[0083] The pixel 10 includes an insulating layer 71, an insulating layer 70, a first substrate unit 1, an insulating layer 32, a photoelectric conversion unit 12, an insulating layer 31, a color filter 35, and a microlens 30. The insulating layer 71, the insulating layer 70, the first substrate unit 1, the insulating layer 32, the photoelectric conversion unit 12, the insulating layer 31, the color filter 35, and the microlens 30 are stacked in this order. Specifically, these are stacked in the thickness direction of the first substrate unit 1. The pixel 10 also includes a first through electrode 81, an insulating layer 33, and a shield electrode 16.

[0084] The first substrate portion 1 is, for example, a part of a silicon substrate. The first substrate portion 1 has a first main surface 1A and a second main surface 1B.

[0085] In this embodiment, the first main surface 1A is the back surface. The first main surface 1A is the surface on the side where light is incident. The second main surface 1B is the front surface. The second main surface 1B is the surface on the opposite side to the side where light is incident. In this embodiment, the first main surface 1A and the second main surface 1B extend perpendicularly to the thickness direction of the first substrate portion 1.

[0086] In the example shown in FIG. 2, the first substrate portion 1 includes an impurity region 1i of a second conductivity type. The impurity region 1i can be, for example, a p+ region or an n+ region. "+" indicates that the p-type or n-type impurity concentration is high. The impurity region 1i has a first main surface 1A. The impurity region 1i has a part of the first main surface 1B.

[0087] The first substrate unit 1 is provided with a reset transistor 26, a signal detection transistor 22, and a transfer transistor 28. Specifically, the reset transistor 26, the signal detection transistor 22, and the transfer transistor 28 are provided on the second main surface 1B.

[0088] In this embodiment, the reset transistor 26, the signal detection transistor 22, and the transfer transistor 28 are MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Specifically, the reset transistor 26, the signal detection transistor 22, and the transfer transistor 28 are N-channel MOSFETs.

[0089] The reset transistor 26 includes a first diffusion region 67n as one of a source and a drain. The reset transistor 26 includes a second diffusion region 68an as the other of a source and a drain. The reset transistor 26 also includes a gate electrode 26e and an insulating layer 70. The insulating layer 70 is interposed between the gate electrode 26e and the first substrate portion 1.

[0090] The signal detection transistor 22 includes a third diffusion region 68bn as one of a source and a drain. The signal detection transistor 22 includes a fourth diffusion region 68cn as the other of a source and a drain. The signal detection transistor 22 also includes a gate electrode 22e and an insulating layer 70. The insulating layer 70 is interposed between the gate electrode 22e and the first substrate portion 1. The signal detection transistor 22 can also be called an amplifying transistor.

[0091] The transfer transistor 28 includes a fifth diffusion region 68dn as one of a source and a drain. The other of the source and drain of the transfer transistor 28 is connected to the photodiode 27. The transfer transistor 28 also includes a gate electrode 28e and an insulating layer 70. The insulating layer 70 is interposed between the gate electrode 28e and the first substrate unit 1.

[0092] The first diffusion region 67n, the second diffusion region 68an, the third diffusion region 68bn, the fourth diffusion region 68cn, and the fifth diffusion region 68dn are located in the first substrate portion 1. The first diffusion region 67n, the second diffusion region 68an, the third diffusion region 68bn, the fourth diffusion region 68cn, and the fifth diffusion region 68dn contain impurities of the first conductivity type.

[0093] The first diffusion region 67n corresponds to the charge accumulation region FD. The first diffusion region 67n accumulates charges generated by photoelectric conversion in the photoelectric conversion unit 12. The charge accumulation region FD may be referred to as a first charge accumulation region FD.

[0094] The fifth diffusion region 68dn corresponds to the second charge accumulation region FD2. The fifth diffusion region 68dn accumulates the charge generated by the photoelectric conversion in the photodiode 27.

[0095] The photoelectric conversion unit 12 has a pixel electrode 13, a photoelectric conversion layer 14, and a counter electrode 15. The counter electrode 15 faces the pixel electrode 13. The photoelectric conversion layer 14 is disposed between the pixel electrode 13 and the counter electrode 15.

[0096] The photoelectric conversion layer 14 has a film shape. The photoelectric conversion layer 14 includes at least one selected from the group consisting of organic materials and inorganic materials. An example of the inorganic material is amorphous silicon. The photoelectric conversion layer 14 receives light incident through the counter electrode 15 and generates positive and negative charges by photoelectric conversion. The photoelectric conversion layer 14 is typically formed across a plurality of pixels 10. The photoelectric conversion layer 14 may include a layer composed of an organic material and a layer composed of an inorganic material.

[0097] The counter electrode 15 is a transparent electrode. Specifically, the counter electrode 15 is an electrode made of a transparent conductive material such as ITO (Indium Tin Oxide). The counter electrode 15 is disposed on the light receiving surface side of the photoelectric conversion layer 14. The counter electrode 15 is typically formed across a plurality of pixels 10, similar to the photoelectric conversion layer 14.

[0098] During operation of the imaging device 100, the potential of the counter electrode 15 is controlled to make the potential of the counter electrode 15 different from the potential of the pixel electrode 13, so that the signal charges generated by photoelectric conversion can be collected by the pixel electrode 13.

[0099] In this embodiment, the signal charge is a negative charge, specifically, an electron. Typically, the potential of the counter electrode 15 is controlled so that the potential of the counter electrode 15 is lower than the potential of the pixel electrode 13. This allows the pixel electrode 13 to collect electrons from the hole-electron pairs generated in the photoelectric conversion layer 14. The signal charge collected by the pixel electrode 13 is accumulated in the first diffusion region 67n via the first through electrode 81 and the wiring structure 80.

[0100] In another example, the signal charge is a positive charge, specifically, a hole. In this example, the potential of the counter electrode 15 is typically controlled so that the potential of the counter electrode 15 is higher than the potential of the pixel electrode 13. This allows the pixel electrode 13 to collect the holes of the hole-electron pairs generated in the photoelectric conversion layer 14. In this example as well, the signal charge collected by the pixel electrode 13 is accumulated in the first diffusion region 67n via the first through electrode 81 and the wiring structure 80.

[0101] The pixel electrode 13 is a transparent electrode. Specifically, the pixel electrode 13 is an electrode made of a transparent conductive material such as ITO. The pixel electrode 13 is spatially separated from the pixel electrodes 13 of other adjacent pixels 10, and is thereby electrically separated from the pixel electrodes 13 of other pixels 10.

[0102] The shield electrode 16 is located on the same side as the pixel electrode 13 when viewed from the photoelectric conversion layer 14. However, the shield electrode 16 is spaced apart from the pixel electrode 13. The shield electrode 16 is electrically isolated from the pixel electrode 13.

[0103] In a plan view, the shield electrode 16 includes a portion located between the pixel electrode 13 in a pixel 10 and the pixel electrode 13 in a pixel 10 adjacent to the pixel 10. This portion of the shield electrode 16 collects charges generated by photoelectric conversion in the photoelectric conversion layer 14. In this way, the shield electrode 16 can suppress noise from entering the charge accumulation region FD.

[0104] The material of the shield electrode 16 can be any material that can be used as the material of the pixel electrode 13. The material of the shield electrode 16 may be the same as the material of the pixel electrode 13, or may be different from the material of the pixel electrode 13.

[0105] 3 is a plan view showing the shield electrode 16. In the plan view, the shield electrode 16 has a lattice shape. The pixel electrodes 13 are arranged in each space defined by this lattice shape. The lattice shape extends across a plurality of pixels 10. Note that some of the elements of the imaging device 100 are not shown in FIG. 3.

[0106] 2, the microlens 30 has a light collecting effect. The light incident on the microlens 30 is supplied to the photoelectric conversion unit 12 via the color filter 35. The photoelectric conversion unit 12 converts the light thus supplied into an electric charge.

[0107] The insulating layer 31 is provided between the color filter 35 and the photoelectric conversion section 12. The insulating layer 31 functions as a protective layer that protects the photoelectric conversion section 12.

[0108] The insulating layer 32 is provided between the pixel electrode 13 and the first substrate unit 1. The insulating layer 32 is also provided between the shield electrode 16 and the first substrate unit 1.

[0109] In the first substrate portion 1, a photodiode 27 and a well 29 are provided. The photodiode 27 is of a first conductivity type. The well 29 is of a second conductivity type. As shown in Fig. 2, in a cross section parallel to the thickness direction of the first substrate portion 1, the impurity region 1i is bent to form a recess, and the photodiode 27 is placed in the recess. A through hole is provided in the well 29, and a first through electrode 81 is provided in the through hole.

[0110] The photodiode 27 exhibits sensitivity to light. The photodiode 27 is provided inside the first substrate unit 1. The photodiode 27 photoelectrically converts light in a wavelength range of a color that is not absorbed by the photoelectric conversion unit 12.

[0111] When light is irradiated onto the photodiode 27, an electric charge is generated in the photodiode 27. The generated electric charge is accumulated as a signal charge in the photodiode 27. In this embodiment, the signal charge is a negative electric charge. Specifically, the signal charge is an electron. The photodiode 27 is an impurity layer of a first conductivity type. Note that a configuration in which a positive electric charge, specifically a hole, is used as the signal charge from the photodiode 27 may also be adopted.

[0112] The transfer transistor 28 transfers the signal charge accumulated in the photodiode 27 to the second charge accumulation region FD2.

[0113] 2, a transfer signal line is connected to the gate electrode 28e of the transfer transistor 28. The transfer transistor 28 can be turned on by applying a transfer signal that controls the on / off of the transfer transistor 28 to the gate electrode 28e via the transfer signal line. When the transfer transistor 28 is turned on, the signal charge accumulated in the photodiode 27 is transferred to the second charge accumulation region FD2.

[0114] A wiring structure 80 is provided in the insulating layer 71. In the example shown in Fig. 2, the wiring structure 80 includes a first wiring 80a and a second wiring 80b.

[0115] The wiring structure 80 typically includes at least one selected from the group consisting of metals and metal compounds. Examples of metals include copper and tungsten. Examples of metal compounds include metal nitrides and metal oxides. The same can be said for the first wiring 80a and the first wiring 80b.

[0116] A first contact plug cp1, a second contact plug cp2, a third contact plug cp3, a fourth contact plug cp4, a fifth contact plug cp5, a sixth contact plug cp6, and a seventh contact plug cp7 are provided in the insulating layer 71. Also provided in the insulating layer 71 are a gate electrode 26e, a gate electrode 22e, and a gate electrode 28e.

[0117] Typically, the first contact plug cp1, the second contact plug cp2, the third contact plug cp3, the fourth contact plug cp4, the fifth contact plug cp5, the sixth contact plug cp6, and the seventh contact plug cp7 contain a semiconductor material. In this embodiment, the first contact plug cp1, the second contact plug cp2, the third contact plug cp3, the fourth contact plug cp4, the fifth contact plug cp5, the sixth contact plug cp6, and the seventh contact plug cp7 are polysilicon layers doped with impurities of the first conductivity type. However, the semiconductor material contained in the first contact plug cp1, the second contact plug cp2, the third contact plug cp3, the fourth contact plug cp4, the fifth contact plug cp5, the sixth contact plug cp6, and the seventh contact plug cp7 may be polycrystalline silicon, germanium, or the like. In addition, the first contact plug cp1, the second contact plug cp2, the third contact plug cp3, the fourth contact plug cp4, the fifth contact plug cp5, the sixth contact plug cp6 and the seventh contact plug cp7 may contain a metal in addition to or instead of a semiconductor material.

[0118] The first substrate portion 1 is provided with a first through hole 82. Specifically, openings are provided in the first main surface 1A and the second main surface 1B of the first substrate portion 1, and the first through hole 82 connects these openings. More specifically, the first through hole 82 extends along the thickness direction of the first substrate portion 1.

[0119] A first through electrode 81 is provided in the first through hole 82. The first through electrode 81 can electrically connect elements spaced apart in the thickness direction of the first substrate portion 1 by the first substrate portion 1.

[0120] The first through electrode 81 typically contains at least one selected from the group consisting of metals and metal compounds. Examples of metals include copper and tungsten. Examples of metal compounds include metal nitrides and metal oxides. However, the first through electrode 81 may contain the same semiconductor material as the material contained in the first substrate portion 1, and may be doped with impurities of the first conductivity type or the second conductivity type. Examples of semiconductor materials that the first substrate portion 1 and the first through electrode 81 may contain include silicon, polycrystalline silicon, germanium, etc.

[0121] The insulating layer 33 is provided along the extension direction of the first through electrode 81. In plan view, the insulating layer 33 surrounds the first through electrode 81. Specifically, in plan view, the insulating layer 33 surrounds the first through electrode 81 without any gaps.

[0122] The pixel electrode 13, the first through electrode 81, the first contact plug cp1, the second wiring 80b, the second contact plug cp2, and the charge storage region FD are electrically connected in this order. Therefore, the signal charge can be sent from the pixel electrode 13 to the charge storage region FD through the first through electrode 81, the first contact plug cp1, the second wiring 80b, and the second contact plug cp2 in this order. Specifically, the positive holes or electrons as the signal charge can be sent from the pixel electrode 13 to the charge storage region FD through the first through electrode 81, the first contact plug cp1, the second wiring 80b, and the second contact plug cp2 in this order.

[0123] The charge storage region FD, the second contact plug cp2, the second wiring 80b, the fifth contact plug cp5, and the gate electrode 22e of the signal detection transistor 22 are electrically connected in this order. Therefore, the signal charge can be sent from the charge storage region FD to the gate electrode 22e through the second contact plug cp2, the second wiring 80b, and the fifth contact plug cp5 in this order.

[0124] The third contact plug cp3 electrically connects the second diffusion region 68an and the first wiring 80a, so that charges can be transferred from the second diffusion region 68an through the third contact plug cp3 to the first wiring 80a.

[0125] The third diffusion region 68bn and the fourth contact plug cp4 are electrically connected to each other. Therefore, charges can flow between the third diffusion region 68bn and the fourth contact plug cp4. Note that the wiring connected to the fourth contact plug cp4 is not shown in the figure.

[0126] The fourth diffusion region 68cn and the sixth contact plug cp6 are electrically connected to each other. Therefore, charges can flow between the fourth diffusion region 68cn and the sixth contact plug cp6. Note that the wiring connected to the sixth contact plug cp6 is not shown in the figure.

[0127] The fifth diffusion region 68dn, i.e., the second charge storage region FD2, is electrically connected to the seventh contact plug cp7. Therefore, charges can flow between the fifth diffusion region 68dn and the seventh contact plug cp7. Note that the wiring connected to the seventh contact plug cp7 is not shown.

[0128] 2, the first through electrode 81 is connected to the second wiring 80b via the first contact plug cp1. However, the first through electrode 81 may be directly connected to the second wiring 80b.

[0129] 2, the first through electrode 81 is directly connected to the pixel electrode 13. However, the first through electrode 81 may be connected to the pixel electrode 13 via a plug or the like.

[0130] Next, the device structure in the peripheral region 102 will be described.

[0131] The peripheral region 102 includes an insulating layer 73, an insulating layer 72, and a second substrate portion 2. The insulating layer 73, the insulating layer 72, and the second substrate portion 2 are laminated in this order. Specifically, these are laminated in the thickness direction of the second substrate portion 2. The peripheral region 102 also includes a second through electrode 83, and a connection electrode 17.

[0132] The second substrate portion 2 is, for example, a part of a silicon substrate. The second substrate portion 2 has a first main surface 2A and a second main surface 2B. The first main surface 2A is the back surface. The second main surface 2B is the front surface. In this embodiment, the first main surface 2A and the second main surface 2B extend perpendicularly to the thickness direction of the second substrate portion 2.

[0133] In the insulating layer 73, a third wiring 80c, a fourth wiring 80d, an eighth contact plug cp8, and a ninth contact plug cp9 are provided.

[0134] As the material of the third wiring 80c and the fourth wiring 80d, the material that can be used as the material of the first wiring 80a and the second wiring 80b can be used.

[0135] The materials that can be used for the eighth contact plug cp8 and the ninth contact plug cp9 can be the same as those that can be used for the first contact plug cp1, the second contact plug cp2, the third contact plug cp3, the fourth contact plug cp4, the fifth contact plug cp5, the sixth contact plug cp6, and the seventh contact plug cp7.

[0136] The second substrate portion 2 is provided with a second through hole 87. Specifically, openings are provided in the first main surface 2A and the second main surface 2B of the second substrate portion 2, and the second through hole 87 connects these openings. Specifically, the second through hole 87 extends along the thickness direction of the second substrate portion 2.

[0137] A second through electrode 83 is provided in the second through hole 87. The second through electrode 83 can electrically connect elements spaced apart in the thickness direction of the second substrate portion 2 by the second substrate portion 2.

[0138] As the material of the second through electrode 83, a material that can be used as the material of the first through electrode 81 can be used.

[0139] As the material for the connection electrode 17, a material that can be used for the shield electrode 16 or the counter electrode 15 can be used.

[0140] Although not shown, an insulating layer similar to the insulating layer 33 may surround the second through electrode 83.

[0141] The first through electrode 81 and the second through electrode 83 are electrically separated from each other.

[0142] In this embodiment, a plurality of second through holes 87 are provided in the second substrate portion 2. There are a plurality of second through electrodes 83. There are a plurality of connection electrodes 17.

[0143] The multiple second through holes 87 include at least one third through hole 88 and at least one fourth through hole 89. The multiple second through electrodes 83 include at least one third through electrode 84 and at least one fourth through electrode 85. The multiple connection electrodes 17 include at least one first connection electrode 18 and at least one second connection electrode 19.

[0144] The third wiring 80c, the eighth contact plug cp8, the third through electrode 84, the first connection electrode 18, and the shield electrode 16 are electrically connected in this order. A voltage can be supplied to the shield electrode 16 via the third wiring 80c, the eighth contact plug cp8, the third through electrode 84, and the first connection electrode 18 in this order. The voltage supplied to the shield electrode 16 can be referred to as a shield voltage.

[0145] 3 shows a specific example of electrical connection between the third through electrode 84 and the shield electrode 16 via the first connection electrode 18. In the example of FIG. 3, the first connection electrode 18 is provided so as to surround the shield electrode 16 in a plan view, and a plurality of third through electrodes 84 are connected to the first connection electrode 18. The "x" mark in FIG. 3 shows the third through electrode 84 in a plan view. In the example of FIG. 3, the shield electrode 16 and the first connection electrode 18 are electrically connected, but there is a connection mark between them. However, the shield electrode 16 and the first connection electrode 18 may be an integrated electrode without a connection mark between them.

[0146] 2, the fourth wiring 80d, the ninth contact plug cp9, the fourth through electrode 85, the second connection electrode 19, and the counter electrode 15 are electrically connected in this order. A voltage can be supplied to the counter electrode 15 via the fourth wiring 80d, the ninth contact plug cp9, the fourth through electrode 85, and the second connection electrode 19 in this order. The voltage supplied to the counter electrode 15 can be referred to as a counter voltage.

[0147] Fig. 4A is a cross-sectional view showing one specific example of electrical connection between the fourth through-hole electrode 85 and the counter electrode 15. Fig. 4B is a plan view showing the specific example. Fig. 4C is a cross-sectional view showing another specific example of electrical connection between the fourth through-hole electrode 85 and the counter electrode 15. Fig. 4D is a plan view showing the other specific example.

[0148] In the examples of Figures 4A to 4D, the first substrate unit 1 and the second substrate unit 2 are different parts of a common substrate in a plan view. Some of the elements of the imaging device 100 are omitted from Figures 4A to 4D. For example, the shield electrode 16 is omitted from Figures 4B and 4D. The "x" marks in Figures 4B and 4D typically indicate the fourth through electrode 85 in a plan view.

[0149] 4A and 4B, the counter electrode 15 is provided so as to straddle the boundary between the pixel region 101 and the peripheral region 102. The portion of the counter electrode 15 that straddles the boundary between the pixel region 101 and the peripheral region 102 approaches the common substrate as it progresses from the pixel region 101 side to the peripheral region 102 side. The portion of the counter electrode 15 that belongs to the peripheral region 102 is connected to the fourth through electrode 85 via the second connection electrode 19.

[0150] 4C and 4D, a wiring layer 96 is provided so as to straddle the boundary between the pixel region 101 and the peripheral region 102. The counter electrode 15 and the fourth through-electrode 85 are electrically connected via the wiring layer 96 and the second connection electrode 19.

[0151] Specifically, in the example of FIGS. 4C and 4D, an insulating layer 97 is disposed on the counter electrode 15 in the pixel region 101. A through hole 97a is provided in the insulating layer 97. The wiring layer 96 enters the through hole 97a and thereby contacts the upper surface of the counter electrode 15. The wiring layer 96 also contacts the side surface of the counter electrode 15. In this manner, the wiring layer 96 is electrically connected to the counter electrode 15.

[0152] In this embodiment, the first substrate portion 1 and the second substrate portion 2 are different portions of a single substrate in a plan view. The first main surface 1A and the first main surface 2A are continuous. The second main surface 1B and the second main surface 2B are continuous. The insulating layer 70 and the insulating layer 72 can be an integral layer of the same material. The insulating layer 71 and the insulating layer 73 can be an integral layer of the same material.

[0153] In this embodiment, the wiring structure 80 includes a first wiring 80a, a second wiring 80b, a third wiring 80c, and a fourth wiring 80d. The first wiring 80a, the second wiring 80b, the third wiring 80c, and the fourth wiring 80c configure a wiring layer. The wiring structure 80 can have multiple wiring layers.

[0154] The imaging device 100 will be further described below. In the following, the terms first electrode and second electrode are used. In this embodiment, the first electrode corresponds to the pixel electrode 13. The second electrode corresponds to the counter electrode 15. The above-mentioned characteristics of the pixel electrode 13 are applicable to the first electrode. The above-mentioned characteristics of the counter electrode 15 are applicable to the second electrode.

[0155] In this embodiment, the imaging device 100 includes a pixel region 101 and a peripheral region 102. The pixels 10 are provided in the pixel region 101. The peripheral region 102 is provided with a peripheral circuit 90. The peripheral circuit 90 controls the pixels 10.

[0156] The pixel region 101 has a first substrate unit 1. The pixel 10 has a first electrode, a second electrode, a photoelectric conversion layer 14, a charge storage region FD, a first through hole 82, and a first through electrode 81. The photoelectric conversion layer 14 is located between the first electrode and the second electrode. The charge storage region FD is provided in the first substrate unit 1. The first through hole 82 penetrates the first substrate unit 1. The first through electrode 81 is provided in the first through hole 82. The first through electrode 81 electrically connects the first electrode and the charge storage region FD.

[0157] The peripheral region 102 has the second substrate portion 2, a second through hole 87, and a second through electrode 83. The second through hole 87 penetrates the second substrate portion 2. The second through electrode 83 is provided in the second through hole 87.

[0158] The first through electrode 81 can electrically connect elements on the first surface side and elements on the second surface side of the first substrate unit 1 in the pixel region 101. The second through electrode 83 can electrically connect elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102.

[0159] The first through electrode 81 and the second through electrode 83 have a common basic configuration in that they are through electrodes. On the other hand, there is a degree of freedom in the design of the through electrodes. For this reason, it is possible to adjust the design of the first through electrode 81 according to the required specifications of the pixel region 101, and adjust the design of the second through electrode 83 according to the required specifications of the peripheral region 102. Therefore, the configuration in which the first through electrode 81 is provided in the pixel region 101 and the second through electrode 83 is provided in the peripheral region 102 is advantageous from the viewpoint of mass-producing the imaging device 100 that satisfies the required specifications of the pixel region 101 and the required specifications of the peripheral region 102.

[0160] Specifically, in the pixel region 101, the first through electrode 81 can be designed taking into consideration that charges obtained by photoelectric conversion flow as signals through the first through electrode 81. In addition, in the peripheral region 102, the second through electrode 83 can be designed taking into consideration that the peripheral region 102 has the peripheral circuit 90.

[0161] The pixel region 101 will be described. When the imaging device 100 has one first electrode, the pixel region 101 refers to a region that overlaps with the one first electrode in a planar view. When the imaging device 100 has a plurality of first electrodes, the pixel region 101 refers to a region that overlaps with the smallest rectangle that surrounds the plurality of first electrodes in a planar view.

[0162] Depending on the manufacturing method, etc., a dummy electrode that is not electrically connected to the charge accumulation region may be provided in the imaging device 100. A region where the first electrode is not distributed but the dummy electrode is distributed does not correspond to the pixel region 101.

[0163] In this embodiment, the first substrate portion 1 and the second substrate portion 2 are each a part of a silicon substrate. According to this embodiment, the first through electrode 81 and the second through electrode 83 can provide advantages based on TSVs (Through Silicon Vias) in both the pixel region 101 and the peripheral region 102.

[0164] The peripheral area 102 will now be described.

[0165] In this embodiment, the peripheral region 102 is adjacent to the pixel region 101 in a plan view. The first substrate unit 1 and the second substrate unit 2 are each a part of a single semiconductor substrate. FIGS. 5A and 5B are plan views showing an example of the pixel region 101 and the peripheral region 102. In the example of FIG. 5A, the peripheral region 102 extends in one direction of a first axis 131 and in one direction of a second axis 132 when viewed from the pixel region 101 in a plan view. In the example of FIG. 5B, the peripheral region 102 extends on both sides along the first axis 131 and on both sides along the second axis 132 when viewed from the pixel region 101 in a plan view.

[0166] However, the peripheral region 102 may be a region that at least partially overlaps with the pixel region 101 in a plan view. Fig. 5C is an exploded perspective view showing the pixel region 101 and the peripheral region 102 according to such an embodiment. In the embodiment of Fig. 5C, the first substrate unit 1 and the second substrate unit 2 are separate semiconductor substrates stacked on each other. The imaging device 100 of Fig. 5C may be a chip-stack imaging device.

[0167] The first axis 131 and the second axis 132 are different axes from each other. The first axis 131 and the second axis 132 may be perpendicular to each other.

[0168] In this embodiment, the multiple pixels 10 configure a pixel array PA. The first axis 131 is parallel to one of the rows and columns of the pixel array PA. The second axis 132 is parallel to the other of the rows and columns of the pixel array PA. Specifically, the first axis 131 is parallel to the rows of the pixel array PA. The second axis 132 is parallel to the columns of the pixel array PA. The first axis 131 may be parallel to the columns of the pixel array PA, and the second axis 132 may be parallel to the rows of the pixel array PA.

[0169] The expression "the first through electrode 81 is provided in the first through hole 82" will be explained. This expression includes a form in which the first through electrode 81 extends in the first through hole 82 without protruding from the first through hole 82. This expression includes a form in which the first through electrode 81 extends protruding from the first through hole 82. These points also apply to the expression "the second through electrode 83 is provided in the second through hole 87."

[0170] In this embodiment, the charge storage region FD is the first diffusion region 67n. The charge storage region FD is one of the source and the drain of the reset transistor 26. The reset transistor 26 can reset the potential of the charge storage region FD.

[0171] In this embodiment, the imaging device 100 includes a shield electrode 16. The shield electrode 16 is electrically isolated from the first electrode. The photoelectric conversion layer 14 is located between the shield electrode 16 and the second electrode.

[0172] In this embodiment, an electrical path is configured that is electrically isolated from the first through electrode 81 and includes the second through electrode 83, and that bypasses the first substrate unit 1 to reach a specific portion in the pixel region 101. This electrical path does not pass through the first substrate unit.

[0173] The specific portion belongs to the pixel region 101. For this reason, it is also possible to configure an electrical path that passes through the first substrate unit 1 to reach the specific portion. However, doing so may cause crosstalk between the electrical path and the first through-electrodes 81, and noise may be superimposed on the charge flowing through the first through-electrodes 81. However, when an electrical path that bypasses the first substrate unit 1 to reach the specific portion is configured, crosstalk between the electrical path and the first through-electrodes 81 is easier to suppress than when an electrical path that passes through the first substrate unit 1 to reach the specific portion is configured.

[0174] The specific portion may be any portion in the pixel region 101. In one example, the shield electrode 16 includes the specific portion. In another example, the second electrode includes the specific portion. In Figures 3, 4A, and 4C, examples of the specific portion are indicated by the symbol SP.

[0175] The shapes of the first through electrode 81 and the second through electrode 83 are not particularly limited. The cross-sectional shapes of the first through electrode 81 and the second through electrode 83 are, for example, a circle, an ellipse, a polygon, a polygon with rounded corners, etc. The polygon is a triangle, a rectangle, a pentagon, a hexagon, etc. FIG. 6 is an explanatory diagram in the form of a table showing examples of the cross-sectional shapes of the first through electrode 81 and the second through electrode 83.

[0176] In this embodiment, the cross-sectional shape of the first through electrode 81 is different from the cross-sectional shape of the second through electrode 83. Making the cross-sectional shapes of the first through electrode 81 and the second through electrode 83 different in this way can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0177] In this embodiment, the cross-sectional shape of the first through electrode 81 refers to the shape of the first through electrode 81 in a cross section perpendicular to the thickness direction of the first substrate portion 1 and passing through the first through electrode 81. The cross-sectional shape of the second through electrode 83 refers to the shape of the second through electrode 83 in a cross section perpendicular to the thickness direction of the second substrate portion 2 and passing through the second through electrode 83. "Different shapes" means that the figures being referred to are neither congruent nor similar.

[0178] In one specific example, the cross-sectional shape of the first through electrode 81 is closer to a circle than the cross-sectional shape of the second through electrode 83. The cross-sectional shape of the second through electrode 83 is closer to a rectangle than the cross-sectional shape of the first through electrode 81. These are advantageous from the viewpoint of flowing a large current between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102 while suppressing the superposition of noise on the charge flowing through the first through electrode 81 in the pixel region 101. This point will be specifically described below.

[0179] In the pixel region 101, charges obtained by photoelectric conversion in the photoelectric conversion layer 14 flow as a signal through the first through electrode 81. In the above specific example, the cross-sectional shape of the first through electrode 81 is relatively close to a circle. This makes it easy to realize a first through electrode 81 that has a small cross-sectional area and is therefore less likely to cause crosstalk between other through electrodes, electrical paths such as wiring, etc. This is advantageous from the viewpoint of suppressing noise superposition on the charges flowing through the first through electrode 81.

[0180] Moreover, being able to realize the first through electrode 81 with a small cross-sectional area is advantageous in terms of realizing a miniaturized pixel region 101. This is also advantageous in terms of ensuring space for arranging elements such as a photodiode in the first substrate portion 1.

[0181] On the other hand, the cross-sectional shape of the second through electrode 83 is relatively close to a rectangle. This can be advantageous in realizing a second through electrode 83 with a large cross-sectional area and low resistance. The second through electrode 83 with low resistance makes it easy to pass a large current between the elements on the first surface side and the elements on the second surface side of the second substrate portion 2. Being able to pass a large current can be advantageous in terms of operating the element at high speed and stably.

[0182] In addition, a laser beam may be used in the process of forming a through hole in the substrate. Here, a case where a through hole having a rectangular cross-sectional shape in design is formed in a small size and a case where a through hole having a large cross-sectional shape is formed will be considered. When a small-sized through hole is formed, the cross-sectional shape of the through hole that is actually formed tends to be closer to a circle than the design. On the other hand, when a large-sized through hole is formed, the cross-sectional shape of the through hole that is actually formed tends to be closer to a rectangle, reflecting the design well. In consideration of this tendency, the cross-sectional shapes of the first through electrode 81 and the second through electrode 83 may be made to be the same in design, thereby making a difference in the cross-sectional shapes between the first through electrode 81 and the second through electrode 83 that are actually fabricated.

[0183] The expression that a figure is close to a circle will be explained. FIG. 7A is an explanatory diagram of this expression. A figure 301 is said to be close to a circle when the area S of the smallest circle 302 that encloses the figure 301 is smaller than the area S of the smallest circle 302 that encloses the figure 301. 302 The area S of the figure 301 301 The ratio of S 301 / S 302 means that is large.

[0184] The expression that a figure is close to a rectangle will now be explained. FIG. 7B is an explanatory diagram of this expression. A figure 303 is said to be close to a rectangle when the area S of the smallest rectangle 304 that encloses the figure 303 is smaller than the area S of the smallest rectangle 304 that encloses the figure 303. 304 The area S of the figure 303 303 The ratio of S 303 / S 304 means that is large.

[0185] In a typical example, a plurality of wirings are provided in the peripheral region 102. Fig. 8A is an explanatory diagram of the peripheral region 102 in which second through electrodes 83 are provided in gaps between the plurality of wirings. Fig. 8B is an explanatory diagram of the shape of the through electrodes.

[0186] In the example of FIG. 8A and FIG. 8B, the peripheral region 102 includes a plurality of wirings 111 and 112 located in the second substrate portion 2. In a plan view, the second through electrode 83 passes through a gap 115 between the plurality of wirings 111 and 112. FIG. 8B shows a rectangle 121 with a minimum area surrounding the cross-sectional shape of the first through electrode 81. FIG. 8B also shows a rectangle 123 with a minimum area surrounding the cross-sectional shape of the second through electrode 83. Here, a side having a length equal to or greater than the length of the first side is defined as a second side. The ratio of the length of the second side to the length of the first side in the rectangle 121 is defined as a first ratio. The ratio of the length of the second side to the length of the first side in the rectangle 123 is defined as a second ratio. In this case, the first ratio is smaller than the second ratio. This is advantageous from the viewpoint of suppressing noise superposition on the charge flowing through the first through-electrode 81 in the pixel region 101, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102. This point will be specifically described below.

[0187] In the pixel region 101, charges obtained by photoelectric conversion in the photoelectric conversion layer 14 can flow as a signal through the first through electrode 81. In the examples of FIGS. 8A and 8B, the first ratio for the first through electrode 81 is relatively small. For this reason, it is easy to realize a first through electrode 81 with a small cross-sectional area. As described above, this is advantageous from the viewpoint of suppressing noise superposition on charges flowing through the first through electrode 81.

[0188] On the other hand, in the peripheral region 102, as in the example of FIG. 8A and FIG. 8B, a plurality of wirings 111 and 112 are provided, and a constraint may be imposed that the second through electrode 83 is arranged to pass through the gap 115 between the wirings 111 and 112. In this regard, in the example of FIG. 8A and FIG. 8B, the second ratio for the second through electrode 83 is relatively large. This may be advantageous in realizing a second through electrode 83 having a large cross-sectional area and therefore a small resistance while satisfying the above constraint. The second through electrode 83 having a small resistance makes it easy to pass a large current between the elements on the first surface side and the elements on the second surface side of the second substrate portion 2.

[0189] In the above context, the first side may be a short side of a rectangle. The first side may be one side of a square. The second side may be a long side of a rectangle. The second side may be one side of a square. The wirings 111 and 112 are, for example, signal lines.

[0190] The cross-sectional shape of the first through electrode 81 may be the same as the cross-sectional shape of the second through electrode 83. "Having the same shape" means that the figures being referred to are in a congruent or similar relationship. The cross-sectional shape of the second through electrode 83 may be closer to a rectangle than the cross-sectional shape of the first through electrode 81. The cross-sectional shape of the first through electrode 81 may be closer to a circle than the cross-sectional shape of the second through electrode 83. In the smallest rectangle that encloses the cross-sectional shape of the first through electrode 81, the ratio of the length of the second side to the length of the first side may be smaller than the smallest rectangle that encloses the cross-sectional shape of the second through electrode 83.

[0191] In this embodiment, the cross-sectional area of ​​the first through electrode 81 is different from the cross-sectional area of ​​the second through electrode 83. Making the cross-sectional areas of the through electrodes 81 and 83 different in this way can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0192] In this embodiment, the cross-sectional area of ​​the first through electrode 81 refers to the cross-sectional area of ​​the first through electrode 81 in a cross section perpendicular to the thickness direction of the first substrate portion 1 and passing through the first through electrode 81. The cross-sectional area of ​​the second through electrode 83 refers to the cross-sectional area of ​​the second through electrode 83 in a cross section perpendicular to the thickness direction of the second substrate portion 2 and passing through the second through electrode 83.

[0193] In this embodiment, the cross-sectional area of ​​the first through electrode 81 is smaller than the cross-sectional area of ​​the second through electrode 83. This is advantageous from the viewpoint of suppressing noise superposition on the charge flowing through the first through electrode 81 in the pixel region 101, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102.

[0194] The cross-sectional area of ​​the first through electrode 81 may be larger than the cross-sectional area of ​​the second through electrode 83. The cross-sectional area of ​​the first through electrode 81 may be the same as the cross-sectional area of ​​the second through electrode 83.

[0195] In addition, a laser beam may be used in the process of forming through holes in the substrate. Here, consider the case where a plurality of through holes having the same cross-sectional area in design are densely formed and the case where they are sparsely formed. Compared to the case where the through holes are densely formed, when the through holes are sparsely formed, the laser beam is more likely to concentrate on the area where one through hole is to be formed. Therefore, even if the through holes have the same cross-sectional area in design, the cross-sectional area of ​​the sparsely formed through holes is more likely to be larger than that of the densely formed through holes. Therefore, the cross-sectional area of ​​the sparsely formed through electrodes tends to be larger than that of the densely formed through electrodes. In consideration of this tendency, the cross-sectional areas of the first through electrodes 81 and the second through electrodes 83 may be made different from each other by making the cross-sectional areas of the first through electrodes 81 and the second through electrodes 83 the same in design.

[0196] In this embodiment, the perimeter of the cross section of the first through electrode 81 is different from the perimeter of the cross section of the second through electrode 83. Making the perimeter of the cross section of the through electrodes 81 and 83 different in this way can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0197] In this embodiment, the perimeter of the cross section of the first through electrode 81 refers to the perimeter of the first through electrode 81 in a cross section perpendicular to the thickness direction of the first substrate portion 1 and passing through the first through electrode 81. The perimeter of the cross section of the second through electrode 83 refers to the perimeter of the second through electrode 83 in a cross section perpendicular to the thickness direction of the second substrate portion 2 and passing through the second through electrode 83. The perimeter is the length of the outer contour.

[0198] In this embodiment, the perimeter of the cross section of the first through electrode 81 is smaller than the perimeter of the cross section of the second through electrode 83. This is advantageous from the viewpoint of suppressing noise superposition on the charge flowing through the first through electrode 81 in the pixel region 101, while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102. This point will be specifically described below.

[0199] If the perimeter of the cross section of the first through electrode 81 is small, it is easy to realize a first through electrode 81 with a small cross-sectional area. This is advantageous from the viewpoint of suppressing noise superposition on the charge flowing through the first through electrode 81, as described above.

[0200] If the perimeter of the cross section of the second through electrode 83 is large, it is easy to realize a second through electrode 83 with a large cross-sectional area. As described above, this is advantageous from the viewpoint of passing a large current between elements on the first surface side and elements on the second surface side of the second substrate portion 2.

[0201] The perimeter of the cross section of the first through electrode 81 may be greater than the perimeter of the cross section of the second through electrode 83. The perimeter of the cross section of the first through electrode 81 may be the same as the perimeter of the cross section of the second through electrode 83.

[0202] Depending on the manufacturing method of the through electrode, the cross-sectional area at one end of the through electrode in the thickness direction of the substrate portion may not strictly match the cross-sectional area at the other end. The ratio of the cross-sectional area at one end of the first through electrode 81 in the thickness direction of the first substrate portion 1 to the cross-sectional area at the other end is, for example, 0.8 to 1.2, and may be 0.9 to 1.1. The ratio of the cross-sectional area at one end of the second through electrode 83 in the thickness direction of the second substrate portion 2 to the cross-sectional area at the other end is, for example, 0.8 to 1.2, and may be 0.9 to 1.1.

[0203] The length of the first through electrode 81 in the thickness direction of the first substrate unit 1 may be longer than the length of the first through hole 82 in the thickness direction of the first substrate unit 1. These lengths may be the same.

[0204] The length of the second through electrode 83 in the thickness direction of the second substrate portion 2 may be longer than the length of the second through hole 87 in the thickness direction of the second substrate portion 2. These lengths may be the same.

[0205] In this embodiment, a plurality of first electrodes are present in the pixel region 101. A plurality of first through electrodes 81 are present in the pixel region 101. A plurality of second through electrodes 83 are present in the peripheral region .

[0206] However, in the pixel region 101, the number of first electrodes may be one. The number of first through electrodes 81 may be one. In the peripheral region 102, the number of second through electrodes 83 may be one.

[0207] In this embodiment, the number density of the first through electrodes 81 is different from the number density of the second through electrodes 83. Making a difference in the number density of the first through electrodes 81 and the second through electrodes 83 in this manner can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0208] The expressions "number density of the first through electrodes 81" and "number density of the second through electrodes 83" will be explained. FIG. 9 is an explanatory diagram of these expressions. As described above, the first electrodes may correspond to the pixel electrodes 13. Here, the first electrodes are denoted by the reference numeral 13. This point is similar to the explanation using FIG. 11A and FIG. 11B. Consider a smallest first rectangle 401 that surrounds all the first electrodes 13 present in the pixel region 101 in a plan view. The first rectangle 401 corresponds to the pixel region 101. Also consider a smallest second rectangle 402 that surrounds all the first electrodes 13 present in the pixel region 101 and all the second through electrodes 83 present in the peripheral region 102 in a plan view. The area of ​​the first rectangle 401 is defined as the first area S 401 The first area S is calculated from the area of ​​the second rectangle 402. 401 The value obtained by subtracting this is the second area S 402 In this case, the number density of the first through electrodes 81 is defined as the number of the first through electrodes 81 multiplied by the first area S 401 The number density of the second through electrodes 83 is calculated by dividing the number of the second through electrodes 83 by the second area S 402 9, the "x" mark typically indicates the first through electrode 81 or the second through electrode 83.

[0209] In this embodiment, the number density of the first through electrodes 81 is smaller than the number density of the second through electrodes 83. This is advantageous from the viewpoint of suppressing noise superposition on the charges flowing through the first through electrodes 81 in the pixel region 101 while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102. This point will be specifically described below.

[0210] If the number density of the first through electrodes 81 is low, crosstalk is less likely to occur between the first through electrodes 81. This is advantageous from the viewpoint of suppressing noise superimposition on the charge flowing through the first through electrodes 81.

[0211] Furthermore, a low number density of the first through electrodes 81 is advantageous in terms of realizing a miniaturized pixel region 101. Furthermore, a low number density of the first through electrodes 81 is advantageous in terms of ensuring space for arranging elements such as photodiodes in the first substrate portion 1.

[0212] On the other hand, if the number density of the second through electrodes 83 is high, it is easy to reduce the overall resistance of the multiple second through electrodes 83. This is advantageous from the viewpoint of passing a large current between elements on the first surface side and elements on the second surface side of the second substrate portion 2.

[0213] The number density of the first through electrodes 81 may be greater than the number density of the second through electrodes 83. The number density of the first through electrodes 81 may be the same as the number density of the second through electrodes 83.

[0214] In this embodiment, the area density of the first through electrodes 81 is different from the area density of the second through electrodes 83. Making the area density of the first through electrodes 81 and the second through electrodes 83 different in this way can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0215] The area density of the first through electrodes 81 and the area density of the second through electrodes 83 are the first area S 401 and the second area S 402 The area density of the first through electrodes 81 is expressed by taking the sum of the cross-sectional areas of the first through electrodes 81 in a cross section perpendicular to the thickness direction of the first substrate portion 1 as the first area S 401 The area density of the second through electrodes 83 is calculated by dividing the total cross-sectional area of ​​the second through electrodes 83 in a cross section perpendicular to the thickness direction of the second substrate portion 2 by the second area S 402 This is the value divided by .

[0216] In this embodiment, the area density of the first through electrodes 81 is smaller than the area density of the second through electrodes 83. This is advantageous from the viewpoint of suppressing noise superposition on the charges flowing through the first through electrodes 81 in the pixel region 101 while allowing a large current to flow between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102. This point will be specifically described below.

[0217] When the area density of the first through electrodes 81 is small, it is easy to realize the first through electrodes 81 that are less likely to cause crosstalk between other through electrodes, electrical paths such as wiring, etc. This is advantageous from the viewpoint of suppressing noise superposition on the charge flowing through the first through electrodes 81.

[0218] Moreover, the small area density of the first through electrodes 81 is advantageous in terms of realizing a miniaturized pixel region 101. This is also advantageous in terms of ensuring space in the first substrate portion 1 for arranging elements such as photodiodes.

[0219] On the other hand, if the area density of the second through electrodes 83 is large, it is easy to reduce the overall resistance of the multiple second through electrodes 83. This is advantageous from the viewpoint of passing a large current between elements on the first surface side and elements on the second surface side of the second substrate portion 2.

[0220] The area density of the first through electrodes 81 may be greater than the area density of the second through electrodes 83. The area density of the first through electrodes 81 may be the same as the area density of the second through electrodes 83.

[0221] In this embodiment, the material of the first through electrode 81 is different from the material of the second through electrode 83. Making the materials of the first through electrode 81 and the second through electrode 83 different in this way can contribute to realizing the required specifications of the pixel region 101 and the peripheral region 102.

[0222] In addition, the expression "different materials" does not necessarily mean that the types of components are different, but also means that the content ratios of the components are different.

[0223] In this embodiment, the main component of the first through electrode 81 is different from the main component of the second through electrode 83.

[0224] In this embodiment, the first through electrode 81 does not substantially contain copper. The second through electrode 82 contains copper as a main component. These are advantageous from the viewpoint of flowing a large current between elements on the first surface side and elements on the second surface side of the second substrate unit 2 in the peripheral region 102 while avoiding the diffusion of copper in the pixel region 101. Specifically, it is possible to avoid a situation in which copper diffuses into the photoelectric conversion layer 14 in the pixel region 101 and causes a leak current in the photoelectric conversion layer 14. In addition, in the peripheral region 102, the second through electrode 83 with low resistance can be realized due to the excellent conductivity of copper. Therefore, it is easy to flow a large current between elements on the first surface side and elements on the second surface side of the second substrate unit 2.

[0225] The first through electrode 81 may contain copper as a main component. The second through electrode 82 may not substantially contain copper. The main component of the first through electrode 81 may be the same as the main component of the second through electrode 83. The material of the first through electrode 81 may be the same as the material of the second through electrode 83.

[0226] The arrangement interval of the second through electrodes 83 will be described. Fig. 10A is an explanatory diagram of the arrangement interval of the second through electrodes 83 according to one example. Fig. 10B is an explanatory diagram of the arrangement interval of the second through electrodes 83 according to another example.

[0227] 10A and 10B, the peripheral region 102 has a first adjacent region 102A and a second adjacent region 102B. The first adjacent region 102A is adjacent to the pixel region 101 in a first direction 231 in a plan view. The second adjacent region 102B is adjacent to the pixel region 101 in a second direction 232 in a plan view. A plurality of second through electrodes 83 are present in each of the first adjacent region 102A and the second adjacent region 102B.

[0228] In the example of FIGS. 10A and 10B, the average value of the arrangement interval of the second through electrodes 83 in the first adjacent region 102A is set as the average arrangement interval P 21The average value of the arrangement interval of the second through electrodes 83 in the second adjacent region 102B is expressed as the average arrangement interval P 22 The dimension of the first adjacent region 102A in the second direction 132 is expressed as dimension L 1 The dimension of the second adjacent region 102B in the first direction 131 is expressed as dimension L 2 It is written as follows.

[0229] In the example of FIG. 10A, the average arrangement interval P 22 Average placement interval P 21 The ratio P 21 / P 22 is 0.8 or more and 1.2 or less. If the two average arrangement intervals are equivalent to this extent, it is easy to make the current supply capacity per unit length in the second direction 232 of the first adjacent region 102A and the current supply capacity per unit length in the first direction 231 of the second adjacent region 102B equivalent. 21 / P 22 may be greater than or equal to 0.9 and less than or equal to 1.1.

[0230] In the example of FIG. 10B, the dimension L 1 is the dimension L 2 The average spacing P 21 is the average placement interval P 22 When there is such a dimensional relationship between the first adjacent region 102A and the second adjacent region 102B, if the average arrangement interval satisfies the dimensional relationship, it is easy to make the current supply capacity of the first adjacent region 102A as a whole and the current supply capacity of the second adjacent region 102B as a whole equal.

[0231] Here, the dimension L 2 Dimension L for 1 The ratio of L 1 / L 2 The standard ratio L 1 / L 2 The average placement interval P 22 Average placement interval P 21 The ratio of these is the placement ratio P 21 / P 22 Define the standard ratio L 1 / L 2 Placement ratio P21 / P 22 The ratio of the arrangement ratio P is, for example, 0.8 to 1.2, and may be 0.9 to 1.1. 21 / P 22 is the reference ratio L 1 / L 2 may be the same as

[0232] The average arrangement interval of the second through electrodes 83 is determined as follows. In a plan view, the geometric centers of adjacent ones of the plurality of second through electrodes 83 are connected by line segments. This results in a plurality of line segments 452. The average arrangement interval of the second through electrodes 83 is the average value of the lengths of these line segments 452.

[0233] In this embodiment, the multiple second through electrodes 83 include a third through electrode 84 and a fourth through electrode 85 that are electrically isolated from each other. With this configuration, the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85 can be electrically isolated from each other.

[0234] In this embodiment, a plurality of third through electrodes 84 are present in the peripheral region 102. A plurality of fourth through electrodes 85 are present in the peripheral region 102.

[0235] In this embodiment, the multiple third through electrodes 84 are electrically connected to each other. The multiple fourth through electrodes 85 are electrically connected to each other.

[0236] However, the multiple third through electrodes 84 may be electrically separated from one another. The multiple fourth through electrodes 85 may be electrically separated from one another.

[0237] In the present embodiment, the third through electrode 84 is electrically connected to the shield electrode 16. The third through electrode 84 in this configuration can electrically connect the shield electrode 16 to an element located on the opposite side of the shield electrode 16 as viewed from the second substrate portion 2.

[0238] In this embodiment, the fourth through electrode 85 is electrically connected to the second electrode. The fourth through electrode 85 in this configuration can electrically connect the second electrode to an element located on the opposite side of the second electrode as viewed from the second substrate portion 2. As described above, the second electrode can correspond to the counter electrode 15.

[0239] In this embodiment, the difference between the maximum and minimum values ​​of the control voltage applied to one of the third through electrode 84 and the fourth through electrode 85 is larger than the difference between the maximum and minimum values ​​of the control voltage applied to the other of the third through electrode 84 and the fourth through electrode 85. The electrical resistance of one of the third through electrode 84 and the fourth through electrode 85 is lower than the electrical resistance of the other of the third through electrode 84 and the fourth through electrode 85. In this configuration, the electrical resistance of the through electrode with a larger amplitude of the control voltage is relatively low. This is advantageous from the viewpoint of suppressing resistance loss.

[0240] In this embodiment, the difference between the maximum and minimum values ​​of the control voltage applied to the fourth through electrode 85 is larger than the difference between the maximum and minimum values ​​of the control voltage applied to the third through electrode 84. The electrical resistance of the fourth through electrode 85 is lower than the electrical resistance of the third through electrode 84. This configuration can be useful, for example, in the case where the imaging device 100 has a global shutter function.

[0241] However, the difference between the maximum and minimum values ​​of the control voltage applied to the third through electrode 84 may be larger than the difference between the maximum and minimum values ​​of the control voltage applied to the fourth through electrode 85. The electrical resistance of the third through electrode 84 may be lower than the electrical resistance of the fourth through electrode 85.

[0242] Furthermore, the difference between the maximum and minimum values ​​of the control voltage applied to the third through electrode 84 may be the same as the difference between the maximum and minimum values ​​of the control voltage applied to the fourth through electrode 85. The electrical resistance of the third through electrode 84 may be the same as the electrical resistance of the fourth through electrode 85.

[0243] The cross-sectional shape of the third through electrode 84 may be different from the cross-sectional shape of the fourth through electrode 85. Making the cross-sectional shapes of the through electrodes 84 and 85 different in this way can contribute to achieving the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0244] One of the third through electrode 84 and the fourth through electrode 85 may be closer to a circle than the other. The other of the third through electrode 84 and the fourth through electrode 85 may be closer to a rectangle than the other. The cross-sectional shape of the third through electrode 84 may be the same as the cross-sectional shape of the fourth through electrode 85.

[0245] The cross-sectional area of ​​the third through electrode 84 may be different from the cross-sectional area of ​​the fourth through electrode 85. Making the cross-sectional areas of the through electrodes 84 and 85 different in this way can contribute to achieving the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0246] The cross-sectional area of ​​the third through electrode 84 may be smaller than the cross-sectional area of ​​the fourth through electrode 85. The cross-sectional area of ​​the third through electrode 84 may be larger than the cross-sectional area of ​​the fourth through electrode 85. The cross-sectional area of ​​the third through electrode 84 may be the same as the cross-sectional area of ​​the fourth through electrode 85.

[0247] The cross-sectional perimeter of the third through electrode 84 may be different from the cross-sectional perimeter of the fourth through electrode 85. Making the cross-sectional perimeter of the through electrodes 84 and 85 different in this way can contribute to achieving the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0248] The perimeter of the cross section of the third through electrode 84 may be smaller than the perimeter of the cross section of the fourth through electrode 85. The perimeter of the cross section of the third through electrode 84 may be larger than the perimeter of the cross section of the fourth through electrode 85. The perimeter of the cross section of the third through electrode 84 may be the same as the perimeter of the cross section of the fourth through electrode 85.

[0249] In one example, the cross-sectional shape of the third through electrode 84 and the fourth through electrode 85 is circular. The diameter of the cross-sectional shape of the third through electrode 84 may be smaller than the diameter of the cross-sectional shape of the fourth through electrode 85. The diameter of the cross-sectional shape of the third through electrode 84 may be larger than the diameter of the cross-sectional shape of the fourth through electrode 85. The diameter of the cross-sectional shape of the third through electrode 84 and the diameter of the cross-sectional shape of the fourth through electrode 85 may be the same.

[0250] In this embodiment, a plurality of third through electrodes 84 are present in the peripheral region 102. A plurality of fourth through electrodes 85 are present in the peripheral region 102.

[0251] However, in the peripheral region 102, the number of third through electrodes 84 may be one. In the peripheral region 102, the number of fourth through electrodes 85 may be one.

[0252] In the present embodiment, the number density of the third through electrode 84 is different from the number density of the fourth through electrode 85. Providing a difference in number density between the third through electrode 84 and the fourth through electrode 85 in this manner can contribute to realizing the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0253] The expression "number density" of the third through electrode 84 will be described. Fig. 11A is an explanatory diagram of this expression. Furthermore, the expression "number density" of the fourth through electrode 85 will be described. Fig. 11B is an explanatory diagram of this expression.

[0254] 11A and 11B, a minimum first rectangle 501 that surrounds all the first electrodes 13 present in the pixel region 101 in a plan view is considered. The first rectangle 501 corresponds to the pixel region 101. The area of ​​the first rectangle 501 is defined as a first area S 501 It is defined as:

[0255] 11A, a minimum third rectangle 503 that surrounds all the first electrodes 13 in the pixel region 101 and all the third through electrodes 84 in the peripheral region 102 in a plan view is considered.501 The value obtained by subtracting the above is the third area S 503 In this case, the number density of the third through electrodes 84 is defined as the number of the third through electrodes 84 multiplied by the third area S 503 This is the value divided by .

[0256] 11B, a minimum fourth rectangle 504 that surrounds all the first electrodes 13 in the pixel region 101 and all the fourth through electrodes 85 in the peripheral region 102 in a plan view is considered. 501 The value obtained by subtracting this is the fourth area S 504 In this case, the number density of the fourth through electrodes 85 is defined as the number of the fourth through electrodes 85 divided by the fourth area S 504 This is the value divided by .

[0257] The number density of the third through electrodes 84 may be smaller than the number density of the fourth through electrodes 85. The number density of the third through electrodes 84 may be larger than the number density of the fourth through electrodes 85. The number density of the third through electrodes 84 may be the same as the number density of the fourth through electrodes 85.

[0258] In this embodiment, the area density of the third through electrode 84 is different from the area density of the fourth through electrode 85. Providing a difference between the area densities of the through electrodes 84 and 85 in this manner can contribute to achieving the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0259] The area density of the third through electrodes 84 and the area density of the fourth through electrodes 85 are the third area S 503 and the fourth area S 504 The area density of the third through electrodes 84 is expressed by taking the sum of the cross-sectional areas of the third through electrodes 84 in a cross section perpendicular to the thickness direction of the second substrate portion 2 as the third area S 503 The area density of the fourth through electrodes 85 is calculated by dividing the total cross-sectional area of ​​the fourth through electrodes 85 in a cross section perpendicular to the thickness direction of the second substrate portion 2 by the fourth area S 504 This is the value divided by .

[0260] The area density of the third through electrode 84 may be smaller than the area density of the fourth through electrode 85. The area density of the third through electrode 84 may be larger than the area density of the fourth through electrode 85. The area density of the third through electrode 84 may be the same as the area density of the fourth through electrode 85.

[0261] 11A, the third through-electrodes 84 are present on both sides of the pixel region 101 along the first axis 131 and on both sides of the pixel region 101 along the second axis 132. In the example of FIG. 11B, the fourth through-electrodes 85 are present on both sides of the pixel region 101 along the first axis 131, but are not present on either side of the pixel region 101 along the second axis 132.

[0262] However, the third through-electrode 84 may be present on both sides of the pixel region 101 along the first axis 131, may be present on one side of the pixel region 101 along the first axis 131, or may not be present on either side of the pixel region 101 along the first axis 131. The third through-electrode 84 may be present on both sides of the pixel region 101 along the second axis 132, may be present on one side of the pixel region 101 along the second axis 132, or may not be present on either side of the pixel region 101 along the second axis 132.

[0263] Furthermore, the fourth through-electrode 85 may be present on both sides of the pixel region 101 along the first axis 131, may be present on one side of the pixel region 101 along the first axis 131, or may not be present on either side of the pixel region 101 along the first axis 131. The fourth through-electrode 85 may be present on both sides of the pixel region 101 along the second axis 132, may be present on one side of the pixel region 101 along the second axis 132, or may not be present on either side of the pixel region 101 along the second axis 132.

[0264] The arrangement intervals of the third through electrodes 84 and the arrangement intervals of the fourth through electrodes 85 will be described. Fig. 12A is an explanatory diagram of the arrangement intervals of the third through electrodes 84. In Fig. 12A, the illustration of the fourth through electrodes 85 is omitted. Fig. 12B is an explanatory diagram of the arrangement intervals of the fourth through electrodes 85. In Fig. 12B, the illustration of the third through electrodes 84 is omitted.

[0265] In this embodiment, as shown in Fig. 12A, a plurality of third through electrodes 84 are present in the first adjacent region 102A. As shown in Fig. 12B, a plurality of fourth through electrodes 85 are present in the first adjacent region 102A. The average value of the arrangement intervals of the third through electrodes 84 in the first adjacent region 102A is defined as the average arrangement interval P 31 The average value of the arrangement interval of the fourth through electrodes 85 in the first adjacent region 102A is expressed as the average arrangement interval P 41 The average placement interval P 31 is the average placement interval P 41 Providing a difference in the average arrangement interval between the third through electrode 84 and the fourth through electrode 85 in this manner can contribute to achieving the required specifications of the connection destination of the third through electrode 84 and the connection destination of the fourth through electrode 85.

[0266] Average placement interval P 31 is the average placement interval P 41 may be the same as

[0267] Here, the average arrangement interval P of the third through electrodes 84 in the first adjacent region 102A is 31 The third average arrangement interval P 31 The average arrangement interval of the fourth through electrodes 85 in the first adjacent region 102A is defined as a fourth average arrangement interval P 41 The fourth average arrangement spacing P 41 The third average arrangement spacing P 31 The ratio may be smaller than 0.8, may be greater than 0.8 and less than 1.2, or may be greater than 1.2.

[0268] In each of the first adjacent region 102A and the second adjacent region 102B, there may be a plurality of third through electrodes 84. In each of the first adjacent region 102A and the second adjacent region 102B, there may be a plurality of fourth through electrodes 85.

[0269] The average value of the arrangement interval of the third through electrodes 84 in the first adjacent region 102A is defined as the average arrangement interval P 31 The average value of the arrangement interval of the third through electrodes 84 in the second adjacent region 102B is expressed as the average arrangement interval P 32 The average value of the arrangement interval of the fourth through electrodes 85 in the first adjacent region 102A is expressed as the average arrangement interval P 41 The average value of the arrangement interval of the fourth through electrodes 85 in the second adjacent region 102B is expressed as the average arrangement interval P 42 It is written as follows.

[0270] Average placement interval P 32 Average placement interval P 31 The ratio P 31 / P 32 The ratio P may be 0.8 or more and 1.2 or less. 31 / P 32 may be greater than or equal to 0.9 and less than or equal to 1.1.

[0271] The dimension L of the first adjacent region 102A along the second axis 132 1 is the dimension L along the first axis 131 of the second adjacent region 102B 2 The average arrangement interval P 31 is the average placement interval P 32 It may be shorter than that.

[0272] Here, the average arrangement interval P 32 Average placement interval P 31 The ratio of these is the placement ratio P 31 / P 32 Define the standard ratio L 1 / L 2 Placement ratio P 31 / P 32 The ratio of the arrangement ratio P is, for example, 0.8 to 1.2, and may be 0.9 to 1.1. 31 / P32 is the reference ratio L 1 / L 2 may be the same as

[0273] Average placement interval P 42 Average placement interval P 41 The ratio P 41 / P 42 The ratio P may be 0.8 or more and 1.2 or less. 41 / P 42 may be greater than or equal to 0.9 and less than or equal to 1.1.

[0274] The dimension L of the first adjacent region 102A along the second axis 132 1 is the dimension L along the first axis 131 of the second adjacent region 102B 2 The average arrangement interval P 41 is the average placement interval P 42 It may be shorter than that.

[0275] Here, the average arrangement interval P 42 Average placement interval P 41 The ratio of these is the placement ratio P 41 / P 42 Define the standard ratio L 1 / L 2 Placement ratio P 41 / P 42 The ratio of the arrangement ratio P is, for example, 0.8 to 1.2, and may be 0.9 to 1.1. 41 / P 42 is the reference ratio L 1 / L 2 may be the same as

[0276] 13A to 13E are explanatory diagrams showing specific examples of the arrangement of the through electrodes. In FIG. 13A to 13E, the filled-in figures in the pixel region 101 typically indicate the first through electrodes 81. In FIG. 13A to 13E, the first through electrodes 81 are drawn only in a part of the pixel region 101. However, in reality, the first through electrodes 81 may be distributed evenly over the entire pixel region 101 in a plan view. The filled-in figures outside the pixel region 101 typically indicate the second through electrodes 83 in the peripheral region 102.

[0277] 13A and 13B, the second through electrodes 83 are provided not only in a portion of the peripheral region 102 that is outside the peripheral circuit 90 in a planar view, but also in a portion of the peripheral region 102 that is within the peripheral circuit 90 in a planar view. Specifically, the second through electrodes 83 are provided in a portion of the peripheral region 102 that is within the row scanning circuit 91 in a planar view. In addition, the second through electrodes 83 are provided in a portion of the peripheral region 102 that is within the signal processing circuit 92 in a planar view.

[0278] The second through electrode 83 may be provided only in a portion of the peripheral region 102 that is within the peripheral circuit 90 in a planar view. The second through electrode 83 may be provided only in a portion of the peripheral region 102 that is outside the peripheral circuit 90 in a planar view.

[0279] 13C and 13D, in a plan view, each of the second through electrodes 83 aligned along the first axis 131 has a longitudinal direction parallel to the first axis 131. In a plan view, each of the second through electrodes 83 aligned along the second axis 132 has a longitudinal direction parallel to the second axis 132.

[0280] However, the longitudinal direction of the second through electrodes 83 does not have to coincide with the arrangement direction of the second through electrodes 83. In the example of FIG. 13E, in a plan view, each of the second through electrodes 83 aligned along the first axis 131 has a longitudinal direction parallel to an axis different from the first axis 131. In a plan view, each of the second through electrodes 83 aligned along the second axis 132 has a longitudinal direction parallel to an axis different from the second axis 132. Specifically, in a plan view, each of the second through electrodes 83 aligned along the first axis 131 has a longitudinal direction parallel to the second axis 132. In a plan view, each of the second through electrodes 83 aligned along the second axis 132 has a longitudinal direction parallel to the first axis 131.

[0281] Typically, wiring (not shown) extends in the peripheral region 102. Restrictions on the layout of the wiring may impose restrictions on the arrangement of the second through electrode 83. In reality, the position, shape, dimensions, and the like of the second through electrode 83 can be determined taking into consideration such restrictions.

[0282] In the above embodiment, a back-illuminated imaging device has been described as an example, but the present disclosure is also applicable to a front-illuminated imaging device. [Industrial Applicability]

[0283] The imaging device and imaging module according to the present disclosure can be used in various camera systems and sensor systems, such as digital still cameras, medical cameras, surveillance cameras, vehicle-mounted cameras, digital single-lens reflex cameras, and digital mirrorless single-lens cameras. [Explanation of symbols]

[0284] 1 First board section 2 Second board section 1A,1B,2A,2B Main surface 1i impurity region 10 pixels 12 Photoelectric conversion section 13 Pixel electrode 14 Photoelectric conversion layer 15 Counter electrode 16 Shield electrode 17, 18, 19 Connection electrodes 22 Signal detection transistor 22e, 26e, 28e Gate electrode 26 Reset transistor 27 Photodiode 28 Transfer transistor 29 well 30 Micro Lenses 31, 32, 33, 70, 71, 72, 73, 97 Insulating layer 35 Color Filters 67n, 68an, 68bn, 68cn, 68dn Diffusion area 80 Wiring structure 80a, 80b, 80c, 80d, 111, 112 Wiring 81,83,84,85 Through electrode 82,87,88,89,97a Through hole 90 Peripheral circuits 91 Row Scanning Circuit 92 Signal Processing Circuit 93 Output circuit 94 Control circuit 96 wiring layer 100 Imaging device 101 pixel area 102 Surrounding Areas 102A, 102B Adjacent areas 115 Gap 121,123,304,401,402,501,503,504 Rectangle 131,132 Axis 231,232 directions 301,303 Shapes 302 yen 452 lines cp1,cp2,cp3,cp4,cp5,cp6,cp7,cp8,cp9 Contact plugs FD,FD2 Charge storage area PA Pixel Array SP specific part

Claims

1. a pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; A cross-sectional shape of each of the plurality of first through electrodes is different from a cross-sectional shape of each of the plurality of second through electrodes. Imaging device.

2. the cross-sectional shape of each of the plurality of first through electrodes is closer to a circle than the cross-sectional shape of each of the plurality of second through electrodes; The cross-sectional shape of each of the plurality of second through electrodes is closer to a rectangle than the cross-sectional shape of each of the plurality of first through electrodes. The imaging device according to claim 1 .

3. the peripheral region further includes a plurality of wirings located within the second substrate portion; the second through electrodes pass between the wirings, a rectangle having a minimum area surrounding the cross-sectional shape of each of the plurality of first through electrodes has a first side and a second side having a length equal to or greater than the length of the first side; a rectangle having a minimum area surrounding the cross-sectional shape of each of the plurality of second through electrodes has a third side and a fourth side having a length equal to or greater than the length of the third side; A ratio of the length of the second side to the length of the first side is defined as a first ratio; When the ratio of the length of the fourth side to the length of the third side is defined as a second ratio, The first ratio is smaller than the second ratio. The imaging device according to claim 1 .

4. A pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; A cross-sectional area of ​​each of the plurality of first through electrodes is different from a cross-sectional area of ​​each of the plurality of second through electrodes; Imaging device.

5. A cross-sectional area of ​​each of the plurality of first through electrodes is smaller than a cross-sectional area of ​​each of the plurality of second through electrodes. The imaging device according to claim 4.

6. A pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; A circumferential length of a cross section of each of the plurality of first through electrodes is different from a circumferential length of a cross section of each of the plurality of second through electrodes; Imaging device.

7. the perimeter of the cross section of each of the first through electrodes is shorter than the perimeter of the cross section of each of the second through electrodes; The imaging device according to claim 6.

8. A pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; The material of the first through electrodes is different from the material of the second through electrodes; Imaging device.

9. the plurality of first through electrodes are substantially free of copper; The plurality of second through electrodes contain copper as a main component. The imaging device according to claim 8.

10. A pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; the peripheral region includes a first adjacent region adjacent to the pixel region in a first direction in a plan view, and a second adjacent region adjacent to the pixel region in a second direction in a plan view, a ratio of an average value of the arrangement intervals of the second through electrodes in the first adjacent region to an average value of the arrangement intervals of the second through electrodes in the second adjacent region is not less than 0.8 and not more than 1.2; Imaging device.

11. Further comprising an electrical path electrically isolated from the plurality of first through electrodes and including the plurality of second through electrodes; the electrical path is electrically connected to a specific portion in the pixel region without passing through the first substrate portion; The imaging device according to claim 1 .

12. a shield electrode electrically isolated from the first electrode; the photoelectric conversion layer is located between the shield electrode and the second electrode, The specific portion is included in the shield electrode or the second electrode. The imaging device according to claim 11.

13. a number density of the plurality of first through electrodes in the pixel region is different from a number density of the plurality of second through electrodes in the peripheral region; The imaging device according to claim 1 .

14. the number density of the first through electrodes in the pixel region is smaller than the number density of the second through electrodes in the peripheral region; The imaging device according to claim 13.

15. a shield electrode electrically isolated from the first electrode; the plurality of second through electrodes include at least one third through electrode and at least one fourth through electrode that are electrically isolated from each other; the photoelectric conversion layer is located between the shield electrode and the second electrode, The at least one third through electrode is electrically connected to the shield electrode. The imaging device according to claim 1 .

16. The at least one fourth through electrode is electrically connected to the second electrode. The imaging device according to claim 15.

17. the at least one third through electrode includes a plurality of third through electrodes; the at least one fourth through electrode includes a plurality of fourth through electrodes, a number density of the third through electrodes in the peripheral region is different from a number density of the fourth through electrodes in the peripheral region; 17. The imaging device according to claim 15 or 16.

18. An area density of the plurality of first through electrodes, which is a ratio of an area of ​​the plurality of first through electrodes to an area of ​​the pixel region, is different from an area density of the plurality of second through electrodes, which is a ratio of an area of ​​the plurality of second through electrodes to an area of ​​the peripheral region. The imaging device according to claim 1 .

19. the area density of the first through electrodes is smaller than the area density of the second through electrodes; 20. The imaging device according to claim 18.

20. a pixel region including a first substrate portion and having a plurality of pixels; a peripheral region including a second substrate portion and in which no pixels are provided; the first substrate portion and the second substrate portion are included in one semiconductor substrate, Each of the plurality of pixels is A first electrode; A second electrode; a photoelectric conversion layer located between the first electrode and the second electrode; a charge storage region provided in the first substrate portion; Including, The pixel region is a plurality of first through holes penetrating the first substrate portion; a plurality of first through electrodes each provided in a corresponding one of the plurality of first through holes and electrically connecting the first electrode and the charge storage region; The peripheral region is a plurality of second through holes penetrating the second substrate portion; a plurality of second through electrodes each provided in a corresponding one of the plurality of second through holes; A cross-sectional area of ​​each of the plurality of first through electrodes is smaller than a cross-sectional area of ​​each of the plurality of second through electrodes; Imaging device.

Images