CONTROL DEVICE, QUANTUM COMPUTER, CONTROL METHOD, AND PROGRAM

Abstract

To reduce an influence of burst errors in a quantum computer.SOLUTION: A control device for executing control to a quantum processor having multiple quantum bits for composing a quantum error correction code includes at least one of an abnormality detection part for detecting an area in which abnormality occurs in a quantum bit in the quantum processor on the basis of a syndrome value acquired periodically from the quantum processor, a code expansion part for deforming a quantum error correction code so as to increase code distance of logic quantum bits in the area when abnormality is detected by the abnormality detection part, and a re-execution part for re-executing estimation of a quantum bit error by using information in the area retrospectively when the abnormality detection part detects abnormality.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present invention relates to quantum error correction in quantum computers. [Background technology]

[0002] Quantum computers are expected to utilize the principles of quantum mechanics to significantly speed up the time required to solve problems such as prime factorization and quantum chemistry calculations compared to conventional computers. For this reason, their development is being actively pursued around the world.

[0003] Quantum bits, the basic elements of quantum computers, are prone to errors, so quantum error correction mechanisms are needed to detect and correct errors that occur during execution in order to perform quantum computations on a practical scale. In quantum error correction, information is represented as logical quantum bits using multiple quantum bits using quantum error correcting codes, and calculations are performed while detecting and correcting errors. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Fu, Xiang, et al. "A heterogeneous quantum computer architecture." Proceedings of the ACM International Conference on Computing Frontiers. 2016. Summary of the Invention [Problem to be solved by the invention]

[0005] The mechanism of quantum error correction is based on the premise that errors occur independently in each quantum bit. However, in recent years, it has been experimentally observed that when cosmic rays are incident on a chip on which quantum bits are integrated, the error rate of quantum bits over a wide range increases significantly for a long period of time. Errors with this property are called burst errors.

[0006] Although the frequency with which cosmic rays hit a chip is low, they are almost certain to occur during calculations over a long period of time, so error correction using surface codes, for example, may not function as expected. Note that burst errors like those mentioned above can also be caused by external factors other than cosmic rays.

[0007] The present invention has been made in view of the above-mentioned points, and has an object to provide a technique for reducing the influence of burst errors in a quantum computer. [Means for solving the problem]

[0008] According to the disclosed technology, there is provided a control device that controls a quantum processor having a plurality of quantum bits that constitute a quantum error correcting code, the control device comprising: an anomaly detection unit that detects an area where an anomaly has occurred in a quantum bit in the quantum processor based on a syndrome value periodically acquired from the quantum processor; and At least one of a code extension unit that, when an abnormality is detected by the abnormality detection unit, modifies a quantum error correction code so as to increase a code distance of a logical quantum bit in the region, and a re-execution unit that, when an abnormality is detected by the abnormality detection unit, goes back in time and re-executes an error estimation of a quantum bit using information of the region. A control device is provided comprising: Effect of the Invention

[0009] According to the disclosed technique, a technique for reducing the effect of burst errors in a quantum computer is provided. [Brief description of the drawings]

[0010] [Figure 1] 1 is a configuration diagram of a quantum computer according to an embodiment of the present invention. [Diagram 2] FIG. 1 is a diagram for explaining a quantum error correction process. [Diagram 3]FIG. 1 is a diagram for explaining a burst error caused by cosmic rays. [Figure 4] FIG. 2 is a detailed configuration diagram of a quantum computer according to an embodiment of the present invention. [Diagram 5] FIG. 11 is a schematic diagram for explaining a processing procedure. [Figure 6] FIG. 2 is a diagram showing a schematic diagram of coordinates on a three-dimensional grid that are the object of matching. [Figure 7] FIG. 2 is a diagram illustrating an example of a hardware configuration of a control device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of the present invention (the present embodiment) will be described with reference to the drawings. The embodiment described below is merely an example, and the embodiment to which the present invention is applied is not limited to the following embodiment. In the following description, references are represented by numbers such as [2], and the names of the documents corresponding to the numbers are listed at the end of the specification.

[0012] (Overall equipment configuration) 1 shows an example of the overall configuration of a quantum computer 300 according to this embodiment. The "quantum computer" may also be called a "quantum computer" or a "quantum computing device." This quantum computer 300 makes it possible to perform quantum computation while mitigating the effects of burst errors caused by cosmic rays or the like.

[0013] 1, a quantum computer 300 includes a control device 100 and a quantum processor 200. The control device 100 performs error-tolerant quantum computation by transmitting a control signal to the quantum processor 200 and acquiring a computation result (measurement result) from the quantum processor 200. The control device 100 can be realized by a classical computer.

[0014] The quantum processor 200 includes a plurality of quantum bits that constitute a quantum two-level system. There is no particular limitation on the physical system for realizing the quantum bits, and any physical system may be used. For example, a superconducting circuit, an ion trap, a photon, a quantum dot, or the like may be used as the physical system.

[0015] In this embodiment, a surface code, which is a kind of topological code, is configured by a plurality of quantum bits in the quantum processor 200. Therefore, a plurality of quantum bits in the quantum processor 200 are arranged in a lattice shape on a two-dimensional plane, which will be hereinafter referred to as a qubit plane. However, using a surface code as a quantum error correcting code is just one example, and a quantum error correcting code other than the surface code may be used.

[0016] 1 shows the main functional parts of the control device 100, that is, anomaly detection part 301, code extension part 302, and re-execution part 303. The anomaly detection part 301 detects an area where an anomaly occurs in a quantum bit in the quantum processor based on a syndrome value periodically acquired from the quantum processor 200. When an anomaly is detected by the anomaly detection part 301, the code extension part 302 modifies the quantum error correction code so as to increase the code distance of the logical quantum bit in the area. When an anomaly is detected by the anomaly detection part 301, the re-execution part 302 goes back in time and re-executes the estimation of the quantum bit error using information on the area. More specific functional configurations of the anomaly detection part 301, the code extension part 302, and the re-execution part 303 will be described later.

[0017] (Basic quantum error correction processing) Here, we will explain the basic quantum error correction process. As mentioned above, quantum bits, which are the basic elements that make up a quantum computer, are prone to errors, and a quantum error correction mechanism that detects and corrects errors that occur during execution is required to perform quantum calculations on a practical scale. In quantum error correction, information is expressed as a logical quantum bit using multiple quantum bits using a quantum error correction code, and calculations are performed while detecting and correcting errors.

[0018] A typical flow of quantum error correction will be described with reference to Fig. 2. A in Fig. 2 shows a qubit plane, which is a chip on which qubits are integrated. As shown in Fig. 1, the qubits integrated in the qubit plane are divided into square blocks. Each block constitutes one logical qubit.

[0019] As shown in Figure 2B, each block is composed of quantum bits arranged in a grid. A code realized by arranging data quantum bits (black circles) to store data in each block and ancillary quantum bits to detect errors that occur in the data quantum bits is called a surface code [2], and is said to be the closest to being realized.

[0020] In Figure 2B, the shaded squares (diamonds) represent ancillary qubits. Figure 2B also shows unused data qubits (open circles) and unused ancillary qubits, which can be used for code extension. Figure 1B also shows the case where the code distance is d.

[0021] In surface codes, periodic parity checks are performed using auxiliary error-detection quantum bits, allowing information about errors occurring in the quantum bits to be obtained indirectly.

[0022] When error detection is performed using an auxiliary quantum bit with a surface code, information regarding the parity of one bit of error is obtained for each auxiliary quantum bit, and arranging these gives a two-dimensional bit map that indicates "whether the number of errors that have occurred in the data quantum bits surrounding the auxiliary quantum bit is even or odd." The value obtained here is called the syndrome value. The value that indicates "whether the number of errors is even or odd" may also be called the parity. Bits with a syndrome value of 1 (odd) are called active bits.

[0023] The syndrome value measurement (stabilizer measurement) is repeated in a certain cycle. This cycle is called the code cycle. The syndrome value of one code cycle is considered as one layer, and by stacking the syndrome values ​​of each code cycle, three-dimensional lattice data is obtained as shown in Figure 2D. This data corresponds to the data in the syndrome buffer, which will be described later. Each node in Figure 2D corresponds to one syndrome value.

[0024] Here, the shaded ancillary qubit shown in E gives the even / odd error for bit flipping, and the shaded ancillary qubit shown in F gives the even / odd error for phase flipping. The subsequent processing is common to both and the same processing is performed in parallel, so only the information obtained from the shaded ancillary qubit shown in F will be described.

[0025] To correct the error, the error must be estimated from the syndrome value. This task is called decoding. When the errors in each quantum bit are independent, it is known that decoding the surface code can be reduced to the following task:

[0026] As mentioned above, the bitmap of syndrome values ​​arranged in time series becomes a three-dimensional grid (or graph) as shown in Figure 2D. Consider pairing the points (black dots) where the syndrome values ​​are odd (active) or pairing the black dots with the grid boundaries. It is known that the edges that form the path when pairing have a one-to-one correspondence with the error that occurred. From this, the task of estimating the most likely error corresponds to performing such pairing with the minimum edge length, and this problem coincides with the problem called minimum weight perfect matching. In other words, in this case, when pairing the points (black dots) where the syndrome values ​​are odd (active) or pairing the black dots with the grid boundaries, pairing is performed so that the total length (weight) of the paired path is minimized.

[0027] Various methods have been proposed to solve minimum weight perfect matching quickly while correcting errors [3]. During the calculation, the incoming syndrome values ​​are sequentially decoded by the control device, and the errors are estimated with a delay equal to the time it takes to decode them. The estimated errors are written into a table called the Pauli frame. When the logical quantum bit is measured, the feedback of the estimated errors is used to correct the measurement result. The above mechanism makes it possible to realize quantum error correction.

[0028] As mentioned above, when cosmic rays hit a chip on which quantum bits are integrated, a burst error occurs in which the error rate of quantum bits over a wide area increases significantly for a long period of time. Although the frequency with which cosmic rays hit a chip is not high, they are almost certain to occur during calculations performed over a long period of time, and so there were concerns that error correction using surface codes would not function with the expected performance.

[0029] Figure 3 is a schematic diagram showing the effects of cosmic rays. In the right diagram of Figure 3, the area where the error rate increases during a certain period at a certain position on a two-dimensional plane is shown by shading as an anomalous region.

[0030] In this embodiment, a technique is described that significantly reduces the effect of burst errors compared to conventional techniques without significantly affecting the performance of a quantum computer by modifying the quantum error correction mechanism in the architecture of a conventional quantum computer.

[0031] (Details of device configuration) Fig. 4 shows a detailed configuration diagram of a quantum computer 300 according to this embodiment. The configuration shown in Fig. 4 is a typical computer architecture that realizes a fault-tolerant quantum computer, to which the proposed technology according to the present invention is incorporated. In particular, the part enclosed in the dotted line frame is an element added in this proposal. However, with the addition of the part enclosed in the dotted line frame, the other elements also perform operations that are not performed by fault-tolerant quantum computers of existing technologies.

[0032] As shown in FIG. 4, a quantum computer 300 according to this embodiment includes a host CPU 110, a quantum-classical interface 120, classical control units 130, and a quantum bit plane 200.

[0033] The control device 100 in the configuration shown in Fig. 1 corresponds to "host CPU 110+quantum-classical interface 120+classical control unit 130" in Fig. 4. "Host CPU 110+quantum-classical interface 120+classical control unit 130", that is, the control device 100, may be realized by one computer (and program), may be realized by multiple computers (and programs), may be realized by dedicated hardware and computer (and program), or may be realized only by dedicated hardware.

[0034] For example, the internal mechanisms of the classical control unit 130 may be implemented by software (that is, by causing a computer to execute a program), or some or all of the internal mechanisms may be implemented by dedicated hardware.

[0035] The quantum-classical interface 120 includes an AD converter 121 and a DA converter 122.

[0036] The classical control unit 130 includes a measurement result extraction unit 131, a classical register 132, a syndrome extraction unit 133, a syndrome buffer 134, a decoding unit 135, a Pauli frame 136, an anomaly detection unit 137, an active node counter 138, a matching buffer 139, an expansion queue 144, an instruction history buffer 145, an instruction buffer 140, a stabilizer map 141, a stabilizer assignment unit 142, and an instruction decoder 143. The instruction decode unit 143 also has a function of a scheduler, and therefore may be written as an instruction decode / schedule unit 143 .

[0037] (Overview of the operation of the quantum computer 300) In the error-tolerant quantum computation performed by the quantum computer 300, the quantum bits are integrated in the quantum bit plane 200 and are externally controlled. During the computation, the control device 100 continuously detects whether any errors have occurred in the quantum bits. The time required to perform an "operation to perform error detection once for all quantum bits" is called one code cycle.

[0038] Every other code cycle, the control device 100 obtains a syndrome value to know what kind of error has occurred in which place in the quantum bit. If no errors occur in the quantum bit, the syndrome value is all 0, but if an error occurs, the statistics change according to the probability of the error.

[0039] In this embodiment, an anomaly detection unit 137 is introduced in the control device 100. The anomaly detection unit 137 continuously monitors statistical information of syndrome values, and when a certain condition is satisfied for a certain quantum bit (a specific quantum bit), it determines that the quantum bit is in an abnormal state with a larger error than normal. The anomaly detection unit 137 may also be called an anomaly detection unit.

[0040] If the anomaly detector 137 determines that a particular qubit is in an anomalous state, i.e., that a burst error has occurred, the anomaly detector 137 appends instructions to the instruction buffer 140 to restore the reliability of the encoded logical qubit that utilizes the anomalous qubit, and notifies the error estimation unit not to trust the anomalous qubit in estimating the location of the error.

[0041] In the quantum computer 300 of this embodiment, the core mechanism for solving the problem of reducing the influence of burst errors is as follows.

[0042] (1) A mechanism for processing syndrome value information and detecting anomalies from statistical changes (function of the anomaly detection unit 137).

[0043] (2) A mechanism (such as the extension buffer 144 and instructions stored therein) that transforms the code so that the logical error rate of the logical quantum bit including the quantum bit in which the burst error occurred falls within an acceptable range.

[0044] (3) A mechanism for more reliable estimation of error information using information that a particular quantum bit is in an abnormal state (a new function of the decoding unit 135).

[0045] (Explanation of operation of each part 1) The operation of each part of the quantum computer 300 shown in Fig. 4 will be described in detail below. First, in "Description of the Operation of Each Part 1", the mechanism that constitutes a standard fault-tolerant quantum computer will be described. This standard mechanism is a slightly modified design similar to the design in reference [4].

[0046] <Host CPU110> The host CPU 110 is a processor that performs normal computer processing to communicate with the quantum processor. It sequentially sends instructions to be executed by the quantum processor to the instruction decode unit 143, and receives the results of quantum computation as classical bit data from the classical register 132.

[0047] <Instruction Decoder 143> The instruction decode unit 143 decodes the instruction sent from the host CPU 110, queries the stabilizer allocation unit 142 as to whether the instruction is executable, and adds the data to the instruction buffer 140 under appropriate scheduling. Depending on the instruction, data in the classical register 132 may be used to determine whether the instruction is executable. In addition, the executed instruction is notified to the Pauli frame 136.

[0048] <Instruction Buffer 140> The instruction buffer 140 may be called an instruction queue. The instruction buffer 140 is a data queue (data buffer) that holds an instruction set sent from the instruction decoder 143. An instruction is executed, and when the execution is completed, the instruction is deleted from the queue.

[0049] <Stabilizer allocation unit 142> The qubits arranged in the qubit plane 200 are stabilized in a predetermined manner during the calculation. The stabilizer allocation unit 142 manages how each qubit is stabilized. The operation of the qubits encoded with the error-correcting code based on the instruction stored in the instruction buffer 140 can be performed indirectly by changing the stabilization method. This method is called code deformation [5] or lattice surgery [6] because the instruction is performed by deforming or patching the code arranged in a lattice shape. The stabilizer allocation unit 142 periodically sends a control signal to the qubit plane 200 to stabilize the qubits in a predetermined manner.

[0050] <Stabilizer Map 141> The stabilizer map 141 is a table for holding information indicating how the stabilizer allocation unit 142 is currently stabilizing the quantum bits on the quantum bit plane 200.

[0051] <DAコンバータ122> The DA converter 122 is a mechanism that converts the control signal sent from the stabilizer allocation unit 142 from a digital signal to an analog signal and transmits the analog signal to the quantum bit plane 200, thereby enabling control of the quantum bits on the quantum bit plane 200, which is an analog element.

[0052] <Quantum Bit Plane 200> The quantum bit plane 200 is a chip on which an array of integrated quantum bits is arranged. The quantum bit plane 200 is typically assumed to have quantum bits arranged in a two-dimensional lattice. However, the scope of application of the technology according to the present invention is not limited to a specific graph structure such as a two-dimensional lattice.

[0053] <ADコンバータ121> The AD converter 121 is a unit that reads the reflected wave of the analog control signal sent to the quantum bit plane 200 and converts it into a digital signal. The data to be converted into a digital signal are a signal intended to read the encoded logical quantum bit and an error detection signal that indicates whether an error has occurred in the stabilized quantum bit. The former is sent to the measurement result extraction unit 131, and the latter is sent to the syndrome extraction unit 133.

[0054] <Measurement result extraction unit 131> The measurement result extraction unit 131 processes the signal sent by the AD converter 121 for the purpose of reading out the logical quantum bit, and calculates the measurement result of the logical quantum bit. However, the calculated data has not yet been error-corrected and is therefore unreliable. This calculated unreliable data is sent to the classical register 132, where data correction is performed by the Pauli frame 136.

[0055] <Syndrome Extraction Unit 133> The syndrome extraction unit 133 is a unit that processes the error detection signal received from the AD converter 121 and calculates information called a syndrome value, which is data for estimating what kind of error has occurred. The calculated syndrome value is stored in a syndrome buffer 134 (which may be called a syndrome queue).

[0056] <Syndrome Buffer 134> The syndrome buffer 134 is a unit that holds the syndrome values ​​received from the syndrome extraction unit 133. When a syndrome value becomes unnecessary, the syndrome value is deleted from the buffer (queue).

[0057] <Decoder 135> The decoder 135 is a unit that decodes information indicating what kind of error has occurred in the quantum bit from the syndrome value held in the syndrome buffer 134. The decoded information on the position and time of the error is sent to the Pauli frame 136.

[0058] <Pauli Frame 136> The Pauli frame 136 is a unit that compiles information on what errors have accumulated in the quantum bits in the quantum bit plane 200 at a given point in time, based on information sent from the decode unit 135. The Pauli frame 136 uses this information to correct errors in the “measurement results of logical quantum bits whose errors have not been corrected” stored in the classical register 132 by the measurement result extraction unit 131.

[0059] <Classical Register 132> Classical register 132 is a unit that holds the measurement results of logical quantum bits (classical bits of 0 and 1). The measurement results of logical quantum bits with no error corrected are first stored by measurement result extractor 131, and then when the information in Pauli frame 136 is updated, the errors are corrected by Pauli frame 136. The error-corrected measurement data is sent to host CPU 110, and is also used by instruction decoder 135 to schedule instructions.

[0060] (Explanation of operation of each part 2) Next, as an explanation 2 of the operation of each part, we will explain the mechanism that was not present in the architecture of conventional error-correcting quantum computers and that was newly added in the technology of the present invention, as well as the changes in other mechanisms resulting from the incorporation of this mechanism.

[0061] <Anomaly Detection Unit 143> The anomaly detection unit 143 acquires the oldest code cycle data and the newest code cycle data from the syndrome buffer 139 (which may be called a syndrome queue) each time a syndrome value is added to the syndrome buffer 134. Based on the acquired data, the anomaly detection unit 143 updates the statistical information of the syndrome values ​​stored in the active node counter 138, and checks whether any anomalies have occurred in the quantum bits arranged in the quantum bit plane 200. If no anomalies have occurred, the anomaly detection unit 143 does nothing. If an anomaly has occurred, the anomaly detection unit 143 notifies the decoding unit 135 and the extension buffer 144 (which may be called an extension queue) of the position information of the quantum bit where the anomaly has occurred.

[0062] <Active node counter 138> The active node counter 138 is a small data table that the anomaly detection unit 143 uses to collect statistical information on past syndrome values.

[0063] <Extended Buffer 144> The extension buffer 144 is a buffer (queue) that accumulates instructions for storing instructions for dealing with an anomaly occurring in a quantum bit. When the extension buffer 144 receives the position of the quantum bit in which an anomaly has occurred from the anomaly detection unit 137, the extension buffer 144 adds an instruction to increase the encoding level and temporarily make the data more robust so that the information of the encoded logical quantum bit at that position is not corrupted. The instruction addition may be performed by the extension buffer 144 itself, or may be performed by the anomaly detection unit 137 to the extension buffer 144.

[0064] The extension buffer 144 and the stabilizer allocation unit 142 that executes the instructions stored in the extension buffer 144 may be collectively referred to as a code extension unit.

[0065] <Stabilizer allocation unit 142> In the conventional technology, the stabilizer allocation unit 142 refers to and executes only the instructions in the instruction buffer 140, but in this embodiment, it takes precedence over this and executes the instructions in the extension buffer 144. Note that the anomaly detection unit 137 may store the above-mentioned extension instructions in the instruction buffer 140, and the stabilizer allocation unit 142 may execute the extension instructions with priority.

[0066] <Decoder 143> In the conventional technology, the decoding unit 143 simply receives data from the syndrome buffer 134 and sequentially performs decoding. In contrast, in the present embodiment, when the decoding unit 143 is notified by the anomaly detection unit 137 that a quantum bit is abnormal, the decoding unit 143 inquires of the Pauli frame 136 whether it is possible to roll back (or fall back, go back to the past, etc.) the estimation result that was previously sent.

[0067] If rewinding is not possible, no rewinding is performed. If rewinding is possible, the estimation so far is rewound to just before the code cycle in which the quantum bit becomes abnormal, and the estimation of the error information is rerun. When the estimation of the error information is performed at this time, the type of abnormality of the quantum bit at the notified position is known, such as a high error rate, so that decoding with higher performance than before the rerun can be performed. In addition, in order to rewind the Pauli frame 136 described later, the estimation results are stored in a matching buffer 139 (which may be called a matching queue) as needed.

[0068] The function of the decoding unit 143 for re-executing error estimation may be called a re-execution unit.

[0069] <Matching Buffer 139> The matching buffer 139 is a data queue that stores information indicating where and what type of error occurred at each time, as estimated by the decoding unit 135. When rewinding occurs, the maximum rewind time is fixed, so data that is no longer needed after that time has passed is deleted from the buffer.

[0070] <Instruction History Buffer 145> The instruction history buffer 145 is a data queue that temporarily buffers and holds data sent from the instruction decoder 143. The data in the instruction history buffer 145 is used for rewinding the Pauli frame 136, which will be described later.

[0071] <Pauli Frame 136> When the Pauli frame 136 receives an inquiry from the decode unit 135 as to whether or not rewinding is possible, it checks whether or not the previously corrected information is still unused in the classical register 132. If it is unused, it is determined that rewinding is possible, and if it has been used, it is determined that rewinding is not possible.

[0072] If rewinding is possible, all error corrections to the classical register 132 after the rewind time are canceled. Also, the Pauli frame 136 rewinds the contents of the Pauli frame 136 using data from the instruction history buffer 145 and the matching buffer 139.

[0073] (Description of the core operation for solving the problem) Below, the above-mentioned core operations (1) to (3) for solving the problem will be explained in more detail. Before that, an overview of the processing procedure will be explained with reference to Fig. 5. Fig. 5 is a diagram showing the state of the quantum bit plane 200 and the manner in which syndrome values ​​are repeatedly obtained from the quantum bit plane 200 and accumulated in the syndrome buffer 134, with the horizontal axis representing time, which progresses to the right.

[0074] In S1 (step 1), the quantum bit plane 200 is exposed to cosmic rays, and C anomaly During the period shown in Fig. 1, the abnormal condition caused by cosmic rays continues.

[0075] In S2, the anomaly detection unit 137 determines, based on the syndrome values ​​accumulated in the syndrome buffer 134, that an anomaly has occurred (the quantum bit has been affected by a burst error).

[0076] In S3, the stabilizer allocation unit 142 modifies the code so that the logical error rate of the logical quantum bit falls within an allowable range, using the instructions stored in the extension buffer 144. This modification continues for a period indicated by T.

[0077] In S4, the decoding unit 135 falls back on the estimation of the error information to estimate the error information with higher reliability. In other words, the error information calculated from the time of fallback to the time of anomaly detection (more specifically, immediately before the code cycle in which the quantum bit becomes abnormal) is not used, and the error information is calculated again from the time of rewinding, taking into account the region in which the anomaly occurred.

[0078] d in Fig. 5 indicates that the system falls back to d cycles before the start of the abnormality. latency indicates the period from the start of an abnormality occurrence to the detection of the abnormality.

[0079] The above-mentioned items (1) to (3) will be explained in more detail below.

[0080] (1) A mechanism for processing information on syndrome values ​​and detecting anomalies from statistical changes (operating mechanism of the anomaly detection unit 137).

[0081] The following describes one method of knowing from the syndrome value at which position and space (time) a burst error occurs as the operation of the anomaly detection unit 137, but this method is only one example, and the operation of the anomaly detection unit 137 is not limited to the following operation. Any method may be used as long as it can detect from the syndrome value the position and space (position and time) at which a burst error occurs.

[0082] In a typical noise model, the syndrome values ​​are extracted every other value in time, making them an independent sequence. Extracting the syndrome values ​​every other value in time means, specifically, extracting the syndrome value for each code cycle. Therefore, the frequency at which the syndrome value is 1 (active) over multiple code cycles is tallied, and if this frequency exceeds a certain percentage, it is determined that a burst error has occurred at the position where the frequency exceeds the certain amount.

[0083] For example, let the time (length) of some code cycles be C window In addition, it is assumed that the syndrome values ​​obtained in the t-th code cycle are m (m-bit length). windowThe number of active bits (bits with a syndrome value of 1) at each bit position in the period from " to t" is compared with a threshold value to obtain a comparison result for each of the m bit positions. If the number of active bits (bits with a syndrome value of 1) is greater than the threshold value, it can be determined that an abnormality has occurred at the position of the quantum bit corresponding to that bit position. By making such a determination for each code cycle, it is possible to determine the area (position and time) where the abnormality (burst error) has occurred.

[0084] The time when the burst error occurred is calculated by taking into account the delay from the time when the abnormality was detected to the time when the abnormality was detected. In the example of Figure 5, the time from S2 to C latency It can be assumed that the burst error started occurring at the previous time.

[0085] (2) A mechanism (extension buffer 144 and instructions stored therein) for transforming the code so that the logical error rate of the logical quantum bit including the quantum bit in which the burst error occurred falls within an acceptable range.

[0086] In the surface code assumed in this embodiment, many quantum bits are used without changing the encoded information by using a framework called code deformation, but it is possible to transform it into a more error-robust code. Therefore, code deformation is applied to the logical quantum bits including the quantum bit in which the burst error occurred, and the code is temporarily updated to a more error-robust code using more quantum bits. After a sufficient amount of time has passed and the quantum bit has recovered to a normal state, the code is restored to the original code by the method of code deformation. The schematic diagram of FIG. 5 shows that the code is temporarily updated to a more error-robust code using more quantum bits during the period indicated by T.

[0087] (3) A mechanism for more reliable estimation of error information using information that a particular quantum bit is in an abnormal state (a new function of the decoding unit 135).

[0088] As mentioned above, it is known that the operation of estimating the most likely location and time of an error from the information in the syndrome buffer 134 can be performed approximately using a graph problem called the minimum weight perfect matching problem, where the coordinates are the location and time when the syndrome was detected [2].

[0089] Therefore, even if a burst error occurs, a similar method can be used by adjusting the weights of the graph. However, simply changing the weights increases the processing time in the decoding unit 135, which has a significant impact on the overall speed of the computer. Therefore, in this proposal, we propose the following high-speed method that can be used in the case of localized errors such as burst errors.

[0090] An example of the operation of the decoding unit 135 using this method will be described with reference to Fig. 6. Fig. 6 is a diagram that shows a schematic representation of coordinates on a three-dimensional grid that are the targets of matching performed by the decoding unit 135. Fig. 6 lists paths that need to be searched when pairing two nodes.

[0091] In Fig. 6, black dots (black circles) represent the points to be matched. Each black dot must be matched to another black dot or to the left or right wall of the 3D grid (shaded areas in Fig. 6). As mentioned before, matching is computed as a minimum weight perfect matching problem.

[0092] The cost of matching depends on the number of squares (edges) that can be moved up, down, left, right, forward and backward on the three-dimensional grid. One edge of a square is an edge that connects two nodes (qubits).

[0093] Figure 6 shows matching between a node and a boundary (wall) and matching between two nodes. In Figure 6, the shaded box indicates the area where a burst error occurs. In this area, the weight is reduced when moving one square (one side) on the 3D grid. In other words, the area can be passed through at a lower cost when matching.

[0094] At this time, the decoding unit 135 sequentially matches each individual black point with the left or right wall or another black point that is closest in distance on the grid. At this time, the decoding unit 135 calculates the distance from the designated black point to the left or right wall or another black point as the Manhattan distance, which can be calculated in a constant time if there is no burst error. If there is an area where a burst error occurs, the weight of the square (edge) movement of that area is made smaller than the weight of the movement outside that area to calculate the distance.

[0095] As shown in FIG. 6, even if there are areas with locally low weights due to burst errors, if the number of burst errors is at most one or two, the lines connecting the black dots shown in FIG. 6 or the lines connecting the black dots with the left and right walls are all possible patterns of paths with the shortest distances, and the number of such paths is a constant, so that the decoding unit 135 can quickly indicate where each black dot should be matched by calculating and comparing all distances.

[0096] In Figure 6, paths 1, 2, and 5 are candidates for the shortest path that does not pass through the abnormal region, and paths 3, 4, and 6 are candidates for the shortest path that passes through the abnormal region. In this way, all possible paths for the solution are enumerated to find the result that has the shortest total distance.

[0097] (Example of hardware configuration of control device 100) The control device 100 can be realized, for example, by causing a computer to execute a program. This computer may be a physical computer or a virtual machine on the cloud.

[0098] That is, the control device 100 can be realized by executing a program corresponding to the processing performed by the control device 100 using hardware resources such as a CPU and memory built into a computer. The program can be recorded on a computer-readable recording medium (such as a portable memory) and stored or distributed. The program can also be provided via a network such as the Internet or email.

[0099] Fig. 7 is a diagram showing an example of the hardware configuration of the computer. The computer in Fig. 7 includes a drive device 1000, an auxiliary storage device 1002, a memory device 1003, a CPU 1004, an interface device 1005, a display device 1006, an input device 1007, an output device 1008, and the like, all of which are interconnected via a bus BS.

[0100] The program for realizing the processing on the computer is provided by a recording medium 1001 such as a CD-ROM or a memory card. When the recording medium 1001 storing the program is set in the drive device 1000, the program is installed from the recording medium 1001 to the auxiliary storage device 1002 via the drive device 1000. However, the program does not necessarily have to be installed from the recording medium 1001, but may be downloaded from another computer via a network. The auxiliary storage device 1002 stores the installed program as well as necessary files, data, etc.

[0101] The memory device 1003 reads out and stores the program from the auxiliary storage device 1002 when an instruction to start the program is received. The CPU 1004 realizes functions related to the control device 100 in accordance with the program stored in the memory device 1003. The interface device 1005 is used as an interface for connecting to a network or a quantum processor, etc. The display device 1006 displays a GUI (Graphical User Interface) or the like according to a program. The input device 1007 is composed of a keyboard and mouse, buttons, a touch panel, etc., and is used to input various operation instructions. The output device 1008 outputs the results of calculations.

[0102] (Effects of the embodiment) As described above, the anomaly detection technique according to the present embodiment can dynamically protect the error correction mechanism that is normally exposed to cosmic rays for a long time. There are two protection procedures: a method of temporarily increasing the code distance of the logical quantum bit affected by the burst error, and a method of re-executing the error estimation taking into account the effect of the burst error. By combining these, it is possible to significantly reduce the error rate of the logical quantum bit that increases due to the effect of the burst error.

[0103] When an abnormality is detected, a significant effect can be obtained by using both a method of temporarily increasing the code distance of a logical quantum bit affected by a burst error and a method of re-executing error estimation taking into account the influence of the burst error. However, it is also possible to use only one of the methods of temporarily increasing the code distance of a logical quantum bit affected by a burst error and the method of re-executing error estimation taking into account the influence of the burst error.

[0104] (Additional Note) The following supplementary items are further disclosed regarding the above-described embodiment. (Additional note 1) A control device that controls a quantum processor having a plurality of quantum bits that configure a quantum error correcting code, Memory, at least one processor coupled to the memory; Including, The processor, detecting a region in which an anomaly has occurred in a quantum bit in the quantum processor based on syndrome values ​​periodically acquired from the quantum processor; When the abnormality is detected, at least one of the following is executed: a process of modifying a quantum error correcting code so as to increase a code distance of a logical quantum bit in the region; and a process of going back in time and re-estimating an error in a quantum bit using information in the region when the abnormality is detected. Control device. (Additional note 2) The processor determines that an abnormality has occurred at a position corresponding to a syndrome value when the number of syndrome values ​​having a predetermined value is greater than a threshold value during a certain period of time. Item 1. The control device according to claim 1. (Additional note 3) The processor restores the quantum error correcting code to the code before the transformation after the quantum bit has recovered to a normal state. Item 1. The control device according to claim 1. (Additional note 4) In order to estimate an error in a quantum bit, the processor, when finding a match between a node having a predetermined value and another node having a predetermined value as a solution to a minimum weight perfect matching problem in a three-dimensional graph consisting of a plurality of nodes and edges corresponding to syndrome values ​​over a plurality of periods, makes the weight of the edge in the region smaller than the weight of the edge in a portion other than the region. A control device as described in appended paragraph 1. (Additional note 5) A quantum computer comprising the control device according to any one of claims 1 to 4 and the quantum processor. (Additional note 6) A control method performed by a computer used as a control device for controlling a quantum processor having a plurality of quantum bits constituting a quantum error correcting code, comprising: detecting a region in which an anomaly has occurred in a quantum bit in the quantum processor based on syndrome values ​​periodically acquired from the quantum processor; When the abnormality is detected, at least one of the following is executed: a process of modifying a quantum error correcting code so as to increase a code distance of a logical quantum bit in the region; and a process of going back in time and re-estimating an error in a quantum bit using information in the region when the abnormality is detected. Control methods. (Additional note 7) A non-transitory storage medium storing a program for causing a computer to function as each unit in the control device according to any one of claims 1 to 4.

[0105] Although the present embodiment has been described above, the present invention is not limited to such a specific embodiment, and various modifications and variations are possible within the scope of the gist of the present invention described in the claims. [References] [2] Fowler, Austin G., et al. "Surface codes: Towards practical large-scale quantum computation." Physical Review A 86.3 (2012): 032324. [3] Holmes, Adam, et al. "NISQ+: Boosting quantum computing power by approximating quantum error correction." 2020 ACM / IEEE 47th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2020. [4] Fu, Xiang, et al. "A heterogeneous quantum computer architecture." Proceedings of the ACM International Conference on Computing Frontiers. 2016. [5] Bombin, H., & Martin-Delgado, MA (2009). "Quantum measurements and gates by code deformation". Journal of Physics A: Mathematical and Theoretical, 42(9), 095302. [6] Horsman, C., Fowler, AG, Devitt, S., & Van Meter, R. (2012). "Surface code quantum computing by lattice surgery". New Journal of Physics, 14(12), 123011. [Explanation of symbols]

[0106] 100 Control device 110 Host CPU 120 Quantum-Classical Interface 121 A / D converter 122 DA Converter 130 Classical Control Unit 131 Measurement result extraction part 132 Classical Register 133 Syndrome Extraction Unit 134 Syndrome Buffer 135 Decoding section 136 Pauli Frame 137 Anomaly Detection Unit 138 Active Node Counter 139 Matching Buffer 140 Instruction Buffer 141 Stabilizer Map 142 Stabilizer allocation section 143 Instruction Decoder 144 Extended Buffer 145 Instruction History Buffer 200 Quantum processors, qubit planes 300 Quantum Computer 301 Anomaly detection unit 302 Sign extension 303 Re-execution 1000 Drive Device 1001 Recording media 1002 Auxiliary storage 1003 Memory device 1004 CPU 1005 Interface device 1006 Display device 1007 Input Device 1008 Output device

Claims

1. A control device that controls a quantum processor having a plurality of quantum bits that configure a quantum error correcting code, an anomaly detection unit that detects an area where an anomaly has occurred in a quantum bit in the quantum processor based on a syndrome value periodically acquired from the quantum processor; and At least one of a code extension unit that, when an abnormality is detected by the abnormality detection unit, modifies a quantum error correction code so as to increase a code distance of a logical quantum bit in the region, and a re-execution unit that, when an abnormality is detected by the abnormality detection unit, goes back in time and re-executes an estimation of an error in a quantum bit using information of the region. A control device comprising:

2. The anomaly detection unit determines that an anomaly has occurred at a position corresponding to a syndrome value when the number of syndrome values ​​having a predetermined value is greater than a threshold value during a certain period of time. The control device according to claim 1 .

3. The code extension unit restores the quantum error correcting code to the code before the transformation after the quantum bit is restored to the normal state. The control device according to claim 1 .

4. In order to estimate an error in a quantum bit, the re-execution unit, when finding a match between a node having a predetermined value and another node having a predetermined value as a solution to a minimum weight perfect matching problem in a three-dimensional graph consisting of a plurality of nodes and edges corresponding to syndrome values ​​over a plurality of periods, makes the weight of the edge in the region smaller than the weight of the edge in a portion other than the region. The control device according to claim 1.

5. A quantum computer comprising the control device according to claim 1 and the quantum processor.

6. A control method performed by a control device that controls a quantum processor having a plurality of quantum bits that constitute a quantum error correcting code, comprising: detecting a region in which an anomaly has occurred in a quantum bit in the quantum processor based on syndrome values ​​periodically acquired from the quantum processor; When the abnormality is detected, at least one of the following is executed: a process of modifying a quantum error correcting code so as to increase a code distance of a logical quantum bit in the region; and a process of going back to the past and re-estimating an error in a quantum bit using information in the region when the abnormality is detected. Control methods.

7. A program for causing a computer to function as each unit in the control device according to any one of claims 1 to 4.

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