Packaged RF power device with PCB routing

Abstract

A radio frequency (RF) transistor amplifier includes a package submount, a package frame including an electrically insulating member and one or more conductive layers on the package submount and exposing a surface of the package submount, transistor dies on the surface of the package submount with respective terminals electrically connected to the package frame, a protective member covering the transistor dies, and one or more electrical components mounted on the package frame outside the protective member. Related RF power device packages and manufacturing methods are also described.

Description

Technical Field

[0001] Claims of Priority This application claims the benefit of priority of U.S. Patent Application No. 17 / 097,294, filed on November 13, 2020, the entire disclosure of which is incorporated herein by reference.

[0002] This disclosure generally relates to radio frequency (RF) transistor devices, and more particularly, to packaged RF transistor devices.

Background Art

[0003] In recent years, electric circuits that require high output handling capabilities while operating at high frequencies such as UHF (0.3 - 1 GHz), L-band (1 - 2 GHz), R-band (1.7 - 2.6 GHz), S-band (2 - 4 GHz), and X-band (8 - 12 GHz) have become more widespread. In particular, there may be a high demand for RF power amplifiers used to amplify RF signals at wireless (including microwave) frequencies. These RF power amplifiers may need to exhibit high reliability, good linearity, and handle high output power levels.

[0004] RF power amplifiers may be implemented in silicon or using wide bandgap semiconductor materials such as silicon carbide ("SiC") and group III nitride materials (i.e., having a bandgap greater than 1.40 eV). As used herein, the term "group III nitride" refers to semiconductor compounds formed between nitrogen and elements in group III of the periodic table, typically aluminum (Al), gallium (Ga), and / or indium (In). Group III elements can combine with nitrogen to form binary compounds (e.g., GaN), ternary compounds (e.g., AlGaN, AlInN), and quaternary compounds (e.g., AlInGaN). These compounds have an empirical formula in which 1 mole of nitrogen is combined with a total of 1 mole of group III elements.

[0005] Silicon-based RF power amplifiers are typically implemented using laterally diffused metal oxide semiconductor (LDMOS) transistors. Silicon LDMOS RF power amplifiers can exhibit a high level of linearity and may be relatively inexpensive to manufacture. Group III nitride-based RF power amplifiers are typically implemented using high electron mobility transistors (HEMTs) and are mainly used in applications that require high output and / or high frequency operation where LDMOS RF power amplifiers may have inherent performance limitations.

[0006] An RF power amplifier may include one or more amplifier stages, and each stage is typically implemented as a transistor amplifier. To increase the output power and current handling capacity, RF power amplifiers are typically implemented in a "unit cell" configuration, in which a number of individual "unit cell" transistor structures are electrically arranged in parallel. An RF power amplifier may be implemented as one integrated circuit chip or "die", or may include multiple dies. A die or chip may refer to a small block of semiconductor material or other substrate on which electronic circuit elements are fabricated. When multiple RF transistor dies are used, they may be connected in series and / or in parallel.

[0007] RF power amplifiers often include matching circuits, such as impedance matching circuits designed to improve the impedance match between active transistor dies (including, for example, MOSFETs, HEMTs, LDMOSs, etc.) and transmission lines connected thereto for RF signals at the fundamental operating frequency, and harmonic termination circuits designed to at least partially terminate harmonics, such as second and third order harmonics, that may be generated during device operation. The termination of harmonics also affects the generation of intermodulation distortion products.

[0008] The RF transistor die and impedance matching and / or harmonic termination circuits may be encapsulated within an integrated circuit device package. Integrated circuit packaging may refer to encapsulating one or more dies within a support case or package that protects the die from physical damage and / or corrosion and supports electrical contacts for connection to external circuitry. Input and output impedance matching circuits in an integrated circuit device package typically include an inductor-capacitor (LC) network that provides at least a portion of an impedance matching circuit configured to match the impedance of an active transistor die to a fixed value. The package typically includes a conductive attachment surface or “flange” on which the die is mounted, and an electrically insulating protective material, such as plastic or ceramic, that seals the die and protects it from moisture and dust particles. Conductive leads (also referred to herein as package leads or RF leads) may extend from the package and are used to electrically connect an RF transistor amplifier to external circuit elements such as input and output RF transmission lines and a bias voltage source.

[0009] As described above, group III nitride-based RF power amplifiers are often used in high power and / or high frequency applications. Typically, during operation, a high level of heat is generated within a group III nitride-based RF transistor die. If the RF transistor die becomes too hot, the performance of the RF transistor amplifier (e.g., output power, efficiency, linearity, gain, etc.) may degrade and / or the RF transistor die may be damaged. Accordingly, group III nitride-based RF power amplifiers are typically mounted in a package that may be optimized for heat removal.

[0010] In some package designs, the package flange includes a thermally conductive substrate, also referred to herein as a "heat slug" or "heat sink". The package-level heat slug is designed to draw heat away from the integrated circuit towards an external heat sink. Typically, the heat slug is formed from a thermally conductive material (e.g., metal). In some package configurations, the heat slug also functions as an electrical terminal that provides a reference potential (e.g., ground) to the die mounted thereon. For example, the flange may be a CPC (copper, copper-molybdenum, copper laminate structure) or copper flange that provides both an attachment surface for the die and the heat slug.

[0011] One semiconductor package design is a molded design (or "overmold" package), in which a plastic or other non-conductive encapsulant material is molded directly onto the heat slug (e.g., by injection molding or transfer molding), thereby forming a solid structure that directly contacts and encapsulates the RF transistor die and / or other integrated circuits and associated electrical connections and at least a portion of the heat slug.

[0012] Another semiconductor package design is an "open air cavity" or "open cavity" package, in which a (typically ceramic) lid is placed and attached over a metal heat slug. The ceramic lid seals an open air cavity that includes the RF transistor die and / or other integrated circuits and associated electrical connections.

[0013] FIG. 1A is a schematic side view of a conventional open cavity RF power amplifier package 170 (shown as a thermally enhanced package by way of example) that includes a transistor die 110 and integrated circuits (shown as chip capacitors 190, 192 by way of example) attached to a conductive mounting surface or flange provided by package submount 176. The open cavity package 170 includes a lid member 179 (e.g., a ceramic lid such as alumina) and sidewall members (e.g., printed circuit board (PCB) 177) on submount 176. The lid 179 and sidewalls of the PCB 177 enclose an open air cavity that includes the transistor die 110 and / or other integrated circuits and associated electrical connections 125, which are also referred to herein as components of the package. In the example of FIG. 1A, the PCB 177 provides a “window frame” 175 around the components and supports a conductive layer or trace 173 (e.g., copper cladding) that provides input and output leads 172 and 174.

[0014] FIG. 1B is a schematic side view of the package 170 of FIG. 1A mounted on an RF circuit board 180. The input and output leads 172 and 174 connect the package 170 to respective conductive layers or traces 183 (e.g., copper cladding) on a structure 187 (e.g., a PCB layer) of the RF circuit board 180 and provide RF signal connections to and from the die 110 via the integrated circuits 190 and 192. The RF circuit board 180 includes an aperture 181 sized to receive the flange 176 such that the bottom surface of the flange 176 may contact a heat sink 186 that may be a layer or part of a layer that supports the RF circuit board 180. SUMMARY OF THE INVENTION MEANS FOR SOLVING THE PROBLEM

[0015] According to some embodiments, a radio frequency (RF) transistor amplifier includes a package submount and a package frame including an electrical insulating member and one or more conductive layers on the package submount. The package frame exposes a surface of the package submount. A transistor die is provided on the surface of the package submount and includes respective terminals electrically connected to the package frame. A protective member covers the transistor die. One or more components are attached to the package frame outside the protective member.

[0016] In some embodiments, the package frame may not extend substantially beyond the edge of the package submount.

[0017] In some embodiments, the periphery of the package submount may not have a protective member.

[0018] In some embodiments, one or more conductive layers of the package frame may define respective leads that provide RF signal connections to respective terminals of the transistor die and extend outside the protective member.

[0019] In some embodiments, one or more components may be electrically connected to respective leads outside the protective member.

[0020] In some embodiments, one or more electrical components may define a part of an input, inter-stage, or output impedance matching circuit or a harmonic termination circuit for the RF transistor amplifier.

[0021] In some embodiments, the surface of the package submount may not have a part of an input, inter-stage, or output impedance matching circuit or a harmonic termination circuit directly on the surface.

[0022] In some embodiments, one or more electrical components may be surface mount devices, and the input or output matching circuit or harmonic termination circuit may further include conductive traces on a package submount to which the surface mount device is electrically connected.

[0023] In some embodiments, one or more electrical components may not extend directly on or be in direct contact with the surface of the package submount.

[0024] In some embodiments, each terminal of the transistor die may be electrically connected to a respective lead by a respective interconnect structure, and the protective member may cover the transistor die and the respective interconnect structures.

[0025] In some embodiments, the input, interstage, or output impedance matching circuit or harmonic termination circuit may not have wire bonds.

[0026] In some embodiments, each lead may not have an electrical connection that extends substantially beyond the edge of the package submount.

[0027] In some embodiments, each lead may be restricted within the edge of the package submount.

[0028] In some embodiments, one or more conductive surface mount components may be electrically connected to respective leads and may extend substantially beyond the edge of the package submount.

[0029] In some embodiments, one or more conductive surface mount components may include conductive shims and / or reactive surface mount components.

[0030] In some embodiments, one or more electrical components may include passive and / or reactive surface mount components.

[0031] In some embodiments, the protective member may be a discharged and cured encapsulant that extends over the transistor die and at least a portion of the package frame.

[0032] In some embodiments, the package frame may not have a lid member attached to the package frame.

[0033] In some embodiments, the protective member may be a lid member that covers the transistor die and at least a portion of the package frame.

[0034] In some embodiments, the package submount may be configured to be mounted within an opening in the RF circuit board, whereby the package frame is restricted within the opening.

[0035] According to some embodiments, a radio frequency (RF) transistor amplifier includes a package submount, a package frame including an electrically insulating member and one or more conductive layers on the package submount, the package frame exposing a surface of the package submount, and a transistor die on the surface of the package submount and electrically connected to the package frame, each including a respective terminal. The package submount is configured to be mounted within an opening in the RF circuit board, whereby the package frame is restricted within the opening.

[0036] In some embodiments, the package frame may not extend substantially beyond the edge of the package submount. One or more conductive layers of the package frame may define respective leads that provide RF signal connections to respective terminals of each transistor die.

[0037] In some embodiments, each lead of the package may be substantially coplanar with the surface of the RF circuit board outside the opening.

[0038] In some embodiments, each lead may not have an electrical connection that extends substantially beyond the edge of the package submount.

[0039] In some embodiments, one or more conductive surface mount components may electrically connect each lead to the RF circuit board and may extend substantially beyond the edge of the package submount.

[0040] In some embodiments, the protective member may cover the transistor die, and one or more electrical components may be electrically connected to each lead and may be attached to the package frame outside the protective member.

[0041] In some embodiments, one or more electrical components may define part of an input, interstage, or output impedance matching circuit or harmonic termination circuit for an RF transistor amplifier.

[0042] In some embodiments, each terminal of the transistor die may be electrically connected to each lead by a respective interconnect structure, and the protective member may cover the transistor die and each respective interconnect structure.

[0043] In some embodiments, one or more electrical components may be passive and / or reactive surface mount components.

[0044] In some embodiments, the protective member may be a discharged and cured encapsulant that extends over the transistor die and at least a portion of the package frame.

[0045] In some embodiments, the protective member may be a lid member that covers the transistor die and at least a portion of the package frame.

[0046] In some embodiments, the amplifier may further include an RF circuit board, the RF circuit board includes a thermally conductive substrate, and the package submount is in contact with the surface of the thermally conductive substrate exposed by an opening in the RF circuit board.

[0047] According to some embodiments, a radio frequency (RF) transistor amplifier package includes a package submount, a transistor die on a surface of the package submount, and a package frame on a peripheral edge of the surface of the package submount. The package frame includes an electrical insulating member and one or more conductive layers defining respective leads electrically connected to respective terminals of the transistor die. Each lead has no electrical connection extending substantially beyond an edge of the package submount.

[0048] In some embodiments, the package frame may not extend substantially beyond an edge of the package submount, and each lead may provide an RF signal connection to a respective terminal of the transistor die.

[0049] In some embodiments, a protective member may cover the transistor die, and one or more electrical components may be electrically connected to respective leads and attached to the package frame outside the protective member.

[0050] In some embodiments, one or more electrical components may define a part of an input, inter-stage, or output impedance matching circuit or a harmonic termination circuit for the RF transistor amplifier.

[0051] In some embodiments, each terminal of the transistor die may be electrically connected to a respective lead by a respective interconnect structure, and the protective member may cover the transistor die and the respective interconnect structures.

[0052] In some embodiments, one or more electrical components may be passive and / or reactive surface mount components.

[0053] In some embodiments, the protective member may be a discharged and cured encapsulant that extends over the transistor die and at least a portion of the package frame.

[0054] In some embodiments, the protective member may be a lid member that covers the transistor die and at least a portion of the package frame.

[0055] In some embodiments, the package submount may be configured to be mounted within an opening in the RF circuit board, such that the package frame is restricted within the opening.

[0056] In some embodiments, the RF transistor amplifier package may not have electrical connections that extend beyond the edge of the package submount.

[0057] According to some embodiments, a radio frequency (RF) transistor amplifier includes a package submount, a package frame including an electrical insulating member and one or more conductive layers on the package submount, wherein the package frame exposes the surface of the package submount, a transistor die on the surface of the package submount and electrically connected to the package frame, and a protective encapsulant extending over the transistor die and the package frame.

[0058] In some embodiments, the protective encapsulant may be a discharged and cured encapsulant that covers the transistor die.

[0059] In some embodiments, the package frame may not extend substantially beyond the edge of the package submount.

[0060] In some embodiments, one or more conductive layers of the package frame may provide RF signal connections to respective terminals of the transistors and define respective leads that extend outside of the protective encapsulant.

[0061] In some embodiments, one or more electrical components may be electrically connected to respective leads and attached to the package frame outside of the protective encapsulant.

[0062] In some embodiments, one or more electrical components may define part of an input, interstage, or output impedance matching circuit or harmonic termination circuit for an RF transistor amplifier.

[0063] In some embodiments, one or more electrical components may be passive and / or reactive surface mount components.

[0064] In some embodiments, respective leads may not have electrical connections that extend substantially beyond the edge of the package submount.

[0065] In some embodiments, one or more conductive surface mount components may be electrically connected to respective leads and may extend substantially beyond the edge of the package submount.

[0066] According to some embodiments, a method of manufacturing a radio frequency (RF) transistor amplifier includes providing a package submount, providing a package frame on the package submount, the package frame including an electrical insulating member and one or more conductive layers, the package frame including an opening exposing a surface of the submount therein, providing a transistor die on the surface of the submount, electrically connecting respective terminals of the transistor die to the package frame, and attaching a protective member to the package submount. The protective member covers the transistor die and exposes a portion of the package frame at a periphery of the package submount. The portion of the package frame has a surface area sufficient for mounting one or more electrical components.

[0067] In some embodiments, one or more conductive layers of the package frame may provide RF signal connections to respective terminals of the transistor die and define respective leads extending along portions of the package frame.

[0068] In some embodiments, the method further includes attaching one or more electrical components to the portion of the package frame exposed by the protective member, the one or more electrical components being electrically connected to respective leads.

[0069] In some embodiments, the one or more electrical components may define a part of an input, inter-stage, output impedance matching circuit or harmonic termination circuit for the RF transistor amplifier.

[0070] In some embodiments, the protective member may be a discharged and cured encapsulant extending over the transistor die and at least a portion of the package frame.

[0071] In some embodiments, the method includes mounting a package submount within an aperture in an RF circuit board, whereby the package frame is restricted within the aperture.

[0072] In some embodiments, the method may further include electrically connecting respective leads to the RF circuit board and providing one or more conductive surface mount components that extend substantially beyond an edge of the package submount.

[0073] In some embodiments, a portion of the package frame along which respective leads extend may be substantially coplanar with a surface of the RF circuit board outside the aperture.

[0074] In some embodiments, the transistor die may be a gallium nitride-based high electron mobility transistor (HEMT).

[0075] In some embodiments, the transistor die may be a silicon-based laterally diffused metal oxide semiconductor (LDMOS) transistor.

[0076] In some embodiments, the transistor die may be configured to operate in at least a portion of one or more of the frequency bands of 2.5 - 2.7 GHz, 3.4 - 4.2 GHz, or 5.1 - 5.8 GHz.

[0077] In some embodiments, the transistor die may be configured to operate at frequencies higher than 10 GHz.

[0078] Other devices, apparatuses, and / or methods according to some embodiments will be apparent to those skilled in the art upon review of the following drawings and detailed description. All such additional embodiments are intended to be included in this description, within the scope of the invention, and protected by the appended claims in addition to any and all combinations of the above embodiments.

Brief Description of the Drawings

[0079]

Figure 1A

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DETAILED DESCRIPTION OF THE INVENTION

[0080] Some embodiments of the present disclosure may arise from problems presented by existing RF power device package configurations, such as mechanical problems related to mounting a package on an RF circuit board. In particular, misalignment of package leads with respect to conductive traces or conductive top cladding of the RF circuit board, and / or misalignment of the bottom of the package submount with respect to the bottom of an opening in the RF circuit board can be problematic. For example, as shown in FIG. 1B, the opening 181 in the RF circuit board 180 may be relatively large compared to the dimensions of the submount or flange 176, leaving a gap or ring 181r around the boundary edge of the flange 176 of the package 170. Also, manufacturing variations in the thickness of the flange 176 and / or the package PCB 177 can lead to mechanical problems including misalignment between the top cladding 183 of the RF circuit board 180 and the contact leads 172, 174 of the package 170. Thus, it can be difficult to achieve simultaneous contact between the bottom of the flange 176 and the heat sink 186 at the bottom of the opening 181 in the RF circuit board 180, and between the top cladding 183 of the RF circuit board 180 and the package input / output leads 172 / 174.

[0081] Embodiments of the present disclosure provide a packaged RF power device (also referred to herein as an RF transistor amplifier package) that includes a transistor die and a package frame mounted on a package submount or flange. The package frame may be a structure that includes one or more electrical insulating members having a conductive layer on which patterns, traces, routings, and / or leads are defined, such as a PCB or a redistribution layer (RDL) stack. The package submount may be a copper flange or other electrically and / or thermally conductive flange. The package frame may extend to the periphery of the package submount and may include an internal opening (e.g., cut or otherwise routed inside the package frame), which exposes the mounting surface of the package submount and is sized such that the transistor die can make direct contact with the mounting surface of the package submount. The transistor die is electrically connected to the conductive pattern of the package frame, for example, by wire bonds or conductive interconnect structures that extend between respective terminals of the transistor die and the conductive layer of the package frame. The conductive top cladding or other conductive layer of the package frame defines respective conductive leads (e.g., input and output leads) configured to provide an RF signal connection to the transistor die, also referred to herein as RF leads. The conductive leads do not have electrical connections that extend substantially beyond the edge of the package submount.

[0082] In some embodiments, the openings in the package frame are covered by a protective member (e.g., a ceramic or molded lid, wire cage, plastic overmold, or discharged and cured encapsulant such as epoxy or resin (also referred to as "glob top")) to protect and / or seal in the transistor die and electrical connections, while other portions or surfaces of the package frame (including portions of conductive traces / routing / leads) are exposed, not covered by the protective member, or otherwise do not have a protective member. Impedance primatching and / or frequency optimization can be achieved in combination with one or more electrical components (e.g., passive and / or reactive surface mount components, also referred to herein as surface mount devices (SMDs)) attached or mounted to portions or surfaces of the package frame outside the protective member, using conductive traces / routing / leads on portions or surfaces of the package frame outside the protective member.

[0083] For example, the RF transistor amplifier packages described herein may not have a lid as some conventional open air cavity packages do, and may not be fully encapsulated in overmold material as some conventional overmolded packages are. In some embodiments, only the openings in the package frame (exposing the transistor die and wire bonds or other electrical connections on the surface of the submount) are glob topped or otherwise covered by a protective member to protect the transistor die and / or electrical connections. The remainder of the top surface of the package frame is exposed, similar to a PCB of an RF circuit board. The portion of the package frame outside the protective member has sufficient surface area to mount or attach one or more electrical components thereon. The exposed portion of the package frame can be routed by copper traces, and for example, SMD components similar to those of an RF circuit board can be mounted to implement an integrated circuit for the transistor die.

[0084] In some embodiments, the package input / output leads and / or other portions of the package frame may be restricted within or may not substantially extend beyond the edges of the package submount or flange. For example, an RF transistor amplifier package may be sized or otherwise configured such that the package submount can be placed within an opening in the RF circuit board, and the package frame may be restricted within the opening. In some embodiments, the top surface of the package frame (e.g., a conductive top cladding layer) may be substantially coplanar or "flush" with the surface of the RF circuit board (e.g., a conductive top cladding layer) outside the opening. That is, each lead of the package frame may be substantially coplanar with the conductive traces / routing on the surface of the RF circuit board. In some embodiments, conductive (e.g., copper) shims and / or SMDs may be used to electrically connect the RF transistor amplifier package to the RF circuit board.

[0085] For example, an RF transistor amplifier package may not have conductive leads or other electrical connections that extend substantially or significantly laterally beyond the flange, as in some conventional open-cavity or overmolded-packaged RF devices. In some embodiments, the boundary of the entire package (including the package frame) is similar to that of the submount or flange. The package may not use the PCB and conductive routing of the package frame to contact the RF circuit board. Instead, the RF signal connection between the package and the RF circuit board (e.g., a customer or demo circuit board) may be implemented by a conductive (e.g., copper) shim or SMD component (e.g., an RF capacitor, a zero-ohm resistor, etc.) that extends beyond the flange and may be added after assembly and / or sale. Since the conductive shim is flexible, an RF transistor amplifier package according to an embodiment of the present disclosure may be more resistant to misalignment between the top surface of the RF circuit board and the package. That is, the flexible conductive shim can bend to absorb misalignment between the surface of the RF circuit board and the top surface of the package while still maintaining good contact for the RF signal connection.

[0086] In some embodiments of the present disclosure, at least portions of matching circuits typically used in high-power RF products (including impedance pre-matching and / or harmonic terminations) are implemented by conductive routings (defining conductive leads and / or traces) and electrical components (including passive and / or reactive surface-mount components) on portions or surfaces of the package frame that are exposed by or otherwise outside the protective member covering the transistor die. Thereby, the electrical components defining the portions of the matching circuit are outside the protective member and do not extend directly onto or contact the package submount or flange. In contrast, some conventional RF power products use chip capacitors mounted directly on the flange and wire bonds having specific profiles and lengths to provide impedance pre-matching. Additionally, by exposing conductive routings and / or other impedance matching components on the top surface of the package frame (similar to components on an RF circuit board), embodiments of the present disclosure provide a package configuration in which the matching circuit can be modified (or fine-tuned) even after the package assembly is complete. That is, in embodiments of the present disclosure, an RF transistor amplifier package can be modified or adjusted (e.g., in a virtual broadband application) for different frequency bands after assembly and / or shipment to the customer.

[0087] In some embodiments, electrical components attached to the surface of the package frame to define part of the impedance matching (including input, inter-stage, or output impedance matching circuits) and / or harmonic termination circuits for the active transistor die may be implemented by integrated passive devices (IPDs). The IPDs may include passive electrical components (e.g., resistors, as well as reactive electrical components such as inductors and capacitors), and may be manufactured using standard semiconductor processing techniques such as thin film and / or photolithography. The IPDs can be flip-chip mountable or wire-bondable components, and may include a thin film substrate such as silicon, alumina, or glass, which can facilitate manufacturing and packaging with the active transistor die.

[0088] In some embodiments, the use of wire bonds in an RF amplifier package may be reduced and / or eliminated. For example, wire bonds may be implemented primarily or solely for conductivity from the transistor die to the package frame, such that the shape and / or profile of the wire bonds may not be as critical for impedance matching. In some embodiments of the present disclosure, the matching circuit may not have wire bonds. Also, adapting the embodiments for various products or uses may be less complex. This is because even for package derivatives for use at different frequency bands / power levels, etc., a standard low-profile wire bond array may be used. That is, the matching circuit may be implemented primarily or completely by conductive traces / routing and / or passive / reactive electrical components outside of the protective member covering the transistor die and electrical connections, so that wire bonding can be reduced and / or minimized. In some embodiments, the electrical connection to the transistor terminals may be implemented using an IPD protected by a protective member instead of wire bonds. For example, copper pillars may be used to connect the transistor terminals to the IPD, particularly by a thinner (e.g., less than 0.254 mm (about 10 mils) or about 0.127 mm (about 5 mils)) package frame. Reduction of wire bonding can reduce the package cost (particularly in the case of gold (Au) wire bonds). That is, a matching circuit implemented primarily or completely by PCB and SMD-based components may be less costly than high-Q chip capacitors and Au wire bonds, thereby enabling a low-cost package.

[0089] FIG. 2A is a schematic cross-sectional view of an RF transistor die according to various embodiments of the present disclosure, this cross-section being through a portion of the upper metallization structure of transistor die 110, for example, as seen along line III-III' of FIG. 3A. Dielectric layers that isolate the various conductive elements of the upper metallization structure from each other are not shown in FIG. 2A for simplicity of the drawing. FIG. 2B is a schematic cross-sectional view of an RF transistor die unit cell according to various embodiments of the present disclosure, this cross-section being as seen along line B-B' of FIG. 2A.

[0090] As shown in FIGS. 2A and 2B, RF transistor die 110 is shown, by way of example, as a group-III nitride-based HEMT RF transistor amplifier having a plurality of unit cell transistors 116, in which case each unit cell transistor 116 includes gate fingers 152, drain fingers 154, and source fingers 156. However, it will be appreciated that RF transistor die 110 may be implemented in different technologies, such as, for example, a silicon LDMOS RF transistor amplifier. Gate fingers 152 are electrically connected to a common gate bus 146, and drain fingers 154 are electrically connected to a common drain bus 148. Gate bus 146 is electrically connected to a gate terminal that may be implemented as an input contact pad 362 (see FIG. 3A), for example, via a conductive via extending upward from gate bus 146, and drain bus 148 may be electrically connected to a drain terminal 144 that may be implemented as an output contact pad 364 (see FIG. 3A), for example, via a conductive via extending upward from drain bus 148. Source fingers 156 are electrically connected to a source terminal 126 (which may be implemented as a ground pad 366) via a plurality of conductive source vias 166 that extend through semiconductor layer structure 130, as shown in the cross-sectional view of FIG. 2B (to be described in detail later). Conductive source vias 166 may be metal-plated vias that extend completely through semiconductor layer structure 130.

[0091] Figures 2A and 2B (and various other drawings) are highly simplified diagrams, and it will be appreciated that an actual RF transistor die may include more unit cells and various circuits and elements not shown in the simplified drawings herein. More generally, the drawings herein are intended to represent structures for identification and explanation purposes and are not intended to represent structures at physical scales.

[0092] Figures 3A, 3B, and 3C are schematic side views of RF transistor amplifier packages 370a, 370b, and 370c (collectively 370) according to various embodiments of the present disclosure. As shown in FIGS. 3A - 3C, one or more transistor dies (e.g., GaN - on - SiC transistor dies) 110 are attached to a conductive submount 376 (shown as a conductive flange). For example, the flange 376 may be a CPC (copper, copper - molybdenum, copper laminate structure) or a copper flange that provides both an attachment surface and a heat slug for the transistor die 110. The transistor die 110 may be attached to the submount 376 by typical die - attach materials and / or methods (e.g., gold - tin (AuSn) solder, silver (Ag) sintering, conductive epoxy, etc.). In some embodiments, the transistor die 110 may define a multistage amplifier such as a Doherty amplifier. A package frame 375 is provided at a peripheral region or edge of the submount 376. The package frame 375 includes an electrical insulating member 377 (e.g., a PCB) and one or more conductive layers or traces 373 (e.g., a copper - cladding layer or other metallization) that define input and output leads 372 and 374 of the package 370a. The input and output leads 372 and 374 are respective RF leads that provide RF signal connections to respective terminals 362 and 364 of the transistor die 110. The RF leads 372, 374 may include, for example, microstrip transmission lines.

[0093] The opening 371 in the package frame 375 exposes the surface of the submount 376 that includes the transistor die 110 thereon. In some embodiments, the opening 371 is sized to surround one or more transistor dies 110 attached to the surface of the central region of the submount 376, e.g., providing a window frame around the transistor die 110. The opening 371 in the package frame 375 may be sized slightly larger than the surface area occupied by the transistor die 110 or the transistor dies 110 on the submount 376 (e.g., 0.508 mm (20 mils) or less, 0.381 mm (15 mils) or less, or 0.254 mm (10 mils) or less), allowing for die attach material overflow and placement variations on the transistor die 110. The ground pad 366 of the transistor die 110 is electrically connected to the conductive submount 376. In FIGS. 3A and 3B, each wire bond 325 (shown as a low profile wire bond) electrically connects the input contact pad 362 (e.g., gate pad) and the output contact pad 364 (e.g., drain pad) of the transistor die 110 to the package frame 375. In FIG. 3C, each passive interconnect structure 327 (e.g., IPD) electrically connects the input and output contact pads 362 and 364 of the transistor die 110 to the package frame 375. More generally, the interconnect structure or device 327 (or "integrated interconnect") may refer to a structure including an integrated circuit, such as a resistor (including transmission lines), via, inductor, and / or capacitor on a layer or substrate, e.g., a dielectric-based structure with integrated traces, vias, and / or circuits that can be used instead of wire bonds to reduce and / or avoid associated parasitic inductance and manufacturing issues.

[0094] After the interconnection operation (i.e., the formation of wire bonds 325 and / or the placement of the interconnect structure 327), the protective members 379a, 379b, 379c (collectively 379) are formed in or otherwise provided in the opening 371 in the package frame 375 that includes the transistor die 110. The protective member 379 may encapsulate or otherwise cover the surface of the submount 376 exposed by the transistor die 110 and the package frame 375 while exposing the peripheral portion of the package frame 375 (and the conductive layer 373 thereon) or otherwise without the protective member 379.

[0095] For example, as shown in FIGS. 3A and 3C, the protective member 379 may be a sealing material 379a, 379c (e.g., a plastic overmold (OMP)) that encapsulates the die 110 or otherwise provides protection for the die 110 while exposing the remainder of the package frame 375 or otherwise providing access to the remainder of the package frame 375. For example, the opening 371 in the package frame 375 may be sealed or “glob topped” (e.g., using a dispensed and cured sealing material 379a that may typically be used on a PCB) to protect the transistor die 110 and the electrical connections 325, 327. In some embodiments, the glob top sealing material 379a may be molded and / or shaped prior to curing. As another example, as shown in FIG. 3B, the protective member 379 may be a lid member 379b, e.g., a ceramic material (e.g., alumina), disposed and attached over the transistor die 110 and the electrical connections 325 to define an open cavity cover. In still other examples, the protective member 379 may be a wire-based structure such as a wire cage or a molded or shaped lid structure. More generally, any combination of dielectric and / or conductive materials may be used to form the protective member 379 that covers the opening 371 and the transistor die 110 while exposing the portion of the conductive routing provided by the conductive layer 373 outside the protective member 379.

[0096] The package frame 375 can be any substrate or laminate including an insulating layer 377 and one or more conductive layers 373 (e.g., traces, vias, routing patterns) that can be attached to a conductive flange or submount 376 or formed thereon in some other way. For example, in some embodiments, the package frame 375 can include a PCB 377 formed from a substrate material having low loss at RF frequencies (e.g., RO4003C Lo pro, Isola Astra MT77, etc.) and can have a thickness in the range of about 0.0762 mm (3 mils) to about 1.016 mm (40 mils). The package frame 375 may be able to withstand the high temperatures used during substrate attachment (and subsequent passive / reactive component attachment as described below) or the RF operation of the packaged device 370. Although shown as including two conductive layers 373 (conductive top cladding and conductive bottom cladding) on the electrical insulating member 377, the package frame 375 can include fewer or more layers (e.g., a multilayer circuit board including five layers, eight layers, etc.) along with conductive vias connecting the different conductive layers 373. In some embodiments, the package frame 375 can further include an embedded capacitance layer, and the conductive layer 373 outside the protective member 379 is electrically connected thereto.

[0097] The outer extent or periphery of the package frame 375 may be dimensionally similar to the outer extent of the flange or submount 376. That is, the package frame 375 need not extend significantly outwardly or substantially beyond the edge of the flange 376. For example, in some embodiments, the package frame 375 may be restricted within the edge of the flange 376, for example, within less than about 0.381 mm (15 mils), for example, within about 0.254 mm (10 mils) or less, or within about 0.127 mm (5 mils) or less, from the edge of the flange. In some embodiments, the package frame 375 may extend beyond the edge of the flange 376 by, for example, less than about 0.381 mm (15 mils), for example, less than about 0.254 mm (10 mils) or less, or less than about 0.127 mm (5 mils) or less. The tolerance of the PCB-based package frame 375 may be less than about 3 mils in some embodiments. More generally, the periphery of the package frame 375 may be within about ±0.381 mm (15 mils) (e.g., about ±0.254 mm (10 mils), about ±0.127 mm (5 mils), or less) of the edge of the submount 376.

[0098] Accordingly, the packaged RF power device 370 need not have electrical components and / or electrical connections that extend substantially beyond the flange or submount 376. Additionally, the portion of the conductive layer 373 outside of the protective member 379 can be patterned and routed to provide an appropriate or desired RF function or circuit (e.g., impedance pre-matching, frequency filtering, etc.). The impedance and / or frequency response of this matching circuit may be reconfigured after assembly, for example, by replacing one or more of the surface mount or other passive / reactive components on the portion of the package frame 375 that is exposed by the protective member 379 or that does not have the protective member 379.

[0099] Figures 4A, 4B, and 4C are schematic side views of RF transistor amplifier packages 470a, 470b, and 470c (collectively 470) that include passive and / or reactive electrical components (shown as SMDs) on a package frame, according to various embodiments of the present disclosure. The packages 470 of FIGS. 4A-4C may be similar to the packages 370 of FIGS. 3A-3C and may further include passive and / or reactive surface mount electrical components 478 (e.g., multilayer capacitors, inductors, resistors, or other interconnect structures including IPDs) that are attached (e.g., by solder, conductive epoxy, etc.) and electrically connected to conductive leads and / or traces provided by a conductive layer 373 on an upper surface of a package frame 375.

[0100] In FIGS. 4A and 4C, the electrical components 478 are provided on portions of the package frame 375 that are outside of protective members 379a, 379b' (collectively 397). In particular, in FIG. 4A, the protective member 379 is shown as a sealant 379a that extends (e.g., isometrically) over the transistor die 110, over the wire bonds 325, and in some examples over the surface of the submount 376. In FIG. 4C, the protective member 379 is shown as a lid member 379b' that covers the surfaces of the transistor die 110, the interconnect structure 327, and the submount 376 in an open cavity configuration. In FIG. 4B, the protective member 379 is shown as an extruded and cured sealant 379a' (e.g., glob top) that extends isometrically over the surfaces of the transistor die 110, the wire bonds 325, and the submount 376 and further extends isometrically over the electrical components 478. More generally, as described above, the protective member 379 may include any combination of dielectric and / or conductive materials that cover the openings 371 and the transistor die 110 while exposing at least a portion of the conductive routing provided by the conductive layer 373 outside of the protective member 379.

[0101] In FIGS. 4A-4C, electrical component 478 is shown, for example, as an SMD, but is not limited thereto. The SMD component may include, but is not limited to, capacitors, resistors, inductors, and / or other surface mountable elements. Electrical component 478 is reconfigurable to provide desired impedance characteristics (e.g., to implement input / inter-stage / output impedance matching circuits and / or harmonic termination circuits for transistor die 110) and / or frequency performance before or after shipping of the packaged RF power device 470 to the customer. Protective member 379 protects die 110 and electrical connections 325, 327 during surface processing and / or reprocessing of circuit board 377. FIGS. 4A-4C show examples 470a-470c comprising SMD components 478 attached to upper cladding 373 of package frame 375, although it will be understood that other configurations may be used. For example, in some embodiments, package frame 375 may be a multi-layer circuit board including a plurality of electrical insulation layers 377 and conductive layers 373, and electrical component 478 may be implemented as an interlayer component, such as a planar inductor and / or a multi-layer capacitor, embedded within one or more layers of the multi-layer circuit board.

[0102] FIGS. 5 and 6 are schematic side views of RF transistor amplifier packages 370, 470 mounted on RF circuit boards 500, 600, comprising conductive surface mount components 585, 678 for package-substrate connection according to various embodiments of the present disclosure. As shown in FIGS. 5 and 6, RF circuit board 500 includes a PCB 587 having one or more conductive layers 583 mounted on an upper side of a thermally conductive substrate or heat sink 586 (e.g., a copper or aluminum block or base structure). Heat sink 586 also serves as a ground for RF signals traveling through RF circuit board 500. Pockets may be machined into heat sink 586 such that, after placement of the packaged RF device, package submount 376 and package frame 375 are restricted within an opening 581 in RF circuit board 500 or PCB 587. In some embodiments, the surface of package frame 375 of the packaged devices 370, 470 (e.g., conductive upper cladding layer 373) is substantially coplanar or flush with the surface of RF circuit board 500 or PCB 587 (e.g., conductive upper cladding 583). For example, the upper side or top surface of package frame 375 may be within a distance D of about 0.381 mm (15 mils) (e.g., within about 0.254 mm (10 mils), within about 0.1778 mm (7 mils), within about 0.127 mm (5 mils), or less) above or below the top surface of RF circuit board 500 or PCB 587.

[0103] The opening 581 may have dimensions sized to receive the packaged devices 370, 470 while having some gap or clearance G (e.g., less than about 0.381 mm (15 mils), e.g., about 0.254 mm (10 mils) or less, or about 0.127 mm (5 mils) or less) between the sidewalls of the opening 581 and the peripheries or edges of the packaged devices 370, 470. In some examples, it may be desirable to align the packaged devices 370, 470 to the left or right of the center of the opening 581 (e.g., flush with or in contact with the PCB 587 on one side). For example, the packaged devices 370, 470 may be aligned toward the output lead 374 while having a gap G of about 0.762 mm (30 mils) or less (e.g., about 0.381 mm (15 mils) or less, or about 0.254 mm (10 mils) or less) between the peripheries or edges of the packaged devices 370, 470 and the input lead 372, or vice versa. In other examples, the packaged devices 370, 470 may be disposed substantially centered within the opening 581 such that, for example, on each side (e.g., on the input side and the output side for connection to the input lead 372 and the output lead 374, respectively), there is a respective gap G of about 0.381 mm (15 mils) or less (e.g., about 0.254 mm (10 mils) or less, or about 0.127 mm (5 mils) or less).

[0104] As shown in FIGS. 5 and 6, conductive surface mount components 585, 678 can be used to bridge the connection between the RF circuit board 500 and the conductive leads 372, 374 of the packaged devices 370, 470. In particular, in FIG. 5, the conductive surface mount component is mounted by a conductive shim 585 (e.g., a copper shim) or other flexible conductive material. For example, in some embodiments, the conductive shim 585 has a deflection of about ±0.381 mm (15 mils) (e.g., about ±0.254 mm (10 mils), about ±0.1778 mm (7 mils), or about ±0.127 mm (5 mils)) between surfaces 583 and 373 that are substantially in the same plane, and is mounted by a copper tape that may have sufficient flexibility to provide a conductive bridge between the upper conductive layer 583 of the RF circuit board 500 and the upper conductive layer 373 that provides the leads 372, 374 of the packaged RF power devices 370, 470. The conductive shim 585 can be attached (e.g., soldered) by using the same or a similar process used to attach other electrical components 478 and / or 578 (e.g., SMD, IPD, or interconnect structures) to the surface of the frame 375 of the packaged RF power devices 370, 470 and / or to the RF circuit board 500, respectively.

[0105] FIG. 6 shows that a conductive surface mount component can be implemented by passive and / or reactive surface mount component 678 used for package-substrate connection according to various embodiments of the present disclosure. For example, in addition to or instead of flexible conductive shim 585, other surface mount components 678 (e.g., multilayer capacitors, inductors, resistors, or other interconnect structures including IPDs) can be used to provide a conductive bridge between upper conductive layer 583 of RF circuit board 600 and upper conductive layer 373 that provides leads 372, 374 of packaged RF power devices 370, 470. Conductive surface mount component 678 may otherwise be similar to passive and / or reactive electrical component 478 (e.g., multilayer capacitors, inductors, resistors, or other interconnect structures including IPDs) attached and electrically connected (e.g., by solder, conductive epoxy, etc.) to conductive leads and / or traces provided by conductive layer 373 on the upper surface of package frame 375, for example, outside of protective member 379.

[0106] FIGS. 7, 8, 9, and 10 are schematic perspective views showing a method of manufacturing RF power device package 470 according to various embodiments of the present disclosure. FIG. 11 is an enlarged schematic perspective view showing the connection between the RF transistor amplifier package of FIG. 10 and the RF circuit board. It will be understood that the manufacturing operations shown in FIGS. 7, 8, 9, and 10 are examples and the method of manufacturing the RF power device package described herein is not limited to these operations or the order shown.

[0107] Figures 7 and 8 show views of the packaged RF power device 470 at an intermediate point during the manufacturing or assembly process. In particular, as shown in FIG. 7, the transistor die 110 is attached to the surface of the conductive submount or flange 376. In FIG. 8, a package frame 375 including a PCB dielectric layer 377 and one or more conductive layers 373 is attached to the flange 376. The package frame 375 may be formed on the flange 376 prior to attachment of the transistor die 110 in some embodiments. The package frame 375 includes respective openings 371 that expose the surface of the flange 376 and the transistor die 110 thereon. The transistor die 110 is electrically connected to the package frame 375 as shown by wire bonds 325. More specifically, each input (e.g., gate) terminal and output (e.g., drain) terminal of the transistor die 110 is electrically connected by wire bonds 325 to respective leads defined by the conductive layer 373 of the package frame 375.

[0108] Figure 9 shows the completion of the assembly process of the packaged RF power device 470. As shown in FIG. 9, the die 110 and the electrical connection 325 between the die 110 and the package frame 375 are covered by a protective member 379. For example, the die 110 and the electrical connection 325 may be covered by an isotropic encapsulant (glob-toped with a suitable molding compound to protect the wires and chip) or by an open cavity lid member. The other portions of the package frame 375 and the conductive traces / routings defined by the conductive layer 373 are exposed by the protective member 379, for example, at the periphery of the flange 376. The portion of the package frame 375 outside the protective member 379 defines a sufficient surface area for mounting one or more electrical components.

[0109] FIG. 9 further shows that the passive and / or reactive electrical component 478 is attached to the package frame 375 outside the protective member 379. However, since the conductive traces / routings in the portion of the package frame 375 outside the protective member 379 are exposed, it will be understood that the attachment of the electrical component 478 may then be performed, for example, after placement on or implementation within an RF circuit board.

[0110] FIG. 10 shows the implementation and electrical connection of the packaged RF power device 470 within the RF circuit board 500. The RF circuit board includes a conductive base structure 586 (e.g., copper or aluminum heat sink) having an electrical insulation 587 and a conductive layer 583 thereon. Additional surface-mounted electrical components 578 (e.g., passive and / or reactive SMDs, IPDs, or interconnect structures) may be provided on the conductive traces / routings provided by the conductive layer 583 of the RF circuit board 500. The packaged RF power device 470 is implemented within the opening 581 in the RF circuit board 500, whereby the flange 376 contacts the conductive base structure 586 and the package frame 375 is restricted within the opening 581. Each lead defined by the conductive layer 373 of the package frame 375 does not have an electrical connection extending beyond the edge of the flange 376.

[0111] FIG. 11 shows in more detail the package-substrate connection between the packaged RF power device 470 of FIG. 10 and the RF circuit board 500. As shown in FIG. 11, a conductive surface-mounted component 585 (e.g., a copper shim or other flexible conductive material) is used to provide a conductive bridge between the conductive layer 583 of the RF circuit board 500 and each lead provided by the conductive layer 373 of the packaged RF power device 470. Additionally or alternatively, surface-mounted electrical components (e.g., passive and / or reactive SMDs or IPDs, such as component 678 in FIG. 6) may be used to provide a conductive bridge between the RF circuit board 500 and the packaged RF power device 470.

[0112] The packaged RF power devices 370, 470 described herein are dimensioned to be mounted within an opening 581 in an RF circuit board 500, along with conductive leads 373 that have no electrical connections extending substantially beyond the edges of the flange 376. This reduces and / or avoids problems related to lead contact and / or misalignment of some conventional packaged RF power devices. Additionally, the packaged RF power devices 370, 470 may include passive and / or reactive electrical components 478, 585, 678 that are outside of (or otherwise exposed on the surface of the package frame 375) a protective member 379 that covers the transistor die 110 and electrical connections 325. Thus, the electrical components 478, 585, 678 may be reconfigurable, for example, to provide desired impedance characteristics (e.g., to implement input / inter-stage / output impedance matching circuits and / or harmonic termination circuits for the transistor die 110) and / or frequency performance during surface processing and / or rework of electrical components 578 on the circuit board 500.

[0113] Embodiments of the present disclosure may be used in various RF power products, for example, for 5G and base station applications. Particular embodiments of the present disclosure may be used in various cellular infrastructure (CIFR) RF power products (including, but not limited to, 5W, 10W, 20W, 40W, 60W, 80W, and different frequency bands) for 5G and base station applications, including, for example, massive multiple input multiple output (mMIMO) (e.g., 1 - 10W) active antennas, and macro (e.g., 20 - 80W and different frequency bands) average power applications. Embodiments of the present disclosure may also be applied to radar and monolithic microwave integrated circuit (MMIC) type applications.

[0114] The RF transistor amplifiers described herein may include transistor dies that define gallium nitride-based high electron mobility transistors (HEMTs) and / or silicon-based laterally diffused metal oxide semiconductor (LDMOS) transistors. The transistor dies may be configured to operate at at least a portion of one or more of the 2.5 - 2.7 GHz, 3.4 - 4.2 GHz, or 5.1 - 5.8 GHz frequency bands, and / or at frequencies higher than 10 GHz.

[0115] Referring again to FIG. 2B, a semiconductor structure 130, such as a semiconductor structure for a Group III nitride semiconductor HEMT, that may be used in the RF transistor amplifier packages 370, 470 described herein may be formed on a substrate 322 such as a silicon carbide substrate, a silicon substrate, or a sapphire substrate. The substrate 322 may be, for example, a semi-insulating silicon carbide substrate that may be of the 4H polytype of silicon carbide. Other silicon carbide candidate polytypes may include the 3C, 6H, and 15R polytypes. The substrate 322 may be a high purity semi-insulating (HPSI) substrate available from Cree Inc. The term "semi-insulating" is used herein in an illustrative rather than an absolute sense.

[0116] Silicon carbide may be used as a substrate material, but embodiments of the present application may utilize any suitable substrate such as sapphire (Al 2 O 3 ), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), gallium nitride (GaN), silicon (Si), GaAs, LGO, zinc oxide (AnO), LAO, indium phosphide (InP), etc. In some embodiments of the present disclosure, the SiC bulk crystal of the substrate 322 may have a resistivity of about 1×10 5 ohm-cm or more at room temperature. The substrate 322 can be a SiC wafer, and the HEMT device can be formed at least in part via wafer-level processing, and then the wafer can be diced to provide a plurality of individual HEMTs.

[0117] The channel layer 324 is formed on the upper surface 322B of the substrate 322 (or further optional layers described herein), and the barrier layer 326 is formed on the upper surface of the channel layer 324. The channel layer 324 and the barrier layer 326 may each be formed by epitaxial growth in some embodiments. Techniques for epitaxial growth of group III nitrides are described, for example, in U.S. Patent No. 5,210,051, U.S. Patent No. 5,393,993, and U.S. Patent No. 5,523,589, the disclosures of which are also incorporated herein by reference in their entirety. The channel layer 324 may have a bandgap smaller than that of the barrier layer 326, and the channel layer 324 may also have a larger electron affinity than the barrier layer 326. The channel layer 324 and the barrier layer 326 may include group III nitride-based materials.

[0118] In some embodiments, if the energy of the conduction band edge of the channel layer 324 is smaller than the energy of the conduction band edge of the barrier layer 326 at the interface between the channel and barrier layers 324, 326, the channel layer 324 may be a group III nitride such as x Ga 1-x AlGaN, where 0 ≦ x < 1. In one embodiment of the present disclosure, x = 0, indicating that the channel layer 324 is GaN. The channel layer 324 may also be other group III nitrides such as InGaN, AlInGaN, etc. The channel layer 324 may be undoped (``unintentionally doped'') and may be grown to a thickness greater than about 0.002 μm. The channel layer 324 may also be a multilayer structure such as a superlattice or a combination of GaN, AlGaN, etc. The channel layer 324 may be under compressive strain in some embodiments.

[0119] Regarding a HEMT device, a 2DEG layer is induced in the channel layer 324 at the junction between the channel layer 324 and the barrier layer 326. The 2DEG layer functions as a highly conductive layer that allows conduction between the source and drain regions of the device, which are respectively under the source contact 156 and the drain contact 154. The channel layer 324 and the barrier layer 326 form a semiconductor layer structure 130.

[0120] For purposes of illustration, a semiconductor layer structure 130 including a channel layer 324 and a barrier layer 326 is shown, but the semiconductor layer structure 130 may include additional layers / structures / elements such as a buffer and / or nucleation layer between the channel layer 324 and the substrate 322, and / or a cap layer on the barrier layer 326. HEMT structures including a substrate, a channel layer, a barrier layer, and other layers are described, for example, in U.S. Patent Nos. 5,192,987, 5,296,395, 6,316,793, 6,548,333, 7,544,963, 7,548,112, 7,592,211, 7,615,774, and 7,709,269, the disclosures of which are hereby incorporated by reference in their entirety. For example, an AlN buffer layer may be formed on the upper surface of the substrate 322 to provide an appropriate crystal structure transition between the silicon carbide substrate 322 and the rest of the HEMT device. Additionally, a strain balancing transition layer may be provided further and / or alternatively, as described, for example, in U.S. Patent No. 7,030,428 by the same applicant, the disclosure of which is hereby incorporated by reference as if fully set forth herein.

[0121] The source contact 156 and the drain contact 154 may be formed on the upper surface of the barrier layer 326 and may be laterally spaced from each other. The gate contact 152 may be formed on the upper surface of the barrier layer 326 between the source contact 156 and the drain contact 154. The material of the gate contact 152 may be selected based on the composition of the barrier layer 326 and, in some embodiments, may be a Schottky contact.

[0122] The source contact 156 may be coupled to a reference signal such as a ground voltage. The coupling to the reference signal may be provided by a via 166 that extends from the bottom surface of the substrate 322 through the substrate 322 to the top surface of the barrier layer 326. The via 166 may expose the bottom surface of the resistive portion of the source contact 156. The back metal layer 126 may be formed on the bottom surface of the substrate 322 and the sidewalls of the via 166. The back metal layer 126 may directly contact the resistive portion of the source contact 156. Thus, the back metal layer 126 and the signal coupled thereto may be electrically connected to the source contact 156.

[0123] Referring further to FIG. 2B, the HEMT device 110 may include a first insulating layer 350 and a second insulating layer 355. The first insulating layer 350 may directly contact the top surface of the semiconductor structure 130 (e.g., contact the top surface of the barrier layer 326). The second insulating layer 355 may be formed on the first insulating layer 350. It will be appreciated that in some embodiments there may be three or more insulating layers. The first insulating layer 350 and the second insulating layer 355 may function as a passivation layer for the HEMT device.

[0124] The source contact 156, the drain contact 154, and the gate contact 152 may be formed in the first insulating layer 350. In some embodiments, at least a portion of the gate contact 152 may be on the first insulating layer. In some embodiments, the gate contact 152 may be formed as a T-shaped gate and / or a gamma-gate, the formation of which is described, for example, in U.S. Patent No. 8,049,252, U.S. Patent No. 7,045,404, and U.S. Patent No. 8,120,064, the disclosures of which are hereby incorporated by reference in their entirety. The second insulating layer 355 may be formed on the first insulating layer 350 and on portions of the drain contact 154, the gate contact 152, and the source contact 156.

[0125] In some embodiments, the field plate 360 may be formed on the second insulating layer 355. At least a portion of the field plate 360 may be on the gate contact 152. At least a portion of the field plate 360 may be on a portion of the second insulating layer 355 between the gate contact 152 and the drain contact 154. The field plate and techniques for forming the field plate are described, for example, in U.S. Patent No. 8,120,064, the disclosure of which is hereby incorporated by reference in its entirety.

[0126] The metal contact 365 may be disposed in the second insulating layer 355. The metal contact 365 may provide an interconnection between the drain contact 154, the gate contact 152, and the source contact 156 and other portions of the HEMT device. Each of the metal contacts 365 may be in direct contact with each of the drain contact 154 and / or the source contact 156. The metal contact 365 may include a metal or other highly conductive material, such as, for example, copper, cobalt, gold, and / or a composite metal.

[0127] With reference to the accompanying drawings in which exemplary embodiments are shown, various embodiments are described herein. However, these embodiments may be embodied in different forms and should not be construed as limited to the embodiments shown herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concept of the invention to those skilled in the art. Various modifications to the exemplary embodiments and the general principles and features described herein will be readily apparent. In the drawings, the size and relative sizes of layers and regions are not shown to scale and in some instances may be exaggerated for clarity.

[0128] Terms such as "first" and "second" may be used in this specification to describe various elements, but it will be understood that these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present invention, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0129] The terms used in this specification are for illustrative purposes only for specific embodiments and are not intended to limit the invention. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly dictates otherwise. Further, the terms "comprises", "comprising", "includes", and / or "including" as used herein expressly state the presence of the recited features, integers, steps, operations, elements, and / or components, and it will be further understood that they do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0130] Unless otherwise defined, all terms (including technical and scientific terms) used in this specification shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Further, the terms used in this specification should be interpreted as having a meaning consistent with their meaning in the context of this specification and the related art, and it will be understood that they are not to be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0131] When an element such as a layer, region, or substrate is said to be "on," "attached to," or "extending over" another element, it will be understood that these can be directly on the other element or there may be intervening elements. In contrast, when an element is said to be "directly on," "directly attached to," or "directly extending over" another element, there are no intervening elements. When an element is said to be "connected" or "coupled" to another element, it will also be understood that the element can be directly connected or coupled to the other element or there may be intervening elements. In contrast, when an element is said to be "directly connected" or "directly coupled" to another element, there are no intervening elements.

[0132] Relative terms such as "below," "above," "upper," "lower," "horizontal," "lateral," or "vertical" may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region shown in the drawings. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation shown in the drawings.

[0133] Embodiments of the invention are described herein with reference to cross-sectional views that are schematic illustrations of idealized embodiments (and intermediate structures) of the invention. The thicknesses of layers and regions in the drawings may be exaggerated for clarity. In addition, variations from the shapes of the figures as a result of, for example, manufacturing techniques and / or tolerances are to be expected. Accordingly, embodiments of the invention should not be construed as limited to the particular shapes of the regions shown herein but include, for example, departures in shapes resulting from manufacturing. Elements shown by dashed lines may be optional in the illustrated embodiments.

[0134] The same numbers refer to the same elements throughout. Thus, the same or similar numbers may be described in connection with other drawings even if they are not referred to or described in the corresponding drawings. Also, elements not indicated by reference numbers may be described in connection with other drawings.

[0135] In the drawings and the specification, typical embodiments of the invention are disclosed and specific terms are used, but they are used only in a general and illustrative sense and not for limitation, and the scope of the invention is set forth in the following claims.

Claims

1. A high-frequency (RF) transistor amplifier, comprising: a package submount; a package frame including an electrical insulating member and one or more conductive layers, wherein a first surface of the package frame is on the package submount, and the package frame exposes a surface of the package submount, the package frame; a transistor die provided with respective terminals electrically connected to the package frame on the surface of the package submount; a protective member covering the transistor die; one or more electrical components attached to a second surface of the package frame facing the first surface outside the protective member and coupled to the respective terminals of the transistor die by the one or more conductive layers; The one or more conductive layers of the package frame provide input and output RF signal connections to the respective terminals of the transistor die and define respective leads extending to the second surface of the package frame outside the protective member, a high-frequency (RF) transistor amplifier.

2. The RF transistor amplifier according to claim 1, wherein the package frame does not extend substantially beyond the edge of the package submount.

3. The RF transistor amplifier according to claim 2, wherein the one or more electrical components are surface-mounted devices electrically connected to the respective leads outside the protective member.

4. The RF transistor amplifier according to claim 3, wherein the one or more electrical components define part of an input, inter-stage or output impedance matching circuit or a harmonic termination circuit for the RF transistor amplifier.

5. The respective terminals of the transistor die are electrically connected to the respective leads by respective interconnect structures, and the protective member covers the transistor die and the respective interconnect structures, the RF transistor amplifier according to any one of claims 2 to 4.

6. The RF transistor amplifier according to any one of claims 2 to 4, wherein the respective leads do not have electrical connections extending substantially beyond the edge of the package submount.

7. The RF transistor amplifier according to any one of claims 2 to 4, further comprising one or more conductive surface mount components that are electrically connected to each of the leads and extend substantially beyond the edge of the package submount.

8. The RF transistor amplifier according to any one of claims 1 to 7, wherein the one or more electrical components include passive and / or reactive surface mount components.

9. The RF transistor amplifier according to any one of claims 1 to 8, wherein the protective member includes a discharged and cured encapsulant that extends over at least a portion of the transistor die and the package frame.

10. The RF transistor amplifier according to any one of claims 1 to 8, wherein the protective member includes a lid member that covers at least a portion of the transistor die and the package frame.

11. The RF transistor amplifier according to any one of claims 1 to 10, wherein the package submount is configured to be mounted within an opening in an RF circuit board, whereby the package frame is restricted within the opening.

12. A high frequency (RF) transistor amplifier, a package submount, a package frame having an electrical insulating member and one or more conductive layers on the package submount, the package frame exposing a surface of the package submount, a transistor die having respective terminals on the surface of the package submount that are electrically connected to the package frame, the package frame does not extend substantially beyond the edge of the package submount, and the one or more conductive layers of the package frame define respective leads that provide input and output RF signal connections to the respective terminals of the transistor die on the upper surface of the package frame, the package submount is configured to be mounted within an opening in an RF circuit board, whereby the package frame and the respective leads are restricted within the opening, a harmonic (RF) transistor amplifier.

13. The RF transistor amplifier according to claim 12, wherein each of the leads of the package frame is substantially coplanar with the surface of the RF circuit board outside the opening.

14. The RF transistor amplifier according to claim 12 or 13, wherein each of the leads has no electrical connection extending substantially beyond the edge of the package submount.

15. The RF transistor amplifier according to claim 12 or 13, further comprising one or more conductive surface mount components that electrically connect each of the leads to the RF circuit board and extend substantially beyond the edge of the package submount.

16. A protective member covering the transistor die; The RF transistor amplifier according to any one of claims 12 to 15, further comprising one or more electrical components electrically connected to each of the leads and attached to the package frame outside the protective member.

17. The RF transistor amplifier according to claim 16, wherein the one or more electrical components define part of an input, inter-stage or output impedance matching circuit or harmonic termination circuit for the RF transistor amplifier.

18. The RF transistor amplifier according to claim 16 or 17, wherein each terminal of the transistor die is electrically connected to each of the leads by respective interconnect structures, and the protective member covers the transistor die and the respective interconnect structures.

19. The RF transistor amplifier according to any one of claims 16 to 18, wherein the one or more electrical components include passive and / or reactive surface mount components.

20. The RF transistor amplifier according to any one of claims 16 to 19, wherein the protective member includes a discharged and cured encapsulant extending over at least a portion of the transistor die and the package frame.

21. The RF transistor amplifier according to any one of claims 16 to 19, wherein the protective member includes a lid member covering at least a portion of the transistor die and the package frame.

22. Further comprising the RF circuit board, the RF circuit board including a thermally conductive substrate, and the package submount being in contact with a surface of the thermally conductive substrate exposed by the opening in the RF circuit board. The RF transistor amplifier according to any one of claims 15 to 21.

23. A high-frequency (RF) transistor amplifier package, a package submount, a protective member covering the transistor die, a transistor die on a surface of the package submount, including one or more conductive layers defining respective leads electrically connected to respective terminals of the electrical insulating member and the transistor on a peripheral portion of the surface of the package submount, and on an upper surface of the package frame outside the protective member, configured to provide input and output RF signal connections to the respective terminals of the transistor die. A package frame, one or more electrical components electrically connected to the respective leads and attached to the upper surface of the package frame outside the protective member, comprising the package frame not extending substantially beyond an edge of the package submount, and the respective leads having no electrical connection extending substantially beyond an edge of the package submount. A harmonic (RF) transistor amplifier package.

24. The RF transistor amplifier according to claim 23, wherein the one or more electrical components define a part of an input, inter-stage or output impedance matching circuit or a harmonic termination circuit for the RF transistor amplifier.

25. The RF transistor amplifier according to claim 23 or 24, wherein the respective terminals of the transistor die are electrically connected to the respective leads by respective interconnect structures, and the protective member covers the transistor die and the respective interconnect structures.

26. The RF transistor amplifier according to any one of claims 23 to 25, wherein the one or more electrical components include passive and / or reactive surface mount components.

27. The RF transistor amplifier according to any one of claims 23 to 26, wherein the protective member includes a discharged and cured sealing material extending over at least a part of the transistor die and the package frame.

28. The RF transistor amplifier according to any one of claims 23 to 26, wherein the protective member includes a lid member covering at least a part of the transistor die and the package frame.

29. The RF transistor amplifier according to any one of claims 23 to 28, wherein the package submount is configured to be mounted within an opening in an RF circuit board, whereby the package frame and the respective leads are restricted within the opening.

30. A method of manufacturing a high-frequency (RF) transistor amplifier, the method comprising: providing a package submount; providing a first surface of a package frame on the package submount, the package frame comprising an electrical insulating member and one or more conductive layers, the package frame comprising an opening exposing the surface of the package submount therein; providing a transistor die on the surface of the package submount; electrically connecting respective terminals of the transistor die to the package frame; attaching a protective member to the package submount, the protective member covering the transistor die and exposing a portion of a second surface of the package frame facing the first surface on a peripheral portion of the package submount, the portion of the second surface of the package frame including a sufficient surface area for mounting one or more electrical components outside the protective member coupled to the respective terminals of the transistor die by the one or more conductive layers. A method of manufacturing a high-frequency (RF) transistor amplifier, wherein the one or more conductive layers of the package frame are configured to provide input and output RF signal connections to respective terminals of the transistor die and to define respective leads extending along the portion of the second part of the package frame.

31. Attaching the one or more electrical components to the portion of the package frame exposed by the protective member, wherein the one or more electrical components are surface-mounted devices electrically connected to the respective leads outside the protective member, the method according to claim 30, further comprising attaching the one or more electrical components.

32. The method according to any one of claims 30 to 31, wherein the one or more electrical components define part of an input, inter-stage or output impedance matching circuit or harmonic termination circuit for the RF transistor amplifier.

33. The method according to any one of claims 30 to 32, wherein the protective member comprises a discharged and cured encapsulant extending over at least a part of the transistor die and the package frame.

34. The method according to any one of claims 30 to 33, further comprising mounting the package submount in an opening in the RF circuit board, whereby the package frame is restricted within the opening in the RF circuit board.

35. The method according to claim 34, further comprising providing one or more conductive surface-mounted components that electrically connect the respective leads to the RF circuit board and extend substantially beyond the edge of the package submount.

36. The method according to claim 35, wherein the portion of the package frame along which the respective leads extend is substantially coplanar with the surface of the RF circuit board outside the opening in the RF circuit board.

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