Print head and image forming apparatus

Abstract

To provide a print head which prevents image quality reduction.SOLUTION: A print head according to an embodiment comprises: a substrate; a first light emission element; a first drive circuit; a second light emission element; a second drive circuit; and a control circuit. The first drive circuit is the circuit connected to the first light emission element, includes a first capacitor and determines a light emission amount of the first light emission element with the inter-terminal voltage of the first capacitor. The second drive circuit is the circuit connected to the second light emission element, includes a second capacitor and determines a light emission amount of the second light emission element with the inter-terminal voltage of the second capacitor. The control circuit is connected to the first drive circuit via first wiring, connected to the second drive circuit via second wiring and individually controls the inter-terminal voltage of the first and second capacitors at prescribed timing. A difference between the length of the first wiring and the length of the second wiring is shorter than an element arrangement pitch.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] Embodiments of the present invention relate to a print head and an image forming apparatus.

Background Art

[0002] Electrophotographic printers (hereinafter referred to as printers) have become widespread. A printer includes a print head, and the print head includes a plurality of light emitting elements. As the light emitting elements, those using LEDs (Light Emitting Diodes) or those using organic ELs (OLEDs: Organic Light Emitting Diodes) are available. For example, a print head is provided with light emitting elements corresponding to 5,120 pixels, and the arrangement of the light emitting elements is such that the main scanning direction is the direction in which the light emitting elements are arranged, and the direction orthogonal to the main scanning direction is the sub-scanning direction. The printer exposes the photosensitive drum with light emitted from these plurality of light emitting elements, and prints an image corresponding to the latent image formed on the photosensitive drum on a sheet which is a recording paper.

[0003] The density of the image corresponds to the amount of light of each light emitting element, and the amount of light of each light emitting element is determined by the voltage between the terminals of a capacitor included in the drive circuit of each light emitting element. There has been proposed a print head that makes the amount of light emitted by each light emitting element uniform by controlling the voltage between the terminals of the capacitor included in the drive circuit of each light emitting element at the same timing by voltage applying means (a D / A (digital to analog) circuit).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In such a print head, the wiring lengths between the drive circuit (capacitor) and the voltage applying means result in a resistance difference, which affects the circuit time constant when controlling the voltage of the capacitor (charging and discharging the capacitor). If there is a large difference in the wiring length (resistance), the circuit time constants will be significantly different, which may cause instability in the light amount and lead to a deterioration in image quality.

[0006] An object of the present invention is to provide a print head and an image forming apparatus that prevent deterioration in image quality.

Means for Solving the Problems

[0007] The print head according to the embodiment includes a substrate, a first light emitting element, a first drive circuit, a second light emitting element, a second drive circuit, and a control circuit. The substrate has a plane including a main scanning direction and a sub-scanning direction that are orthogonal to each other. The first light emitting element is provided on the substrate. The first drive circuit is a circuit connected to the first light emitting element and includes a first capacitor, and determines the light emission amount of the first light emitting element based on the voltage between the terminals of the first capacitor. The second light emitting element is provided on the substrate and is separated from the first light emitting element by an element arrangement pitch along the main scanning direction. The second drive circuit is a circuit connected to the second light emitting element and includes a second capacitor, and determines the light emission amount of the second light emitting element based on the voltage between the terminals of the second capacitor. The control circuit is provided on the substrate, is connected to the first drive circuit by a first wiring, and is also connected to the second drive circuit by a second wiring, and individually controls the voltages between the terminals of the first and second capacitors at a predetermined timing. The difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, an example of an image forming apparatus according to an embodiment will be described with reference to the drawings. In each figure, the same components are denoted by the same reference numerals. The image forming apparatus is a printer, a copier, or a multifunction peripheral (MFP). In this embodiment, an image forming apparatus corresponding to an MFP will be described.

[0010] [Configuration of Print Head] With reference to FIGS. 1 to 7, an example of the configuration of a print head applied to the image forming apparatus according to the embodiment will be described. FIG. 1 is a diagram showing an example of the positional relationship between a photosensitive drum and a print head applied to the image forming apparatus according to the embodiment. The image forming apparatus includes a photosensitive drum 17 and a print head 1 shown in FIG. 1. The print head 1 is disposed to face the photosensitive drum 17.

[0011] The photosensitive drum 17 rotates in the direction of the arrow shown in FIG. 1. The rotation direction of the photosensitive drum 17 is called the sub-scanning direction (the second direction, the Y-axis direction, or the short-side direction), and the direction orthogonal to the sub-scanning direction is called the main scanning direction (the first direction, the X-axis direction, or the long-side direction). The photosensitive drum 17 is uniformly charged by a charger and exposed to light from the print head 1, and the potential of the exposed portion decreases. That is, the image forming apparatus controls the light emission of the print head 1 to form an electrostatic latent image on the photosensitive drum 17. Controlling the light emission of the print head 1 means controlling the timing of light emission and extinction (non-light emission) of the print head 1 and controlling the amount of light thereof.

[0012] The print head 1 includes a light emitting unit 10 and a rod lens array 12. The light emitting unit 10 includes a transparent substrate 11 installed facing the rod lens array 12. For example, the transparent substrate 11 is a glass substrate that transmits light. On the transparent substrate 11, a light emitting element row 13 composed of a plurality of light emitting elements 131 is formed. Note that the print head 1 may include a plurality of light emitting element rows.

[0013] The rod lens array 12 condenses the light from each light emitting element 131 of the light emitting element row 13 onto the photosensitive drum 17. Thereby, an image line corresponding to the light emission of the light emitting element 131 is formed on the photosensitive drum 17. The light emitting element 131 formed on the transparent substrate 11 is controlled so that the light amount at the facing positions sandwiching the rod lens array 12 becomes a predetermined value that satisfies the standard by current control.

[0014] The light emitting elements 131 are arranged in a straight line in one row in the main scanning direction. Alternatively, with the arrangement of the odd-numbered light emitting elements 131, a first light emitting element row is formed linearly along the main scanning direction, and similarly, with the arrangement of the even-numbered light emitting elements 131, a second light emitting element row is formed linearly along the main scanning direction. That is, the light emitting elements 131 may be arranged in a staggered pattern. In this case, the first light emitting element row and the second light emitting element row are separated by a predetermined length in the sub-scanning direction. By controlling the light emission timings of the first and second light emitting element rows based on the rotation speed of the photosensitive drum and the predetermined length, a single straight-line image can be formed by the light emission of the first and second light emitting element rows.

[0015] FIG. 2 is a diagram showing an example of a transparent substrate constituting the print head according to the embodiment. FIG. 2 shows an example of a transparent substrate corresponding to a light emitting element row arranged in one row, but the print head may have light emitting elements arranged in a plurality of rows.

[0016] As shown in FIG. 2, a light-emitting element array 13 is formed on a transparent substrate 11 along the longitudinal direction of the transparent substrate 11. In the vicinity of the light-emitting element array 13, a drive circuit array 14 for driving (causing to emit light) each light-emitting element and a wiring 145 for supplying a signal to the drive circuit array 14 are arranged side by side. Hereinafter, "drive" is denoted as "DRV". In FIG. 2, the drive circuit array 14 and the wiring 145 are arranged on one side of the light-emitting element array 13, but they may be arranged separately on both sides of the light-emitting element array 13. Note that the DRV circuit array 14 is composed of a plurality of DRV circuits 140.

[0017] An IC (Integrated Circuit) 15 is arranged at an end of the transparent substrate 11. The transparent substrate 11 also includes a connector 16. The connector 16 is electrically connected to the print head 1 and the control system of a printer, a copier, or a multifunction device. This connection enables power supply, head control, transfer of image data, etc. A substrate for sealing the light-emitting element array 13, the wiring 145, the DRV circuit 140, etc. so that they do not come into contact with the outside air is attached to the transparent substrate 11. Note that when it is difficult to attach a connector to the transparent substrate, an FPC (Flexible Printed Circuits) may be connected to the transparent substrate and electrically connected to the control system.

[0018] FIG. 3 is a diagram showing an example of a cross section of the transparent substrate 11 of the print head according to the embodiment. FIG. 3 shows an example of a cross section of the transparent substrate corresponding to one row of light-emitting elements, but the print head may have a plurality of rows of light-emitting elements. As shown in FIG. 3, the light-emitting portion 10 of the print head 1 includes a plurality of light-emitting elements 131, a plurality of DRV circuits 140, and a wiring 145 arranged to face the reference surface 1101 of the transparent substrate 11. The light-emitting portion 10 also includes a sealing glass 1102. A plurality of light-emitting elements 131, a plurality of DRV circuits 140, and a wiring 145 are arranged in a space surrounded by the transparent substrate 11 and the sealing glass 1102. Light from the light-emitting element 131 passes through the transparent substrate 11 and is irradiated toward the photosensitive drum 17.

[0019] FIG. 4 is a diagram showing an example of a DRV circuit for driving a light-emitting element according to an embodiment, and a light-emitting element that emits light by the DRV circuit. The DRV circuit 140 is composed of low-temperature polysilicon thin-film transistors 141, 143, 144 and a capacitor 142. The SH (sample hold) signal 21 becomes a low level when changing the light emission intensity of the light-emitting element 131 connected to the DRV circuit 140. When the SH signal 21 becomes a low level, the transistor 141 becomes an ON state, and according to the voltage of the light emission level signal 22, the voltage between the terminals of the capacitor 142 connected to the transistor 141 and the transistor 143 changes. That is, the capacitor 142 changes its inter-terminal voltage according to a correction value described later, and the current supplied to the light-emitting element 131 is determined by the inter-terminal voltage.

[0020] When the SH signal 21 becomes a high level, the transistor 141 becomes an OFF state and the voltage between the terminals of the capacitor 142 is held. Even if the voltage of the light emission level signal 22 changes, the voltage level between the terminals of the capacitor 142 does not change. A current corresponding to the voltage held between the terminals of the capacitor 142 flows through the light-emitting element 131 connected to the signal line I of the DRV circuit 140. That is, the light-emitting element 131 emits light with a light amount corresponding to the voltage between the terminals of the capacitor 142 in the DRV circuit 140. By the SH signal 21, a predetermined DRV circuit 140 and a light-emitting element 131 are selected from a plurality of DRV circuits 140 and a plurality of light-emitting elements 131 included in the DRV circuit row 14 and the light-emitting element row 13, and the light emission intensity is determined by the light emission level signal 22, and the light emission intensity can be maintained. Hereinafter, the voltage between the terminals of the capacitor may be referred to as the voltage of the capacitor.

[0021] The transistor 144 in the DRV circuit 140 switches the supply or non - supply (on or off of current supply) of current to the light - emitting element 131. The PWM (Pulse Width Modulation) signal 32 connected to the transistor 144 controls the light - emitting and extinguishing timings of the light - emitting element 131 (determines the light - emitting time per line period). When the transistor 144 is turned on by the PWM signal 32, current flows through the light - emitting element 131 and the light - emitting element 131 emits light. When the transistor 144 is turned off by the PWM signal 32, no current flows through the light - emitting element 131 and the light - emitting element 131 is extinguished.

[0022] FIG. 5 is a diagram showing an example of a circuit block of a print head according to an embodiment. FIG. 5 shows an example of a circuit block corresponding to a single row of light - emitting elements, but the print head may have multiple rows of light - emitting elements. As shown in FIG. 5, the light - emitting unit 10 includes an IC15. The IC15 includes a light - quantity control circuit 151, an SH signal output circuit section 152, a D / A (digital to analog) conversion circuit section 153, and a PWM (light - emitting time) control circuit section 155. The light - quantity control circuit 151 includes a light - quantity correction (voltage value) memory 1511. The light - emitting element row 13 and the DRV circuit row 14 are divided into N (for example, N = 150) light - emitting element groups 161.

[0023] One light - emitting element group 161 includes M (M is an integer of 2 or more, for example, M = 50) light - emitting elements 131 from the first to the Mth and a DRV circuit 140. For example, as shown in FIG. 5, the 50 DRV circuits 140 included in the first light - emitting element group 161 are denoted as DRV1 - 1 to 1 - 50, and the 50 DRV circuits 140 included in the 150th light - emitting element group 161 are denoted as DRV150 - 1 to 150 - 50. The same SH signal 21 and PWM signal 32 are connected to the DRV circuits 140 within one light - emitting element group 161.

[0024] The SH signal output circuit section 152 includes N SH signal output circuits corresponding to N light-emitting element groups 161 from the first to the Nth (N is an integer of 2 or more, for example, N = 150). For example, as shown in FIG. 5, the 150 SH signal output circuits are denoted as SH-1 to SH-150.

[0025] The SH signal output circuit section 152 is connected to each DRV circuit 140 of the N light-emitting element groups 161 via N SH signal wirings 210. For example, focusing on the wiring for the first light-emitting element group 161 closest to the IC15 among the SH signal wirings 210, a part of the wiring is arranged along the main scanning direction (longitudinal direction) at the position farthest from the light-emitting element row 13 and the DRV circuit row 14. Also, focusing on the wiring for the 150th light-emitting element group 161 farthest from the IC15 among the SH signal wirings 210, a part of the wiring is arranged along the main scanning direction at the position closest to the light-emitting element row 13 and the DRV circuit row 14.

[0026] The D / A conversion circuit section 153 includes M D / A conversion circuits corresponding to M DRV circuits 140 from the first to the Mth (for example, M = 50). For example, as shown in FIG. 5, the 50 D / A conversion circuits are denoted as D / A-1 to D / A-50.

[0027] The D / A conversion circuit section 153 is connected to each DRV circuit 140 of the N light-emitting element groups 161 via the D / A signal wiring 220. The D / A signal wiring 220 is the wiring for the light emission level signal 22 described above. The D / A signal wiring 220 connecting each D / A conversion circuit included in the D / A conversion circuit section 153 and each DRV circuit 140 is arranged so that the difference in the wiring length is small. For example, focusing on the D / A signal wiring 220 for DRVx-1 closest to the IC15 within the light-emitting element group x (x is any one of 1 to N), a part of the wiring is arranged along the main scanning direction at the position farthest from the light-emitting element row 13 and the DRV circuit row 14. Also, focusing on the D / A signal wiring 220 for DRVx-50 farthest from the IC15, a part of the wiring is arranged along the main scanning direction at the position closest to the light-emitting element row 13 and the DRV circuit row 14.

[0028] The PWM control circuit section 155 includes N PWM control circuits from the first to the Nth (for example, N = 150) corresponding to the N light-emitting element groups 161 from the first to the Nth (for example, N = 150). For example, as shown in FIG. 5, the 150 PWM control circuits are denoted as PWM-1 to PWM-150.

[0029] The PWM control circuit section 155 is connected to each DRV circuit 140 of the N light-emitting element groups 161 via the PWM signal wiring. The PWM signal wiring is the wiring for the PWM signal 32 described above, and in FIG. 5, the symbol 320 is given to these PWM signal wirings. For example, focusing on the wiring for the first light-emitting element group 161 closest to the IC15, a part of the wiring is arranged along the main scanning direction at the position farthest from the light-emitting element row 13 and the DRV circuit row 14. Focusing on the wiring for the 150th light-emitting element group 161 farthest from the IC15, a part of the wiring is arranged along the main scanning direction at the position closest to the light-emitting element row 13 and the DRV circuit row 14.

[0030] The light amount correction memory 1511 built in the light amount control circuit 151 stores correction values for causing each light-emitting element 131 to emit light with a predetermined light amount.

[0031] The light quantity control circuit 151 receives the image data 31, the horizontal synchronization signal 24, and the clock C via the connector 16. The PWM control circuit section 155 receives the horizontal synchronization signal 24 and the clock C via the connector 16.

[0032] The light quantity control circuit 151 outputs a correction value to the D / A conversion circuit section 153 in synchronization with the horizontal synchronization signal 24 and the clock C. The light emission and non-light emission (ON and OFF) of the light emitting element 131 are determined based on the image data. When the light quantity control circuit 151 causes the light emitting element 131 to emit light based on the image data, it outputs the correction value stored in the light quantity correction memory 1511. When the light quantity control circuit 151 does not cause the light emitting element 131 to emit light based on the image data, it outputs a predetermined correction value for not emitting light. The D / A conversion circuit section 153 to which the correction value is input outputs a light emission level signal 22 corresponding to the input correction value to the subsequent-stage DRV circuit 140 through the D / A signal wiring 220.

[0033] The SH signal output circuit section 152 supplies the SH signal 21 described above to the DRV circuit 140. The voltage between the terminals of the capacitor is sequentially set for each light emitting element group by the SH signal 21 from the SH signal output circuit section 152 and the light emission level signal 22 from the D / A conversion circuit section 153. That is, the SH signal output circuit section 152 and the D / A conversion circuit section 153 function as voltage setting means. The PWM control circuit section 155 supplies a PWM signal 32 for controlling the ON / OFF timing of the light emitting element 131 to the DRV circuit 140.

[0034] The DRV circuit 140 generates a drive signal for causing the light emitting element 131 to emit light based on the SH signal 21, the light emission level signal 22, and the PWM signal 32 output by the IC15. That is, the DRV circuit 140 supplies a drive current determined by the light emission level signal 22 to the light emitting element 131 at the timing determined by the PWM signal 32.

[0035] FIG. 6 is a diagram showing an example of a first wiring pattern of the D / A signal wiring of the print head according to the embodiment. In the print head described above, the wiring (length) between the DRV circuit (capacitor) 140 and the D / A conversion circuit section 153 has electrical resistance and affects the circuit time constant when controlling the voltage of the capacitor (charging and discharging the capacitor). If there is a large difference in the wiring length (resistance), the circuit time constants will be significantly different, which may cause instability in the light amount and lead to a deterioration in image quality.

[0036] Therefore, the print head 1 is configured with the first wiring pattern shown in FIG. 6. The print head 1 includes a transparent substrate 11, and the transparent substrate 11 has a plane (or virtual plane) including a main scanning direction and a sub-scanning direction that are orthogonal to each other. A plurality of light-emitting elements 131 including first and second light-emitting elements are arranged on the transparent substrate 11. Each light-emitting element 131 is arranged along the main scanning direction at an interval of an element arrangement pitch p. That is, the first light-emitting element and the second light-emitting element are arranged at a distance of the element arrangement pitch p along the main scanning direction.

[0037] Also, a plurality of DRV circuits 140 including first and second DRV circuits are arranged on the transparent substrate 11. The first DRV circuit is a circuit connected to the first light-emitting element, includes a first capacitor, and determines the light emission amount of the first light-emitting element according to the voltage between the terminals of the first capacitor. The second DRV circuit is a circuit connected to the second light-emitting element, includes a second capacitor, and determines the light emission amount of the second light-emitting element according to the voltage between the terminals of the second capacitor.

[0038] The IC 15 (each D / A conversion circuit of the D / A conversion circuit section 153) is connected to each DRV circuit by each wiring and controls the light emission of M light-emitting element groups 161 in units of groups. For example, the IC 15 is connected to the first DRV circuit by the first wiring, connected to the second DRV circuit by the second wiring, and individually controls the voltage between the terminals of the first and second capacitors at a predetermined timing. Also, in the first wiring pattern, the difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch p.

[0039] Here, the first and second wirings will be described in more detail. In the first wiring pattern, the IC15 and each DRV circuit are connected by a combination of a linear main wiring along the main scanning direction and a linear branch wiring along the sub-scanning direction.

[0040] The first wiring includes a first main wiring connected to the IC15 and extending along the main scanning direction, and a first branch wiring branching from a first branch position P1 of the first main wiring and connected to the first DRV circuit and extending along the sub-scanning direction. The first main wiring has a length L1 from the IC15 to the first branch position P1, and the first branch wiring has a length L2 from the first branch position P1 to the first DRV circuit.

[0041] The second wiring includes a second main wiring connected to the IC15 and extending along the main scanning direction, and a second branch wiring branching from a second branch position P2 of the second main wiring and connected to the second DRV circuit and extending along the sub-scanning direction. The second main wiring has a length L3 from the IC15 to the second branch position P2, and the second branch wiring has a length L4 from the second branch position P2 to the second DRV circuit. The length L1 is shorter than the length L3, and the length L2 is longer than the length L4.

[0042] Also, the difference in the lengths of the first and second wirings of two light-emitting elements (for example, the first light-emitting element (1) and the 50th light-emitting element (50)) located at both ends of the light-emitting element group 161 is the maximum difference, and the difference in the lengths is shorter than (M - 1) times the element arrangement pitch p.

[0043] As shown in FIG. 6, in the first wiring pattern, the difference in the lengths of the respective wirings from the IC15 to each DRV circuit can be reduced. Defining the element arrangement pitch p and the D / A signal wiring distance d, the largest difference in the wiring distances within the light-emitting element group 161 is the difference in the wiring distances between the first light-emitting element (1) and the 50th light-emitting element (50). The difference is as follows.

[0044] 49p - 49d = (p - d)×49 When p = 42 μm and d = 5 μm, the difference is 1,813 μm. This difference is smaller than the difference of 2,058 μm (49p) due to the light-emitting element arrangement pitch. The print head 1 of the present embodiment has a small difference in wiring length and suppresses variations in the amount of light within the light-emitting element group 161. As a result, the print head 1 can suppress image quality degradation caused by the difference in wiring length.

[0045] FIG. 7 is a diagram showing an example of a second wiring pattern of the D / A signal wiring of the print head according to the embodiment. The print head 1 is configured by the second wiring pattern shown in FIG. 7. The IC 15 is connected to the first DRV circuit by the first wiring and to the second DRV circuit by the second wiring, and individually controls the voltage between the terminals of the first and second capacitors at a predetermined timing. In the second wiring pattern, the length of the first wiring and the length of the second wiring are the same. The term "same" does not mean completely identical and may include errors allowed in circuit design.

[0046] In the first wiring pattern, there was a difference in the wiring length within one light-emitting element group 161, but in the second wiring pattern, the difference is eliminated by adding a wiring length corresponding to the difference. In the first wiring pattern, the IC 15 and each DRV circuit were connected by a combination of a linear main wiring along the main scanning direction and a linear branch wiring along the sub-scanning direction. In contrast, in the second wiring pattern, the main wiring is extended to eliminate the difference.

[0047] As an example, the wiring for the DRV circuits 140 of the first light-emitting element (1) and the 50th light-emitting element (50) located at both ends of the light-emitting element group 161 will be described. In FIG. 7, the wiring lead terminals directed to the DRV circuit 140 of the IC 15 (D / A circuit section 153) are arranged in the main scanning direction, and the pitch is i. As shown in FIG. 7, the wiring directed to the DRV 140 is drawn out from each terminal in the sub-scanning direction (upward) and bent in the main scanning direction (right) to become the main wiring. The wiring lead-out position of the first light-emitting element (1) closest to the IC 15 with respect to the DRV circuit 140 is the position farthest from the DRV circuit 140 (left in the main scanning direction). On the other hand, the wiring lead-out position of the 50th light-emitting element (50) farthest from the IC 15 with respect to the DRV circuit 140 is the position closest to the DRV circuit 140 (right in the main scanning direction). By adopting such a wiring pattern, the difference can be reduced by 49i in the main wiring (main scanning direction wiring). Furthermore, the difference can also be reduced by 49d in the branch wiring (sub-scanning direction wiring) with respect to the IC 15.

[0048] The difference in distance between the two light-emitting elements (for example, the first light-emitting element (1) and the 50th light-emitting element (50)) located at both ends of the light-emitting element group 161 in the second wiring pattern is as follows.

[0049] 49p - (49d×2 + 49i) = (p - 2d - i)×49 When p = 42 μm, d = 5 μm, and i = 32 μm, the difference in distance becomes 0 (the difference can be eliminated). The print head 1 of the present embodiment has no difference in wiring length and eliminates the variation in light quantity within the light-emitting element group 161. As a result, the print head 1 can sufficiently suppress the deterioration of image quality caused by the difference in wiring length.

[0050] [Configuration of Image Forming Apparatus] FIG. 8 is a diagram showing an example of an image forming apparatus to which the print head according to the embodiment is applied. FIG. 8 is an example of a four-color tandem type color image forming apparatus, but the print head 1 of the embodiment can also be applied to a monochrome image forming apparatus.

[0051] As shown in FIG. 8, for example, the image forming apparatus 100 includes an image forming unit 1021 that forms a yellow (Y) image, an image forming unit 1022 that forms a magenta (M) image, an image forming unit 1023 that forms a cyan (C) image, and an image forming unit 1024 that forms a black (K) image. The image forming units 1021, 1022, 1023, and 1024 each form a yellow, cyan, magenta, and black image and transfer it to the transfer belt 103. As a result, a full-color image is formed on the transfer belt 103.

[0052] The image forming unit 1021 that forms a yellow (Y) image includes a print head 1001, and the print head 1001 includes a light emitting unit 1011 and a rod lens array 1201. Further, the image forming unit 1021 includes a charger 1121, a print head 1001, a developing device 1131, a transfer roller 1141, and a cleaner 1161 around the photosensitive drum 1701. The print head 1001 corresponds to the print head 1, the light emitting unit 1011 corresponds to the light emitting unit 10, the rod lens array 1201 corresponds to the rod lens array 12, and the photosensitive drum 1701 corresponds to the photosensitive drum 17, and descriptions thereof are omitted.

[0053] The image forming unit 1022 that forms a magenta (M) image includes a print head 1002, and the print head 1002 includes a light emitting unit 1012 and a rod lens array 1202. Further, the image forming unit 1022 includes a charger 1122, a print head 1002, a developing device 1132, a transfer roller 1142, and a cleaner 1162 around the photosensitive drum 1702. The print head 1002 corresponds to the print head 1, the light emitting unit 1012 corresponds to the light emitting unit 10, the rod lens array 1202 corresponds to the rod lens array 12, and the photosensitive drum 1702 corresponds to the photosensitive drum 17, and descriptions thereof are omitted.

[0054] The image forming unit 1023 that forms an image of cyan (C) includes a print head 1003, and the print head 1003 includes a light emitting unit 1013 and a rod lens array 1203. Further, the image forming unit 1023 includes a charger 1123, a print head 1003, a developing device 1133, a transfer roller 1143, and a cleaner 1163 around the photosensitive drum 1703. The print head 1003 corresponds to the print head 1, the light emitting unit 1013 corresponds to the light emitting unit 10, the rod lens array 1203 corresponds to the rod lens array 12, and the photosensitive drum 1703 corresponds to the photosensitive drum 17, and the respective descriptions are omitted.

[0055] The image forming unit 1024 that forms an image of black (K) includes a print head 1004, and the print head 1004 includes a light emitting unit 1014 and a rod lens array 1204. Further, the image forming unit 1024 includes a charger 1124, a print head 1004, a developing device 1134, a transfer roller 1144, and a cleaner 1164 around the photosensitive drum 1704. The print head 1004 corresponds to the print head 1, the light emitting unit 1014 corresponds to the light emitting unit 10, the rod lens array 1204 corresponds to the rod lens array 12, and the photosensitive drum 1704 corresponds to the photosensitive drum 17, and the respective descriptions are omitted.

[0056] The chargers 1121, 1122, 1123, and 1124 uniformly charge the photosensitive drums 1701, 1702, 1703, and 1704, respectively. The print heads 1001, 1002, 1003, and 1004 expose the respective photosensitive drums 1701, 1702, 1703, and 1704 by the light emission of the light emitting element 131 to form electrostatic latent images on the photosensitive drums 1701, 1702, 1703, and 1704. The developing device 1131 attaches (develops) yellow toner, the developing device 1132 attaches magenta toner, the developing device 1133 attaches cyan toner, and the developing device 1134 attaches black toner to the electrostatic latent image portions of the respective photosensitive drums 1701, 1702, 1703, and 1704.

[0057] The transfer rollers 1141, 1142, 1143, and 1144 transfer the toner images developed on the photoreceptor drums 1701, 1702, 1703, and 1704 to the transfer belt 103. The cleaners 1161, 1162, 1163, and 1164 clean the toner remaining on the photoreceptor drums 1701, 1702, 1703, and 1704 without being transferred, and enter the standby state for the next image formation.

[0058] The paper (image formation target medium) 201 of the first size (small size) is stored in the paper cassette 1171 which is a paper supply means. The paper (image formation target medium) 202 of the second size (large size) is stored in the paper cassette 1172 which is a paper supply means.

[0059] The toner image is transferred from the transfer belt 103 to the paper 201 or 202 taken out from the paper cassette 1171 or 1172 by the transfer roller pair 118 which is a transfer means. The paper 201 or 202 onto which the toner image is transferred is heated and pressed by the fixing roller 120 of the fixing unit 119. By heating and pressing with the fixing roller 120, the toner image is firmly fixed on the paper 201 or 202. By repeating the above process operations, the image formation operation is continuously performed.

[0060] FIG. 9 is a block diagram showing an example of the control system of the image forming apparatus according to the embodiment. As shown in FIG. 9, the image forming apparatus 100 includes a control board 101. The control board 101 includes an image reading unit 171, an image processing unit 172, an image forming unit 173, a controller 174, a ROM (Read Only Memory) 175, a RAM (Random Access Memory) 176, a non-volatile memory 177, a communication I / F 178, a control panel 179, page memories 1801, 1802, 1803, 1804, a light emission controller 183, and an image data bus 184. Further, the image forming apparatus 100 includes a color shift sensor 181 and a mechanical control driver 182. Note that the image forming unit 173 includes image forming units 1021, 1022, 1023, and 1024.

[0061] The controller 174 is connected to a ROM 175, a RAM 176, a non-volatile memory 177, a communication I / F 178, a control panel 179, a color shift sensor 181, a mechanical control driver 182, and a light emission controller 183.

[0062] An image data bus 184 is connected to an image reading unit 171, an image processing unit 172, a controller 174, page memories 1801, 1802, 1803, and 1804. Each of the page memories 1801, 1802, 1803, and 1804 outputs image data 31 of Y, M, C, or K. A light emission controller 183 is connected to the page memories 1801, 1802, 1803, and 1804, and the image data 31 of Y from the page memory 1801, the image data 31 of M from the page memory 1802, the image data 31 of C from the page memory 1803, and the image data 31 of K from the page memory 1804 are input thereto. Print heads 1001, 1002, 1003, and 1004 are connected to the light emission controller 183. The light emission controller 183 inputs the image data 31 of Y, M, C, or K to the print heads 1001, 1002, 1003, or 1004.

[0063] The controller 174 is constituted by one or more processors and controls operations such as image reading, image processing, and image formation in accordance with various programs stored in at least one of the ROM 175 and the non-volatile memory 177.

[0064] Further, the controller 174 inputs image data of a test pattern onto the page memories 1801, 1802, 1803, 1804 to form a test pattern. The color shift sensor 181 detects the test pattern formed on the transfer belt 103 and outputs a detection signal to the controller 174. The controller 174 can recognize the positional relationship of the test patterns of each color from the input of the color shift sensor 181. Further, the controller 174 selects a paper cassette 1171 or 1172 that feeds the paper for forming an image through the mechanical control driver 182.

[0065] The ROM 175 stores various programs and the like necessary for the control of the controller 174. The various programs include a light emission control program for the print head. The light emission control program is a program that controls the timing of light emission and extinction (non-light emission) based on the image data.

[0066] The RAM 176 temporarily stores the data necessary for the control of the controller 174. The non-volatile memory 177 stores part or all of the various programs and various parameters and the like.

[0067] The mechanical control driver 182 controls the operations of motors and the like necessary for printing according to the instructions of the controller 174. The communication I / F 178 outputs various information to the outside and inputs various information from the outside. For example, the communication I / F 178 acquires image data including a plurality of image lines. The image forming apparatus 100 prints the image data acquired via the communication I / F 178 by the printing function. The control panel 179 receives operation inputs from the user and the service technician.

[0068] The image reading unit 171 optically reads the image of the document set on the document table, acquires image data including a plurality of image lines, and outputs the image data to the image processing unit 172. The image processing unit 172 executes various image processes such as correction on the image data input via the communication I / F 178 or the image data from the image reading unit 171. The page memories 1801, 1802, 1803, 1804 store the image data processed by the image processing unit 172. The controller 174 edits the image data on the page memories 1801, 1802, 1803, 1804 so as to match the printing position and the print head. The image forming unit 173 forms an image based on the image data stored in the page memories 1801, 1802, 1803, 1804. That is, the image forming unit 173 forms an image based on the light emission (light emission and extinction states) of each light emitting element 131 according to the image data.

[0069] The light emission controller 183 is composed of one or more processors, and controls the light emission of the light emitting element 131 based on the image data in accordance with various programs stored in at least one of the ROM 175 and the nonvolatile memory 177. That is, the light emission controller 183 outputs a drive signal for causing the light emitting element 131 to emit light to the light emitting element 131 at a predetermined timing.

[0070] [Light emission control] FIG. 10 is a timing chart for explaining the circuit block operation of FIG. 5, and shows the signal setting timing for the first to third groups.

[0071] At signal timings 0 to 1, SH-1 of the SH signal output circuit section 152 becomes L. SH-1 is a sample signal for setting the voltage in the DRV circuit 140 of the first group. While SH-1 is L, the D / A conversion circuit section 153 (D / A-1 to D / A-50) outputs the voltage to be set to the DRV circuit 140 (DRV1-1 to DRV1-50) of the first group. That is, D / A-1 outputs the voltage (1) for DRV1-1, D / A-2 outputs the voltage (1) for DRV1-2, and similarly, D / A-50 outputs the voltage (1) for DRV1-50. At the rising edge of SH-1 at signal timing 1, the voltages (1) output by each of D / A-1 to D / A-50 are held (held) in the respective capacitors of DRV1-1 to DRV1-50. At the same signal timing 1, PWM-1 becomes L. When PWM-1 becomes L, a current corresponding to the voltage (1) held in the capacitor 142 of each DRV circuit 140 starts to flow through the light emitting element 131 connected to DRV1-1 to DRV1-50. The current flows while PWM-1 is L. Here, the voltage expressed as the voltage (1) is a voltage value for each of the light emitting elements 131 in the first group to emit light with a predetermined light amount, and it goes without saying that it is different for each element.

[0072] At signal timings 1 to 2, the SH-2 signal goes low. SH-2 is a sample signal that sets the voltage for the DRV circuits 140 in the second group. While SH-2 is low, the D / A conversion circuit section 153 (D / A-1 to D / A-50) outputs the voltages to be set for the DRV circuits 140 (DRV2-1 to DRV2-50) in the second group. That is, D / A-1 outputs the voltage (2) for DRV2-1, D / A-2 outputs the voltage (2) for DRV2-2, and similarly, D / A-50 outputs the voltage (2) for DRV2-50. At the rising edge of SH-2 at signal timing 2, the voltages (2) output by each of D / A-1 to D / A-50 are held (stored) in the respective capacitors of DRV2-1 to DRV2-50. At the same signal timing 2, PWM-2 goes low. When PWM-2 goes low, a current corresponding to the voltage (2) held in the capacitor 142 of each DRV circuit 140 starts to flow through the light-emitting elements 131 connected to DRV2-1 to DRV2-50. The current flows while PWM-2 is low. Note that the voltage expressed as voltage (2) here is the voltage value for each of the light-emitting elements 131 in the second group to emit light with a predetermined light amount, and it goes without saying that it is different for each element.

[0073] As described above, the light amount setting and light emission control for the first group and the second group have been explained. For the third group and subsequent groups, the light amount setting and light emission control of each light-emitting element are also carried out in group units, and the light amount setting and light emission control of all elements (up to the 150th group) are performed.

[0074] FIG. 11 is a timing chart for explaining an example of the DRV circuit operation of the print head according to the embodiment. Since the operation is the same for any DRV circuit 140, without specifying the SH signal 21, the DRV circuit 140, and the PWM signal 32, the operation will be described focusing on the voltage across the terminals of the capacitor 142 of the DRV circuit 140.

[0075] At the first sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the target emission (light quantity) level. The voltage across the capacitor terminals follows (samples) the voltage at the target emission (light quantity) level. When the SH signal becomes H, the voltage at the target emission (light quantity) level is held (held) across the capacitor terminals. While the PWM signal is L, a current corresponding to the voltage held in the capacitor flows through the light-emitting element 131. During this time, the light-emitting element 131 emits light at the target light quantity.

[0076] At the next sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the turn-off level. The voltage across the capacitor terminals follows (samples) the turn-off level voltage. When the SH signal becomes H, the voltage at the turn-off level is held (held) across the capacitor terminals. While the PWM signal is L, a current corresponding to the voltage held in the capacitor flows through the light-emitting element 131. In this case, the voltage held in the capacitor is at the turn-off level, no current flows through the light-emitting element 131, and the light-emitting element 131 does not emit light.

[0077] [Influence of the difference in the wiring length of the D / A signal wiring] FIG. 12 is a diagram showing an example of a third wiring pattern of the D / A signal wiring. The first wiring pattern shown in FIG. 6 is a pattern that reduces the difference in wiring length, and the second wiring pattern shown in FIG. 7 is a pattern that eliminates the difference in wiring length. In contrast, the third wiring pattern shown in FIG. 12 is a pattern in which the difference in wiring length becomes large.

[0078] In the third wiring pattern, the largest difference in wiring distance within the light-emitting element group is the difference in wiring distance between the first light-emitting element (1) and the 50th light-emitting element (50). The difference is as follows.

[0079] 49p + 49d = (p + d) × 49 When p = 42 μm and d = 5 μm, the difference is 2,303 μm. This difference is larger than the difference of 2,058 μm (49p) due to the light-emitting element arrangement pitch.

[0080] Figures 13 and 14 are diagrams showing the relationship between the difference in wiring length and the resistance component of the D / A signal wiring. As shown in Figure 13, the difference in wiring length connecting the D / A conversion circuit and the DRV circuit becomes the difference in the resistance component (R). The difference in the resistance component appears as the difference in the time constant (CR) when the D / A conversion circuit charges the capacitor (C) of the DRV circuit.

[0081] Figure 14 shows that the wiring is changed to reduce the difference in wiring length connecting the D / A conversion circuit and the DRV circuit. When the difference in wiring length is reduced, the difference in the resistance component (R) also becomes smaller. If the difference in the resistance component is reduced, the difference in the time constant (CR) when the D / A conversion circuit charges the capacitor (C) of the DRV circuit also becomes smaller.

[0082] Figure 15 is a diagram for explaining the influence of the difference in wiring length of the D / A signal wiring. When the D / A conversion circuit charges and discharges the capacitor of the DRV circuit, if there is a difference in the time constant (CR), there will be a difference in the time required for charging and discharging. For example, as shown in Figure 15, the time required for charging and discharging the capacitor of DRV-50 is longer than that of DRV-1. When there is such a difference in the time required for charging and discharging the capacitor, depending on the timing of the SH (sample hold) signal, there may be a difference in the voltage held in the capacitor.

[0083] Figure 16 is a timing chart for explaining the influence 1 of the difference in wiring length of the D / A signal wiring. Figure 16 shows an example of the transition of light emission, extinction, and light emission for DRV1 and DRV50. As shown in Figure 16, DRV50 with a longer wiring length cannot charge in time, and the light-emitting element does not emit light at the target light amount. On the other hand, DRV1 with a shorter wiring length can charge in time, so the light-emitting element emits light at the target light amount.

[0084] The operation of DRV50 that does not emit light at the target light amount will be described. At the first sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the target emission (light quantity) level. Since DRV50 has a large time constant and takes time to charge, the voltage across the capacitor terminals does not reach the target light quantity level within the sample time. When the SH signal becomes H level, a voltage at the level that has not reached the target light quantity is held (held) across the capacitor terminals. While the PWM signal is at L level, a current corresponding to the voltage held in the capacitor flows through the light-emitting element. During this time, the light-emitting element emits light at the level that has not reached the target light quantity. That is, there is a difference in the light quantity between the light-emitting elements of DRV1 with a short wiring length and the light-emitting elements of DRV1 with a long wiring length.

[0085] At the next sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the light-off level. The voltage across the capacitor terminals follows (samples) the light-off level voltage. When the SH signal becomes H level, a voltage at the light-off level is held (held) across the capacitor terminals. While the PWM signal is at L, a current corresponding to the voltage held in the capacitor flows through the light-emitting element. Since it is at the light-off level, no current flows through the light-emitting element and it does not emit light.

[0086] Figure 17 is a timing chart for explaining the influence of the difference in the wiring length of the D / A signal wiring, part 2. Figure 17 is a diagram showing an example of the transition of emission, emission, and light-off for DRV1 and DRV50. As shown in Figure 17, for DRV50 with a long wiring length, charging is not in time, and initially, the light-emitting element does not emit light at the target light quantity. In subsequent continuous emission, the light-emitting element emits light at the target light quantity. Subsequently, even when trying to turn off the light, discharge cannot catch up, and the light-emitting element does not turn off completely. On the other hand, for DRV1 with a short wiring length, since both charging and discharging are in time, the light-emitting element always emits light at the target light quantity during emission and turns off completely during light-off.

[0087] An explanation of the operation of DRV50 that does not emit light at the target light quantity will be described. At the initial sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the target emission (light quantity) level. Since DRV50 has a large time constant and takes time to charge, the voltage across the capacitor terminals does not reach the target light quantity level within the sample time. When the SH signal becomes H, a voltage at the level below the target light quantity is held (held) across the capacitor terminals. While the PWM signal is at the L level, a current corresponding to the voltage held in the capacitor flows through the light-emitting element. During this time, the light-emitting element emits light at the level below the target light quantity. That is, there is a difference in the light quantity of the light-emitting element of DRV1 with a short wiring length and the light quantity of the light-emitting element of DRV1 with a long wiring length.

[0088] Even at the next sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the target emission (light quantity) level. Since a voltage at the level below the target light quantity is held across the capacitor terminals at the start of the sample, the voltage across the capacitor terminals becomes the voltage at the target emission (light quantity) level. When the SH signal becomes the H level, a voltage at the target emission (light quantity) level is held (held) across the capacitor terminals. While the PWM signal is at the L level, a current corresponding to the voltage held in the capacitor flows through the light-emitting element. During this time, the light-emitting element emits light at the target light quantity level.

[0089] At the next sample time (SH signal = L), the D / A conversion circuit outputs a voltage at the light-off level. The voltage across the capacitor terminals follows the light-off level voltage but does not reach the light-off level (becomes a very low emission level). When the SH signal becomes H, a voltage at the very low emission level is held (held) across the capacitor terminals. While the PWM signal is L, a current corresponding to the voltage held in the capacitor flows through the light-emitting element. The light-emitting element emits light at the very low emission level.

[0090] FIG. 18 is a diagram showing an example of the influence (defects in the image) of the difference in the wiring length of the D / A conversion circuit. As shown in FIG. 12, when the difference in the wiring lengths of the D / A conversion circuit is large, the light quantity continuously changes among DRV1 to DRV50 within one light-emitting element group. This change in the light quantity occurs at the group period (50-dot period). When forming a halftone image, as shown in FIG. 18, unevenness may occur at the 50-dot period.

[0091] On the other hand, the print head of the present embodiment has the first wiring pattern shown in FIG. 6 or the second wiring pattern shown in FIG. 7, and can stabilize the light quantity of the light-emitting elements by reducing or eliminating the influence of the difference in the wiring lengths. Thereby, deterioration of the image quality can be prevented.

[0092] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalent scope thereof. The invention described in the claims of the present application at the time of filing is appended below. [Appendix 1] A substrate having a plane including a main scanning direction and a sub-scanning direction orthogonal to each other, a first light-emitting element on the substrate, a circuit connected to the first light-emitting element, including a first capacitor, and a first driving circuit for determining the light emission amount of the first light-emitting element based on the voltage between the terminals of the first capacitor, a second light-emitting element on the substrate separated from the first light-emitting element by an element arrangement pitch along the main scanning direction, a circuit connected to the second light-emitting element, including a second capacitor, and a second driving circuit for determining the light emission amount of the second light-emitting element based on the voltage between the terminals of the second capacitor, a control circuit on the substrate connected to the first driving circuit by a first wiring and also connected to the second driving circuit by a second wiring, and for individually controlling the voltages between the terminals of the first and second capacitors at a predetermined timing, comprising, a print head in which the difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch. [Appendix 2] The control circuit controls light emission in units of a group of M (M is an integer of 2 or more) light-emitting elements including the first and second light-emitting elements, the difference in the lengths of the wirings of the two light-emitting elements located at both ends of the group is the maximum difference, and the difference in the lengths is shorter than (M - 1) times the element arrangement pitch, the print head of [Appendix 1]. [Appendix 3] The control circuit outputs a light emission level signal based on image data through the first and second wirings, furthermore, the control circuit is connected to the first driving circuit and the second driving circuit by a third wiring, and outputs a sample hold signal through the third wiring, the print head of [Appendix 1]. [Appendix 4] The first wiring includes a first main wiring connected to the control circuit and extending along the main scanning direction, and a first branch wiring branched from a first branch position of the first main wiring and connected to the first driving circuit and extending along the sub-scanning direction, The second wiring includes a second main wiring connected to the control circuit and extending along the main scanning direction, and a second branch wiring branching from a second branching position of the second main wiring, connected to the second driving circuit, and extending along the sub-scanning direction. The print head according to [Appendix 1]. [Appendix 5] A substrate having a plane including a main scanning direction and a sub-scanning direction orthogonal to each other, a first light-emitting element on the substrate, a circuit connected to the first light-emitting element, including a first capacitor, and a first driving circuit that determines the light emission amount of the first light-emitting element based on the voltage between the terminals of the first capacitor, a second light-emitting element on the substrate that is separated from the first light-emitting element by an element arrangement pitch along the main scanning direction, a circuit connected to the second light-emitting element, including a second capacitor, and a second driving circuit that determines the light emission amount of the second light-emitting element based on the voltage between the terminals of the second capacitor, a control circuit on the substrate that is connected to the first driving circuit by a first wiring and to the second driving circuit by a second wiring, and individually controls the voltages between the terminals of the first and second capacitors at a predetermined timing, and includes a print head in which the length of the first wiring is the same as the length of the second wiring. [Appendix 6] An image forming apparatus including a print head, wherein the print head has a substrate having a plane including a main scanning direction and a sub-scanning direction orthogonal to each other, a first light-emitting element on the substrate, a circuit connected to the first light-emitting element, including a first capacitor, and a first driving circuit that determines the light emission amount of the first light-emitting element based on the voltage between the terminals of the first capacitor, a second light-emitting element on the substrate that is separated from the first light-emitting element by an element arrangement pitch along the main scanning direction, a circuit connected to the second light-emitting element, including a second capacitor, and a second driving circuit that determines the light emission amount of the second light-emitting element based on the voltage between the terminals of the second capacitor, a control circuit on the substrate that is connected to the first driving circuit by a first wiring and to the second driving circuit by a second wiring, and individually controls the voltages between the terminals of the first and second capacitors at a predetermined timing, and includes an image forming apparatus in which the difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch.

Explanation of Symbols

[0093] 1…Print head 10…Light-emitting part 11…Transparent substrate 12…Rod lens array 13…Light-emitting element array 14…Drive circuit array 16…Connector 17…Photoconductor drum 21…SH signal 22…Light-emitting level signal 24…Horizontal synchronization signal 31…Image data 32…PWM signal 100…Image forming apparatus 101…Control board 103…Transfer belt 103…The developed toner image is transferred to the transfer belt 118… Transfer roller pair which is a transfer means 119… Fixing unit 120… Fixing roller 131… Light emitting element 140… DRV circuit 141… Transistor 142… Capacitor 143… Transistor 144… Transistor 145… Wiring 151… Light quantity control circuit 152… SH signal output circuit section 153… D / A conversion circuit section 155… PWM control circuit section 161… Light emitting element group 171… Image reading unit 172… Image processing unit 173… Image forming unit 174… Controller 177… Non-volatile memory 179… Control panel 181… Color shift sensor 182… Mechanical control driver 183… Light emission controller 184… Image data bus 201, 202… Sheets of paper 1001, 1002, 1003, 1004… Print heads 1011, 1012, 1013, 1014… Light emitting parts 1021, 1022, 1023, 1024… Image forming units 1101… Reference plane 1102… Sealing glass 1121, 1122, 1123, 1124… Charging chargers 1131, 1132, 1133, 1134… Developing devices 1141, 1142, 1143, 1144… Transfer rollers 1161, 1162, 1163, 1164… Cleaners 1171, 1172… Paper cassettes 1201, 1202, 1203, 1204… Rod lens arrays 1511… Light quantity correction memory 1701, 1702, 1703, 1704… Photoconductor drum 1801, 1802, 1803, 1804… Page memory

Claims

1. A substrate having a plane including a main scanning direction and a sub-scanning direction orthogonal to each other, a first light-emitting element on the substrate, a circuit connected to the first light-emitting element, including a first capacitor, and a first drive circuit that determines the light emission amount of the first light-emitting element based on the voltage between the terminals of the first capacitor, a second light-emitting element on the substrate that is separated from the first light-emitting element by an element arrangement pitch along the main scanning direction, a circuit connected to the second light-emitting element, including a second capacitor, and a second drive circuit that determines the light emission amount of the second light-emitting element based on the voltage between the terminals of the second capacitor, a control circuit on the substrate that is connected to the first drive circuit by a first wiring and to the second drive circuit by a second wiring, and individually controls the voltages between the terminals of the first and second capacitors at a predetermined timing, comprising The first wiring includes a first main wiring connected to the control circuit and extending along the main scanning direction, and a first branch wiring branched from a first branching position of the first main wiring and connected to the first drive circuit and extending along the sub-scanning direction. The second wiring includes a second main wiring connected to the control circuit and extending along the main scanning direction, and a second branch wiring branched from a second branching position of the second main wiring and connected to the second drive circuit and extending along the sub-scanning direction. The first main wiring has a length L1 from the control circuit to the first branching position. The first branch wiring has a length L2 from the first branching position to the first drive circuit. The second main wiring has a length L3 from the control circuit to the second branching position. The second branch wiring has a length L4 from the second branching position to the second drive circuit. The length L1 is shorter than the length L3. The length L2 is longer than the length L4. The difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch, a print head.

2. The control circuit controls light emission in units of a group of M (M is an integer of 2 or more) light emitting elements including the first and second light emitting elements, The difference in the lengths of the wirings of the two light emitting elements located at both ends of the group is the maximum difference, and the difference in the lengths is shorter than (M - 1) times the element arrangement pitch, the print head according to claim 1.

3. The control circuit outputs a light emission level signal based on image data through the first and second wirings, Furthermore, the control circuit is connected to the first drive circuit and the second drive circuit through a third wiring, and outputs a sample hold signal through the third wiring, the print head according to claim 1.

4. An image forming apparatus including a print head, The print head includes a substrate having a plane including a main scanning direction and a sub-scanning direction orthogonal to each other, a first light emitting element on the substrate, a circuit connected to the first light emitting element, including a first capacitor, and a first drive circuit that determines the light emission amount of the first light emitting element based on the voltage between the terminals of the first capacitor, a second light emitting element on the substrate separated from the first light emitting element by an element arrangement pitch along the main scanning direction, a circuit connected to the second light emitting element, including a second capacitor, and a second drive circuit that determines the light emission amount of the second light emitting element based on the voltage between the terminals of the second capacitor, a control circuit on the substrate that is connected to the first drive circuit through a first wiring and to the second drive circuit through a second wiring, and individually controls the voltage between the terminals of the first and second capacitors at a predetermined timing, and includes The first wiring includes a first main wiring connected to the control circuit and extending along the main scanning direction, and a first branch wiring branched from a first branching position of the first main wiring, connected to the first driving circuit, and extending along the sub-scanning direction. The second wiring includes a second main wiring connected to the control circuit and extending along the main scanning direction, and a second branch wiring branched from a second branching position of the second main wiring, connected to the second driving circuit, and extending along the sub-scanning direction. The first main wiring has a length L1 from the control circuit to the first branching position. The first branch wiring has a length L2 from the first branching position to the first driving circuit. The second main wiring has a length L3 from the control circuit to the second branching position. The second branch wiring has a length L4 from the second branching position to the second driving circuit. The length L1 is shorter than the length L3. The length L2 is longer than the length L4. An image forming apparatus in which the difference between the length of the first wiring and the length of the second wiring is shorter than the element arrangement pitch.

Images