Imaging element and imaging device

Abstract

To provide an imaging element which prevents the quality of an image from being deteriorated due to a small difference between a dark signal and a photoelectric conversion signal.SOLUTION: An imaging element 3 includes: a first substrate 111 provided with a plurality of pixels 10 each having a photoelectric conversion unit to generate electric charges by photoelectric conversion and a plurality of signal lines 22 to which signals generated by the pixels 10 are output; and a second substrate 112 provided with supply units 30 provided in a column direction and configured to supply voltage to the signal lines so that the voltage of the signal lines 22 does not fall below a predetermined voltage and processing units 50 to process the signals output to the signal lines, the second substrate being stacked on the first substrate 111.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to an imaging device , and an imaging device .

Background Art

[0002] An imaging device is known in which transistors for clamping signals output from pixels to a predetermined voltage level are provided one by one for each column (Patent Document 1). Conventionally, improvement in image quality has been demanded

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] According to a first aspect, an imaging device includes a first substrate having a first pixel including a first photoelectric conversion unit that converts light into charge and a second pixel including a second photoelectric conversion unit that converts light into charge, a first signal line electrically connected to the first pixel and outputting a first signal based on the charge converted by the first photoelectric conversion unit, a wiring layer having a second signal line electrically connected to the second pixel and outputting a second signal based on the charge converted by the second photoelectric conversion unit, a substrate laminated together with the first substrate, a first processing unit that performs signal processing on the first signal output to the first signal line, and a second processing unit that performs signal processing on the second signal output to the second signal line including a reading unit, and , and a second substrate having a first supply unit that controls the voltage of the first signal line and a second supply unit that controls the voltage of the second signal line, wherein the wiring layer is disposed between the first substrate and the second substrate in a stacking direction in which the first substrate and the second substrate are stacked the reading unit is disposed at a position facing at least one of the first pixel and the second pixel in the stacking direction. .

Brief Description of the Drawings

[0005] [FIG. 1] It is a diagram showing a configuration example of an imaging device according to the first embodiment. [FIG. 2] It is a block diagram showing a configuration example of an image sensor according to the first embodiment. [FIG. 3] It is a diagram showing an example of a cross-sectional structure of a part of the image sensor according to the first embodiment. [FIG. 4] It is a diagram showing a configuration example of a part of the image sensor according to the first embodiment. [FIG. 5] It is a timing chart showing an operation example of the image sensor according to the first embodiment. [FIG. 6] It is a timing chart showing an operation example of the image sensor according to the first embodiment. [FIG. 7] It is a diagram showing an example of a layout of a part of the image sensor according to the first embodiment. [FIG. 8] It is a block diagram showing an example of a configuration of an image sensor according to a modification. [FIG. 9] It is a block diagram showing another example of a configuration of an image sensor according to a modification.

Embodiments for Carrying Out the Invention

[0006] (First Embodiment) FIG. 1 is a diagram showing a configuration example of a camera 1 which is an example of an imaging device according to the first embodiment. The camera 1 includes a photographing optical system (imaging optical system) 2, an image sensor 3, a control unit 4, a memory 5, a display unit 6, and an operation unit 7. The photographing optical system 2 has a plurality of lenses including a focus adjustment lens (focus lens) and an aperture stop, and forms a subject image on the image sensor 3. Note that the photographing optical system 2 may be detachable from the camera 1.

[0007] The imaging device 3 is an imaging device such as a CMOS image sensor or a CCD image sensor. The imaging device 3 receives the light beam that has passed through the imaging optical system 2 and images the subject image formed by the imaging optical system 2. In the imaging device 3, a plurality of pixels having a photoelectric conversion section are arranged two-dimensionally (in the row direction and the column direction). The photoelectric conversion section is constituted by a photodiode (PD). The imaging device 3 photoelectrically converts the received light to generate a signal, and outputs the generated signal to the control section 4.

[0008] The memory 5 is a recording medium such as a memory card. Image data, control programs, etc. are recorded in the memory 5. Writing data to the memory 5 and reading data from the memory 5 are controlled by the control section 4. The display section 6 displays an image based on the image data, information related to shooting such as the shutter speed and aperture value, and a menu screen, etc. The operation section 7 includes various setting switches such as a release button, a power switch, and a switch for switching various modes, and outputs signals based on the respective operations to the control section 4.

[0009] The control section 4 is constituted by a processor such as a CPU, FPGA, or ASIC, and a memory such as a ROM or RAM, and controls each part of the camera 1 based on a control program. The control section 4 supplies a signal for controlling the imaging device 3 to the imaging device 3 to control the operation of the imaging device 3. When performing still image shooting, when performing moving image shooting, when displaying a through image (live view image) of the subject on the display section 6, etc., the control section 4 causes the imaging device 3 to image the subject image and output a signal.

[0010] The control section 4 performs various image processes on the signal output from the imaging device 3 to generate image data. The control section 4 is also a generation section 4 that generates image data, and generates still image data and moving image data based on the signal output from the imaging device 3. The image processes include image processes such as gradation conversion processing and color interpolation processing.

[0011] FIG. 2 is a block diagram showing a configuration example of an image sensor according to the first embodiment. The image sensor 3 is configured by laminating a first substrate 111 provided with a plurality of pixels 10 and a second substrate 112 provided with a supply unit 30 and a readout unit 60. The first substrate 111 and the second substrate 112 are each configured using a semiconductor substrate. The circuits provided on the first substrate 111 and the circuits provided on the second substrate 112 are electrically connected by connection parts such as electrodes and bumps.

[0012] The first substrate 111 has a plurality of regions 20 in which a plurality of pixels 10 are respectively arranged. In the example shown in FIG. 2, four regions 20 are illustrated. These four regions 20 each indicate one region when the region where the pixels 10 of the first substrate 111 are arranged is divided into regions each including a predetermined number of pixels. Note that the regions 20 may partially overlap or may not overlap. The number of pixels in each region 20 may be 4 pixels of 2 pixels × 2 pixels, or may be 16 pixels of 4 pixels × 4 pixels, and may be any number. Hereinafter, the region 20 is referred to as a pixel block 20.

[0013] In the image sensor 3, a signal line 22 and a supply unit 30 (described later) are provided for each pixel block 20. Further, as will be described later, in the image sensor 3, a pixel control unit and a supply control unit are provided for each pixel block 20. The signal line 22 is a signal line connecting the pixel block 20 and the readout unit 60, and a signal is output from the pixel 10. The signal line 22 is a signal line using connection parts such as electrodes and bumps.

[0014] The reading unit 60 has a processing unit 50 including an analog / digital conversion unit (AD conversion unit) 40. The processing unit 50 is provided for each pixel block 20. In the image sensor 3 according to the present embodiment, using the signal lines 22 provided for each pixel block 20, the reading of pixel signals from a plurality of pixel blocks 20 is performed in parallel. The reading unit 60 can output the pixel signals of each pixel block 20 to the processing unit 50 provided for each pixel block 20 simultaneously (in parallel), and the pixel signals can be signal-processed simultaneously in each processing unit 50. Since each processing unit 50 signal-processes the signals output from each pixel block 20 simultaneously, the reading unit 60 can perform high-speed signal processing.

[0015] The AD conversion unit 40 of the processing unit 50 converts the pixel signal, which is an analog signal input from each pixel 10 of the pixel block 20 via the signal line 22, into a digital signal. Note that the processing unit 50 may have an amplifier unit that amplifies the pixel signal input via the signal line 22 at a predetermined gain (amplification factor). In this case, the AD conversion unit 40 converts the pixel signal amplified by the amplifier unit into a digital signal.

[0016] The pixel signal converted into a digital signal is output to the control unit 4 of the camera 1 after signal processing such as correlated double sampling (CDS) and signal amount correction processing is performed in the processing unit 50. Note that signal processing such as correlated double sampling on the pixel signal may be performed in a signal processing unit (not shown). In this case, the processing unit 50 outputs the pixel signal converted into a digital signal by the AD conversion unit 40 to the signal processing unit. The signal processing unit performs signal processing such as correlated double sampling on the input pixel signal and then outputs the processed pixel signal to the control unit 4.

[0017] Around the region where each pixel 10 is arranged on the first substrate 111, a plurality of electrodes (pads) 200 to which a power supply voltage VDD is supplied (applied) are provided. The electrode 200 is connected to a plurality of pixels 10 arranged on the first substrate 111 via a wiring 121. The power supply voltage VDD is supplied to the pixel 10 via the wiring 121. In addition, as schematically shown in FIG. 2, the imaging device 3 is provided with a wiring 125 and a wiring 126. The wiring 125 is a wiring that penetrates the first substrate 111. The wiring 126 is a wiring that connects the wiring 121 of the first substrate 111 and the wiring 122 of the second substrate 112. The wiring 125 and the wiring 126 are each formed using an electrode, a bump, or the like. The electrode 200 is connected to a plurality of supply units 30 arranged on the second substrate 112 via the wiring 125 and the wiring 122. Further, the electrode 200 is connected to a plurality of supply units 30 via the wiring 121, the wiring 126, and the wiring 122. The power supply voltage VDD is supplied to the supply unit 30 via the wiring 125 and the wiring 122, and the power supply voltage VDD is supplied to the supply unit 30 via the wiring 121 and the wiring 126. The electrode 200 is an electrode common to the plurality of pixels 10 and the supply units 30, and is arranged on one surface of the first substrate 111 as shown in FIG. 2. Hereinafter, with reference to the drawings, the configuration of the imaging device 3 according to the present embodiment will be further described.

[0018] FIG. 3 is a diagram showing an example of a partial cross-sectional structure of an imaging device according to the first embodiment. FIG. 4 is a diagram showing an example of a partial configuration of an imaging device according to the first embodiment. The imaging device 3 shown in FIG. 3 is a back-illuminated type imaging device. The imaging device 3 includes a first substrate 111, a wiring layer 101 provided by being laminated on the first substrate 111, a second substrate 112, and a wiring layer 102 provided by being laminated on the second substrate 112. The wiring layer 101 and the wiring layer 102 are each a wiring layer including a conductor film (metal film) and an insulating film, and a plurality of wirings, vias, interlayer insulating films, and the like are arranged.

[0019] Light from the object is incident in the +Z-axis direction of FIG. 3. Also, as shown in the coordinate axes of FIG. 3, the right direction of the paper surface orthogonal to the Z-axis is the +X-axis direction, and the front direction of the paper surface orthogonal to the Z-axis and the X-axis is the +Y-axis direction. In the subsequent figures, the coordinate axes may be displayed based on the coordinate axes of FIG. 3 so that the orientation of each figure can be understood. In the first substrate 111 and the wiring layer 101, a plurality of pixel blocks 20 including a plurality of pixels 10 are arranged in the X-axis direction and the Y-axis direction. In the second substrate 112 and the wiring layer 102, a plurality of supply units 30 and processing units 50 are arranged in the X-axis direction and the Y-axis direction. In the imaging device 3, the wiring 126 is provided between the pixel 10 and the supply unit 30. It can also be said that the wiring 126 is provided between the photoelectric conversion unit 11 and the supply unit 30. In the example shown in FIG. 3, the wiring 126 is arranged in parallel with the signal line 22.

[0020] FIG. 4 shows some of the pixels 10 among the plurality of pixels 10 provided in the imaging device 3, some of the current sources 25 and the supply unit 30, some of the pixel control units 35 and the supply control unit 36, and the readout control unit 70. The current source 25 and the supply unit 30 are provided with respect to the signal line 22. The pixel control unit 35 and the supply control unit 36 are arranged for each pixel block 20, respectively. In FIG. 4, for the sake of simplifying the figure, only one pixel 10 is shown for each pixel block 20.

[0021] The pixel 10 has a photoelectric conversion unit 11, a transfer unit 12, a floating diffusion (FD) 13, a reset unit 14, an amplification unit 15, and a selection unit 16. The photoelectric conversion unit 11 is a photodiode PD, which converts the incident light into charges and accumulates the photoelectrically converted charges.

[0022] The transfer unit 12 is composed of a transistor M1 controlled by a signal TX, and transfers the charges photoelectrically converted by the photoelectric conversion unit 11 to the FD 13. The transistor M1 is a transfer transistor. The FD 13 accumulates (holds) the charges transferred to the FD 13 and converts them into a voltage divided by the capacitance value. The FD 13 is an accumulation unit 13, which accumulates the charges generated by the photoelectric conversion unit 11.

[0023] The amplification unit 15 is composed of a transistor M3 whose gate (terminal) is connected to FD13, and amplifies and outputs a signal due to the charge accumulated in FD13. The drain (terminal) of the transistor M3 is connected to the electrode 200 (see FIG. 2) via the wiring (power supply line) 121, and the power supply voltage VDD is supplied. The source (terminal) of the transistor M3 is connected to the signal line 22 via the selection unit 16. The amplification unit 15 functions as a part of a source follower circuit with the current source 25 as a load current source. The transistor M3 is an amplification transistor. The amplification unit 15 and the selection unit 16 constitute an output unit that generates and outputs a signal based on the charge generated by the photoelectric conversion unit 11.

[0024] The reset unit 14 is composed of a transistor M2 controlled by the signal RST, and electrically connects or disconnects FD13 and the power supply line 121. The reset unit 14 resets the charge accumulated in FD13. The reset unit 14 discharges the charge accumulated in FD13 and resets the voltage of FD13. The transistor M2 is a reset transistor. The selection unit 16 is composed of a transistor M4 controlled by the signal SEL, and electrically connects or disconnects the amplification unit 15 and the signal line 22. When the transistor M4 of the selection unit 16 is in the on state, it outputs the signal from the amplification unit 15 to the signal line 22. The transistor M4 is a selection transistor.

[0025] The current source 25 is composed of including a transistor M5 whose gate receives the signal VB. The current source 25 is connected to each pixel 10 of the pixel block 20 and the supply unit 30 via the signal line 22. The current source 25 generates a current based on the signal level of the signal VB, and supplies the generated current to the signal line 22, the pixel 10, and the supply unit 30. Note that the current source 25 may be composed of two transistors connected in cascode. The signal VB is generated by a signal generation unit (not shown). The signal generation unit is commonly connected to the current sources 25 provided for each signal line 22 and supplies the signal VB to each current source 25. The gates of the transistors M5 of each current source 25 are electrically connected to each other, and the signal VB is input from the signal generation unit.

[0026] When the voltage of FD13 is reset, a signal (dark signal) and a signal (photoelectric conversion signal) based on the charge transferred from the photoelectric conversion unit 11 to FD13 by the transfer unit 12 are sequentially output to the signal line 22. The dark signal is used to remove the noise included in the photoelectric conversion signal. The dark signal can also be said to be an analog signal indicating the reference level for the photoelectric conversion signal and is used for the correction of the photoelectric conversion signal. The photoelectric conversion signal is an analog signal generated based on the charge photoelectrically converted by the photoelectric conversion unit 11. The dark signal and the photoelectric conversion signal are input to the processing unit 50 (see FIG. 2) of the reading unit 60 via the signal line 22. In the present embodiment, the processing unit 50 has an arithmetic unit that performs subtraction between the photoelectric conversion signal and the dark signal, performs CDS by subtracting the dark signal from the photoelectric conversion signal, and removes the noise component from the photoelectric conversion signal.

[0027] As shown in FIG. 4, the supply unit 30 has a signal output unit 31 and a switch unit 32 and has a function of supplying a voltage to the signal line 22. The signal output unit 31 is composed of a transistor M11 to which a signal CLIP is input to the gate, and generates and outputs a signal having a voltage level based on the signal CLIP. The drain of the transistor M11 is connected to the electrode 200 (see FIG. 2) via the power supply line 122, and the power supply voltage VDD is supplied. The source of the transistor M11 is connected to the signal line 22 via the switch unit 32.

[0028] The switch unit 32 is composed of a transistor M12 controlled by a signal CLIP_SW, and electrically connects or disconnects the signal output unit 31 and the signal line 22. When the transistor M12 of the switch unit 32 is in the on state, the signal from the signal output unit 31 can be output to the signal line 22. In the present embodiment, when the switch unit 32 is in the on state, the voltage (potential) of the signal line 22 is limited by the signal output unit 31 to be a value within a range with the voltage based on the signal CLIP as the lower limit value. The supply unit 30 supplies a voltage to the signal line 22 so that the voltage of the signal line 22 does not become lower than a predetermined voltage. It can also be said that the supply unit 30 is a limiting unit 30 that limits the voltage of the signal line 22. It can also be said that the supply unit 30 supplies a voltage to the signal line 22 so that the voltage of the signal line 22 becomes a value from the power supply voltage VDD to the voltage based on the signal CLIP, and controls (adjusts) the voltage of the signal line 22.

[0029] The pixel control unit 35 includes a switch and a buffer and is controlled by the read control unit 70. The pixel control unit 35 supplies signals such as the above-described signal TX, signal RST, and signal SEL to the pixels 10 of the pixel block 20 to control the operations of the respective pixels 10. The pixel control unit 35 supplies a signal to the gate of each transistor of the pixel 10 to turn the transistor on (connected state, conductive state, short-circuit state) or off (disconnected state, non-conductive state, open state, cut-off state).

[0030] The read control unit 70 and the pixel control unit 35 control signals TX, signal SEL, etc. input to the pixel 10, thereby controlling the period during which charge is accumulated in the pixel block 20 and the timing at which the pixel signal is read out. The pixel control unit 35 provided for each pixel block 20 can control the pixel 10 so that the charge accumulation time differs for each pixel block 20, or can also control the pixel 10 so that the charge accumulation time is the same for all pixel blocks 20. Further, each pixel control unit 35 can control the pixel 10 so that the timing at which the pixel signal is read out differs for each pixel block 20, or can also control the pixel 10 so that the timing at which the pixel signal is read out is the same for all pixel blocks 20. By the pixel control unit 35 controlling the pixel 10 so that the charge accumulation time differs for each pixel block 20, even if there are a plurality of subjects, imaging can be performed according to the brightness of each subject. Further, by the pixel control unit 35 controlling the pixel 10 so that the timing at which the pixel signal is read out differs for each pixel block 20, even if there are a plurality of subjects, imaging can be performed according to the speed at which each subject moves.

[0031] The supply control unit 36 is configured to include switches and buffers, and is controlled by the read control unit 70. As described above, the pixel control unit 35 can control the pixel 10 so that the charge accumulation time is different for each pixel block 20, and can control the pixel 10 so that the timing of reading out the signal of the pixel is different for each pixel block 20. In that case, since the timing at which signals are output to the signal line 22 is different for each block 20, the supply control unit 36 must control the operation of each switch unit 32 for each pixel block 20. The supply control unit 36 supplies the above-described signal CLIP_SW to the switch unit 32 of the pixel block 20 to control the operation of each switch unit 32. The supply control unit 36 turns on and off the switch unit 32 to start and stop the supply of voltage from the signal output unit 31 to the signal line 22. In the present embodiment, the supply control unit 36 provided for each pixel block 20 adjusts the timing of supplying voltage from the signal output unit 31 to the signal line 22 based on the timing at which the dark signal and the photoelectric conversion signal are read out in the pixel block 20. For example, the supply control unit 36 provided for each pixel block 20 controls the switch unit 32 so that voltages can be supplied to the signal line 22 provided for one pixel block 20 and the signal line 22 provided for another pixel block 20 at different timings. Note that each supply control unit 36 may control each switch unit 32 so that voltages can be supplied at the same timing in all pixel blocks 20.

[0032] The read control unit 70 is commonly provided for a plurality of pixel blocks 20. The read control unit 70 is configured by a plurality of circuits including a timing generator and is disposed on the second substrate 112. The read control unit 70 is controlled by the control unit 4 of the camera 1. The read control unit 70 controls the operation of the pixel 10 by controlling signals such as the signal TX, the signal RST, and the signal SEL input to the pixel 10 via the pixel control unit 35. Further, the read control unit 70 controls the operation of the supply unit 30 by controlling the signal CLIP_SW input to the supply unit 30 via the supply control unit 36.

[0033] Note that the supply control unit 36 described above is disposed on the second substrate 112. The pixel control unit 35 may be disposed on either one of the first substrate 111 and the second substrate 112, or may be divided and disposed on the first substrate 111 and the second substrate 112. The pixel control unit 35 may be disposed on a substrate different from the first substrate 111 and the second substrate 112. The read control unit 70 may be divided and disposed on the first substrate 111 and the second substrate 112, or may be disposed on the first substrate 111. The read control unit 70 may be disposed on a substrate different from the first substrate 111 and the second substrate 112.

[0034] When the selection unit 16 of the pixel 10 and the switch unit 32 of the supply unit 30 are each in an on state, the source of the amplification unit 15 and the source of the signal output unit 31 are electrically connected to the signal line 22. In this case, based on the magnitude relationship between the voltage of the gate of the amplification unit 15 (i.e., the voltage of FD13) and the voltage of the gate of the supply unit 30 (i.e., the voltage of signal CLIP), the path through which the current flows from the current source 25 connected to the signal line 22 changes.

[0035] When the voltage of FD13 is higher than the voltage of signal CLIP, the current of the current source 25 mainly flows to the amplification unit 15 via the signal line 22 and the selection unit 16. The amplification unit 15 outputs a signal based on the voltage of FD13 to the signal line 22. As a result, the voltage of the signal line 22 becomes a voltage corresponding to the voltage of FD13. When the voltage of FD13 is lower than the voltage of signal CLIP, the current of the current source 25 mainly flows to the signal output unit 31 via the signal line 22 and the switch unit 32. At this time, the signal output unit 31 outputs a signal based on the voltage of signal CLIP to the signal line 22, thereby limiting the voltage of the signal line 22 to a voltage based on the voltage of signal CLIP. The voltage of the signal line 22 becomes a voltage corresponding to the voltage of signal CLIP.

[0036] In this way, when the switch unit 32 is in the on state, the supply unit (limiting unit) 30 limits the voltage of the signal line 22 according to the voltage of FD13 and the voltage of the signal CLIP. The transistor M11 of the supply unit 30 is a transistor that limits (clips) the voltage of the signal line 22, and may also be referred to as a clip transistor or a clamp transistor. When the voltage of FD13 is relatively low, the voltage of the signal line 22 is limited to the voltage based on the signal CLIP. Thereby, it is possible to avoid the voltage of the signal line 22 from decreasing and the current source 25 from malfunctioning normally. As a result, it is possible to prevent the current of the current source 25 from not being supplied. Also, it is possible to prevent the voltage of the signal line 22 from becoming a voltage outside the assumed range and being input to the reading unit 60.

[0037] Further, in the image sensor 3 according to the present embodiment, different signal level signal CLIPs are input to the supply unit 30 when reading a dark signal and when reading a photoelectric conversion signal. Thereby, the supply unit 30 can supply different voltages to the signal line 22 when reading a dark signal and when reading a photoelectric conversion signal.

[0038] When reading a dark signal, a first voltage V1 is supplied to the gate of the transistor M11 of the signal output unit 31. In this case, the voltage of the signal line 22 is limited so that the voltage based on the first voltage V1 becomes the lower limit. Thereby, the voltage of the signal output to the reading unit 60 as a dark signal is limited. When reading a photoelectric conversion signal, a second voltage V2 lower than the first voltage V1 is supplied to the gate of the transistor M11. In this case, the voltage of the signal line 22 is limited so that the voltage based on the second voltage V2 becomes the lower limit. Thereby, the voltage of the signal output to the reading unit 60 as a photoelectric conversion signal is limited.

[0039] Due to defects in pixels, charges may be accumulated in FD13, and the voltage of the dark signal may decrease. When photographing a high-brightness subject, charges may also be accumulated in FD13, resulting in a decrease in the voltage of the dark signal. In such cases, the difference between the dark signal and the photoelectric conversion signal becomes small, and the image quality of the image generated using the signal after CDS processing may deteriorate. In the present embodiment, as described above, the voltage of the dark signal can be limited to ensure the difference between the signal level of the dark signal and the signal level of the photoelectric conversion signal. Therefore, it is possible to suppress a decrease in image quality caused by a decrease in the difference between the dark signal and the photoelectric conversion signal.

[0040] The above-described second voltage V2 is determined so that the voltage of the signal line 22 does not fall below the voltage required for the operation of the transistor M5 of the current source 25, and the voltage of the signal line 22 can take the lowest possible voltage. Thereby, it is possible to suppress the change in the voltage of the signal line 22 that occurs when the charges generated in the photoelectric conversion unit 11 are transferred to FD13. In addition, it is possible to suppress fluctuations in the current of the current source 25 and suppress noise from being mixed into the photoelectric conversion signal output to the signal line 22.

[0041] FIG. 5 and FIG. 6 are timing charts showing operation examples of the imaging device 3 according to the first embodiment. In the timing charts shown in FIGS. 5 and 6, the vertical axis represents the voltage level of the signal, and the horizontal axis represents time. FD represents the signal (voltage signal) of FD13, and VOUT represents the signal output to the signal line 22. In the examples shown in FIGS. 5 and 6, the signal CLIP_SW is at a high level, and the switch unit 32 of the supply unit 30 is in an on state. In FIGS. 5 and 6, the transistors to which control signals (signal SEL, signal RST, signal TX) of a high level (for example, the power supply voltage VDD) are input are in an on state, and the transistors to which control signals of a low level (for example, the ground voltage) are input are in an off state.

[0042] At time t1 shown in FIG. 5, when the signal RST becomes high level, the transistor M2 of the reset section 14 of the pixel 10 turns on, and the FD13 and the power supply line 121 are electrically connected. As a result, the charge of the FD13 is reset, and the voltage of the FD13 becomes the reset voltage. Also, at time t1, when the signal SEL becomes high level, the transistor M4 of the selection section 16 turns on. As a result, the amplification section 15 and the selection section 16 can output a signal based on the reset voltage of the pixel 10, that is, a signal after resetting the charge of the FD13 of the pixel 10, to the signal line 22. At time t2, when the signal RST becomes low level, the transistor M2 of the reset section 14 turns off.

[0043] The signal output section 31 of the supply section 30 has the signal CLIP of the first voltage V1 input thereto, and is in a state where it can supply a voltage (clip voltage Vc1 shown by a broken line in FIG. 5) based on the first voltage V1 to the signal line 22. In the example shown in FIG. 5, during the period from time t2 to time t3, the voltage of the FD13 (the voltage of the FD shown in FIG. 5) is higher than the first voltage V1 which is the voltage of the signal CLIP. Therefore, the voltage of the signal VOUT output to the signal line 22 is a voltage based on the voltage of the FD13, that is, a voltage based on the reset voltage after resetting the charge accumulated in the FD13.

[0044] At time t3, the processing section 50 of the reading section 60 samples the signal VOUT which is a voltage based on the reset voltage as a dark signal. It can be said that the voltage of the dark signal is determined at time t3. The AD conversion section 40 of the processing section 50 converts the dark signal into a digital signal. At time t4, a signal CLIP of a second voltage V2 lower than the first voltage V1 is input to the signal output section 31. The voltage of the signal CLIP changes from the first voltage V1 to the second voltage V2, and the signal output section 31 is in a state where it can supply a voltage (clip voltage Vc2 shown by a broken line in FIG. 5) based on the second voltage V2 to the signal line 22.

[0045] At time t5, when the signal TX becomes high level, the transistor M1 of the transfer unit 12 is turned on, and the charge photoelectrically converted by the photoelectric conversion unit 11 is transferred to the FD13. As a result, the voltage of the FD13 becomes a voltage based on the charge transferred from the photoelectric conversion unit 11. Also, since the signal SEL is high level, the amplification unit 15 and the selection unit 16 are in a state where they can output a signal based on the charge generated by the photoelectric conversion unit 11 to the signal line 22. At time t6, when the signal TX becomes low level, the transistor M1 of the transfer unit 12 is turned off.

[0046] In the example shown in FIG. 5, during the period from time t6 to time t7, the voltage of the FD13 is higher than the second voltage V2 which is the voltage of the signal CLIP. Therefore, the voltage of the signal VOUT output to the signal line 22 becomes a voltage based on the voltage of the FD13, that is, a voltage based on the charge photoelectrically converted by the photoelectric conversion unit 11.

[0047] At time t7, the processing unit 50 samples the signal VOUT, which is a voltage based on the charge photoelectrically converted by the photoelectric conversion unit 11, as a photoelectric conversion signal. It can be said that the voltage of the photoelectric conversion signal is determined at time t7. The AD conversion unit 40 of the processing unit 50 converts the photoelectric conversion signal into a digital signal. The processing unit 50 performs CDS, which is a differential process between the dark signal and the photoelectric conversion signal, on the dark signal and the photoelectric conversion signal converted into digital signals. After performing signal processing such as CDS processing, the processing unit 50 outputs the processed signal to the control unit 4.

[0048] Next, with reference to FIG. 6, another example of the operation of the imaging device 3 will be described. At time t11 shown in FIG. 6, when the signal RST becomes high level, the transistor M2 of the reset section 14 of the pixel 10 is turned on. As a result, the charge in the FD13 is reset, and the voltage of the FD13 becomes the reset voltage. Also, at time t11, when the signal SEL becomes high level, the transistor M4 of the selection section 16 is turned on. As a result, the amplification section 15 and the selection section 16 can output a signal based on the reset voltage of the pixel 10 to the signal line 22. At time t12, when the signal RST becomes low level, the transistor M2 of the reset section 14 is turned off.

[0049] The signal output section 31 of the supply section 30 has a signal CLIP of the first voltage V1 input thereto and is in a state where it can supply a voltage (clip voltage Vc1) based on the first voltage V1 to the signal line 22. In the example shown in FIG. 6, during the period from time t12 to time t13, the voltage of the FD13 is higher than the first voltage V1 which is the voltage of the signal CLIP. Therefore, the voltage of the signal VOUT output to the signal line 22 becomes a voltage based on the reset voltage of the FD13.

[0050] At time t13, the processing section 50 of the readout section 60 samples the signal VOUT, which is a voltage based on the reset voltage, as a dark signal. The processing section 50 converts the dark signal into a digital signal. At time t14, the signal output section 31 has a signal CLIP of the second voltage V2, which is lower than the first voltage V1, input thereto and is in a state where it can supply a voltage (clip voltage Vc2) based on the second voltage V2 to the signal line 22.

[0051] At time t15, when the signal TX becomes high level, the transistor M1 of the transfer unit 12 is turned on, and the charge photoelectrically converted by the photoelectric conversion unit 11 is transferred to the FD13. As a result, the voltage of the FD13 becomes a voltage based on the charge transferred from the photoelectric conversion unit 11. Also, since the signal SEL is high level, the amplification unit 15 and the selection unit 16 are in a state where they can output a signal based on the charge generated by the photoelectric conversion unit 11 to the signal line 22. At time t16, when the signal TX becomes low level, the transistor M1 of the transfer unit 12 is turned off.

[0052] In the example shown in FIG. 6, during the period from time t16 to time t17, the voltage of the FD13 is lower than the second voltage V2 which is the voltage of the signal CLIP. Therefore, the voltage of the signal VOUT output to the signal line 22 is limited to the voltage based on the second voltage V2, that is, the clip voltage Vc2.

[0053] At time t17, the processing unit 50 samples the signal VOUT that becomes the clip voltage Vc2 as a photoelectric conversion signal. The processing unit 50 converts the photoelectric conversion signal into a digital signal. The processing unit 50 performs signal processing such as CDS processing using the digital signal converted from the dark signal and the photoelectric conversion signal, and then outputs the processed signal to the control unit 4. Thus, in the present embodiment, the supply unit 30 receives the signal CLIP of different signal levels when reading the dark signal and when reading the photoelectric conversion signal. The supply unit 30 can limit the voltage of the signal line 22 by supplying a voltage to the signal line 22 according to the voltage of the signal CLIP and the voltage of the FD13.

[0054] As shown in FIG. 4, the gates of the transistors M5 of the current sources 25 provided for each signal line 22 are commonly connected to the signal line to which the signal VB is input. Further, a parasitic capacitance (load capacitance) may be added between the signal line 22 from which the pixel signal is output and the gate of the transistor M5 connected to the signal line 22. Due to the influence of this parasitic capacitance, the voltage of the signal VB fluctuates due to the voltage fluctuation of the signal line 22, and the magnitude of the current flowing through each current source 25 may fluctuate. If the image pickup device 3 does not have the supply unit 30, the voltage of the signal line 22 significantly decreases and the voltage of the signal VB also significantly decreases, and it is conceivable that the current supplied from the current source 25 decreases or the current is no longer supplied from the current source 25. When the voltage of the signal line 22 provided for a certain pixel block 20 fluctuates, the voltage of the signal VB commonly supplied to each current source 25 fluctuates, so that the voltage of the signal line 22 provided for another pixel block 20 also fluctuates.

[0055] On the other hand, in the image pickup device 3 according to the present embodiment, a supply unit 30 is provided for each pixel block 20. The supply unit 30 can supply a voltage based on the signal CLIP to the signal line 22 when the switch unit 32 is in the on state, and can limit the voltage of the signal line 22. Therefore, the image pickup device 3 can suppress the voltage fluctuation of the signal VB by limiting the voltage of the signal line 22. Thereby, it is possible to suppress noise caused by the voltage fluctuation of the signal VB from being mixed into the signal (photoelectric conversion signal, dark signal) output to the signal line 22.

[0056] In this embodiment, when the voltage of FD13 is relatively low, an operation (clip operation) in which the voltage of signal line 22 is limited is performed. When the voltage of FD13 is relatively high, the clip operation is not performed. As described above, the path through which the current flows from current source 25 changes between when the clip operation is performed and when the clip operation is not performed. When the clip operation is performed, the current of current source 25 flows between power supply line 122 and the wiring (ground line) 131 shown in FIG. 4 via signal output section 31 of supply section 30. When the clip operation is not performed, the current of current source 25 flows between power supply line 121 and ground line (ground wiring) 131 via amplifier section 15 of pixel 10. Since wiring resistances are added to power supply line 121, power supply line 122, and ground line 131 as schematically shown in FIG. 4, a voltage drop (IR drop) due to the wiring resistances occurs.

[0057] Due to the influence of the above-described change in the current path, the amount of voltage drop in the power supply line 121, the power supply line 122, and the ground line 131 varies between the case where the clip operation is performed and the case where the clip operation is not performed, and a difference may occur in the value of the power supply voltage VDD applied to each pixel 10 via the power supply line 121. When simultaneously reading signals from a plurality of pixel blocks 20, between the pixel block 20 in which the clip operation is performed in another pixel block 20 while reading the signal and the pixel block 20 in which the clip operation is not performed in another pixel block 20 while reading the signal, a difference due to fluctuations in the power supply voltage VDD occurs in the signals of the pixels. Further, when fluctuations occur in the power supply voltage VDD when reading the photoelectric conversion signal, the signal level of the reset voltage of FD13, that is, the signal level serving as a reference for the voltage change generated according to the charge transferred from the photoelectric conversion unit 11, may fluctuate. When a difference occurs in the signal level of the reset voltage between the dark signal read period and the photoelectric conversion signal read period, CDS processing is performed using a dark signal having a signal level different from the signal level that should be the reference for the photoelectric conversion signal, and for example, black sinking or streaking occurs in the image generated using the signal after the CDS processing. In particular, when the power supply voltage is supplied to the pixel 10 and the supply unit 30 via separate power supply lines from separate electrodes, it is considered that the difference in the value of the power supply voltage supplied to the pixel 10 between the case where the clip operation is performed and the case where the clip operation is not performed becomes large.

[0058] In the present embodiment, the pixel 10 and the supply unit 30 are connected to a common electrode 200. Further, since the power supply line 121 and the power supply line 122 are connected to each other by a plurality of wirings 126, the resistance value of the path from the electrode 200 to the pixel 10 and the supply unit 30 can be reduced. Thereby, the difference in the power supply voltage VDD applied to the pixel 10 can be reduced between when the clip operation is performed and when the clip operation is not performed. Therefore, it is possible to suppress the occurrence of differences in the signals of each pixel due to fluctuations in the power supply voltage. As a result, it is possible to prevent black sinking or streaking from occurring in the image generated using the signals of the pixels.

[0059] In the imaging device 3 according to the present embodiment, the supply unit 30 is disposed on the second substrate 112. Therefore, compared with the case where the supply unit 30 is provided in the first substrate 111, the light-receiving area of the photoelectric conversion unit 11 can be increased. It is possible to prevent the aperture ratio of the pixel from decreasing. Further, the clip operation can be performed without increasing the chip area, and it is possible to suppress a decrease in the image quality of the image generated using the pixel signal. Further, in the present embodiment, the supply control unit 36 is disposed on the second substrate 112. Since the supply unit 30 and the supply control unit 36 are provided on the same substrate, it becomes easier to control the supply unit 30.

[0060] FIG. 7 is a diagram showing an example of a partial layout of the imaging device according to the first embodiment. In each of the plurality of pixel blocks 20 of the imaging device 3, a plurality of pixels 10 including the photoelectric conversion unit 11 are arranged in the row direction (X direction), which is the first direction, and the column direction (Y direction), which intersects the first direction. In the example shown in FIG. 7, four pixels 10 are provided in the pixel block 20. In the first substrate 111 of the imaging device 3, a plurality of pixel blocks 20 each including four pixels 10 are arranged in the row direction (horizontal direction) and the column direction (vertical direction). Note that FIG. 7 schematically shows a part of the wiring provided in the imaging device 3.

[0061] The signal line 22 provided for each pixel block 20 is connected to each of the four pixels 10 in the pixel block 20 and transmits the pixel signal to the processing unit 50. The wiring 126 is provided between adjacent signal lines 22. The wiring 126 is supplied with the power supply voltage VDD as described above and is provided so as to sandwich the signal line 22, thereby functioning as a shield. It is possible to suppress the coupling between the signal lines 22 and suppress noise from being mixed into the pixel signal output to the signal line 22.

[0062] The plurality of wirings 38 shown in FIG. 7 schematically represent a plurality of wirings (control lines) that transmit the signal TX, the signal RST, and the signal SEL described above. When the pixel control unit 35 that supplies the signal TX or the like is arranged on the second substrate 112, as shown in FIG. 7, the control line 38 may be arranged at the corner (diagonal part) of the pixel block 20. In this case, since the control line 38 is arranged apart from the signal line 22, it is possible to suppress the noise caused by the signals (such as the signal TX, the signal RST, and the signal SEL) of the control line 38 from affecting the signal line 22.

[0063] According to the above-described embodiment, the following operational effects can be obtained. (1) The imaging device 3 includes a first substrate 111 provided with a photoelectric conversion unit 11 that generates charges by photoelectric conversion and a signal line 22 that outputs a signal based on the charges generated by the photoelectric conversion unit 11, a supply unit 30 that supplies voltage to the signal line 22, a processing unit 50 that processes the signal output to the signal line 22, and a second substrate 112 laminated on the first substrate 111. In this embodiment, the pixel 10 having the photoelectric conversion unit 11 is arranged on the first substrate 111, and the supply unit 30 is arranged on the second substrate 112. Therefore, the clipping operation can be performed without increasing the chip area, and the quality of the pixel signal can be prevented from deteriorating. Thereby, the deterioration of the image quality of the image generated using the pixel signal can be suppressed. Compared with the case where the supply unit 30 is provided in the first substrate 111, the light receiving area of the photoelectric conversion unit 11 can be increased, and the decrease in the aperture ratio of the pixel can be suppressed. (2) In this embodiment, the reading unit 60 having a plurality of processing units 50 is arranged on the second substrate 112. Therefore, a plurality of circuits for processing the pixel signal can be arranged without increasing the chip area. Also, the decrease in the aperture ratio of the pixel can be suppressed.

[0064] The following modifications are also within the scope of the present invention, and it is also possible to combine one or more of the modification examples with the above-described embodiment.

[0065] (Modification Example 1) In the above-described embodiment, an example in which the supply unit 30 includes the signal output unit 31 and the switch unit 32 has been described. However, the configuration of the supply unit 30 is not limited to this. The supply unit 30 may be configured not to have the switch unit 32. The signal output unit 31 is electrically connected to the signal line 22 without passing through the switch unit 32, and can supply a voltage to the signal line 22 both when reading the dark signal and when reading the photoelectric conversion signal. In this modification, the switch unit 32 can be reduced, and the chip area can be reduced.

[0066] (Modification 2) The signal output unit 31 may be provided for each pixel 10. For example, when the pixel block 20 is composed of four pixels 10, four signal output units 31 and four switch units 32 may be arranged for each pixel block 20. Note that, among the signal output unit 31 and the switch unit 32, only the signal output unit 31 may be arranged for each pixel 10, and the switch unit 32 may not be arranged.

[0067] The signal CLIP may be supplied using separate wirings for each signal output unit 31 or for each plurality of signal output units 31. In this case, the number of signal output units 31 connected to one wiring can be reduced, and the switching of the signal level of the signal CLIP can be performed at high speed.

[0068] (Modification 3) In the above-described embodiment, an example in which the signal line 22 and the supply unit 30 are provided for each pixel block 20 has been described. However, the signal line 22 may be arranged for each pixel 10, and the supply unit 30 may be arranged for each signal line 22. In this case, the pixel control unit 35 may be arranged for each pixel 10, and the supply control unit 36 may be arranged for each supply unit 30. Each supply control unit 36 may control the supply unit 30 provided for each signal line 22 so as to be able to supply a voltage at different timings for each signal line 22.

[0069] (Modification 4) FIG. 8 is a block diagram showing a configuration example of an imaging device according to Modification Example 4. As shown in FIG. 8, the power supply voltage may be supplied to the pixel 10 and the supply unit 30 from separate electrodes. In the example shown in FIG. 8, the power supply voltage VDD1 is supplied to the pixel 10 from the electrode 201 via the power supply line 121, and the power supply voltage VDD2 is supplied to the supply unit 30 from the electrode 202 via the power supply line 122. The power supply line 121 and the power supply line 122 may be formed so that the resistance value of the path from the electrode 201 to each pixel 10 is the same as the resistance value of the path from the electrode 202 to each supply unit 30. Note that the power supply voltage VDD1 and the power supply voltage VDD2 may be different values. For example, the power supply voltage VDD2 may be a voltage lower than the power supply voltage VDD1. In this case, the supply unit 30 can be operated by the power supply voltage VDD2, which is lower than the power supply voltage VDD1 supplied to the pixel 10. The power consumption of the imaging device 3 can be reduced.

[0070] (Modification Example 5) FIG. 9 is a block diagram showing a configuration example of an imaging device according to Modification Example 5. As shown in FIG. 9, in the first substrate 111, the power supply line 121 connecting the electrode 200 and each pixel 10 may not be provided. In this case, the power supply voltage VDD is supplied to each pixel 10 from the electrode 200 via the power supply line 122 and the wiring 126. In this modification example, the number of wirings arranged on the first substrate 111 can be reduced.

[0071] (Modification Example 6) The pixel 10 and the supply unit 30 may be configured using NMOS transistors, or may be configured using PMOS transistors. The pixel 10 and the supply unit 30 may be configured using both NMOS transistors and PMOS transistors. When the amplification unit 15 and the signal output unit 31 are configured by NMOS transistors, when reading the photoelectric conversion signal, as described above, a signal CLIP with a lower voltage than when reading the dark signal may be supplied to the signal output unit 31. When the amplification unit 15 and the signal output unit 31 are configured by PMOS transistors, when reading the photoelectric conversion signal, a signal CLIP with a higher voltage than when reading the dark signal may be supplied to the signal output unit 31. The supply unit 30 supplies a voltage to the signal line 22 so that the voltage of the signal line 22 becomes a value from the power supply voltage (or the ground voltage) to the voltage based on the signal CLIP. The voltage of the signal line 22 is limited by the supply unit 30 to be a value within a range having the voltage based on the signal CLIP as the upper limit value or the lower limit value.

[0072] (Modification Example 7) In the above-described embodiment, an example in which the imaging device 3 is configured by laminating the first substrate 111 and the second substrate 112 has been described. However, the first substrate 111 and the second substrate 112 do not have to be laminated.

[0073] (Modification Example 8) In the above-described embodiment, an example in which the imaging device 3 has a back-illuminated configuration has been described. However, the imaging device 3 may have a front-illuminated configuration in which a wiring layer 101 is provided on the incident surface side where light is incident.

[0074] (Modification Example 9) In the above-described embodiment and modification examples, an example in which a photodiode is used as the photoelectric conversion unit has been described. However, an organic photoelectric film may be used as the photoelectric conversion unit.

[0075] (Modification Example 10) The imaging device and the imaging apparatus described in the above embodiments and modification examples may be applied to cameras, smartphones, tablets, cameras built into PCs, in-vehicle cameras, cameras mounted on unmanned aerial vehicles (drones, radio control aircraft, etc.).

[0076] In the above, various embodiments and modification examples have been described, but the present invention is not limited to these contents. Other aspects conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention.

[0077] The disclosure content of the following priority basis application is incorporated herein by reference. Japanese Patent Application No. 2019-180781 (filed on September 30, 2019)

Explanation of Reference Numerals

[0078] 1... Imaging apparatus, 3... Imaging device, 4... Control unit, 10... Pixel, 11... Photoelectric conversion unit, 20... Pixel block, 30... Supply unit, 35... Pixel control unit, 36... Supply control unit, 40... AD conversion unit, 50... Processing unit, 60... Reading unit, 70... Reading control unit, 111... First substrate, 112... Second substrate

Claims

1. A first substrate having a first pixel including a first photoelectric conversion unit that converts light into electric charge and a second pixel including a second photoelectric conversion unit that converts light into electric charge, A wiring layer having a first signal line electrically connected to the first pixel and outputting a first signal based on the electric charge converted by the first photoelectric conversion unit, and a second signal line electrically connected to the second pixel and outputting a second signal based on the electric charge converted by the second photoelectric conversion unit, A second substrate laminated together with the first substrate, the second substrate including a reading unit that performs signal processing on the first signal output to the first signal line and a second signal output to the second signal line, and a first supply unit that controls the voltage of the first signal line and a second supply unit that controls the voltage of the second signal line, provided with The wiring layer is disposed between the first substrate and the second substrate in the stacking direction in which the first substrate and the second substrate are stacked. The reading unit is disposed at a position facing at least one of the first pixel and the second pixel in the stacking direction. An image sensor.

2. In the image sensor according to Claim 1, The reading unit is disposed at a position facing the first pixel in the stacking direction and at a position facing the second pixel in the stacking direction. An image sensor.

3. In the image sensor according to Claim 1 or Claim 2, The first pixel and the first processing unit are disposed at positions facing each other in the stacking direction. An image sensor.

4. In the image sensor according to Claim 3, The first photoelectric conversion unit and the first processing unit are disposed at positions facing each other in the stacking direction. An image sensor.

5. In the imaging device according to any one of Claims 1 to 4, the second pixel and the second processing unit are arranged at positions facing each other in the stacking direction, imaging device.

6. In the imaging device according to Claim 5, the second photoelectric conversion unit and the second processing unit are arranged at positions facing each other in the stacking direction, imaging device.

7. In the imaging device according to any one of Claims 1 to 6, the first supply unit controls so that the voltage of the first signal line does not become equal to or lower than a predetermined voltage, the second supply unit controls so that the voltage of the second signal line does not become equal to or lower than a predetermined voltage, imaging device.

8. In the imaging device according to any one of Claims 1 to 7, the first pixel outputs the first signal and a first dark signal used to remove noise included in the first signal to the first signal line, the second pixel outputs the second signal and a second dark signal used to remove noise included in the second signal to the second signal line, the first supply unit supplies different voltages when the first signal is output from the first pixel to the first signal line and when the first dark signal is output from the first pixel to the first signal line and, the second supply unit supplies different voltages when the second signal is output from the second pixel to the second signal line and when the second dark signal is output from the second pixel to the second signal line and. Imaging device.

9. In the imaging device according to claim 8, the first supply unit supplies a first voltage when the first dark signal is output from the first pixel to the first signal line, supplies a second voltage lower than the first voltage when the first signal is output from the first pixel to the first signal line, the second supply unit supplies a third voltage when the second dark signal is output from the second pixel to the second signal line, supplies a fourth voltage lower than the third voltage when the second signal is output from the second pixel to the second signal line. Imaging device.

10. In the imaging device according to any one of claims 1 to 9, the first substrate includes a third pixel having a photoelectric conversion unit that converts light into charge and a third photoelectric conversion unit disposed adjacent to the first photoelectric conversion unit in the column direction, and a fourth pixel having a photoelectric conversion unit that converts light into charge and a fourth photoelectric conversion unit disposed adjacent to the second photoelectric conversion unit in the column direction and has the first signal line outputs a third signal based on the charge converted by the third photoelectric conversion unit, the second signal line outputs a fourth signal based on the charge converted by the fourth photoelectric conversion unit. Imaging device.

11. In the imaging device according to claim 10, the first substrate includes a fifth pixel having a photoelectric conversion unit that converts light into charge and a fifth photoelectric conversion unit disposed adjacent to the first photoelectric conversion unit in the row direction, and a sixth pixel having a photoelectric conversion unit that converts light into charge and a sixth photoelectric conversion unit disposed adjacent to the second photoelectric conversion unit in the row direction and has The first signal line outputs a fifth signal based on the charges converted by the fifth photoelectric conversion unit. The second signal line outputs a sixth signal based on the charges converted by the sixth photoelectric conversion unit. Image sensor. **Claim 12** In the image sensor according to any one of Claims 1 to 9, the first substrate is a photoelectric conversion unit that converts light into charges, and includes a third pixel including a third photoelectric conversion unit disposed adjacent to the first photoelectric conversion unit in the row direction, is a photoelectric conversion unit that converts light into charges, and includes a fourth pixel including a fourth photoelectric conversion unit disposed adjacent to the second photoelectric conversion unit in the row direction and has the first signal line outputs a third signal based on the charges converted by the third photoelectric conversion unit, the second signal line outputs a fourth signal based on the charges converted by the fourth photoelectric conversion unit. Image sensor. **Claim 13** In the image sensor according to any one of Claims 1 to 12, a first pixel control unit that controls the accumulation time of the charges converted by the first photoelectric conversion unit, a second pixel control unit that controls the accumulation time of the charges converted by the second photoelectric conversion unit and an image sensor provided therewith. **Claim 14** In the image sensor according to Claim 13, the second pixel control unit controls such that the accumulation time of the charges converted by the second photoelectric conversion unit is a different accumulation time from the accumulation time of the charges converted by the first photoelectric conversion unit. Image sensor. **Claim 15** In the image sensor according to Claim 13 or Claim 14, the first pixel has a first transfer unit that transfers the charges converted by the first photoelectric conversion unit. The second pixel has a second transfer unit that transfers the charge converted by the second photoelectric conversion unit. The first pixel control unit controls the timing at which the charge converted by the first photoelectric conversion unit is transferred by the first transfer unit. The second pixel control unit controls the timing at which the charge converted by the second photoelectric conversion unit is transferred by the second transfer unit. An image sensor.

16. In the image sensor according to any one of Claims 13 to 15, The first pixel has a first storage unit to which the charge converted by the first photoelectric conversion unit is transferred, and a first reset unit that discharges the charge in the first storage unit. The second pixel has a second storage unit to which the charge converted by the second photoelectric conversion unit is transferred, and a second reset unit that discharges the charge in the second storage unit. The first pixel control unit controls the timing at which the charge in the first storage unit is discharged by the first reset unit. The second pixel control unit controls the timing at which the charge in the second storage unit is discharged by the second reset unit. An image sensor.

17. In the image sensor according to Claim 13, The first pixel control unit supplies a first control signal for controlling the accumulation time of the charge converted by the first photoelectric conversion unit to the first pixel. The second pixel control unit supplies a second control signal for controlling the accumulation time of the charge converted by the second photoelectric conversion unit to the second pixel. An image sensor.

18. In the image sensor according to Claim 17, The second pixel control unit supplies the second control signal to the second pixel at a timing different from the timing at which the first pixel control unit supplies the first control signal to the first pixel. An image sensor.

19. In the image sensor according to Claim 17 or Claim 18, The first pixel has a first transfer unit that transfers the charge converted by the first photoelectric conversion unit. The second pixel has a second transfer unit that transfers the charge converted by the second photoelectric conversion unit. The first pixel control unit supplies, as the first control signal, a first transfer control signal for controlling the first transfer unit to the first transfer unit. The second pixel control unit supplies, as the second control signal, a second transfer control signal for controlling the second transfer unit to the second transfer unit. Image sensor.

20. In the image sensor according to any one of claims 17 to 19, The first pixel has a first storage unit to which the charge converted by the first photoelectric conversion unit is transferred, and a first reset unit that discharges the charge in the first storage unit. The second pixel has a second storage unit to which the charge converted by the second photoelectric conversion unit is transferred, and a second reset unit that discharges the charge in the second storage unit. The first pixel control unit supplies, as the first control signal, a first reset control signal for controlling the first reset unit to the first reset unit. The second pixel control unit supplies, as the second control signal, a second reset control signal for controlling the second reset unit to the second reset unit. Image sensor.

21. In the image sensor according to any one of claims 13 to 20, The first pixel control unit and the second pixel control unit are disposed on the second substrate. Image sensor.

22. In the image sensor according to any one of claims 1 to 21, a first supply control unit that controls the timing of supplying a voltage from the first supply unit to the first signal line; and a second supply control unit that controls the timing of supplying a voltage from the second supply unit to the second signal line An image sensor comprising.

23. In the image sensor according to claim 22, when the first signal is output from the first pixel to the first signal line, the first supply control unit supplies a voltage from the first supply unit to the first signal line, and when the second signal is output from the second pixel to the second signal line, the second supply control unit supplies a voltage from the second supply unit to the second signal line. Image sensor.

24. In the image sensor according to claim 22 or claim 23, the second supply control unit controls such that the timing at which the voltage is supplied from the second supply unit to the second signal line is different from the timing at which the voltage is supplied from the first supply unit to the first signal line. Image sensor.

25. In the image sensor according to any one of claims 22 to 24, the first supply control unit and the second supply control unit are arranged on the second substrate. Image sensor.

26. In the image sensor according to any one of claims 1 to 25, the first processing unit has a first conversion unit that converts the first signal output to the first signal line into a digital signal, and the second processing unit has a second conversion unit that converts the second signal output to the second signal line into a digital signal. Image sensor.

27. In the image sensor according to any one of claims 1 to 25, the first processing unit has a first amplifier unit that amplifies the first signal output to the first signal line, and the second processing unit has a second amplifier unit that amplifies the second signal output to the second signal line. Image sensor.

28. In the image sensor according to claim 27, The first processing unit includes a first conversion unit that converts the first signal amplified by the first amplifier unit into a digital signal. The second processing unit includes a first conversion unit that converts the second signal amplified by the second amplifier unit into a digital signal. Image sensor.

29. In the image sensor according to any one of Claims 1 to 28, a first connection unit that electrically connects the first pixel and the first processing unit; a second connection unit that electrically connects the second pixel and the second processing unit An image sensor comprising the same.

30. In the image sensor according to Claim 29, the first connection unit has an electrode that electrically connects the first pixel and the first processing unit; the second connection unit has an electrode that electrically connects the second pixel and the second processing unit, Image sensor.

31. An imaging device comprising the image sensor according to any one of Claims 1 to 30.

32. In the imaging device according to Claim 31, An imaging device comprising a control unit that is electrically connected to the image sensor and generates image data.

33. In the imaging device according to Claim 31 or Claim 32, An imaging device comprising an optical system that emits light to the image sensor.

Images