Plasma processing apparatus and control method thereof

Abstract

To provide a plasma processing apparatus and a method for controlling the same, which can increase the processing speed by expanding a formation area of plasma generated on the upper electrode side.SOLUTION: A plasma processing apparatus according to an embodiment of the present invention includes a vacuum chamber, a stage for supporting a substrate, a counter electrode, and a resonant circuit. The stage is disposed inside the vacuum chamber and is connected to a first high frequency power supply circuit that supplies high frequency power of a first frequency. The counter electrode is disposed opposite the stage and is connected to a second high frequency power supply circuit that supplies high frequency power of a second frequency. The resonant circuit passes a high frequency current of the second frequency from the counter electrode.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a plasma processing apparatus such as a dry etching apparatus and a control method thereof.

Background Art

[0002] Among vacuum processing apparatuses such as etching apparatuses, a capacitively coupled plasma type vacuum processing apparatus is known. For example, in Patent Document 1, a capacitively coupled plasma is generated by applying a first high-frequency voltage to a lower electrode that supports a processing substrate and a second high-frequency voltage to an upper electrode having a gas introduction mechanism, and a plasma processing apparatus is disclosed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In this type of dual-frequency CCP plasma processing apparatus, there is a problem that the formation region of the plasma generated on the upper electrode side hardly expands to the vicinity of the surface of the processing substrate, and the contribution rate to the processing speed is low.

[0005] In view of the above circumstances, an object of the present invention is to provide a plasma processing apparatus and a control method thereof that can expand the formation region of the plasma generated on the upper electrode side and increase the processing speed.

Means for Solving the Problems

[0006] A plasma processing apparatus according to one aspect of the present invention includes a vacuum chamber, a stage for supporting a substrate, a counter electrode, and a resonance circuit. The stage is disposed inside the vacuum chamber and is connected to a first high-frequency power supply circuit that supplies high-frequency power of a first frequency. The counter electrode is disposed to face the stage and is connected to a second high-frequency power supply circuit that supplies high-frequency power of a second frequency. The resonance circuit allows the high-frequency current of the second frequency from the counter electrode to pass through.

[0007] In the plasma processing apparatus, since a resonance circuit that allows the high-frequency current of the second frequency from the counter electrode to pass through is provided between the electrode supply line and the ground potential, the impedance of the plasma current flowing from the counter electrode to the stage decreases. As a result, the formation region of the plasma generated on the counter electrode side expands, and the processing speed can be increased.

[0008] The resonance circuit may be adjusted such that the resonance frequency between the substrate surface on the stage and the ground potential is the second frequency.

[0009] The resonance circuit is, for example, an LC series resonance circuit including a coil and a capacitor.

[0010] The first high-frequency power supply circuit may include an impedance matching circuit connected to a first high-frequency power supply, a filter circuit that blocks the input of the high-frequency power of the second frequency applied to the power supply line, and a voltage measurement unit connected between the impedance matching circuit and the filter circuit that measures the high-frequency voltage output from the impedance matching to the stage. In this case, the resonance circuit is connected to the power supply line between the stage and the filter circuit.

[0011] The capacitor may be a variable capacitor whose capacitance value can be adjusted. In this case, the plasma processing apparatus further includes a control unit that controls the capacitance value of the capacitor such that the voltage value measured by the voltage measurement unit is minimized.

[0012] The plasma processing apparatus may further include a ground shield installed between the circumferential surface of the counter electrode and the inner wall surface of the vacuum chamber.

[0013] The second frequency may be higher than the first frequency.

[0014] The plasma processing apparatus may further include a gas supply unit that supplies etching gas or film-forming gas to the vacuum chamber.

[0015] In the control method of the plasma processing apparatus according to one embodiment of the present invention, the resonance circuit is an LC series resonance circuit including a coil and a variable capacitor, Measure the high-frequency voltage of the first frequency input to the stage, and control the capacitance value of the variable capacitor so that the high-frequency voltage is minimized.

Advantages of the Invention

[0016] According to the present invention, it is possible to expand the formation region of the plasma generated on the upper electrode side and increase the processing speed.

Brief Description of the Drawings

[0017]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Embodiments for Carrying Out the Invention

[0018] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0019] FIG. 1 is a schematic side cross-sectional view showing the configuration of a plasma processing apparatus 100 according to an embodiment of the present invention. The plasma processing apparatus 100 of the present embodiment is configured as a dual-frequency CCP type dry etching apparatus including a vacuum chamber 10, a stage 20 as a lower electrode, and a counter electrode 30 as an upper electrode.

[0020] The vacuum chamber 10 is a sealed container to which a vacuum pump 42 is connected via an exhaust valve 41 and can maintain an internal reduced-pressure atmosphere. The vacuum chamber 10 is made of metal and is connected to the ground potential. An opening 12 for loading and unloading a substrate is provided on one side surface of the vacuum chamber 10 and is opened and closed by a gate valve 11.

[0021] The stage 20 is made of metal, is disposed inside the vacuum chamber 20, and is installed at the bottom of the vacuum chamber 10 via a support member 21 made of an insulating material in the present embodiment. The upper surface of the stage 20 is formed as a support surface for supporting the substrate W. The substrate W is a processing substrate such as a semiconductor wafer or a glass substrate. The stage 20 may be provided with an electrostatic chuck mechanism for holding the substrate W and a temperature adjustment mechanism for heating or cooling the substrate W to a predetermined temperature, although not shown.

[0022] The stage 20 is connected to a first high-frequency power supply circuit 51 installed outside the vacuum chamber 10. As will be described later, the first high-frequency power supply circuit 51 includes an impedance matching circuit 511 connected to a first high-frequency power supply RF1 that generates high-frequency power of a first frequency (see FIG. 3). The first high-frequency power supply circuit 51 supplies high-frequency power of the first frequency to the stage 20 as bias power. The first frequency is not particularly limited and is, for example, 2 MHz. Also, the magnitude of the power is, for example, 500 W to 3000 W.

[0023] The counter electrode 30 is made of metal, is disposed to face the stage 20, and is installed on the top plate portion of the vacuum chamber 10 via a support member 31 made of an insulating material. The counter electrode 30 is connected to a gas supply line 43 and functions as a shower plate for uniformly injecting a process gas over the entire surface of the substrate W on the stage 20.

[0024] The gas supply line 43 is connected to a gas supply source 45 via a flow rate adjustment valve. In the present embodiment, since the plasma processing apparatus 100 is configured as a dry etching apparatus, a reactive gas for etching (for example, a fluorine-based or hydrocarbon-based gas) is used as the process gas. Note that the gas supply line 43 is not limited to being connected to the counter electrode 30, and the process gas may be supplied into the vacuum chamber 10 from a part of the side wall of the vacuum chamber 10 or the like.

[0025] The counter electrode 30 is connected to a second high-frequency power supply circuit 52 installed outside the vacuum chamber 10. The second high-frequency power supply circuit 52 includes an impedance matching circuit connected to a second high-frequency power supply RF2 that generates high-frequency power of a second frequency. The second high-frequency power supply circuit 52 supplies high-frequency power of the second frequency as discharge power for generating plasma of the process gas to the counter electrode 30. The second frequency is not particularly limited and is, for example, 27 MHz. Also, the magnitude of the power is, for example, 500 W to 4 kW.

[0026] In the present embodiment, in a state where the inside of the vacuum chamber 10 is maintained in a predetermined reduced-pressure atmosphere, a process gas (etching gas) is introduced into the vacuum chamber 10 via the gas supply line 43, and a high-frequency voltage of the second frequency power supply RF2 is applied to the counter electrode 30, thereby generating plasma of the process gas (etching gas) between the stage 20 and the counter electrode 30. On the other hand, by applying a high-frequency voltage of the first frequency power supply RF1 to the stage 20, ions in the plasma are accelerated toward the substrate W on the stage 20. Thereby, an etching process is performed on the surface of the substrate W. The processing pressure is, for example, 5 Pa to 30 Pa.

[0027] Here, in this type of dual-frequency CCP plasma processing apparatus, there is a problem that the plasma formation region generated on the upper electrode side by the second high-frequency voltage hardly expands to the vicinity of the surface of the processing substrate, and it is difficult to improve the processing speed (etching rate).

[0028] As conceptually shown in FIG. 2, the above problem is that the impedance Z A between the upper electrode 130 and the lower electrode 120 is much larger than the impedance Z G between the upper electrode 130 and the surrounding vacuum chamber 110. Therefore, it is considered that a part of the high-frequency voltage applied to the upper electrode 130 is consumed by the discharge between the upper electrode 130 and the inner wall of the surrounding vacuum chamber 110. As a result, the plasma formed between the upper electrode 130 and the lower electrode 120 does not sufficiently expand to the vicinity of the surface of the substrate, and the etching rate cannot be improved.

[0029] Therefore, in the present embodiment, as shown in FIG. 1, a resonance circuit 53 that allows the high-frequency current of the second frequency from the counter electrode 30 to pass through is connected between the power supply line 510 between the stage 20 and the first high-frequency power supply circuit 51 and the ground potential. By connecting the resonance circuit 53 between the stage 20 and the first high-frequency power supply circuit 51, the impedance (corresponding to Z A in FIG. 2) between the counter electrode 30 and the stage 20 is reduced, and the plasma current flowing from the counter electrode 30 to the stage 20 is made to flow easily. As a result, the plasma formation region generated on the counter electrode 30 side expands, so that the processing speed (etching rate) can be increased.

[0030] The resonance circuit 53 is an LC series resonance circuit including a coil L and a capacitor VC1 as described later. The inductance value of the coil L and the capacitance value of the capacitor VC1 are adjusted so that the resonance frequency between the surface of the substrate W on the stage 20 and the ground potential becomes the second frequency (27 MHz). That is, the resonance circuit 53 is configured to resonate at the second frequency (27 MHz).

[0031] Furthermore, as shown in FIG. 1, the plasma processing apparatus 100 of the present embodiment further includes a ground shield 61 installed between the peripheral surface of the counter electrode 30 and the inner wall surface of the side portion of the vacuum chamber 10. The ground shield 61 is composed of a metal cylindrical member installed so as to cover the peripheral surface of the insulating support member 31 that covers the peripheral surface of the counter electrode 30. The ground shield 61 is attached to the vacuum chamber 10 and connected to the ground potential via the vacuum chamber 10.

[0032] By installing the ground shield 61 around the counter electrode 10 in this way, the potential difference between the ground shield 61 and the inner wall surface of the side portion of the vacuum chamber 10 is eliminated, and the generation of discharge between the peripheral surface of the counter electrode 30 and the vacuum chamber 10 can be suppressed. That is, since the impedance (Z G ) apparently does not exist between the peripheral surface of the counter electrode 30 and the vacuum chamber 10, the high-frequency voltage of the second frequency (27 MHz) applied to the counter electrode 30 is not consumed by the discharge between the counter electrode 30 and the surrounding vacuum chamber 10. Therefore, since all of the high-frequency voltage applied to the counter electrode 30 is used for the formation of plasma between the counter electrode 30 and the stage 20, it can greatly contribute to the expansion of the plasma formation region near the surface of the substrate W.

[0033] If necessary, a similar ground shield may be installed around the stage 20. In this case, the discharge between the stage 20 and the surrounding vacuum chamber 10 due to the high-frequency voltage of the first frequency (2 MHz) applied to the stage 20 is suppressed. Such a configuration can also contribute to the expansion of the plasma formation region near the surface of the substrate W.

[0034] Next, the details of the first high-frequency power supply circuit 51 and the resonance circuit 53 will be described.

[0035] FIG. 3 is a block diagram showing the relationship between the first high-frequency power supply circuit 51 and the resonance circuit 53. As shown in the figure, the first high-frequency power supply circuit 51 includes an impedance matching circuit (matching circuit) 511, a voltage measurement unit 512, and a filter circuit unit 513.

[0036] The impedance matching circuit 511 is connected to the first high-frequency power supply RF1. The impedance matching circuit 511 is a circuit that matches the impedance of the first high-frequency power supply RF1, the impedance of the power supply line (transmission line), and the impedance of the stage 20 (load).

[0037] The voltage measurement unit 512 measures the high-frequency voltage output from the impedance matching circuit 511 to the stage 20. The voltage measurement unit 512 is connected between the impedance matching circuit 511 and the filter circuit unit 513, and measures the peak-to-peak value (Vpp) of the high-frequency voltage at the first frequency (2 MHz).

[0038] The filter circuit unit 513 is a circuit that blocks the input of the high-frequency power at the second frequency (27 MHz) applied to the power supply line 510 from the counter electrode 30 via the stage 20. Thereby, the second high-frequency power supply RF2, the impedance matching circuit 511, and the voltage measurement unit 512 can be protected from the high-frequency power at the second frequency (27 MHz). The configuration of the filter circuit unit 513 is not particularly limited, and for example, it is composed of a low-pass filter or a band-pass filter that allows only the high-frequency power at the first frequency (2 MHz) to pass through.

[0039] The resonance circuit 53 has the same resonance frequency as the frequency of the second high-frequency power supply RF2 (second frequency) applied to the counter electrode 30. In the present embodiment, the resonance circuit 53 is an LC series resonance circuit including a coil L and a capacitor VC1, and the capacitor VC1 is a variable capacitor whose capacitance value can be adjusted.

[0040] As described above, the resonance circuit 53 is connected between the power supply line 510 between the stage 20 and the first high-frequency power supply circuit 51 and the ground potential. Thereby, the high-frequency power (plasma current) at the second frequency (27 MHz) flowing through the power supply line 510 can be made to flow toward the ground potential without inputting it to the first high-frequency power supply circuit 51. While protecting the first high-frequency power supply circuit 51, the impedance (Z) between the counter electrode 30 and the stage 20A ) can be reduced to expand the plasma formation region to near the surface of the substrate W.

[0041] Here, the coil L constituting the resonance circuit 53 may include the inductive reactance components of various components constituting the power supply line 510. In this case, depending on the reactance component, the resonance circuit 53 may be constituted by an LC parallel resonance circuit in which the coil L is connected in parallel to the capacitor VC1.

[0042] Also, in the present embodiment, the capacitance value of the capacitor VC1 is adjusted so that the high-frequency voltage (bias voltage) of the first frequency (2 MHz) applied to the stage 20 is minimized. In the present embodiment, a control unit 55 is further provided that controls the capacitance value of the capacitor VC1 so that the voltage value measured by the voltage measurement unit 512 is minimized.

[0043] FIG. 4 shows an experimental result showing the relationship between the capacitance value of the capacitor VC1 constituting the resonance circuit 53, the etching rate, and the voltage value Vpp of the first frequency (2 MHz). As shown in the figure, by adjusting the capacitance value of the capacitor VC1 so that the voltage value Vpp is minimized, the maximum etching rate can be obtained. Therefore, by monitoring the voltage value measured by the voltage measurement unit 512 by the control unit 55 and controlling the capacitance value of the capacitor VC1 so that this is always minimized, it becomes possible to process the substrate W while maintaining the state where the etching rate is maximum. As an example, when the minimum value of Vpp was about 1550 V, the capacitance value of VC1 was about 35.3 pF, and the etching rate was 280 nm / min.

[0044] Incidentally, when the voltage value Vpp measured by the voltage measurement unit 512 takes the minimum value, it has been confirmed that the capacitance value of the matching element constituting the impedance matching circuit 511 and the capacitance value of the matching element constituting the impedance matching circuit in the second high-frequency power supply circuit 52 both take extreme values. That is, it can be said that the voltage value Vpp taking the minimum value is equivalent to the capacitance values of the matching elements of the high-frequency power supply circuits 51 and 52 taking extreme values. From this, instead of adjusting the capacitance value of the capacitor VC1 so that the voltage value Vpp becomes minimum, the capacitance value of the capacitor VC1 may be adjusted so that the capacitance values of the above-mentioned matching elements take extreme values.

[0045] According to the plasma processing apparatus of the present embodiment configured as described above, since the resonance circuit 53 having a resonance frequency of the second frequency (27 MHz) is connected between the power supply line 510 connecting the stage 20 and the first high-frequency power supply circuit 51 and the ground potential, the impedance between the counter electrode 30 and the stage 20 decreases, making it easier for the plasma current flowing from the counter electrode 30 to the stage 20 to flow. As a result, the formation region of the plasma generated on the counter electrode 30 side expands, and the processing speed (etching rate) can be increased.

[0046] FIG. 5 is an experimental result showing the relationship between the etching rate and the power of the second high-frequency power supply RF2 (27 MHz), and shows a comparison between the case where the resonance circuit 53 is present and the case where it is not. Here, the experiment was conducted using a device in which the ground shield 61 was installed in any of the above cases, the power range was 500 W to 4 kW, and the processing pressure was 10 Pa. As shown in the figure, according to the present embodiment provided with the resonance circuit 53, the increase rate of the etching rate with respect to the increase in the input power can be increased as compared with the case where the resonance circuit 53 is not present. That is, it shows that the installation of the resonance circuit 53 expands the plasma formation region to near the surface of the substrate W, and the contribution rate to the processing speed is increased.

[0047] Furthermore, according to the present embodiment, since the high-frequency voltage of the first frequency (2 MHz) input to the stage 20 is measured and the capacitance value of the capacitor VC1 of the resonance circuit 53 is controlled so that the high-frequency voltage becomes minimum, the etching process of the substrate W can be continued while maintaining the maximum etching rate.

[0048] As described above, the embodiments of the present invention have been described. However, the present invention is not limited only to the above-described embodiments, and various modifications can be made, of course.

[0049] For example, in the above embodiment, the frequency of the high-frequency voltage (first frequency) input to the stage 20 is 2 MHz, and the frequency of the high-frequency voltage (second frequency) input to the counter electrode 30 is 27 MHz. However, the present invention is not limited to this. For example, the first frequency may be lower than 13.56 MHz, and the second frequency may be 13.56 MHz or higher. Also in this case, the reactance value of the coil L and / or the capacitance value of the capacitor VC1 are set so that the resonance frequency of the resonance circuit 53 becomes the second frequency.

[0050] Also, in the above embodiment, the high-frequency voltage Vpp of the first frequency input to the stage 20 is monitored, and the capacitance value of the capacitor VC1 in the resonance circuit 53 is adjusted so that the value becomes minimum. Instead of this, a variable coil having an adjustable inductance value may be employed as the coil L, and the inductance value of the coil L may be adjusted so that the bias voltage Vpp becomes minimum. Even with such a configuration, the same operational effects as described above can be obtained.

[0051] Furthermore, in the above embodiment, an etching apparatus is described as an example of the plasma processing apparatus. Instead of this, the present invention is also applicable to film forming apparatuses such as CVD apparatuses and sputtering apparatuses. In this case, a process gas for film formation (reaction gas or argon gas for sputtering) is supplied from the gas supply line 43 into the vacuum chamber 10, and by adjusting the capacitance value of the resonance circuit 53 so that the bias voltage becomes minimum, the amount of incident ions on the substrate to be film-formed can be maximized, and effects such as improvement of the coverage of the gap filling film formation can be obtained.

Explanation of Symbols

[0052] 10…Vacuum chamber 20…Stage 30…Opposing electrode 43…Gas supply line 51…First high-frequency power supply circuit 52…Second high-frequency power supply circuit 55…Control unit 61…Ground shield 100…Plasma processing apparatus 510…Power supply line 511…Impedance matching circuit 512…Voltage measurement unit 513…Resonant circuit

Claims

1. A vacuum chamber, A stage for supporting a substrate, which is disposed inside the vacuum chamber and connected to a first high-frequency power supply circuit that supplies high-frequency power of a first frequency, An opposing electrode that is disposed opposite to the stage and connected to a second high-frequency power supply circuit that supplies high-frequency power of a second frequency, A resonance circuit that is connected between a power supply line connecting the stage and the first high-frequency power supply circuit and a ground potential, and that allows the high-frequency current of the second frequency from the opposing electrode to pass through comprising The first high-frequency power supply circuit includes an impedance matching circuit connected to a first high-frequency power supply, a filter circuit that blocks the input of the high-frequency power of the second frequency applied to the power supply line, and a voltage measurement unit that is connected between the impedance matching circuit and the stage and measures the high-frequency voltage output from the impedance matching circuit to the stage. The resonance circuit is connected to the power supply line between the stage and the filter circuit A plasma processing apparatus.

2. The plasma processing apparatus according to Claim 1, wherein the resonance circuit is adjusted such that the resonance frequency between the substrate surface on the stage and the ground potential becomes the second frequency A plasma processing apparatus.

3. The plasma processing apparatus according to Claim 1 or 2, wherein the resonance circuit is an LC series resonance circuit including a coil and a capacitor A plasma processing apparatus.

4. The plasma processing apparatus according to Claim 3, wherein the voltage measurement unit is connected between the impedance matching circuit and the filter circuit A plasma processing apparatus.

5. The plasma processing apparatus according to claim 4, wherein the capacitor is a variable capacitor whose capacitance value can be adjusted, the plasma processing apparatus further includes a control unit that controls the capacitance value of the capacitor so that the voltage value measured by the voltage measurement unit is minimized. Plasma processing apparatus.

6. The plasma processing apparatus according to claim 1, wherein it further includes an earth shield installed between the peripheral surface of the counter electrode and the inner wall surface of the vacuum chamber. Plasma processing apparatus.

7. The plasma processing apparatus according to claim 1, wherein the second frequency is higher than the first frequency. Plasma processing apparatus.

8. The plasma processing apparatus according to claim 1, wherein it further includes a gas supply line for supplying etching gas or film-forming gas to the vacuum chamber. Plasma processing apparatus.

9. A control method for a plasma processing apparatus according to claim 1, wherein the resonance circuit is an LC series resonance circuit including a coil and a variable capacitor, measure the high-frequency voltage of the first frequency input to the stage, and control the capacitance value of the variable capacitor so that the high-frequency voltage is minimized. Control method for a plasma processing apparatus.

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