Symbolizing device and symbolizing method

Abstract

This encoding device comprises: a quantization circuit that generates a quantization parameter including first information related to a codebook of vector quantization and second information related to code vectors included in the codebook; and a control circuit that, on the basis of the number of bits useable for encoding, among a plurality of sub-vectors, sub-vectors including at least a target sub-vector, determines whether to use, for vector quantization, first encoding of the first information for the target sub-vector or second encoding of a second number of bits based on the difference between an allocated number of bits for vector quantization and the number of bits of the quantization parameter.

Description

Technical Field

[0001] The present disclosure relates to an encoding device, a decoding device, an encoding method, and a decoding method.

Background Art

[0002] One of the quantization methods in audio or voice encoding (for example, encoding of an excitation signal) is multi-rate lattice vector quantization (see, for example, Non-Patent Document 1). Multi-rate lattice vector quantization may be applied to, for example, split vector quantization (for example, also called split multi-rate lattice vector quantization or divided multi-rate lattice vector quantization). Further, split multi-rate lattice vector quantization may be applied to, for example, algebraic vector quantization (AVQ) (also called).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Non-Patent Documents

[0004]

Non-Patent Document 1

Summary of the Invention

[0005] However, there is room for study on a method for reducing the number of encoding bits in multi-rate lattice vector quantization.

[0006] Non-limiting embodiments of the present disclosure contribute to providing an encoding device, a decoding device, an encoding method, and a decoding method for reducing the number of encoding bits in vector quantization.

[0007] An encoding device according to an embodiment of the present disclosure includes a quantization circuit that generates quantization parameters including information regarding a codebook of vector quantization, and based on the number of bits available for encoding sub-vectors in the vector quantization, determines which of a first encoding of the information for a target sub-vector and a second encoding based on the difference between the number of assigned bits of the vector quantization and the number of bits of the quantization parameters is to be performed.

[0008] These general or specific aspects may be implemented in a system, an apparatus, a method, an integrated circuit, a computer program, or a recording medium, or may be implemented in any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0009] According to an embodiment of the present disclosure, the number of encoding bits can be reduced in multi-rate lattice vector quantization.

[0010] Further advantages and effects in an embodiment of the present disclosure will be clarified from the specification and the drawings. Such advantages and / or effects are provided by some embodiments and the features described in the specification and the drawings respectively, but it is not necessarily required that all be provided to obtain one or more identical features.

Brief Description of the Drawings

[0011]

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Embodiments for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings.

[0013] For example, in split multi-rate lattice vector quantization, a signal in the time domain or frequency domain (or spectral domain) is divided into a plurality of sub-vectors (SV: sub-vector, also referred to as a sub-band or sub-block), and multi-rate lattice vector quantization may be performed on each of the plurality of divided sub-vectors.

[0014] FIG. 1 is a diagram showing an example of a list of codebooks (or called codebooks) in multi-rate lattice vector quantization for sub-vectors (see, for example, Patent Document 1 or Non-Patent Document 1).

[0015] For example, as shown in FIG. 1, the quantization parameters in split multi-rate lattice vector quantization may include information for identifying the codebook used for quantization (for example, referred to as "codebook indicator" or codebook index), and information for identifying the selected code vector among the plurality of code vectors included in the codebook (for example, referred to as "code vector index").

[0016] For example, in each of the codebooks Q0, Q2, Q3, Q4, Q5, …, Qn shown in FIG. 1, for encoding (or quantization) of one subvector (SV), 1, 10, 15, 20, 25, …, 5n bits (n is an integer greater than or equal to 2) may be used. Among the number of bits used for encoding using each codebook (for example, the total number of bits used), 1, 2, 3, 4, 5, …, n bits (n is an integer greater than or equal to 2) may be used for the codebook indication value. In other words, in FIG. 1, the ratio of the number of bits allocated to the encoding of the codebook indication value to the total number of bits used for encoding using each codebook (for example, 5n, where n is an integer greater than 1) may be 1 / 5.

[0017] Note that the codebook Q0 may include one vector (for example, a zero vector or a null vector). The zero vector means that, for example, the quantization value of the vector is 0. Thus, in the codebook Q0, the code vector index may not be defined, and the number of bits used for the code vector index may be 0. In the codebook Q0, for example, 1 bit may be used for the codebook indication value.

[0018] For example, an encoder may collectively encode a plurality of subvectors (for example, 8 SVs in Non-Patent Document 1) using the codebook shown in FIG. 1. Note that the number of bits available for encoding a plurality of subvectors (for example, referred to as the “total number of bits”) may be known between the encoder and the decoder.

[0019] For example, Patent Document 1 proposes, as an example, a method for reducing bits in split multi-rate lattice vector quantization for 8 SVs. For example, based on the number of bits used for 7 of the 8 SVs, the codebook indication value (codebook index) used for the remaining 1 SV may be estimated according to the following formula (1) (for example, refer to Patent Document 1).

Equation

[0020] In Equation (1), cb’fix represents an estimated value of the number of bits used for the codebook indication value for one SV (for example, subvector number i = Pfix), and Bits available represents the total number of bits available for encoding 8 SVs, and ΣBits cbvi represents the sum of the number of bits used for encoding the other 7 subvectors vi (i ≠ Pfix) different from the subvector number i = Pfix (for example, the total number of bits used in FIG. 1).

[0021] In Patent Document 1, for example, for one SV (for example, i = Pfix), the encoding device quantizes (or encodes) the difference between the estimated value cb’fix of the number of bits used for the codebook indication value shown in Equation (1) and the number of bits of the actual codebook indication value, and transmits the difference information to the decoding device. For example, the larger the codebook number n used for one SV, the smaller the amount of information (for example, the number of bits) of the above-described difference information compared to the codebook indication value, and the encoding bit number can be reduced.

[0022] However, in Patent Document 1, for example, there is a case where the difference information (in other words, the encoding target) becomes a negative number (for example, -1), and since a quantization level or code corresponding to the negative number is used, the complexity of encoding (or quantization) can increase.

[0023] Also, when encoding a specified one SV using the codebook Q0 (for example, the codebook indication value “0”) or the codebook Q2 under special conditions (for example, the codebook indication value “1”), there is a possibility that the encoding bit number cannot be reduced.

[0024] Here, the special case may be, for example, a case where there are no bits not used for encoding among all the bits available for encoding, and all bits are used for encoding. In this case, for example, in FIG. 1, among the plurality of bits indicating the codebook indication value of each codebook, the trailing "0" (which may also be called a stop bit, for example) may be omitted. For example, in the special case, the codebook indication value of codebook Q2 may be "1" (1 bit) obtained by omitting "0" from "10".

[0025] Also, for example, focusing on bit reduction of an SV with a larger number of bits used for encoding among a plurality of SVs, there may be a possibility that the number of encoding bits cannot be reduced when an SV with the number of bits used for encoding becoming 0 (for example, an SV that cannot be encoded due to insufficient available bits) occurs. Note that an SV with the number of bits used for encoding becoming 0 is likely to be a high-frequency SV among a plurality of SVs (for example, the 6th, 7th, or 8th SV among 8 SVs), for example.

[0026] Therefore, in one embodiment of the present disclosure, a method for reducing the number of encoding bits used for encoding the codebook indication value (in other words, variable-length code) of multi-rate lattice vector quantization (LVQ: Lattice VQ) applied to split vector quantization (for example, SVQ: Split VQ) will be described.

[0027] Note that hereinafter, as an example, multi-rate lattice vector quantization will be described for an Enhanced Voice Services (EVS) codec used as AVQ. Also, here, an example where AVQ is used for vector quantization of discrete cosine transform (DCT: Discrete Cosine Transform) coefficients will be described, but it is not limited to quantization and encoding of DCT coefficients (in other words, frequency domain). For example, AVQ (or multi-rate lattice vector quantization) is also applicable to vector quantization in the time domain.

[0028] Next, as an example, the case where the number of divisions into sub-vectors in AVQ is set to eight (for example, SV1 to SV8) will be described below. Note that the number of divisions of the sub-vectors is not limited to eight, and other numbers may be used.

[0029] (Embodiment 1) [Configuration Example of Encoding Device] FIG. 2 is a block diagram showing a configuration example of an Algebraic Code Excited Linear Prediction (ACELP) encoding device of an EVS codec (for example, Figure 29 of Non-Patent Document 1). Further, FIG. 3 is a block diagram showing signal processing related to the AVQ encoding unit (for example, AVQ encoder) in FIG. 2. One embodiment of the present disclosure is applicable to, for example, the encoding of codebook index values (Codebook Indices) output from the AVQ encoding units (AVQ enc block or Split Lattice VQ block) of FIGS. 2 and 3.

[0030] FIG. 4 is a block diagram showing a configuration example of signal processing related to an AVQ encoding unit (hereinafter, referred to as an "encoding device" for convenience) 100 according to an embodiment of the present disclosure. The encoding device 100 shown in FIG. 4 may include a multiplication unit 101, a subtractor 102, a de-emphasis unit 103, a DCT unit 104, an AVQ encoding unit (or split multi-rate lattice vector quantization unit) 105 (for example, corresponding to a quantization circuit), a floating-point number management unit 106, an inverse DCT (iDCT: inverse DCT) unit 107, a sub-vector identification unit 108, a code conversion unit 109 (for example, corresponding to a control circuit), and a multiplexing unit 110.

[0031] The multiplication unit 101 may multiply, for example, an adaptive codebook vector v(n) input from an adaptive codebook by an adaptive codebook gain (or pitch gain) gp and output the multiplication result to the subtractor 102.

[0032] The subtractor 102 subtracts, for example, the adaptive codebook vector after being multiplied by the adaptive codebook gain input from the multiplier 101 from the linear prediction residual signal r(n) which is the coding target in ACELP coding, and may determine (for example, calculate) the excitation residual signal q in (n). The excitation residual signal q in (n) may be calculated, for example, based on the following formula (2). The subtractor 102 may output the excitation residual signal q in (n) to the de-emphasis unit 103.

Equation

[0033] The de-emphasis unit 103 is, for example, a de-emphasis filter Fp(z), and may perform de-emphasis processing on the excitation residual signal q in (n) input from the subtractor 102. The de-emphasis unit 103 may output the excitation residual signal q in,d (n) after de-emphasis processing to the DCT unit 104.

[0034] The DCT unit 104 may convert the excitation residual signal q in,d (n) input from the de-emphasis unit 103 into DCT coefficients and output the DCT coefficients to the AVQ coding unit 105. Note that the method of converting a signal in the time domain into a signal in the frequency domain is not limited to DCT processing, and other methods such as discrete Fourier transform (DFT: Discrete Cosine Transform) or modified discrete cosine transform (MDCT: Modified Discrete Cosine Transform) may also be used.

[0035] The AVQ coding unit 105 may perform split lattice vector quantization (or AVQ coding) on the DCT coefficients of the excitation residual signal q in,d (n) input from the DCT unit 104.

[0036] For example, the AVQ encoder 105 may divide the DCT coefficients into a plurality of sub-vectors (SVs), quantize each of the plurality of sub-vectors, and generate quantization parameters including a codebook number (also referred to as a codebook indication value or a codebook index) indicating a codebook, and a codevector index indicating any one of the plurality of codevectors included in the codebook.

[0037] Also, the AVQ encoder 105 may, for example, in each sub-frame of encoding, determine the number of bits or bit allocation (AVQ bit budget) allocated to AVQ based on the sum of a fixed number of bits (or a predetermined number of bits, fixed bit-budget) and a floating number of bits (e.g., the additional available number of bits) (floating bit-budget) input from the floating bit number management unit 106, and output it to the code conversion unit 109. Further, the AVQ encoder 105 may, for example, output information regarding the floating bit-budget updated based on the number of bits remaining after AVQ to the floating bit number management unit 106.

[0038] The AVQ encoder 105 may, for example, output the sign of the global gain (Global Gain code) among the quantization parameters obtained by quantization to the multiplexing unit 110. Also, the AVQ encoder 105 may, for example, output the codebook indication value (Codebook numbers) of each sub-vector, the codevector index of each sub-vector, and the number of bits (AVQ bit budget) allocated to AVQ to the code conversion unit 109. Further, the AVQ encoder 105 may, for example, output the DCT coefficients of the quantized excitation residual signal q in,d (n) to the inverse DCT unit 107.

[0039] The floating bits manager 106 may hold (or manage) information regarding the number of bits available within the encoding process frame based on the information regarding the floating number of bits input from the AVQ encoder 105. For example, the floating bits manager 106 may output the number of bits to be held as the floating number of bits to the AVQ encoder 105 in the AVQ encoding of subsequent sub-frames.

[0040] The inverse DCT unit 107 may perform an inverse DCT transformation on the DCT coefficients q in,d (n) and output the quantized excitation residual signal q d (n).

[0041] The sub-vector identification unit 108 may identify a dominant sub-vector from among a plurality of sub-vectors, for example, based on the input adaptive codebook vector v(n). The sub-vector identification unit 108 may output information regarding the position of the dominant sub-vector (for example, dominant sub-vector information) to the code conversion unit 109. For example, here, since the object of quantization or encoding in the AVQ encoder 105 is the DCT coefficients, the sub-vector identification unit 108 may convert the adaptive codebook vector v(n) into DCT coefficients and identify the position (or frequency) of the sub-vector having the maximum energy in the DCT coefficient region (or frequency region) of the adaptive codebook vector v(n). Note that when the object of quantization or encoding in the AVQ encoder 105 is a signal in the time domain, the sub-vector identification unit 108 may not perform the conversion of the adaptive codebook vector v(n) into DCT coefficients.

[0042] Further, the sub-vector specifying unit 108 may be, for example, a memory that outputs information regarding the positions of specific sub-vectors determined in advance to the code conversion unit 109 regardless of the adaptive codebook vector v(n). In this case, since the positions of the specific sub-vectors are fixed, for example, when an embodiment of the present disclosure is implemented by a software program, the positions of the specific sub-vectors may be written in the program. For example, the sub-vector specifying unit 108 may set the third sub-vector or the last sub-vector among a plurality (for example, eight) of sub-vectors as the specific sub-vector. Note that the specific sub-vector is not limited to the third sub-vector and the last sub-vector, and may be sub-vectors in other orders. For example, the position of the specific sub-vector may be set to a position (for example, the highest position) where the probability (frequency) of the codebook number becoming larger is higher, which is examined experimentally or statistically.

[0043] The code conversion unit 109 (Codebook indications conversion) may convert the encoded information of the codebook number of a specific sub-vector (for example, the sub-vector to be code-converted) based on, for example, the codebook number and the code vector index of each of the plurality of sub-vectors input from the AVQ encoding unit 105, the information regarding the number of bits (AVQ bit-budget) assigned to the AVQ of one sub-frame, and the main sub-vector information input from the sub-vector specifying unit 108.

[0044] For example, when the number of sub-vectors is eight, the code conversion unit 109 may output, for example, the encoded information including the codebook index values (Codebook index) and the code vector indices of the eight sub-vectors to the multiplexing unit 110, or may output the encoded information including the codebook index values of the seven sub-vectors, the indication value regarding one unused bit number (for example, referred to as the unused bit number indication value), and the code vector indices of the eight sub-vectors to the multiplexing unit 110.

[0045] The multiplexing unit 110 may multiplex the global gain input from the AVQ encoding unit 105 and the encoded information input from the code conversion unit 109, and output the multiplexed bit stream information (e.g., AVQ code).

[0046] Next, an operation example of the encoding apparatus 100 will be described.

[0047] [Example of Selection of Sub-Vector to be Code-Converted] The code conversion unit 109 may select, for example, a sub-vector to be code-converted (also referred to as a target sub-vector) based on the main sub-vector information (e.g., information indicating the sub-vector specified as the main sub-vector) input from the sub-vector specifying unit 108 and the number of bits assigned to the AVQ of one sub-frame (the number of assigned bits for vector quantization) input from the AVQ encoding unit 105.

[0048] FIG. 5 is a diagram showing an example of the sub-vector selection process for code conversion.

[0049] In FIG. 5, the code conversion unit 109 determines, for example, the number of AVQ bits (AVQ bit-budget) available in a sub-frame (e.g., AVQ sub-frame) (S101).

[0050] The code conversion unit 109 determines, for example, whether the AVQ bit-budget exceeds a threshold Threshold (S102). For the threshold, for example, 85 [bit / subframe] may be set, or other values may be set. The threshold may be set experimentally or statistically, for example.

[0051] When the AVQ bit-budget exceeds the threshold (S102: Yes), the code conversion unit 109 may select, as the sub-vector to be code-converted, the sub-vector specified by the main sub-vector information from among a plurality of sub-vectors (S103).

[0052] On the other hand, when the AVQ bit-budget is below the threshold (S102: No), the transcoding unit 109 may, for example, set the last sub-vector (e.g., the 8th sub-vector SV8) among a plurality of sub-vectors as the sub-vector to be transcoded (S104).

[0053] The transcoding unit 109 may, for example, apply the transcoding process described later to the selected sub-vector to be transcoded.

[0054] The selection example of the sub-vector to be transcoded has been described above.

[0055] Note that the selection process of the sub-vector to be transcoded may be performed by the sub-vector identification unit 108 instead of the transcoding unit 109. In this case, information regarding the AVQ bit-budget may be input to the sub-vector identification unit 108. For example, the sub-vector identification unit 108 may output main sub-vector information regarding the selected sub-vector to the transcoding unit 109 as the sub-vector to be transcoded.

[0056] [Transcoding Example] Next, an example of the transcoding process in the transcoding unit 109 will be described.

[0057] For example, the transcoding unit 109 may perform the following processes of Step 1 to Step 3 based on each codebook indication value of a plurality of sub-vectors input from the AVQ encoding unit 105 and the selected sub-vector to be transcoded.

[0058] (Step 1) The code conversion unit 109 sets, for example, the codebook indication values of other sub-vectors (e.g., N - 1 sub-vectors) at positions different from the sub-vector to be code-converted among a plurality (e.g., N) of codebook indication values as signs (or encoded codes). Then, the code conversion unit 109 may calculate, for example, the sum of the number of bits used for the codebook indication values and the number of bits used for the code vector index in the N - 1 sub-vectors.

[0059] (Step 2) The code conversion unit 109 may calculate, for example, the number of bits available for use in the codebook indication value of the sub-vector to be code-converted. For example, the code conversion unit 109 may calculate the number of bits available for encoding the codebook indication value of the sub-vector to be code-converted by subtracting the sum of the number of bits used for encoding the N - 1 sub-vectors calculated in (Step 1) from the total number of bits available for AVQ encoding (AVQ bit-budget).

[0060] (Step 3) The code conversion unit 109 may calculate, for example, the number of bits not used for encoding (e.g., referred to as the number of unused bits) among the number of bits available for encoding the sub-vector to be code-converted calculated in (Step 2), and encode the number of unused bits. For example, the code conversion unit 109 may calculate the number of unused bits by subtracting the sum of the number of bits used for the codebook indication value and the number of bits used for the code vector index of the sub-vector to be code-converted from the number of available bits calculated in (Step 2).

[0061] The code conversion unit 109 may output, for example, the codebook indication value (encoded code) obtained by (Step 1) to (Step 3) and the information obtained by encoding the number of unused bits (e.g., also referred to as the number of unused bits indication value or the number of unused bits encoded code) to the multiplexing unit 110.

[0062] Next, an operation example of the code conversion unit 109 will be described.

[0063] FIG. 6, FIG. 7, and FIG. 8 are flowcharts showing processing examples of the code conversion unit 109.

[0064] In FIG. 6, the code conversion unit 109 may classify, for example, a plurality of sub-vectors to be encoded into two groups (S201). For example, when the number of sub-vectors to be encoded is 8 (for example, SV1 to SV8), the code conversion unit 109 may divide the 8 sub-vectors into two groups as follows. Group1: SV1 to SV5, excluding the sub-vector (SVd) selected as the code conversion target. Group2: SV6 to SV8, and SVd

[0065] For example, when the sub-vector SVd = SV3 to be encoded, Group1 may include SV1, SV2, SV4, and SV5, and Group2 may include SV6 to SV8 and SV3. Also, for example, when the sub-vector SVd = SV8 to be encoded, Group1 may include SV1 to SV5, and Group2 may include SV6 to SV83. Note that SVd is not limited to SV3 or SV8.

[0066] The code conversion unit 109 may, for example, sequentially encode the codebook index and the code vector index of the sub-vectors classified into Group1 (S202). Then, the code conversion unit 109 may output, for example, the encoding information (codebook index and code vector index) of the sub-vectors included in Group1 to the multiplexing unit 110. Also, the code conversion unit 109 may calculate, for example, the number of bits used for encoding Group1 (for example, represented as BITSgroup1) (S202). Also, the code conversion unit 109 may determine, for example, the number of bits available for encoding the sub-vectors classified into Group2 (for example, BITSgroup2) based on the following equation (3) (S202). (BITSgroup2)=(AVQ bit-budget)-(BITSgroup1) (3)

[0067] The code conversion unit 109 may, for example, determine whether BITSgroup2 exceeds a threshold Threshold1 (S203).

[0068] When BITSgroup2 exceeds the threshold Threshold1 (S203: Yes), the code conversion unit 109 may proceed to the process shown in FIG. 7 (for example, the process of S205).

[0069] On the other hand, when BITSgroup2 is less than or equal to the threshold Threshold1 (S203: No), the code conversion unit 109 may determine the encoding order of the sub-vectors in Group2 as follows and encode the sub-vectors in the determined order (S204). When SVd is any one of SV1 to SV5: SVd, SV6, SV7, SV8 In other cases: SV6, SV7, SV8

[0070] Then, the code conversion unit 109 outputs the encoding information including the codebook indication value and the code vector index of each sub-vector of Group2 to the multiplexing unit 110 and ends the code conversion process.

[0071] In FIG. 7, when SVd is not SV6, for example, the code conversion unit 109 may update Group2 by removing SV6 from Group2, encode SV6, and output the encoding information including the codebook number code vector index of SV6 to the multiplexing unit 110 (S205). Further, the code conversion unit 109 may, for example, calculate the number of bits used for encoding SV6 and subtract the calculated number of bits from BITSgroup2 to update BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding the SVs excluding SV6 from Group2.

[0072] Note that when SVd is SV6, neither Group2 nor BITSgroup2 needs to be changed (or updated).

[0073] Next, the code conversion unit 109 may determine, for example, whether BITSgroup2 exceeds a threshold value Threshold2 (S206).

[0074] If BITSgroup2 exceeds the threshold value Threshold2 (S206: Yes), the code conversion unit 109 may proceed to the process shown in FIG. 8 (for example, the process of S208).

[0075] On the other hand, if BITSgroup2 is less than or equal to the threshold value Threshold2 (S206: No), the code conversion unit 109 may determine the encoding order of the sub-vectors in Group2 as follows, and encode the sub-vectors in the determined order (S207). When SVd is any one of SV1 to SV6: SVd, SV7, SV8 In other cases: SV7, SV8

[0076] Then, the code conversion unit 109 outputs the encoding information including the codebook indication value and the code vector index of each sub-vector of Group2 to the multiplexing unit 110, and ends the code conversion process.

[0077] In FIG. 8, for example, when SVd is not SV7, the code conversion unit 109 may update Group2 by removing SV7 from Group2, encode SV7, and output the encoding information including the codebook number code vector index of SV7 to the multiplexing unit 110 (S208). Further, the code conversion unit 109 may calculate, for example, the number of bits used for encoding SV7, and subtract the calculated number of bits from BITSgroup2 to update BITSgroup2. In other words, the updated BITSgroup2 may indicate the number of bits available for encoding the SVs excluding SV7 from Group2.

[0078] Note that when SVd is SV7, neither Group2 nor BITSgroup2 needs to be changed (or updated).

[0079] Next, the code conversion unit 109 may determine, for example, whether BITSgroup2 exceeds the threshold Threshold3 (S209).

[0080] When BITSgroup2 is less than or equal to the threshold Threshold3 (S209: No), the code conversion unit 109 may determine the encoding order of the sub-vectors in Group2 as follows and encode the sub-vectors in the determined order (S210). If SVd is any one of SV1 to SV7: SVd, SV8 In other cases: SV8

[0081] Then, the code conversion unit 109 outputs the encoding information including the codebook indication value and the code vector index of each sub-vector in Group2 to the multiplexing unit 110, and ends the code conversion process.

[0082] On the other hand, when BITSgroup2 exceeds the threshold Threshold3 (S209: Yes), the code conversion unit 109 may determine the encoding order of the sub-vectors in Group2 as follows and encode the sub-vectors in the determined order (S211). If SVd is any one of SV1 to SV7: SV8, SVd In other cases: SV8

[0083] Then, the code conversion unit 109 outputs the encoding information including the codebook indication value and the code vector index of SV8 and the indication value of the number of unused bits to the multiplexing unit 110, and ends the code conversion process. In other words, the code conversion unit 109 may output the encoding information of the number of unused bits to the multiplexing unit 110 instead of the encoding information of the codebook indication value of SVd.

[0084] Note that when SVd is SV8, the code conversion unit 109 may output, for example, either the codebook indication value of SV8 and the indication value of the number of unused bits or the code vector index to the multiplexing unit 110. Either the codebook indication value or the indication value of the number of unused bits may be predetermined.

[0085] In this way, the code conversion unit 109 may determine which of the encoding of the codebook number of SVd and the encoding of the unused number of bits to perform based on the number of bits available for encoding in Group2. For example, when the number of bits available for encoding in Group2 is less than or equal to a threshold value (for example, Threshold1, Threshold2, or Threshold3), the code conversion unit 109 may determine the encoding of the codebook number (in other words, the output of the codebook indication value), and when the number of bits available for encoding in Group2 exceeds the threshold value, the code conversion unit 109 may determine the encoding of the unused number of bits (in other words, the output of the unused number of bits indication value).

[0086] Here, in FIGS. 6, 7, and 8, the threshold values Threshold1, Threshold2, and Threshold3 may be set as follows.

[0087] For example, based on the number of bits fixedly assigned to AVQ, the average number of bits assigned per subvector is represented as "BITSsv".

[0088] In the above-described example, for example, Threshold1 may be set to 4 × BITSsv when SVd is any one of SV1 to SV5, and may be set to 3 × BITSsv when SVd is any one of SV6 to SV8.

[0089] Also, for example, Threshold2 may be set to 3 × BITSsv when SVd is any one of SV1 to SV6, and may be set to 2 × BITSsv when SVd is any one of SV7 to SV8.

[0090] Also, for example, Threshold3 may be set to 2 × BITSsv when SVd is any one of SV1 to SV7, and may be set to BITSsv when SVd is SV8.

[0091] Thus, the number of bits obtained by multiplying the number of SVs classified into Group2 by BITSsv may be set as a threshold value.

[0092] [Example of Encoding Unused Bit Number] Next, an example of encoding the number of unused bits in the code conversion unit 109 (for example, the process of S211 in FIG. 8) will be described.

[0093] FIG. 9 is a flowchart showing an example of the encoding process of the number of unused bits in the code conversion unit 109.

[0094] In FIG. 9, the code conversion unit 109 determines, for example, whether the encoding result (for example, the codebook number) of SV8 is zero (S301). In other words, the code conversion unit 109 may determine whether SV8 is a null vector (or a zero vector). The process of S301 is, for example, in the AVQ encoding used in the EVS standard, when the encoding result of SV8 is zero and the number of bits available for use in AVQ has been used up for encoding the subvector, to determine whether the encoding of the code 0 of SV8 has been terminated (for example, when SV8 is encoded with 0 bits).

[0095] When SV8 is not zero (S301: No), the code conversion unit 109 may set, for example, the number of bits obtained by subtracting the number of bits used for encoding the codebook number of SVd from the number of bits available for encoding the codebook number of SVd as the "number of unused bits" (S302).

[0096] Note that even when SV8 is not zero, there is a case where the end (for example, stop bit 0) of the codebook indication value of the encoding result of SV8 is truncated in AVQ encoding. In this case, the number of bits used for encoding SVd is reduced by 1 bit, but the 1-bit shortage may be covered by truncating the stop bit 0 in the encoding of SVd, or may be covered by the number of bits saved by applying an embodiment of the present disclosure.

[0097] Also, for example, when the encoding result of SV8 is zero and stop bit 0 is truncated, SV7 or SV6 may also be truncated (for example, SV7 or SV6 is encoded with 0 bits). In this way, when two or more SVs are truncated, 1 bit (for example, codebook indication value 0) is assigned to the encoding of each of the two or more SVs. Therefore, the number of bits available for encoding SVd can be reduced by 2 bits or more. Such a case can be detected based on whether the number of bits available for encoding SVd is an odd number of bits as the number of bits used for encoding SVs (for example, whether it is different from a multiple of 5).

[0098] As described above, in the encoding of the unused bit number, the encoding order of SVd is set (in other words, swapped) at the end of the sub-vectors included in Group2. Here, in FIG. 9, when SV8 is zero (S301: Yes), for example, among the SVs encoded before SVd, there may be an SV encoded with 0 bits (for example, an SV with an assigned bit number of 0 and not encoded). For example, when encoding the unused bit number instead of encoding SVd as in the process of S211 in FIG. 8, other SVs may be encoded before SVd. When the SV encoded before SVd is an SV encoded with 0 bits, 1 bit (for example, the codebook indication value 0 shown in FIG. 1) for encoding 0 for one SV is consumed (or wasted), and the number of bits available for encoding SVd (or the unused bit number) can be reduced (or insufficient). Hereinafter, the bit wasted for an SV encoded with 0 bits is referred to as a "wasted bit".

[0099] Note that when SV8 (or an SV before SV8) is encoded with 0 bits, all the bits assigned to AVQ encoding are used up, so the number of unused bits is 0.

[0100] Therefore, if there is a difference between the number of bits available for encoding SVd (e.g., the remaining number of bits) and the number of bits used for encoding SVd, this difference may correspond to the number of SVs encoded with zero bits. Also, for example, as shown in FIG. 1, when the codebook number is 2 or more, the number of bits used for encoding SVd is a multiple of 5.

[0101] For example, the code conversion unit 109 may add the number of wasted bits to the number of bits available for encoding SVd (e.g., the remaining number of bits) to update the number of bits available for encoding SVd to a multiple of 5 (S303). Also, the code conversion unit 109 may, for example, determine that the number of unused bits is zero.

[0102] In this way, the code conversion unit 109 may calculate, for example, the number of wasted bits and add the wasted bits to the number of bits available for encoding SVd, so as to calculate the number of unused bits based on the number of bits available for encoding SVd in the original (in other words, when the encoding order of SVd is not rearranged) in the case where wasted bits occur. In other words, the code conversion unit 109 may update the number of bits available for encoding SVd based on the consecutive number of subvectors with a quantization parameter of a null vector among subvectors different from SVd of Group2.

[0103] Next, the code conversion unit 109 may encode (e.g., convert to an indication value) the number of unused bits obtained in the process of S302 or S303 (S304). FIG. 10 is a diagram showing an example of encoding the number of unused bits. In FIG. 10, although the number of unused bits different from 0 bits has a width, since the number of bits used for encoding is defined as a multiple of 5 (or 1), a unique number of bits can be derived according to the number of bits available at the time of decoding.

[0104] As an example, when the number of available bits is 13 bits and the code (indication value) of the unused bits is "10", if there are no wasted bits, in order for the number of bits excluding the unused bits to be a multiple of 5, the number of unused bits can be specified as 3 bits.

[0105] Whether there are waste bits can be determined, for example, by whether the decoded SV8 is a zero vector, the remainder when the number of available bits is divided by 5 (e.g., the remainder by 5, modulo 5) (hereinafter also referred to as, for example, "remaining bit number"), and the number of consecutive decoded SVs that become zero vectors including SV8. For example, when SV8 is not a zero vector, no waste bits occur. Also, for example, waste bits occur when the number of unused bits is 0. The number of waste bits can be specified, for example, by the number of consecutive decoded SVs that become zero vectors including SV8 and the remainder by 5 of the number of available bits (e.g., remaining bit number).

[0106] The number of unused bits in the case where waste bits occur can be determined, for example, as follows.

[0107] As an example, when the number of bits available for encoding SVd is 12 bits and the decoded values of three consecutive SVs including SV8 are zero vectors (null vectors), the 3 bits (e.g., 5 - (12 modulo 5) = 3) used for encoding the three zero vectors (e.g., SV6 to SV8) during the rearrangement of the encoding order of SVd are waste bits. Thus, 15 bits obtained by adding 3 bits to 12 bits is the number of bits available for encoding SVd. As a result, the number of bits available for encoding SVd becomes equal to the number of bits used for encoding SVd (e.g., a multiple of 5), and the number of unused bits becomes zero.

[0108] As another example, the number of bits available for encoding SVd is 13 bits, the decoded values of three consecutive SVs (e.g., SV6 to SV8) including SV8 are zero vectors (null vectors), SV6 is encoded with 1 bit, and SV7 and SV8 are encoded with 0 bits (e.g., zero vectors without encoding). In this case, among the 3 bits used for encoding the three zero vectors (encoding of SV6 to SV8) when rearranging the encoding order of SVd, at least 2 bits (e.g., 5 - (13 modulo 5) = 2) are wasted bits. Therefore, 15 bits obtained by adding 2 bits to 13 bits is the number of bits available for encoding SVd. As a result, the number of bits available for encoding SVd becomes equal to the number of bits used for encoding SVd (e.g., a multiple of 5), and the number of unused bits becomes zero.

[0109] For example, when the number of unused bits is 0 bits, as shown in FIG. 10, the number of bits used for encoding is 1 bit. Also, for example, when the number of bits used for encoding SVd is 15 bits, as shown in FIG. 1, the codebook number = 3, and the number of bits used for encoding the codebook indication value is 3 bits. In the example described above, the number of bits used for encoding the number of unused bits is 1 bit, and the number of wasted bits is 2 bits, for a total of 3 bits. Therefore, when wasted bits occur, the number of bits used for encoding is the same when encoding the codebook indication value of SVd (e.g., 3 bits) and when encoding the number of unused bits (e.g., 1 bit + 2 wasted bits).

[0110] Thus, even when wasted bits occur, the encoding device 100 can suppress an increase in the number of bits used for encoding and encode the number of unused bits.

[0111] Note that since the number of unused bits when it is determined that waste bits have occurred is 0, the code conversion unit 109 may, for example, determine the number of unused bits to be 0 without calculating the difference from the number of bits used for encoding SVd after changing (or updating) the number of bits available for encoding SVd. Note that, for example, when decoding the codebook number of SVd by dividing the number of bits available for encoding SVd by 5, the number of bits available for encoding SVd may be changed as described above. Alternatively, the decoding procedure may be changed so as to decode the codebook number by adding 1 to the codebook number obtained by dividing the number of bits available for encoding SVd by 5 according to a case-by-case basis.

[0112] Also, the example shown in FIG. 10 shows an example in which the codes for the number of unused bits are assigned in ascending order of the number of unused bits, but the present invention is not limited thereto. For example, the codes may be assigned in descending order of the appearance frequency of the number of unused bits. For example, the codes with fewer bits may be assigned to the number of unused bits with a higher appearance frequency. Thereby, the number of bits used for encoding the number of unused bits can be reduced.

[0113] [Configuration Example of Decoding Device] FIG. 11 is a block diagram showing an example of signal processing related to an AVQ decoding unit (hereinafter, referred to as a “decoding device” for convenience) 200 according to an embodiment of the present disclosure. The decoding device 200 shown in FIG. 11 may include, for example, a separation unit 201, a subvector specifying unit 202, a code conversion unit 203 (corresponding to, for example, a control circuit), an AVQ decoding unit 204 (corresponding to, for example, an inverse quantization circuit), a floating point number management unit 205, and an inverse DCT unit 206.

[0114] In the decoding device 200, the bit stream transmitted from the encoding device 100 is input to the separation unit 201.

[0115] The separation unit 201 may separate, for example, from the AVQ code included in the input bit stream, a global gain code, codevector indices, codebook indices, and an unused-bit code or unused-bit index. The separation unit 201 may output, for example, the global gain code to the AVQ decoding unit 204 and output the codebook indices, codevector indices, and unused-bit code or unused-bit index to the code conversion unit 203.

[0116] The subvector specifying unit 202 may specify, for example, a main subvector from among a plurality of subvectors based on the input adaptive codebook vector v(n). The subvector specifying unit 202 may output, for example, information regarding the position of the main subvector (e.g., main subvector information) to the code conversion unit 203. For example, here, since the object of quantization or encoding in the encoding device 100 (e.g., the AVQ encoding unit 105) is the DCT coefficient, the subvector specifying unit 202 may convert the adaptive codebook vector v(n) into DCT coefficients and specify the position (or frequency) of the subvector having the maximum energy in the DCT coefficient region of the adaptive codebook vector v(n). Note that when the object of quantization or encoding in the encoding device 100 is a signal in the time domain, the subvector specifying unit 202 may not perform the conversion of the adaptive codebook vector v(n) into DCT coefficients.

[0117] The code conversion unit 203 may calculate, for example, a codebook index value of a sub-vector at a specific position (for example, a sub-vector to be code-converted) based on the information input from the separation unit 201 and the information input from the sub-vector identification unit 202. For example, the code conversion unit 203 may calculate a codebook index value of a sub-vector to be code-converted based on the codebook index value, the code vector index, and the unused bit number index value input from the separation unit 201, and the number of bits available for AVQ (for example, AVQ bit-budget) input from the AVQ decoding unit 204. The code conversion unit 203 may output the codebook index value and the code vector index of each sub-vector to the AVQ decoding unit 204.

[0118] For example, the code conversion unit 203 may perform the processes of steps 4 to 7 below.

[0119] (Step 4) The code conversion unit 203 may, for example, decode the codebook index value of another sub-vector different from the sub-vector to be code-converted based on the codebook index value. Also, the code conversion unit 203 may, for example, calculate the number of bits used for encoding a sub-vector different from the sub-vector to be code-converted (for example, the sum of the number of bits used for the codebook index value and the number of bits used for the code vector) based on the decoded codebook index value.

[0120] (Step 5) The code conversion unit 203 may, for example, decode the number of unused bits based on the unused bit number index value.

[0121] (Step 6) The code conversion unit 203 may, for example, calculate the number of bits for encoding the sub-vector to be code-converted based on the number of bits for encoding the sub-vector calculated in (Step 4) and the number of unused bits decoded in (Step 5).

[0122] (Step 7) The code conversion unit 203 may calculate (or decode) the codebook indication value of the sub-vector to be code-converted based on, for example, the number of encoded bits of the sub-vector to be code-converted calculated in (step 6).

[0123] The AVQ decoding unit 204 may decode (or inverse-quantize) the quantized DCT coefficients based on, for example, the global gain code input from the separation unit, the codebook indication value and the code vector index of each SV input from the code conversion unit 203, and the floating number of bits input from the floating number of bits management unit 205, and output them to the inverse DCT unit 206. Also, the AVQ decoding unit 204 may determine (for example, calculate) the number of bits allocated to AVQ based on, for example, the sum of the fixed number of bits (or a predetermined number of bits) and the floating number of bits input from the floating number of bits management unit 205, and output it to the code conversion unit 203. Further, the AVQ decoding unit 204 may output information regarding the floating number of bits updated based on, for example, the number of remaining bits after the AVQ decoding process to the floating number of bits management unit 205.

[0124] The floating number of bits management unit 205 may hold (or manage) information regarding the number of bits available in the decoding process frame based on the information regarding the floating number of bits input from the AVQ decoding unit 204. For example, the floating number of bits management unit 205 may output the number of bits to be held as the floating number of bits to the AVQ decoding unit 204 in the AVQ decoding of subsequent sub-frames.

[0125] The inverse DCT unit 206 may inverse-DCT-convert the decoded quantized DCT coefficients input from the AVQ decoding unit 204 to convert them into a time-domain signal, and output it as the decoded excitation residual signal q d (n).

[0126] As described above, in this embodiment, the encoding device 100 determines which of the encoding of the codebook number for the sub-vector to be code-converted based on the number of bits available for encoding the sub-vector in vector quantization, and the encoding based on the difference between the number of bits allocated for vector quantization and the number of bits of the quantization parameter (for example, the encoding for the number of unused bits) is to be performed.

[0127] In this way, by switching between the encoding of the codebook number and the encoding of the number of unused bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multi-rate lattice vector quantization, and the number of encoding bits can be reduced. Therefore, according to this embodiment, the number of encoding bits can be reduced in multi-rate lattice vector quantization.

[0128] Also, according to this embodiment, even when the sub-vector to be code-converted to the unused bit number indication value is a sub-vector different from the last sub-vector (for example, SV8) (in other words, when the encoding order is swapped), the encoding device 100 can accurately determine the number of unused bits according to the number of wasted bits that may occur due to the swapping of the encoding order. For example, when wasted bits occur, the encoding device 100 can accurately estimate the number of unused bits according to the number of wasted bits, so as to suppress errors due to insufficient encoding bits or reduction of the codebook number (for example, reduction of the accuracy of the codebook), and suppress the degradation of the encoding performance.

[0129] Note that, for example, even in the case of bit allocation where no wasted bits are generated even if the encoding order of the SVs is changed (for example, in the case of bit allocation where there is no SV encoded with 0 bits), if there is a case where wasted bits can be generated (for example, if an SV encoded with 0 bits can exist), the encoding bit allocation may be rearranged so that wasted bits are generated. As an example, in Group 2 including SVd, SV6, SV7, and SV8, a case where SV6, SV7, and SV8 are encoded with 0 (1 bit) and SVd is encoded with 10 bits (codebook number 2) and the number of bits available at the time of encoding SVd is 13 bits will be described. In this case, since each of SV6 to 8 is a zero vector, the encoding device 100 may set the bit assignment for SV6 to SV8 to 0 bits and assign the 3 bits assigned to SV6 to SV8 to the encoding bits of SVd (in other words, they may be reallocated). Note that wasted bits are generated (for example, 0-bit allocation is possible) when the number of unused bits is 0 bits, and since the sum of the remaining bit number and the number of consecutive zero vectors is limited to a multiple of 5, the subvectors for which 0-bit allocation is possible are SV7 and SV8. For this reason, the number of bits that can be reallocated to the encoding bits of SVd is 2 bits. In this case, the encoding device 100, for example, sets the number of available bits of SVd to 15 bits obtained by adding 2 bits to 13 bits, and encodes SVd with codebook number 3 (for example, 15 bits). In this case, the number of unused bits becomes zero. In this way, by rearranging the bit allocation, it is possible to surely determine the presence or absence of wasted bits on the decoding side and improve the encoding accuracy of SVd.

[0130] Also, according to the present embodiment, the decoding device 200 can identify encoding information regarding the sub-vector to be code-converted based on parameters such as, for example, the number of bits used for encoding and decoding information (e.g., the codebook indication value of a sub-vector different from the sub-vector to be code-converted). Therefore, for example, a signal (e.g., a flag or control information dedicated to switching) for switching between encoding for the codebook indication value and encoding for the number of unused bits does not have to be notified from the encoding device 100 to the decoding device 200.

[0131] (Embodiment 2) FIG. 12 is a block diagram showing a configuration example of an AVQ encoding unit (hereinafter, referred to as an “encoding device” for convenience) 300 according to an embodiment of the present disclosure. In FIG. 12, components that perform the same processing as the encoding device 100 shown in FIG. 4 are given the same reference numerals.

[0132] In FIG. 12, the sub-vector specifying unit 301 may output information regarding the position of a predetermined sub-vector (e.g., referred to as a target sub-vector, target sub-vector, or fixed sub-vector) to the code conversion unit 109. The predetermined sub-vector may be, for example, any one of eight sub-vectors (e.g., SV1 to SV8). For example, hereinafter, among the eight sub-vectors SV1 to SV8, the predetermined sub-vector will be described in the case of the third sub-vector (e.g., SV3) from the lower side in the frequency domain or the last sub-vector (e.g., SV8).

[0133] Note that the sub-vector specifying unit 301 does not have to perform any signal processing for specifying (designating) a sub-vector at a predetermined specific position, and for example, does not have to be explicitly provided as a component. In FIG. 12, as an example, the sub-vector specifying unit 301 may be a memory that holds the position of a predetermined sub-vector.

[0134] In the encoding device 300 shown in FIG. 12, the operations of the components different from the sub-vector specifying unit 301 may be the same as those of the encoding device 100 shown in FIG. 4.

[0135] Next, an operation example different from Embodiment 1 in the encoding device 300 will be described.

[0136] Note that the method of selecting the sub-vector to be code-converted may be the same as the method shown in FIG. 5. In the present embodiment, the code conversion unit 109 may use the position information of the sub-vector specified in advance instead of the main sub-vector information. Further, the selection process of the sub-vector may be performed by the sub-vector specifying unit 301 instead of the code conversion unit 109, for example. In this case, the AVQ bit-budget information may be input to the sub-vector specifying unit 301, and information regarding the selected sub-vector may be input to the code conversion unit 109 as the position information of the sub-vector.

[0137] FIGS. 13 to 16 show flowcharts showing operation examples in the encoding device 300. In FIGS. 13 to 16, as an example, an operation example in the encoding device 300 when the position of the sub-vector to be code-converted is the third sub-vector SV3 from the lower side in the frequency domain is shown.

[0138] In FIG. 13, the encoding device 300 classifies, for example, the sub-vectors SV1 to SV8 into Group 1 including SV1 and SV2 and Group 2 including five sub-vectors SV3 to SV8 (S401). For example, the encoding device 300 may classify the sub-vectors SV1 to SV8 into Group 1 including the sub-vectors before the sub-vector to be code-converted and Group 2 including the sub-vectors after the sub-vector to be code-converted. In other words, the encoding device 300 may classify the sub-vectors SV1 to SV8 into Group 1 not including the sub-vector to be code-converted and Group 2 including the sub-vector to be code-converted.

[0139] Next, the encoding device 300 encodes, for example, the quantization parameters of the sub-vectors (e.g., SV1 and SV2) included in Group1, and outputs encoded information (e.g., codebook indication value and code vector index) (S402). Further, the encoding device 300 may determine, for example, the number of bits used (or consumed) for encoding Group1, and determine the number of bits available for encoding the sub-vectors (e.g., SV3 to SV8) of Group2.

[0140] Next, the encoding device 300 determines, for example, whether the number of bits available for encoding the sub-vectors of Group2 is equal to or greater than a threshold Threhold1 (S403). For example, when the number of bits available for encoding the sub-vectors of Group2 is less than Threshold1 (S403: No), the encoding device 300 proceeds to the process shown in FIG. 14 (e.g., the process of S404), and when the number of bits available for encoding the sub-vectors of Group2 is equal to or greater than Threshold1 (S403: Yes), the encoding device 300 proceeds to the process shown in FIG. 15 (e.g., the process of S408).

[0141] Here, when the position of the sub-vector selected as the code conversion target is the third one (for example, SV3), Threshold1 may be set to 30 bits. For example, among the sub-vectors SV1 to SV8, when SV3 is set as the sub-vector to be encoded last (in other words, when there is a rearrangement of the encoding order), if the decoding results of each of the sub-vectors SV4 to SV8 after SV3 are 0 (for example, a null vector), 1 bit (for example, a maximum of 5 bits for 5 sub-vectors) may be used for each encoding. On the other hand, in the case of AVQ encoding (in other words, when there is no rearrangement of the encoding order), SV4 to SV8 after SV3 may be encoded with 0 bits each. If SV4 to SV8 are encoded with 0 bits by AVQ encoding, in the encoding method for code conversion according to the present embodiment, since a total of 5 bits are used for the encoding of SV4 to SV8, a bit reduction effect of 5 bits or more is expected in the encoding of SV3. For example, referring to FIGS. 1 and 10, since the number of encoding bits in the case of the number of unused bits being 0 is 1 bit, in order to obtain a 5-bit reduction effect, the codebook number of SV3 may be 6 or more. For example, when the codebook number is 6, the encoding information including the code vector index is 30 bits. Therefore, 30 bits may be set for the threshold Threshold1.

[0142] Note that when the position of a specific sub-vector is different from SV3, the sub-bands included in Group2 and the threshold Threshold1 may be set according to the specific sub-vector. For example, when SV4 is set as the specific sub-vector, Group2 may include SV4 to SV8, and 25 bits may be set for Threshold1.

[0143] In FIG. 14, for example, the encoding device 300 determines the encoding order of the sub-vectors in Group 2 as SV3, SV4, SV5, SV6, SV7, SV8, encodes SV3 to SV7, and outputs encoding information (for example, codebook indication value and code vector index) (S404). Also, the encoding device 300 may, for example, determine the number of bits used for encoding SV3 to SV7 and determine the number of bits available for encoding SV8 (S404).

[0144] Thus, for example, when the number of bits available for encoding Group 2 is less than Threshold1 (S403: No), the encoding device 300 does not have to perform code conversion (in other words, reordering of the encoding order) on the sub-vector SV3 in the encoding of Group 2. In other words, when the number of bits available for encoding Group 2 is less than Threshold1, the encoding device 300 may set (or change, update) the sub-vector to be code-converted from SV3 to the last sub-vector SV8 in Group 2. By this process, for example, it is possible to suppress a shortage of the number of bits in the encoding of the sub-vector to be code-converted.

[0145] Next, the encoding device 300 may, for example, determine whether the number of bits available for encoding SV8 is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S405).

[0146] When the number of bits available for encoding SV8 is less than Threshold2 or exceeds Threshold3 (S405: Yes), the encoding device 300 may encode SV8 using, for example, the AVQ encoding method (a method for encoding a codebook number), output encoding information (e.g., a codebook indication value and a code vector index), and terminate the transcoding process (S406). Thus, when the number of bits available for encoding SV8 is less than Threshold2 or exceeds Threshold3, the encoding device 300 may encode the codebook number without encoding the unused bits because the number of encoding bits by encoding the unused bits is not reduced.

[0147] On the other hand, when the number of bits available for encoding SV8 is greater than or equal to Threshold2 and does not exceed Threshold3 (S405: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output encoding information (e.g., an unused bit number indication value and a code vector index), and terminate the transcoding process (S407).

[0148] Here, for example, Threshold2 may be set to 9 bits and Threshold3 may be set to 80 bits. The reason for setting Threshold2 to 9 bits is, for example, that when the number of bits available for encoding SV8 is less than 10 bits, the number of bits used for encoding the codebook number in AVQ encoding is also 1 bit, and the effect of reducing the number of bits by transcoding cannot be obtained.

[0149] Also, for example, Threshold3 may be set experimentally or empirically. For example, the larger the number of bits available for encoding SV8, the more likely the number of unused bits will increase. Therefore, Threshold3 may be set to avoid an increase in the number of unused bits. Note that a case with a large number of unused bits may be a case where the amount of information is small, such as when the encoding target is silent. Therefore, even if the bit reduction effect cannot be obtained, there is no problem with the encoding quality. For this reason, Threshold3 may be set to a relatively large number of bits empirically, for example.

[0150] In FIG. 15, the encoding device 300 may determine, for example, the encoding order of the sub-vectors in Group2 as SV4, SV5, SV6, SV7, SV8, SV3 (S408). In other words, the encoding device 300 may set the sub-vector SVd = SV3 to be code-converted as the last sub-vector in Group2.

[0151] Next, the encoding device 300 may encode the sub-vectors one by one in the order of SV4, SV5, SV6, SV7, SV8, and output encoding information (for example, codebook instruction values and code vector indices) (S409). Also, the encoding device 300 may determine, for example, the number of bits used for encoding the sub-vectors and determine (in other words, update) the number of bits available for encoding the remaining sub-vectors in Group2 (S409).

[0152] Next, the encoding device 300 may determine whether or not the number of bits available for encoding the remaining sub-vectors in Group2 is equal to or greater than Threshold1 (S410).

[0153] If the number of bits available for encoding Group2 is less than Threshold1 (S410: No), the encoding device 300 may proceed to the process of S404 in FIG. 14, for example, change the encoding order of the remaining sub-vectors in Group2 to the order of SV3 and the other remaining sub-vectors, and perform the encoding processes of S404 to S407 in FIG. 14. These processes are, for example, because the number of bits available for encoding Group2 is not sufficient for encoding all the remaining sub-vectors, to restore the encoding order of SV3 and encode SV3 first.

[0154] On the other hand, if the number of bits available for encoding Group2 is greater than or equal to Threshold1 (S410: Yes), the encoding device 300 may determine, for example, whether the next sub-vector to be encoded is SV3 (S411). If the next sub-vector to be encoded is not SV3 (the sub-vector to be code-converted) (S411: No), the encoding device 300 may proceed to the process of S409, for example, and encode the next sub-vector. The encoding device 300 may repeat the processes of S409 to S411 to encode SV4, SV5, SV6, SV7, and SV8 in order, for example.

[0155] If the next sub-vector to be encoded is SV3 (S411: Yes), the encoding device 300 proceeds to the process of S412 shown in FIG. 16, for example.

[0156] In FIG. 16, the encoding device 300 may determine, for example, whether the number of bits available for encoding SV3 (= SVd) exceeds Threshold3 (S412).

[0157] When the number of bits available for encoding SV3 exceeds Threshold3 (S412: Yes), the encoding device 300 may, for example, encode SV3 based on AVQ encoding without performing code conversion, output encoding information (e.g., codebook indication value and code vector index), and terminate the code conversion process (S413). In this way, when the number of bits available for encoding SV3 exceeds Threshold3, the number of unused bits increases, and the number of bits of the unused bit number indication value tends to increase. Therefore, the encoding device 300 may encode the codebook number.

[0158] On the other hand, when the number of bits available for encoding SV3 is less than or equal to Threshold3 (S412: No), the encoding device 300 may, for example, encode the number of unused bits instead of encoding the codebook number of SV3, output encoding information (e.g., codebook indication value and code vector index), and terminate the code conversion process (S414).

[0159] Next, another operation example in the encoding device 300 will be described.

[0160] FIG. 17 is a flowchart showing another operation example in the encoding device 300. In FIG. 17, as an example, an operation example in the encoding device 300 when the position of the subvector to be code-converted is the subvector SV8 at the highest position in the frequency domain (e.g., the last subvector) is shown.

[0161] Note that the operation example shown in FIG. 17 may be the same as, for example, the operation example shown in FIG. 14. FIG. 14 shows the case where the position of the sub-vector selected as the code conversion target is SV3 and the code conversion of the coding information of SV3 cannot be performed (for example, when the coding order of the sub-vectors cannot be swapped to place the coding of SV3 last in order to apply coding of unused bits to the coding of SV3). In this case, SV8 is switched to the sub-vector to be code-converted instead of SV3, and it is determined whether coding of unused bits can be applied to the coding of SV8 (for example, whether the number of coded bits is reduced when coding unused bits rather than coding the codebook number).

[0162] In FIG. 17, for example, the encoding device 300 encodes SV1 to SV7 and outputs encoding information (for example, a codebook indication value and a code vector index) (S501). Further, the encoding device 300 may determine, for example, the number of bits used for encoding SV1 to SV7 and determine the number of bits available for encoding SV8 (S501).

[0163] Next, the encoding device 300 may determine, for example, whether the number of bits available for encoding SV8 is less than a threshold Threshold2 or exceeds a threshold Threshold3 (S502).

[0164] If the number of bits available for encoding SV8 is less than Threshold2 or exceeds Threshold3 (S502: Yes), the encoding device 300 may encode SV8 using, for example, the encoding method of AVQ (encoding the codebook number), output the encoding information (for example, a codebook indication value and a code vector index), and end the code conversion process (S503). In this way, when the number of bits available for encoding SV8 is less than Threshold2 or exceeds Threshold3, the encoding device 300 may perform encoding of the codebook number without performing encoding of unused bits because the number of encoded bits by encoding of unused bits is not reduced.

[0165] On the other hand, when the number of bits available for encoding SV8 is equal to or more than Threshold2 and does not exceed Threshold3 (S502: No), the encoding device 300 may encode the number of unused bits instead of encoding the codebook number, output encoding information (e.g., an unused bit number indication value and a code vector index), and end the transcoding process (S504).

[0166] Note that in FIG. 17, for example, the values set in FIG. 14 may be applied to Threshold2 and Threshold3.

[0167] Next, an example of the encoding process for the number of unused bits in the process of S407 in FIG. 14, the process of S414 in FIG. 16, or the process of S504 in FIG. 17 will be described.

[0168] FIG. 18 shows a flowchart of an example of the encoding process for the number of unused bits.

[0169] In FIG. 18, the encoding device 300 may determine, for example, whether the subvector to be transcoded is SV8 (S601). When the subvector to be transcoded is SV8 (S601: Yes), the encoding device 300 proceeds to the process of S605, for example.

[0170] On the other hand, when the subvector to be transcoded is not SV8 (for example, in the case of SV3) (S601: No), since the encoding order of the subvectors is changed, the number of bits used for encoding the subvectors after the change in the encoding order may be different from the number of bits in the case of encoding without changing the encoding order (e.g., AVQ encoding). In other words, wasted bits (e.g., redundant bits) may be generated due to the change in the encoding order. For example, when the number of bits available for encoding becomes zero by the encoding of intermediate subvectors, and subsequent subvectors (e.g., consecutive subvectors including SV8) are not encoded and are forced to be zero vectors (in other words, encoded with 0 bits), wasted bits may be generated.

[0171] In this embodiment, when the sub-vector to be code-converted is not SV8 (S601: No), the encoding device 300 counts, for example, the number of consecutive sub-vectors in which the quantization parameter is a null vector (a vector of all zeros, or a zero vector, hereinafter referred to as "NCNV") in the sub-vector to be AVQ-encoded, and checks whether SV8 (for example, the last sub-vector) is included in the sub-vector that is a null vector (S602). In other words, NCNV may indicate the number of consecutive sub-vectors that are null vectors including SV8.

[0172] Also, the encoding device 300 may calculate, for example, the remaining number of bits (hereinafter referred to as "RB") (S602). The remaining number of bits RB may be calculated, for example, by (the number of bits available for encoding the sub-vector to be code-converted) % 5. Here, "%" represents a modulo operation.

[0173] Next, the encoding device 300 may determine, for example, whether there is a possibility that waste bits will be generated by changing the encoding order of the sub-vectors (S603). The encoding device 300 may determine whether there is a possibility that waste bits will be generated, for example, based on NCNV and RB (an example of the determination will be described later). When there is no possibility that waste bits will be generated (S603: No), the encoding device 300 proceeds to the process of S605, for example.

[0174] On the other hand, when there is a possibility that waste bits may occur (S603: Yes), the encoding device 300 may update, for example, the number of bits available for encoding a subvector to be code-converted (e.g., SVd) (S604). For example, the encoding device 300 may add (5 - RB) bits to the number of bits available for encoding the subvector to be code-converted. In other words, the encoding device 300 may increase, for example, the number of bits available for encoding the subvector to be code-converted by the number of waste bits (e.g., the number of bits that may be used wastefully). Also, the encoding device 300 may update, for example, the remaining bit number RB to 0 (S604).

[0175] Note that the value "5" used for calculating the number of bits to be added (e.g., 5 - RB) and for calculating the remaining bit number RB is an example, and may be defined based on, for example, the ratio of the number of bits assigned to the codebook to the total number of bits used for encoding a plurality of subvectors (e.g., 1 / 5), or based on what multiple the number of bits used for encoding the subvector is.

[0176] Next, the encoding device 300 determines, for example, whether the remaining bit number RB is 4 bits (S605). If RB ≠ 4 (S605: No), the encoding device 300 may proceed to the process of S607 and perform a process of determining the number of unused bits.

[0177] If RB = 4 (S605: Yes), the encoding device 300 may increase, for example, the number of bits available for encoding the subvector to be code-converted by 1 bit (S606).

[0178] Next, the encoding device 300 may determine, for example, the number of unused bits (S607). For example, the encoding device 300 may calculate, as the number of unused bits, the difference between the number of bits available for the subvector to be code-converted and the number of bits used for encoding the subvector to be code-converted (e.g., the number of bits that become unused).

[0179] The symbolization device 300 may, for example, symbolize the calculated number of unused bits (S608).

[0180] Next, in the process of S603 in FIG. 18, an example of a method for determining whether wasted bits may be generated by changing the symbolization order of subvectors will be described.

[0181] For example, the symbolization device 300 may determine that there is a possibility of wasted bits being generated when at least the following conditions 1 and 2 are satisfied. Condition 1: SV8 after quantization (or SV8 to be decoded) is a null vector. Condition 2: RB + NCNV ≧ 4

[0182] For example, regarding Condition 1, when SV8 is not a null vector, all of a plurality of subvectors (for example, SV1 to SV8) are symbolized in AVQ symbolization. Therefore, whether the symbolization order of the subvectors is changed or not, the number of bits used for symbolization does not change. Thus, when SV8 is not a null vector, wasted bits cannot occur. In other words, when SV8 is a null vector, there is a possibility of wasted bits being generated.

[0183] Also, for example, regarding Condition 2, wasted bits are generated only when the number of unused bits (for example, the number of bits that become unused in AVQ symbolization) is zero.

[0184] Here, for example, the remaining bit number RB corresponds to the number of bits remaining because the number of bits available for symbolizing SVd is reduced (or insufficient) due to bits being wasted by changing the symbolization order. Also, for example, the bit number NCNV corresponds to the number of bits wasted (wasted bits) by being wasted by changing the symbolization order.

[0185] Therefore, RB+NCNV can be a value of 5 or more. Note that, for example, while the number of bits used for encoding a subvector is a multiple of 5 (e.g., 5n), in some cases, for example, the last 1 bit (stop bit) of the codebook indication value can be omitted. Thus, RB+NCNV can be a value of 4 or more. In this way, in Condition 2, when the number of unused bits is zero, RB+NCNV can be 4 or more. In other words, when RB+NCNV is 4 or more, the number of unused bits is zero and wasted bits may occur. When RB+NCNV is less than 4, since there are unused bits, wasted bits cannot occur.

[0186] Note that Condition 2 may be set as follows. Condition 2’: Let the number of remaining bits be RB, the number of consecutive subvectors (including SV8) that are null vectors be “NCNVV”, and the estimated codebook number be ECBI. Then, (the number of bits available for SVd)+NCNVV≧5×ECBI+4

[0187] Here, ECBI=(INT)(the number of bits available for SVd / 5) may be used. Also, the function (INT)(X) may be a function that returns the value obtained by truncating the decimal part of X.

[0188] Next, an operation example of the AVQ decoder according to this embodiment will be described.

[0189] FIG. 19 is a block diagram showing a configuration example of an AVQ decoder (hereinafter, referred to as a “decoding device” for convenience) 400 according to an embodiment of the present disclosure. In FIG. 19, components that perform the same processing as the decoding device 200 shown in FIG. 11 are denoted by the same reference numerals.

[0190] In FIG. 19, the sub-vector specifying unit 401 may output information regarding the position of a predetermined sub-vector (for example, referred to as a target sub-vector, a target sub-vector, or a fixed sub-vector) to the code conversion unit 203. The predetermined sub-vector may be, for example, any one of eight sub-vectors (for example, SV1 to SV8). For example, in the following, among the eight sub-vectors SV1 to SV8, the predetermined sub-vector will be described in the case of the third sub-vector (for example, SV3) from the lower side in the frequency domain or the last sub-vector (for example, SV8).

[0191] Note that the sub-vector specifying unit 401 does not have to perform any signal processing for specifying (designating) a sub-vector at a predetermined specific position, and for example, it does not have to be explicitly provided as a component. In FIG. 19, as an example, the sub-vector specifying unit 401 may be a memory that holds the position of a predetermined sub-vector.

[0192] In the decoding device 400 shown in FIG. 19, the operations of components different from the sub-vector specifying unit 401 may be the same as the operations of the decoding device 200 shown in FIG. 11.

[0193] Next, an operation example different from Embodiment 2 in the decoding device 400 will be described.

[0194] Note that the method for selecting the sub-vector to be code-converted may be the same as the method shown in FIG. 5. In the present embodiment, the code conversion unit 203 may use the position information of a sub-vector specified in advance instead of the main sub-vector information. Further, the sub-vector selection process may be performed, for example, not by the code conversion unit 203 but by the sub-vector specifying unit 401. In this case, AVQ bit-budget information may be input to the sub-vector specifying unit 401, and information regarding the selected sub-vector may be input to the code conversion unit 203 as the position information of the sub-vector.

[0195] Figures 20 to 23 show flowcharts illustrating operation examples in the decoding device 400. In Figures 20 to 23, as an example, an operation example in the decoding device 400 is shown when the position of the subvector to be code-converted is the third subvector SV3 from the lower side in the frequency domain.

[0196] In the description of Figures 20 to 23, the plurality of subvectors SV1 to SV8, and the threshold values Threshold1, Threshold2, and Threshold3 may be the same as those in Figures 13 to 16.

[0197] In Figure 20, the decoding device 400 may, for example, decode the subvectors of Group1 (for example, SV1 and SV2) and output decoded information (for example, codebook number and code vector index) (S701). Further, the decoding device 400 may, for example, calculate the number of bits of the bit string used for decoding the subvectors of Group1 (for example, SV1 and SV2), and subtract the number of bits used for decoding SV1 and SV2 from the number of bits allocated to the entire AVQ (for example, AVQ bit-budget) to calculate the number of remaining bits as the bit string of the subvectors of Group2 (S701).

[0198] Next, the decoding device 400 determines, for example, whether the number of remaining bits as the bit string of the subvectors of Group2 is equal to or greater than the threshold value Threshold1 (S702). For example, when the number of remaining bits as the bit string of the subvectors of Group2 is less than the Threshold1 threshold value (S702: No), the decoding device 400 proceeds to the process shown in Figure 21 (for example, the process of S703), and when the number of remaining bits as the bit string of the subvectors of Group2 is equal to or greater than Threshold1 (S702: Yes), the decoding device 400 proceeds to the process shown in Figure 22 (for example, the process of S703).

[0199] In FIG. 21, for example, the decoding device 400 determines (or interprets) the encoding order of the sub-vectors in Group 2 as SV3, SV4, SV5, SV6, SV7, SV8, decodes each of SV3 to SV7, and outputs the decoding results (codebook number and code vector index) (S703). Further, the decoding device 400 may calculate, for example, the number of bits of the bit sequence used for decoding SV3 to SV7, and calculate the number of remaining bits as the bit sequence (encoded code) of SV8 (S703).

[0200] Thus, for example, when the number of remaining bits as the bit sequence of the sub-vectors in Group 2 is less than Threshold1 (S702: No), the decoding device 400 may determine that no code conversion (in other words, rearrangement of the encoding order) has been performed on the sub-vector SV3 that is the code conversion target in the encoding device 100.

[0201] Next, the decoding device 400 may determine, for example, whether the number of remaining bits as the bit sequence of SV8 is less than the threshold Threshold2 or exceeds the threshold Threshold3 (S704).

[0202] When the number of remaining bits as the bit sequence of SV8 is less than Threshold2 or exceeds Threshold3 (S704: Yes), the decoding device 400 may determine, for example, that SV8 is encoded by the AVQ encoding method (method for encoding the codebook number), decode SV8, output the decoding information (for example, codebook number and code vector index), and end the decoding process (S705).

[0203] On the other hand, when the number of remaining bits as the bit sequence of SV8 is equal to or greater than Threshold2 and does not exceed Threshold3 (S704: No), the decoding device 400 determines, for example, that the number of unused bits is encoded instead of the codebook number of SV8, and decodes the number of unused bits and the code vector index (S706). Further, the decoding device 400 may determine the codebook number of SV8 based on, for example, the number of bits remaining as the bit sequence of SV8 and the decoded number of unused bits (S706). An example of a method for determining the codebook number will be described later. The decoding device 400 may output the determined decoded information of SV8 (for example, the codebook number and the code vector index) and end the decoding process.

[0204] In FIG. 22, the decoding device 400 may determine (or interpret) the encoding order of the sub-vectors within Group2 as SV4, SV5, SV6, SV7, SV8, SV3, for example (S707). In other words, the decoding device 400 may set the sub-vector SVd = SV3 to be code-converted as the last sub-vector in Group2.

[0205] Next, the decoding device 400 may decode the sub-vectors one by one in the order of SV4, SV5, SV6, SV7, SV8, for example, and output decoded information (for example, the codebook number and the code vector index) (S708). Further, the decoding device 400 may determine, for example, the number of bits of the bit sequence used for decoding the sub-vector and determine the number of bits of the bit sequences of the remaining sub-vectors in Group2 (S708).

[0206] Next, the decoding device 400 determines, for example, whether or not the number of bits of the bit sequences of the remaining sub-vectors in Group2 is equal to or greater than Threshold1 (S709).

[0207] If the number of bits in the bit sequence of the remaining sub-vectors of Group2 is less than Threshold1 (S709: No), the decoding device 400 may proceed to the process of S703 in FIG. 21, for example, change the encoding order of the remaining sub-vectors within Group2 to the order of SV3 and the order of the other remaining sub-vectors, and perform the decoding processes of S703 to S706 in FIG. 21.

[0208] On the other hand, if the number of bits in the bit sequence of the remaining sub-vectors of Group2 is greater than or equal to Threshold1 (S709: Yes), the decoding device 400 determines whether the next sub-vector to be decoded is SV3, for example (S710). If the next sub-vector to be decoded is not SV3 (the sub-vector to be code-converted) (S710: No), the decoding device 400 may proceed to the process of S708, for example, and decode the next sub-vector. The decoding device 400 may repeat the processes of S708 to S710 to decode SV4, SV5, SV6, SV7, and SV8 in order.

[0209] If the next sub-vector to be decoded is SV3 (S710: Yes), the decoding device 400 proceeds to the process of S711 shown in FIG. 23, for example.

[0210] In FIG. 23, the decoding device 400 may determine whether the number of remaining bits as the bit sequence of SV3 (= SVd) exceeds Threshold3, for example (S711).

[0211] If the number of remaining bits as the bit sequence of SV3 exceeds Threshold3 (S711: Yes), the decoding device 400 may decode SV3 based on the AVQ encoding method without performing code conversion, output decoding information (for example, codebook number and code vector index), and end the decoding process, for example (S712).

[0212] On the other hand, when the number of remaining bits as the bit string of SV3 is equal to or less than Threshold3 (S711: No), the decoding device 400 may decode, for example, an unused bit number indication value instead of the codebook number of SV3, and may also decode a code vector index (S713). Further, the decoding device 400 may determine the codebook number of SV3 based on, for example, the number of remaining bits as the bit string of SV3 and the decoded unused bit number information (S713). The decoding device 400 may output, for example, the codebook number and the code vector index of SV3 to end the decoding process. Note that an example of a method for determining the codebook number will be described later.

[0213] Next, another operation example in the decoding device 400 will be described.

[0214] FIG. 24 is a flowchart showing another operation example in the decoding device 400. In FIG. 24, as an example, an operation example in the decoding device 400 when the position of the subvector to be code-converted is the subvector SV8 at the highest position in the frequency domain (for example, the last subvector) is shown.

[0215] For example, the process of FIG. 24 is an example of a decoding process corresponding to the encoding process shown in FIG. 17. Further, the operation example shown in FIG. 24 may be the same as, for example, the operation example shown in FIG. 21.

[0216] In FIG. 21, the decoding device 400 decodes, for example, SV1 to SV7 and outputs decoded information (for example, a codebook number and a code vector index) (S801). Further, the decoding device 400 may determine the number of bits of the bit string used for decoding SV1 to SV7, and may determine the number of remaining bits as the bit string of SV8 (S801).

[0217] Next, the decoding device 400 may determine, for example, whether the number of remaining bits as the bit string of SV8 is less than the threshold Threshold2 or exceeds the threshold Threshold3 (S802).

[0218] When the number of remaining bits as the bit sequence of SV8 is less than Threshold2 or exceeds Threshold3 (S802: Yes), the decoding device 400 may determine, for example, that SV8 is encoded by the encoding method of AVQ (the method of encoding the codebook number), decode SV8, output decoding information (for example, the codebook number and the code vector index), and end the decoding process (S803).

[0219] On the other hand, when the number of remaining bits as the bit sequence of SV8 is greater than or equal to Threshold2 and does not exceed Threshold3 (S802: No), the decoding device 400 may determine, for example, that the number of unused bits is encoded instead of the codebook number of SV8, and decode the number of unused bits and the code vector index (S804). Further, the decoding device 400 may determine the codebook number of SV8 based on, for example, the number of remaining bits as the bit sequence of SV8 and the decoded number of unused bits (S804). An example of the method for determining the codebook number will be described later. The decoding device 400 may output the determined decoding information of SV8 (for example, the codebook number and the code vector index) and end the decoding process.

[0220] Next, an example of the decoding process of SVd (for example, SV3 or SV8) in the process of S706 in FIG. 21, the process of S713 in FIG. 23, or the process of S804 in FIG. 24 will be described.

[0221] FIG. 25 shows a flowchart of an example of the decoding process of SVd. The process shown in FIG. 25 may correspond to, for example, the encoding process shown in FIG. 18. The process shown in FIG. 25 includes, for example, a procedure for determining the codebook number of SVd based on the number of remaining bits and the number of unused bits as the coded bit sequence of SVd.

[0222] In FIG. 25, the decoding device 400 may determine, for example, whether the sub-vector to be code-converted is SV8 (S901). When the sub-vector to be code-converted is SV8 (S901: Yes), the decoding device 400 may proceed to the process of S905, for example.

[0223] On the other hand, when the sub-vector to be code-converted is not SV8 (here, for example, in the case of SV3) (S901: No), the decoding device 400 may, for example, count the consecutive number (e.g., NCNV) of sub-vectors (including SV8) in the decoded sub-vector whose quantization parameter is a null vector (zero vector) (S902).

[0224] Also, the decoding device 400 may, for example, calculate the remaining bit number (e.g., RB) (S902). The remaining bit number RB may be calculated, for example, by (the number of bits remaining as the sign bit string of the sub-vector to be code-converted (e.g., SV3)) % 5. Here, "%" represents a modulo operation.

[0225] Next, the decoding device 400 may, for example, determine whether to update the number of bits remaining as the bit string of SVd (e.g., SV3) based on NCNV and RB (S903). In other words, the decoding device 400 may, for example, determine whether there is a possibility that waste bits are generated due to a change in the encoding order of the sub-vectors. Note that the determination method in S903 may be the same as the determination method in the encoding device 300.

[0226] When there is no possibility that waste bits are generated (S903: No), the decoding device 400 may, for example, proceed to the process of S905.

[0227] On the other hand, when there is a possibility that waste bits are generated (S903: Yes), the decoding device 400 may, for example, update the number of bits remaining as the bit string of the sub-vector to be code-converted (e.g., SVd) (S904). For example, the decoding device 400 may add (5 - RB) bits to the number of bits remaining as the bit string of the sub-vector to be code-converted. In other words, the decoding device 400 may, for example, increase the number of bits remaining as the bit string of SVd by the number of waste bits (e.g., the number of bits that may be used wastefully). Also, the decoding device 400 may, for example, update the remaining bit number RB to 0 (S904).

[0228] Next, the decoding device 400 determines, for example, whether the number of remaining bits RB is 4 bits (S905). If RB ≠ 4 (S905: No), the decoding device 400 may proceed to the process of S907 and determine the code length of SVd obtained by AVQ encoding based on the number of unused bits (examples will be described later).

[0229] If RB = 4 (S905: Yes), the decoding device 400 may increase the number of remaining bits as the bit sequence of the subvector to be code-converted by 1 bit (S906).

[0230] Next, the decoding device 400 may determine the code length of SVd obtained by AVQ encoding based on, for example, the unused bit number information (S907). For example, the decoding device 400 may subtract the number of decoded unused bits from the number of remaining bits as the bit sequence of the subvector to be code-converted to calculate the code length of SVd (for example, the number of bits of the code (bit sequence) obtained by AVQ encoding).

[0231] As an example, as shown in FIG. 10, when the association between the number of unused bits and the code (unused bit number indication value) is defined, the code length of SV8 may be determined as follows. Code length of SV8 =(INT((the number of remaining bits as the encoded bit sequence of SV8 - (the "number of bits" in FIG. 10 - 1) × 5) / 5)+1)×5

[0232] For example, when the number of remaining bits as the encoded bit sequence of SV8 = 13 bits and the code of the number of unused bits = 10, the code length of SV8 is (INT((13 - 5) / 5)+1)×5 = 10 bits. When the code of the number of unused bits = 10, the number of decoded unused bits is any of 1 to 5 bits based on FIG. 10. However, when the number of remaining bits as the encoded bit sequence of SV8 is 13 bits, the number of decoded unused bits may be specified as 3. This is because the code length of the subvector is set to a multiple of 5.

[0233] Next, the decoding device 400 may decode the codebook number and the code vector index of SVd, for example, based on the code length of SVd (S908). As an example, when the code length of SV8 = 10 bits, the decoding device 400 may decode the codebook number = 2 based on FIG. 1.

[0234] As described above, in the present embodiment, the encoding device 300, based on the number of bits available for encoding the sub-vector in vector quantization, determines whether to perform encoding of the codebook number for the sub-vector to be code-converted or encoding based on the difference between the number of bits assigned for vector quantization and the number of bits of the quantization parameter (for example, encoding of the unused number of bits).

[0235] In this way, by switching between encoding the codebook number and encoding the unused number of bits based on the number of bits available for encoding, it is possible to perform encoding according to the number of bits available for encoding in multi-rate lattice vector quantization, and the number of encoding bits can be reduced. Therefore, according to the present embodiment, the number of encoding bits in multi-rate lattice vector quantization can be reduced.

[0236] Also, according to the present embodiment, even when the sub-vector to be code-converted to the unused number of bits indication value is a sub-vector different from the last sub-vector (for example, SV8) (in other words, when the encoding order is swapped), the encoding device 300 can accurately determine the unused number of bits according to the wasted number of bits that may occur due to the swapping of the encoding order.

[0237] Also, according to the present embodiment, the decoding device 400 can identify encoding information regarding the sub-vector to be code-converted based on parameters such as, for example, the number of bits used for encoding and decoding information (e.g., the codebook indication value of a sub-vector different from the sub-vector to be code-converted). Therefore, for example, a signal (e.g., a flag or dedicated control information for switching) for switching between encoding of the codebook indication value and encoding of the number of unused bits does not have to be notified from the encoding device 300 to the decoding device 400.

[0238] The embodiments of the present disclosure have been described above.

[0239] Note that in one embodiment of the present disclosure, the codebook list is not limited to the example shown in FIG. 1, and the values of the codebook indication value, the code vector index, and the number of used bits (or the total number of used bits) in the codebook may be other values. Also, the above-described threshold value may be set according to the codebook list applied to encoding and decoding.

[0240] Also, for example, in FIG. 1, the case where the ratio of the number of bits used for the codebook indication value to the total number of bits used in each codebook is 1 / 5 (in other words, the divisor when using the remainder is 5) has been described, but it is not limited thereto.

[0241] Also, in the above-described embodiment, the case where the number of sub-vectors into which the input signal S(f) is divided is 8 has been described, but the number of sub-vectors into which the input signal S(f) is divided is not limited to 8.

[0242] Further, in the above-described embodiments, as an example, the case where the input signal is divided into a plurality of subvectors in the frequency domain has been described. However, the present invention is not limited to this, and the input signal may be divided into a plurality of subvectors in the time domain. In the case of the time domain, for example, a specific subvector (as an example, the third subvector from the earliest or the last subvector) among a plurality of subvectors arranged in the time domain may be set as the subvector SVd to be code-converted described above. In this way, in one embodiment of the present disclosure, when the input signal is divided into subvectors of a fixed length in either the frequency domain or the time domain, any subvector in the arranged subvectors (for example, a subvector in a specific order (for example, the third order) or the last subvector) may be set as the subvector SVd to be code-converted.

[0243] Further, in the above-described embodiments, the vector quantization is not limited to AVQ, and other methods may be used.

[0244] Note that the present disclosure can be implemented by software, hardware, or software in cooperation with hardware. Each functional block used in the description of the above embodiments can be realized, partially or entirely, as an LSI which is an integrated circuit, and each process described in the above embodiments can be controlled, partially or entirely, by one LSI or a combination of LSIs. The LSI may be composed of individual chips, or may be composed of one chip so as to include a part or all of the functional blocks. The LSI may be provided with data input and output. Depending on the degree of integration, the LSI may also be referred to as an IC, a system LSI, a super LSI, or an ultra LSI. The method of integrating into an integrated circuit is not limited to LSI, and it may be realized by a dedicated circuit, a general-purpose processor, or a dedicated processor. Also, after manufacturing the LSI, an FPGA (Field Programmable Gate Array) that can be programmed, or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used. The present disclosure may be realized as digital processing or analog processing. Furthermore, if a technology for integrating into an integrated circuit that replaces the LSI appears due to the progress of semiconductor technology or another derived technology, naturally, the integration of functional blocks may be performed using that technology. The application of biotechnology or the like is possible as a possibility.

[0245] The present disclosure can be implemented in any type of apparatus, device, system having a communication function (collectively referred to as a communication apparatus). The communication apparatus may include a wireless transceiver and a processing / control circuit. The wireless transceiver may include a receiving unit and a transmitting unit, or may include them as functions. The wireless transceiver (transmitting unit, receiving unit) may include an RF (Radio Frequency) module and one or more antennas. The RF module may include an amplifier, an RF modulator / demodulator, or the like. Non-limiting examples of the communication apparatus include a telephone (mobile phone, smartphone, etc.), a tablet, a personal computer (PC) (laptop, desktop, notebook, etc.), a camera (digital still / video camera, etc.), a digital player (digital audio / video player, etc.), a wearable device (wearable camera, smartwatch, tracking device, etc.), a game console, a digital book reader, a telehealth / telemedicine (remote healthcare / medical prescription) device, a vehicle or mobile transportation means with a communication function (automobile, airplane, ship, etc.), and combinations of the various apparatuses described above.

[0246] The communication apparatus is not limited to portable or movable ones, and includes any type of apparatus, device, system that is not portable or is fixed, for example, smart home devices (home appliances, lighting devices, smart meters or measuring devices, control panels, etc.), vending machines, and any "things" that can exist on other IoT (Internet of Things) networks.

[0247] Communication includes data communication by a cellular system, a wireless LAN system, a communication satellite system, etc., and also includes data communication by combinations thereof.

[0248] In addition, the communication device also includes devices such as a controller and a sensor that are connected or coupled to a communication device that executes the communication function described in the present disclosure. For example, it includes a controller and a sensor that generate control signals and data signals used by the communication device that executes the communication function of the communication device.

[0249] In addition, the communication device includes infrastructure facilities, such as base stations, access points, and any other devices, devices, and systems, that communicate with or control the above-mentioned various non-limiting devices.

[0250] The encoding device according to an embodiment of the present disclosure includes a quantization circuit that generates quantization parameters including information related to a codebook of vector quantization, and based on the number of bits available for encoding a sub-vector in the vector quantization, a first encoding of the information for the target sub-vector, and a second encoding based on the difference between the number of allocated bits of the vector quantization and the number of bits of the quantization parameters, and a control circuit that determines which of the first encoding and the second encoding to perform.

[0251] In one embodiment of the present disclosure, the control circuit classifies a plurality of sub-vectors into a first group that does not include the target sub-vector and a second group that includes the target sub-vector, encodes the quantization parameters of the sub-vectors included in the first group, and determines which of the first encoding and the second encoding to perform based on the number of available bits in the second group.

[0252] In one embodiment of the present disclosure, when the number of available bits in the second group is less than a first threshold, the control circuit sets the target sub-vector to the sub-vector with the highest frequency or the last sub-vector in the time domain in the second group.

[0253] In one embodiment of the present disclosure, the control circuit determines to perform the first encoding when the number of available bits of the target subvector is less than a second threshold or exceeds a third threshold, and determines to perform the second encoding when the number of available bits of the target subvector is greater than or equal to the second threshold and less than or equal to the third threshold.

[0254] In one embodiment of the present disclosure, the control circuit determines to perform the first encoding when the number of available bits of the target subvector exceeds a threshold, and determines to perform the second encoding when the number of available bits of the target subvector is less than the threshold.

[0255] In one embodiment of the present disclosure, in the second encoding, the control circuit sets the encoding order of the target subvector to the last among the subvectors included in the second group.

[0256] In one embodiment of the present disclosure, the control circuit updates the number of available bits based on the number of consecutive subvectors in which the quantization parameter indicates a null vector among the subvectors different from the target subvector in the second group.

[0257] In one embodiment of the present disclosure, the control circuit adds a value obtained by subtracting the remainder of 5 with respect to the number of available bits from 5 to the number of available bits.

[0258] In one embodiment of the present disclosure, the plurality of subvectors includes eight subvectors, and the target subvector is the third subvector from the lower side in the frequency domain or the third subvector from the earlier side in the time domain among the eight subvectors.

[0259] In one embodiment of the present disclosure, the target subvector is the subvector with the highest frequency or the last subvector in the time domain among the plurality of subvectors.

[0260] In one embodiment of the present disclosure, the target sub-vector is the sub-vector among the plurality of sub-vectors that has the highest energy of the adaptive codebook vector.

[0261] In one embodiment of the present disclosure, among the information obtained by encoding each of the candidates for the second number of bits, the number of bits of the encoded information for the candidate with a higher occurrence probability is smaller.

[0262] A decoding apparatus according to an embodiment of the present disclosure includes a control circuit that determines which of a first decoding for first information regarding a codebook of the vector quantization for a target sub-vector and a second decoding based on a difference between an assigned number of bits of the vector quantization and the number of bits of the quantization parameter including the first information is to be performed based on the number of bits available for encoding a sub-vector in the vector quantization, and an inverse quantization circuit that performs inverse vector quantization based on a result of either the first decoding or the second decoding.

[0263] In an encoding apparatus according to an embodiment of the present disclosure, the encoding apparatus generates a quantization parameter including information regarding a codebook of vector quantization, and determines which of a first encoding for the information regarding a target sub-vector and a second encoding based on a difference between an assigned number of bits of the vector quantization and the number of bits of the quantization parameter is to be performed based on the number of bits available for encoding a sub-vector in the vector quantization.

[0264] In a decoding method according to an embodiment of the present disclosure, a decoding apparatus determines which of a first decoding for first information regarding a codebook of the vector quantization for a target sub-vector and a second decoding based on a difference between an assigned number of bits of the vector quantization and the number of bits of the quantization parameter including the first information is to be performed based on the number of bits available for encoding a sub-vector in the vector quantization, and performs inverse vector quantization based on a result of either the first decoding or the second decoding.

[0265] The disclosure content of U.S. Provisional Application No. 63 / 164,942 filed on March 23, 2021, and the disclosure content of the specification, drawings, and abstracts included in Japanese Application No. 2021-118130 filed on July 16, 2021, are all incorporated herein by reference.

Industrial Applicability

[0266] One embodiment of the present disclosure is useful for an encoding system and the like.

Explanation of Signs

[0267] 100, 300 Encoding device 101 Multiplication unit 102 Subtractor 103 De-emphasis unit 104 DCT unit 105 AVQ encoding unit 106, 205 Floating-point number management unit 107, 206 Inverse DCT unit 108, 202, 301, 401 Sub-vector identification unit 109, 203 Code conversion unit 110 Multiplexing unit 200 Decoding device 201 Separation unit 204 AVQ decoding unit

Claims

Claims 1. For each of a plurality of subvectors obtained by dividing a signal in the frequency domain, a codebook index indicating a codebook used for vector quantization and a code vector index indicating a selected code vector among a plurality of code vectors included in the codebook, a quantization circuit for generating quantization parameters including; From the number of bits (AVQ bit budget) allocated to vector quantization in one subframe including the plurality of subvectors, subtract the total number of bits used for encoding the quantization parameters of subvectors other than the target subvector among the plurality of subvectors, and based on the number of bits available for encoding the quantization parameters of the target subvector thus obtained, a first encoding for encoding the quantization parameters of the target subvector, and from the number of bits available for encoding the quantization parameters of the target subvector, subtract the number of bits required for encoding the quantization parameters of the target subvector to obtain the number of unused bits, and determine which of the second encoding for encoding the number of unused bits is to be performed, for the target subvector, execute the determined first encoding or second encoding, and for each of the subvectors other than the target subvector, a control circuit for executing the first encoding for encoding the quantization parameters of each subvector; An encoding apparatus comprising. 【Claims 2】 The control circuit is Classify the plurality of subvectors into a first group not including the target subvector and a second group including the target subvector, Encode the quantization parameters of the subvectors included in the first group, Based on the number of bits available in the second group, determine which of the first encoding and the second encoding is to be performed. The encoding apparatus according to claim 1. 【Claims 3】 When the number of bits available in the second group is less than a first threshold, the control circuit sets the target subvector to the subvector with the highest frequency or the last subvector in the time domain among the second group. The encoding apparatus according to claim 2. 【Claims 4】 The control circuit is Determine to perform the first encoding when the number of available bits of the target sub-vector is less than a second threshold or exceeds a third threshold. Determine to perform the second encoding when the number of available bits of the target sub-vector is greater than or equal to the second threshold and less than or equal to the third threshold. The encoding device according to claim 3.

5. The control circuit determines to perform the first encoding when the number of available bits of the target sub-vector exceeds a threshold, and determines to perform the second encoding when the number of available bits of the target sub-vector is less than the threshold. The encoding device according to claim 2.

6. In the second encoding, the control circuit sets the encoding order of the target sub-vector at the end of the sub-vectors included in the second group. The encoding device according to claim 2.

7. The control circuit updates the number of available bits based on the number of consecutive sub-vectors in which the quantization parameter indicates a null vector among the sub-vectors different from the target sub-vector of the second group. The encoding device according to claim 5.

8. The control circuit adds a value obtained by subtracting the remainder of 5 with respect to the number of available bits from 5 to the number of available bits. The encoding device according to claim 6.

9. The target sub-vector is the third sub-vector from the lower one in the frequency domain or the third sub-vector from the earlier one in the time domain among eight sub-vectors. The encoding device according to claim 1.

10. The target sub-vector is the sub-vector with the highest frequency or the last sub-vector in the time domain among the plurality of sub-vectors. The encoding device according to claim 1.

11. The target sub-vector is the sub-vector with the highest energy of the adaptive codebook vector among the plurality of sub-vectors. The encoding device according to claim 1.

12. An encoding method in an encoding device, For each of a plurality of sub-vectors obtained by dividing a signal in the frequency domain, generate a quantization parameter including a codebook index indicating a codebook used for vector quantization and a code vector index indicating a code vector selected from a plurality of code vectors included in the codebook. Based on the number of bits available for encoding the quantization parameters of the target subvector, which is obtained by subtracting from the allocation bit number (AVQ bit budget) assigned to vector quantization in one subframe including the plurality of subvectors, the sum of the number of bits used for encoding the quantization parameters of the subvectors other than the target subvector among the plurality of subvectors, determine which of the first encoding for encoding the quantization parameters of the target subvector and the second encoding for encoding the unused number of bits obtained by subtracting the number of bits required for encoding the quantization parameters of the target subvector from the number of bits available for encoding the quantization parameters of the target subvector to perform, for the target subvector, execute the determined first encoding or second encoding, and for each of the subvectors other than the target subvector, execute the first encoding for encoding the quantization parameters of each subvector. Encoding method.

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